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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [PATCH 3/9] drm/i915/wm: s/skl_check_nv12_wm_level()/skl_check_wm_level_nv12()/
Date: Thu, 19 Mar 2026 13:40:28 +0200	[thread overview]
Message-ID: <20260319114034.7093-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20260319114034.7093-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rename skl_check_nv12_wm_level() to skl_check_wm_level_nv12(). There
will be a sort of DDB counterparts to skl_check_wm_level*(), and
putting the "nv12" part to the end will allow consistent naming.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 1664b84d0387..24978f312fec 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1356,7 +1356,7 @@ skl_check_wm_level(struct skl_wm_level *wm, const struct skl_ddb_entry *ddb)
 }
 
 static void
-skl_check_nv12_wm_level(struct skl_wm_level *wm, struct skl_wm_level *uv_wm,
+skl_check_wm_level_nv12(struct skl_wm_level *wm, struct skl_wm_level *uv_wm,
 			const struct skl_ddb_entry *ddb_y, const struct skl_ddb_entry *ddb)
 {
 	if (wm->min_ddb_alloc > skl_ddb_entry_size(ddb_y) ||
@@ -1555,7 +1555,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state,
 
 			if (DISPLAY_VER(display) < 11 &&
 			    crtc_state->nv12_planes & BIT(plane_id))
-				skl_check_nv12_wm_level(&wm->wm[level],
+				skl_check_wm_level_nv12(&wm->wm[level],
 							&wm->uv_wm[level],
 							ddb_y, ddb);
 			else
-- 
2.52.0


  parent reply	other threads:[~2026-03-19 11:40 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-19 11:40 [PATCH 0/9] drm/i915/wm: Clean up pre-icl NV12 watermarks Ville Syrjala
2026-03-19 11:40 ` [PATCH 1/9] drm/i915/wm: Nuke is_planar from skl+ wm structures Ville Syrjala
2026-03-19 12:27   ` Jani Nikula
2026-03-19 11:40 ` [PATCH 2/9] drm/i915/wm: Reorder the arguments to skl_allocate_plane_ddb() Ville Syrjala
2026-03-19 12:28   ` Jani Nikula
2026-03-19 11:40 ` Ville Syrjala [this message]
2026-03-19 13:07   ` [PATCH 3/9] drm/i915/wm: s/skl_check_nv12_wm_level()/skl_check_wm_level_nv12()/ Jani Nikula
2026-03-19 11:40 ` [PATCH 4/9] drm/i915/wm: Extract skl_allocate_plane_ddb_nv12() Ville Syrjala
2026-03-19 13:21   ` Jani Nikula
2026-03-19 11:40 ` [PATCH 5/9] drm/i915/wm: Nuke wm->uv_wm[] Ville Syrjala
2026-03-19 14:06   ` Jani Nikula
2026-03-19 11:40 ` [PATCH 6/9] drm/i915/wm: s/skl_print_plane_changes()/skl_print_plane_wm_changes()/ Ville Syrjala
2026-03-19 13:36   ` Jani Nikula
2026-03-19 11:40 ` [PATCH 7/9] drm/i915/wm: Extract skl_print_plane_ddb_changes() Ville Syrjala
2026-03-19 13:38   ` Jani Nikula
2026-03-19 11:40 ` [PATCH 8/9] drm/i915/wm: Include ddb_y in skl_print_wm_changes() on pre-icl Ville Syrjala
2026-03-19 13:44   ` Jani Nikula
2026-03-19 14:03     ` Ville Syrjälä
2026-03-19 11:40 ` [PATCH 9/9] drm/i915/wm: Include .min_ddb_alloc_uv in the wm dumps Ville Syrjala
2026-03-19 14:01   ` Jani Nikula
2026-03-19 11:48 ` ✓ CI.KUnit: success for drm/i915/wm: Clean up pre-icl NV12 watermarks Patchwork
2026-03-19 12:39 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-20 13:27 ` ✓ Xe.CI.FULL: " Patchwork

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