From: Matthew Auld <matthew.auld@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Subject: [PATCH v2 07/10] drm/xe/guc: handle submit mask with paging engine
Date: Fri, 22 May 2026 13:37:28 +0100 [thread overview]
Message-ID: <20260522123720.39656-19-matthew.auld@intel.com> (raw)
In-Reply-To: <20260522123720.39656-12-matthew.auld@intel.com>
We need to also re-map the submit mask so that we correctly account for
the remapped logical mask of, if the GUC_PAGING_CLASS is in play.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/xe/xe_guc.h | 1 +
drivers/gpu/drm/xe/xe_guc_ads.c | 21 +++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_submit.c | 3 ++-
3 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 61e3ee19a59b..dd98ceb81026 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -70,6 +70,7 @@ int xe_guc_g2g_test_notification(struct xe_guc *guc, u32 *payload, u32 len);
u16 xe_hwe_to_guc_class(struct xe_hw_engine *hwe);
u16 xe_hwe_guc_logical_instance(struct xe_hw_engine *hwe);
+u32 xe_hwe_guc_logical_to_submit_mask(struct xe_hw_engine *hwe, u32 logical_mask);
static inline struct xe_gt *guc_to_gt(struct xe_guc *guc)
{
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index 8dd6400827be..7437d443343e 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -552,6 +552,27 @@ u16 xe_hwe_guc_logical_instance(struct xe_hw_engine *hwe)
return hwe->logical_instance;
}
+u32 xe_hwe_guc_logical_to_submit_mask(struct xe_hw_engine *hwe, u32 logical_mask)
+{
+ struct xe_gt *gt = hwe->gt;
+
+ if (xe_gt_is_usm_hwe(gt, hwe)) {
+ int shift = gt->usm.paging_hwe0->logical_instance;
+ u32 paging_logical_mask = gt->usm.paging_logical_mask;
+
+ xe_gt_assert(gt, (logical_mask & paging_logical_mask) == logical_mask);
+
+ /*
+ * Remap to GUC_PAGING_CLASS logical instance mask, if
+ * applicable.
+ */
+ if (xe_guc_has_paging_engine(&hwe->gt->uc.guc))
+ return logical_mask >> shift;
+ }
+
+ return logical_mask;
+}
+
/*
* Write the offsets corresponding to the golden LRCs. The actual data is
* populated later by guc_golden_lrc_populate()
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 1ee4f2434876..53df499df968 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -986,7 +986,8 @@ static void register_exec_queue(struct xe_exec_queue *q, int ctx_type)
memset(&info, 0, sizeof(info));
info.context_idx = q->guc->id;
info.engine_class = xe_hwe_to_guc_class(q->hwe);
- info.engine_submit_mask = q->logical_mask;
+ info.engine_submit_mask =
+ xe_hwe_guc_logical_to_submit_mask(q->hwe, q->logical_mask);
info.hwlrca_lo = lower_32_bits(xe_lrc_descriptor(lrc));
info.hwlrca_hi = upper_32_bits(xe_lrc_descriptor(lrc));
info.flags = CONTEXT_REGISTRATION_FLAG_KMD |
--
2.54.0
next prev parent reply other threads:[~2026-05-22 12:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-22 12:37 [PATCH v2 00/10] GuC paging engine support Matthew Auld
2026-05-22 12:37 ` [PATCH v2 01/10] drm/xe/guc: refactor ads to use guc_class Matthew Auld
2026-05-23 1:03 ` Daniele Ceraolo Spurio
2026-05-26 9:21 ` Matthew Auld
2026-05-22 12:37 ` [PATCH v2 02/10] drm/xe/guc: refactor to_guc_class() to accept hwe Matthew Auld
2026-05-23 1:07 ` Daniele Ceraolo Spurio
2026-05-22 12:37 ` [PATCH v2 03/10] drm/xe/guc: add the plumbing for GUC_PAGING_CLASS Matthew Auld
2026-05-22 12:37 ` [PATCH v2 04/10] drm/xe/hw_engine: don't open code is_usm_hwe() Matthew Auld
2026-05-23 2:01 ` Daniele Ceraolo Spurio
2026-05-22 12:37 ` [PATCH v2 05/10] drm/xe: refactor the paging engine setup Matthew Auld
2026-05-22 12:37 ` [PATCH v2 06/10] drm/xe/guc: handle guc logical instance for paging engine Matthew Auld
2026-05-22 12:37 ` Matthew Auld [this message]
2026-05-22 12:37 ` [PATCH v2 08/10] drm/xe/vf: wire up NUM_PAGING_ENGINE_INSTANCES Matthew Auld
2026-05-22 12:37 ` [PATCH v2 09/10] drm/xe/hw_engine: document top-down paging requirement Matthew Auld
2026-05-22 12:37 ` [PATCH v2 10/10] drm/xe/guc: toggle paging engine support for NVL-S+ Matthew Auld
2026-05-22 13:57 ` ✓ CI.KUnit: success for GuC paging engine support (rev2) Patchwork
2026-05-22 14:35 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-22 20:10 ` ✗ Xe.CI.FULL: failure " Patchwork
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