[CI 0/9] drm/i915/color: Add YUV Support in color pipeline

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* [CI 0/9] drm/i915/color: Add YUV Support in color pipeline
@ 2026-09-02  7:54 Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 1/9] drm/i915/color: Add CSC on SDR plane " Chaitanya Kumar Borah
                   ` (11 more replies)
  0 siblings, 12 replies; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

This series is just for CI results. It combines the following:

https://patchwork.freedesktop.org/series/162786/#rev7
https://patchwork.freedesktop.org/series/172057/#rev2

Chaitanya Kumar Borah (7):
  drm/i915/color: Add CSC on SDR plane color pipeline
  drm/i915/display: extract glk_plane_color_ctl_input_csc helper
  drm/i915/display: simplify glk_plane_color_ctl_input_csc
  drm/i915/display: Program CSC on SDR planes based on Fixed Matrix
    Colorop
  drm/i915/color: Add support for 1D LUT in SDR planes
  drm/i915/color: Add color pipeline support for SDR planes
  drm/i915/color: Add YUV buffer support on HDR planes

Pranay Samala (2):
  drm/i915/color: Extract HDR post-CSC LUT programming to helper
    function
  drm/i915/color: Program Plane Post CSC registers for SDR planes

 drivers/gpu/drm/i915/display/intel_color.c    | 76 +++++++++++++++----
 .../drm/i915/display/intel_color_pipeline.c   | 34 +++++++--
 .../drm/i915/display/intel_display_limits.h   |  1 +
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_plane.c    | 53 ++++++++++++-
 .../drm/i915/display/skl_universal_plane.c    | 45 ++++++-----
 6 files changed, 168 insertions(+), 42 deletions(-)

-- 
2.50.1


^ permalink raw reply	[flat|nested] 16+ messages in thread

* [CI 1/9] drm/i915/color: Add CSC on SDR plane color pipeline
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
@ 2026-09-02  7:54 ` Chaitanya Kumar Borah
  2026-09-02  8:34   ` sashiko-bot
  2026-09-02  7:54 ` [CI 2/9] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
                   ` (10 subsequent siblings)
  11 siblings, 1 reply; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

Add the fixed-function CSC block to color pipeline in SDR planes
as a DRM_COLOROP_FIXED_MATRIX colorop.

v2:
- s/DRM_COLOROP_FM_YCBCR2020_FULL_RGB_NC/
	DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB
- Inline icl_is_hdr_plane() instead of storing in local variable

v3:
- In preparation of a simple pipeline
	[YUV Full/Limited -> RGB]
  Make the Fixed Matrix ColorOp support Limited Range enums
  (DRM_COLOROP_FM_YCBCRXXX_LIMITED_RGB) too.
- Therefore s/sdr_plane_pipeline/sdr_plane_yuv_pipeline

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 .../drm/i915/display/intel_color_pipeline.c   | 23 ++++++++++++++++++-
 .../drm/i915/display/intel_display_limits.h   |  1 +
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 6cf8080ee800..efd4375c4331 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -43,6 +43,18 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
 	INTEL_PLANE_CB_POST_CSC_LUT,
 };
 
+static const enum intel_color_block sdr_plane_yuv_pipeline[] = {
+	INTEL_PLANE_CB_CSC_FF,
+};
+
+static const u64 intel_plane_supported_csc_ff =
+		BIT(DRM_COLOROP_FM_YCBCR601_FULL_RGB) |
+		BIT(DRM_COLOROP_FM_YCBCR601_LIMITED_RGB) |
+		BIT(DRM_COLOROP_FM_YCBCR709_FULL_RGB) |
+		BIT(DRM_COLOROP_FM_YCBCR709_LIMITED_RGB) |
+		BIT(DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB) |
+		BIT(DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB);
+
 static bool plane_has_3dlut(struct intel_display *display, enum pipe pipe,
 			    struct drm_plane *plane)
 {
@@ -92,6 +104,12 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
 							  DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
 							  DRM_COLOROP_FLAG_ALLOW_BYPASS);
 		break;
+	case INTEL_PLANE_CB_CSC_FF:
+		ret = drm_plane_colorop_fixed_matrix_init(dev, &colorop->base, plane,
+							  &intel_colorop_funcs,
+							  intel_plane_supported_csc_ff,
+							  DRM_COLOROP_FLAG_ALLOW_BYPASS);
+		break;
 	default:
 		drm_err(plane->dev, "Invalid colorop id [%d]", id);
 		ret = -EINVAL;
@@ -126,9 +144,12 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
 	if (plane_has_3dlut(display, pipe, plane)) {
 		pipeline = xe3plpd_primary_plane_pipeline;
 		pipeline_len = ARRAY_SIZE(xe3plpd_primary_plane_pipeline);
-	} else {
+	} else if (icl_is_hdr_plane(display, to_intel_plane(plane)->id)) {
 		pipeline = hdr_plane_pipeline;
 		pipeline_len = ARRAY_SIZE(hdr_plane_pipeline);
+	} else {
+		pipeline = sdr_plane_yuv_pipeline;
+		pipeline_len = ARRAY_SIZE(sdr_plane_yuv_pipeline);
 	}
 
 	for (i = 0; i < pipeline_len; i++) {
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
index ea89473c177f..7ba7360c574e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_limits.h
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -169,6 +169,7 @@ enum aux_ch {
 enum intel_color_block {
 	INTEL_PLANE_CB_PRE_CSC_LUT,
 	INTEL_PLANE_CB_CSC,
+	INTEL_PLANE_CB_CSC_FF,
 	INTEL_PLANE_CB_POST_CSC_LUT,
 	INTEL_PLANE_CB_3DLUT,
 
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* Re: [CI 1/9] drm/i915/color: Add CSC on SDR plane color pipeline
  2026-09-02  7:54 ` [CI 1/9] drm/i915/color: Add CSC on SDR plane " Chaitanya Kumar Borah
@ 2026-09-02  8:34   ` sashiko-bot
  0 siblings, 0 replies; 16+ messages in thread
From: sashiko-bot @ 2026-09-02  8:34 UTC (permalink / raw)
  To: Chaitanya Kumar Borah; +Cc: intel-gfx, intel-xe

Thank you for your contribution! Sashiko AI review found 5 potential issue(s) to consider:

New issues:
- [High] The patch relies on core DRM functions and enum values that are not defined anywhere in the kernel tree.
- [Medium] The newly added SDR plane color pipeline is entirely unreachable because the caller function restricts pipeline initialization exclusively to HDR planes.
- [Medium] The fixed-function CSC colorop state is exposed to userspace, but the driver completely ignores its configuration when programming the hardware.

Pre-existing issues:
- [High] The error cleanup path for colorop initialization calls `drm_colorop_cleanup` on partially initialized objects, causing a NULL pointer dereference.
- [High] Missing error handling for `kasprintf` memory allocation failure leads to a kernel panic.
--

commit d4c7800e456ca3d700da2c92787c702c23a7fcd5
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Subject: drm/i915/color: Add CSC on SDR plane color pipeline

This commit introduces a fixed-function CSC block to the SDR plane color
pipeline as a DRM_COLOROP_FIXED_MATRIX color operation. It adds the new
pipeline definition and initializes it for SDR planes during setup.

> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 6cf8080ee8000..efd4375c43318 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
[ ... ]
> @@ -43,6 +43,18 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
>  	INTEL_PLANE_CB_POST_CSC_LUT,
>  };
>  
> +static const enum intel_color_block sdr_plane_yuv_pipeline[] = {
> +	INTEL_PLANE_CB_CSC_FF,
> +};
> +
> +static const u64 intel_plane_supported_csc_ff =
> +		BIT(DRM_COLOROP_FM_YCBCR601_FULL_RGB) |
> +		BIT(DRM_COLOROP_FM_YCBCR601_LIMITED_RGB) |
> +		BIT(DRM_COLOROP_FM_YCBCR709_FULL_RGB) |
> +		BIT(DRM_COLOROP_FM_YCBCR709_LIMITED_RGB) |
> +		BIT(DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB) |
> +		BIT(DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB);

[Severity: High]
Are these enum values (e.g., DRM_COLOROP_FM_YCBCR601_FULL_RGB) defined
in the kernel tree? It appears they are not defined anywhere, which would
cause a compilation failure. Is there a prerequisite patch missing from
this series?

[ ... ]
> @@ -92,6 +104,12 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
>  							  DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
>  							  DRM_COLOROP_FLAG_ALLOW_BYPASS);
>  		break;
> +	case INTEL_PLANE_CB_CSC_FF:
> +		ret = drm_plane_colorop_fixed_matrix_init(dev, &colorop->base, plane,
> +							  &intel_colorop_funcs,
> +							  intel_plane_supported_csc_ff,
> +							  DRM_COLOROP_FLAG_ALLOW_BYPASS);

[Severity: High]
Is drm_plane_colorop_fixed_matrix_init() implemented in another patch?
This core DRM function does not seem to be defined in the tree, which will
cause a build failure.

[Severity: High]
This isn't a bug introduced by this patch, but can the error path for this 
initialization lead to a NULL pointer dereference? 

If drm_plane_colorop_fixed_matrix_init() fails early, it jumps to the
cleanup label:

	if (ret)
		goto cleanup;
    ...
cleanup:
	intel_colorop_destroy(&colorop->base);

This calls drm_colorop_cleanup(), which dereferences colorop->dev:

void drm_colorop_cleanup(struct drm_colorop *colorop)
{
	struct drm_device *dev = colorop->dev;
	struct drm_mode_config *config = &dev->mode_config;

Since colorop was just allocated with kzalloc and colorop->dev might not
be set yet if initialization fails early, could dev be NULL here?

> +		break;
>  	default:
>  		drm_err(plane->dev, "Invalid colorop id [%d]", id);
>  		ret = -EINVAL;
> @@ -126,9 +144,12 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
>  	if (plane_has_3dlut(display, pipe, plane)) {
>  		pipeline = xe3plpd_primary_plane_pipeline;
>  		pipeline_len = ARRAY_SIZE(xe3plpd_primary_plane_pipeline);
> -	} else {
> +	} else if (icl_is_hdr_plane(display, to_intel_plane(plane)->id)) {
>  		pipeline = hdr_plane_pipeline;
>  		pipeline_len = ARRAY_SIZE(hdr_plane_pipeline);
> +	} else {
> +		pipeline = sdr_plane_yuv_pipeline;
> +		pipeline_len = ARRAY_SIZE(sdr_plane_yuv_pipeline);
>  	}

[Severity: Medium]
Will this newly added SDR pipeline logic ever be reached? The caller
function intel_color_pipeline_plane_init() unconditionally restricts
pipeline initialization to HDR planes with an early return:

int intel_color_pipeline_plane_init(...)
{
    ...
	/* Currently expose pipeline only for HDR planes */
	if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
		return 0;

	ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);
    ...
}

Does this early return make the sdr_plane_yuv_pipeline dead code?

[Severity: High]
This isn't a bug introduced by this patch, but does the kasprintf() call 
slightly below this block in _intel_color_pipeline_plane_init() need a 
NULL check?

	list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ...);
    return 0;

If kasprintf() fails due to OOM and returns NULL, the function still
returns 0 (success). Could this propagate a NULL pointer to 
drm_property_add_enum(), leading to a kernel panic when it tries to read
the name length?

[Severity: Medium]
Once the fixed-function CSC colorop state (INTEL_PLANE_CB_CSC_FF) is set 
by userspace, does the driver correctly apply it to the hardware?

Looking at intel_plane_color_copy_uapi_to_hw_state(), there appears to be no
logic in intel_plane_colorop_replace_blob() to extract the new fixed matrix 
configuration. Furthermore, the hardware programming in glk_plane_color_ctl()
continues to rely on the legacy hw.color_encoding field:

static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
{
    ...
	if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {
		switch (plane_state->hw.color_encoding) {
		case DRM_COLOR_YCBCR_BT709:
    ...

Could this result in the hardware being programmed with the legacy state
instead of the newly requested color pipeline configuration?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260902075417.656673-2-chaitanya.kumar.borah@intel.com?part=1

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [CI 2/9] drm/i915/display: extract glk_plane_color_ctl_input_csc helper
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 1/9] drm/i915/color: Add CSC on SDR plane " Chaitanya Kumar Borah
@ 2026-09-02  7:54 ` Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 3/9] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
                   ` (9 subsequent siblings)
  11 siblings, 0 replies; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

Extract the input CSC and YUV range correction logic from
glk_plane_color_ctl() into a dedicated glk_plane_color_ctl_input_csc()
helper. No functional change.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 .../drm/i915/display/skl_universal_plane.c    | 32 +++++++++++--------
 1 file changed, 19 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 5cda1ab90e40..f6db8ee691a2 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1245,37 +1245,43 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
 	return plane_color_ctl;
 }
 
-static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
+static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_state)
 {
 	struct intel_display *display = to_intel_display(plane_state);
 	const struct drm_framebuffer *fb = plane_state->hw.fb;
 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
-	u32 plane_color_ctl = 0;
-
-	plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
-	plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
+	u32 ctl = 0;
 
 	if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {
 		switch (plane_state->hw.color_encoding) {
 		case DRM_COLOR_YCBCR_BT709:
-			plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
+			ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
 			break;
 		case DRM_COLOR_YCBCR_BT2020:
-			plane_color_ctl |=
-				PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
+			ctl |= PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
 			break;
 		default:
-			plane_color_ctl |=
-				PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
+			ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
 		}
 		if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
-			plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+			ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
 	} else if (fb->format->is_yuv) {
-		plane_color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
+		ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
 		if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
-			plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+			ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
 	}
 
+	return ctl;
+}
+
+static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
+{
+	u32 plane_color_ctl = 0;
+
+	plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
+	plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
+	plane_color_ctl |= glk_plane_color_ctl_input_csc(plane_state);
+
 	if (plane_state->force_black)
 		plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
 
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [CI 3/9] drm/i915/display: simplify glk_plane_color_ctl_input_csc
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 1/9] drm/i915/color: Add CSC on SDR plane " Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 2/9] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
@ 2026-09-02  7:54 ` Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 4/9] drm/i915/display: Program CSC on SDR planes based on Fixed Matrix Colorop Chaitanya Kumar Borah
                   ` (8 subsequent siblings)
  11 siblings, 0 replies; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

Add early return for non-YUV formats and hoist the duplicated
color_range check out of the if/else branches. No functional change.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index f6db8ee691a2..973062dfc558 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1252,7 +1252,10 @@ static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_s
 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
 	u32 ctl = 0;
 
-	if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {
+	if (!fb->format->is_yuv)
+		return 0;
+
+	if (!icl_is_hdr_plane(display, plane->id)) {
 		switch (plane_state->hw.color_encoding) {
 		case DRM_COLOR_YCBCR_BT709:
 			ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
@@ -1263,14 +1266,13 @@ static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_s
 		default:
 			ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
 		}
-		if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
-			ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
-	} else if (fb->format->is_yuv) {
+	} else {
 		ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
-		if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
-			ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
 	}
 
+	if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
+		ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+
 	return ctl;
 }
 
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [CI 4/9] drm/i915/display: Program CSC on SDR planes based on Fixed Matrix Colorop
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
                   ` (2 preceding siblings ...)
  2026-09-02  7:54 ` [CI 3/9] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
@ 2026-09-02  7:54 ` Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 5/9] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
                   ` (7 subsequent siblings)
  11 siblings, 0 replies; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

When a color pipeline is active, program the SDR plane fixed-function
CSC based on the Fixed Matrix Colorop's state. Re-use the existing plane
state variables for color_range and color_encoding. Track the bypass state
explicitly as a boolean since bypass is managed separately from the
FIXED_MATRIX enum value in the colorop framework. Keep the programming
based on color_encoding/color_range legacy properties intact.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_plane.c    | 53 ++++++++++++++++++-
 .../drm/i915/display/skl_universal_plane.c    |  4 +-
 3 files changed, 55 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5f0fe18c0614..bc350f678857 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -683,6 +683,7 @@ struct intel_plane_state {
 		enum drm_color_range color_range;
 		enum drm_scaling_filter scaling_filter;
 		struct drm_property_blob *ctm, *degamma_lut, *gamma_lut, *lut_3d;
+		bool csc_ff_enable;
 	} hw;
 
 	struct i915_vma *ggtt_vma;
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index d0f99a87c42e..25ca049009ef 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -462,6 +462,42 @@ intel_plane_colorop_replace_blob(struct intel_plane_state *plane_state,
 	return false;
 }
 
+static u32
+fixedmatrix_colorop_to_encoding(enum drm_colorop_fixed_matrix_type fm_type)
+{
+	switch (fm_type) {
+	case DRM_COLOROP_FM_YCBCR709_FULL_RGB:
+	case DRM_COLOROP_FM_YCBCR709_LIMITED_RGB:
+		return DRM_COLOR_YCBCR_BT709;
+
+	case DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB:
+	case DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB:
+		return DRM_COLOR_YCBCR_BT2020;
+
+	case DRM_COLOROP_FM_YCBCR601_FULL_RGB:
+	case DRM_COLOROP_FM_YCBCR601_LIMITED_RGB:
+	default:
+		return DRM_COLOR_YCBCR_BT601;
+	}
+}
+
+static u32
+fixedmatrix_colorop_to_range(enum drm_colorop_fixed_matrix_type fm_type)
+{
+	switch (fm_type) {
+	case DRM_COLOROP_FM_YCBCR601_FULL_RGB:
+	case DRM_COLOROP_FM_YCBCR709_FULL_RGB:
+	case DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB:
+		return DRM_COLOR_YCBCR_FULL_RANGE;
+
+	case DRM_COLOROP_FM_YCBCR601_LIMITED_RGB:
+	case DRM_COLOROP_FM_YCBCR709_LIMITED_RGB:
+	case DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB:
+	default:
+		return DRM_COLOR_YCBCR_LIMITED_RANGE;
+	}
+}
+
 static void
 intel_plane_color_copy_uapi_to_hw_state(struct intel_atomic_state *state,
 					struct intel_plane_state *plane_state,
@@ -474,6 +510,7 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_atomic_state *state,
 	struct drm_property_blob *blob;
 	struct intel_crtc_state *new_crtc_state = state ?
 		intel_atomic_get_new_crtc_state(state, crtc) : NULL;
+	enum drm_colorop_fixed_matrix_type fm_type;
 	bool changed = false;
 	int i = 0;
 
@@ -485,11 +522,23 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_atomic_state *state,
 	while (iter_colorop) {
 		for_each_new_colorop_in_state(&state->base, colorop, new_colorop_state, i) {
 			if (new_colorop_state->colorop == iter_colorop) {
-				blob = new_colorop_state->bypass ? NULL : new_colorop_state->data;
 				intel_colorop = to_intel_colorop(colorop);
-				changed |= intel_plane_colorop_replace_blob(plane_state,
+				if (intel_colorop->id == INTEL_PLANE_CB_CSC_FF) {
+					fm_type = new_colorop_state->fixed_matrix_type;
+
+					plane_state->hw.csc_ff_enable =
+						!new_colorop_state->bypass;
+					plane_state->hw.color_encoding =
+						fixedmatrix_colorop_to_encoding(fm_type);
+					plane_state->hw.color_range =
+						fixedmatrix_colorop_to_range(fm_type);
+				} else {
+					blob = new_colorop_state->bypass ?
+						NULL : new_colorop_state->data;
+					changed |= intel_plane_colorop_replace_blob(plane_state,
 									    intel_colorop,
 									    blob);
+				}
 			}
 		}
 		iter_colorop = iter_colorop->next;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 973062dfc558..0f604bdb4c62 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1250,9 +1250,11 @@ static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_s
 	struct intel_display *display = to_intel_display(plane_state);
 	const struct drm_framebuffer *fb = plane_state->hw.fb;
 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+	bool color_pipeline = !!plane_state->uapi.color_pipeline;
+	bool needs_csc = color_pipeline ? plane_state->hw.csc_ff_enable : fb->format->is_yuv;
 	u32 ctl = 0;
 
-	if (!fb->format->is_yuv)
+	if (!needs_csc)
 		return 0;
 
 	if (!icl_is_hdr_plane(display, plane->id)) {
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [CI 5/9] drm/i915/color: Add support for 1D LUT in SDR planes
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
                   ` (3 preceding siblings ...)
  2026-09-02  7:54 ` [CI 4/9] drm/i915/display: Program CSC on SDR planes based on Fixed Matrix Colorop Chaitanya Kumar Borah
@ 2026-09-02  7:54 ` Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 6/9] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
                   ` (6 subsequent siblings)
  11 siblings, 0 replies; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

Extend the SDR plane color pipeline to post-CSC 1D LUT block.

v2:
 - In preparation of a simple pipeline
	[YUV Full/Limited -> RGB] -> [1D LUT]
   Drop pre-CSC LUT from the pipeline as it has no use in a YUV -> RGB
   pipeline. This makes the pipeline simple since the block lies between
   the YUV range correct block and Fixed function CSC. It can be added back
   when [RGB709 -> RGB2020] capability is added. Then it can be used for
   linearization.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color_pipeline.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index efd4375c4331..53e55ce0a5a3 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -45,6 +45,7 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
 
 static const enum intel_color_block sdr_plane_yuv_pipeline[] = {
 	INTEL_PLANE_CB_CSC_FF,
+	INTEL_PLANE_CB_POST_CSC_LUT,
 };
 
 static const u64 intel_plane_supported_csc_ff =
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [CI 6/9] drm/i915/color: Extract HDR post-CSC LUT programming to helper function
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
                   ` (4 preceding siblings ...)
  2026-09-02  7:54 ` [CI 5/9] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
@ 2026-09-02  7:54 ` Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 7/9] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
                   ` (5 subsequent siblings)
  11 siblings, 0 replies; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

From: Pranay Samala <pranay.samala@intel.com>

Move HDR plane post-CSC LUT programming to improve code organization.

While at it, remove the segment 0 index register writes as it is not
currently programmed.

Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 35 ++++++++++++----------
 1 file changed, 20 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 87ced9f6ff40..36c8688ed28e 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3998,25 +3998,17 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
 }
 
 static void
-xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
-				 const struct intel_plane_state *plane_state)
+xelpd_load_hdr_post_csc_lut(struct intel_display *display,
+			    struct intel_dsb *dsb,
+			    enum pipe pipe,
+			    enum plane_id plane,
+			    const struct drm_color_lut32 *post_csc_lut)
 {
-	struct intel_display *display = to_intel_display(plane_state);
-	const struct drm_plane_state *state = &plane_state->uapi;
-	enum pipe pipe = to_intel_plane(state->plane)->pipe;
-	enum plane_id plane = to_intel_plane(state->plane)->id;
-	const struct drm_color_lut32 *post_csc_lut = plane_state->hw.gamma_lut->data;
 	int i, lut_size = 32;
 	u32 lut_val;
 
-	if (!icl_is_hdr_plane(display, plane))
-		return;
-
 	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
 			   PLANE_PAL_PREC_AUTO_INCREMENT);
-	/* TODO: Add macro */
-	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),
-			   PLANE_PAL_PREC_AUTO_INCREMENT);
 
 	for (i = 0; i < lut_size + 3; i++) {
 		if (post_csc_lut) {
@@ -4036,8 +4028,21 @@ xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
 	}
 
 	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
-	intel_de_write_dsb(display, dsb,
-			   PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0), 0);
+}
+
+static void
+xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
+				 const struct intel_plane_state *plane_state)
+{
+	struct intel_display *display = to_intel_display(plane_state);
+	const struct drm_plane_state *state = &plane_state->uapi;
+	enum pipe pipe = to_intel_plane(state->plane)->pipe;
+	enum plane_id plane = to_intel_plane(state->plane)->id;
+	const struct drm_color_lut32 *post_csc_lut = plane_state->hw.gamma_lut ?
+		plane_state->hw.gamma_lut->data : NULL;
+
+	if (icl_is_hdr_plane(display, plane))
+		xelpd_load_hdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
 }
 
 static void
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [CI 7/9] drm/i915/color: Program Plane Post CSC registers for SDR planes
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
                   ` (5 preceding siblings ...)
  2026-09-02  7:54 ` [CI 6/9] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
@ 2026-09-02  7:54 ` Chaitanya Kumar Borah
  2026-09-02  7:54 ` [CI 8/9] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
                   ` (4 subsequent siblings)
  11 siblings, 0 replies; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

From: Pranay Samala <pranay.samala@intel.com>

Implement plane post-CSC LUT support for SDR planes.

v2:
- Restructure loop to match HDR function pattern

Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Co-developed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 41 ++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 36c8688ed28e..f1df0f9ba762 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4030,6 +4030,45 @@ xelpd_load_hdr_post_csc_lut(struct intel_display *display,
 	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
 }
 
+static void
+xelpd_load_sdr_post_csc_lut(struct intel_display *display,
+			    struct intel_dsb *dsb,
+			    enum pipe pipe,
+			    enum plane_id plane,
+			    const struct drm_color_lut32 *post_csc_lut)
+{
+	int i, lut_size = 32;
+	u32 lut_val;
+
+	/*
+	 * First 3 planes are HDR, so reduce by 3 to get to the right
+	 * SDR plane offset
+	 */
+	plane = plane - 3;
+
+	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0),
+			   PLANE_PAL_PREC_AUTO_INCREMENT);
+
+	for (i = 0; i < lut_size + 3; i++) {
+		if (post_csc_lut) {
+			if (i < lut_size)
+				lut_val = drm_color_lut32_extract(post_csc_lut[i].green, 16);
+			/* else duplicate last lut_val */
+		} else {
+			if (i < lut_size)
+				lut_val = (i * ((1 << 16) - 1)) / (lut_size - 1);
+			else
+				lut_val = 1 << 16;
+		}
+
+		intel_de_write_dsb(display, dsb,
+				   PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0),
+				   lut_val);
+	}
+
+	intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0), 0);
+}
+
 static void
 xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
 				 const struct intel_plane_state *plane_state)
@@ -4043,6 +4082,8 @@ xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
 
 	if (icl_is_hdr_plane(display, plane))
 		xelpd_load_hdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
+	else
+		xelpd_load_sdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
 }
 
 static void
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [CI 8/9] drm/i915/color: Add color pipeline support for SDR planes
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
                   ` (6 preceding siblings ...)
  2026-09-02  7:54 ` [CI 7/9] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
@ 2026-09-02  7:54 ` Chaitanya Kumar Borah
  2026-09-02  8:34   ` sashiko-bot
  2026-09-02  7:54 ` [CI 9/9] drm/i915/color: Add YUV buffer support on HDR planes Chaitanya Kumar Borah
                   ` (3 subsequent siblings)
  11 siblings, 1 reply; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

Now that everything is in place expose the SDR plane color pipeline
to user-space.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color_pipeline.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 53e55ce0a5a3..38cfd6ed585d 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -177,17 +177,11 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
 
 int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe)
 {
-	struct drm_device *dev = plane->dev;
-	struct intel_display *display = to_intel_display(dev);
 	struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES] = {};
 	int len = 0;
 	int ret = 0;
 	int i;
 
-	/* Currently expose pipeline only for HDR planes */
-	if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
-		return 0;
-
 	/* Add pipeline consisting of transfer functions */
 	ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);
 	if (ret)
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* Re: [CI 8/9] drm/i915/color: Add color pipeline support for SDR planes
  2026-09-02  7:54 ` [CI 8/9] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
@ 2026-09-02  8:34   ` sashiko-bot
  0 siblings, 0 replies; 16+ messages in thread
From: sashiko-bot @ 2026-09-02  8:34 UTC (permalink / raw)
  To: Chaitanya Kumar Borah; +Cc: intel-gfx, intel-xe

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

New issues:
- [High] Exposing the color pipeline for SDR planes to user-space causes visual corruption and hardware state mismatches because the underlying hardware programming functions still artificially restrict operations to HDR planes.

Pre-existing issues:
- [Critical] Dangling DRM object IDR pointer when colorop initialization fails (or on cleanup) leads to a Use-After-Free.
- [High] Missing NULL check after `kasprintf()` in `_intel_color_pipeline_plane_init()` leads to a NULL pointer dereference when string allocation fails.
--

commit 4a507c298b13a8efe368f825fd9f9b9e49485cef
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

drm/i915/color: Add color pipeline support for SDR planes

Now that everything is in place expose the SDR plane color pipeline
to user-space.

> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 6cf8080ee8000..4ea1f34dfb10e 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> @@ -155,17 +155,11 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
>  
>  int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe)
>  {
> -	struct drm_device *dev = plane->dev;
> -	struct intel_display *display = to_intel_display(dev);
>  	struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES] = {};
>  	int len = 0;
>  	int ret = 0;
>  	int i;
>  
> -	/* Currently expose pipeline only for HDR planes */
> -	if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
> -		return 0;
> -

[Severity: High]
Does removing this check cause unprogrammed hardware blocks to be activated?

By exposing the color pipeline to user-space for SDR planes, user-space can
configure the pipeline. If configured, glk_plane_color_ctl() sets the enable
bits (like PLANE_COLOR_PRE_CSC_GAMMA_ENABLE). 

However, functions that program the LUT and CSC registers still appear to
skip SDR planes:

drivers/gpu/drm/i915/display/intel_color.c:xelpd_program_plane_pre_csc_lut() {
    if (!icl_is_hdr_plane(display, plane))
        return;
    ...
}

This early return pattern also exists in xelpd_load_plane_csc_matrix() and
xelpd_program_plane_post_csc_lut(). 

Could this regression lead to visual corruption or hardware state mismatches
if the pipeline is enabled but the registers are never programmed?

>  	/* Add pipeline consisting of transfer functions */

[Severity: High]
This is a pre-existing issue, but does _intel_color_pipeline_plane_init() 
need to check the return value of kasprintf()?

In _intel_color_pipeline_plane_init():

    list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ...);
    return 0;

If kasprintf() fails, list->name is NULL. When this is passed down during 
property registration, drm_property_add_enum() calls strlen(name):

drivers/gpu/drm/drm_property.c:drm_property_add_enum() {
    if (WARN_ON(strlen(name) >= DRM_PROP_NAME_LEN))
        return -EINVAL;
    ...
}

Can this lead to a NULL pointer dereference under memory pressure?

>  	ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);
>  	if (ret)

[Severity: Critical]
This is a pre-existing issue, but can a failure during colorop 
initialization or destruction lead to a use-after-free?

When drm_plane_colorop_init() is called, it successfully registers the 
colorop with the DRM core mode object IDR:

drivers/gpu/drm/drm_colorop.c:drm_plane_colorop_init() {
    ret = drm_mode_object_add(dev, &colorop->base, DRM_MODE_OBJECT_COLOROP);
    ...
}

However, if an error occurs and intel_colorop_destroy() is called (such
as on the error path of _intel_color_pipeline_plane_init()), or when 
drm_colorop_cleanup() is executed, the structure memory is freed but 
drm_mode_object_unregister() is never called to remove the object from 
the IDR.

Does this leave a dangling pointer in the mode object IDR that could be 
accessed via the DRM_IOCTL_MODE_OBJ_GETPROPERTIES ioctl?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260902075417.656673-9-chaitanya.kumar.borah@intel.com?part=1

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [CI 9/9] drm/i915/color: Add YUV buffer support on HDR planes
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
                   ` (7 preceding siblings ...)
  2026-09-02  7:54 ` [CI 8/9] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
@ 2026-09-02  7:54 ` Chaitanya Kumar Borah
  2026-09-02  8:28   ` sashiko-bot
  2026-09-02  9:52 ` ✓ CI.KUnit: success for drm/i915/color: Add YUV Support in color pipeline Patchwork
                   ` (2 subsequent siblings)
  11 siblings, 1 reply; 16+ messages in thread
From: Chaitanya Kumar Borah @ 2026-09-02  7:54 UTC (permalink / raw)
  To: intel-xe, intel-gfx

Add the INTEL_PLANE_CB_CSC_FF (fixed function CSC) color block as the
first stage for the HDR planes. This enables YUV-to-RGB color space
conversion on HDR planes via the color pipeline.

Also in icl_program_input_csc(), account for the color pipeline
programming, in addition to FB format.

v2:
 - Increase MAX_COLOROP to 5 (Sashiko)

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color_pipeline.c | 4 +++-
 drivers/gpu/drm/i915/display/skl_universal_plane.c  | 3 ++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 38cfd6ed585d..7fc31fe891a8 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -12,7 +12,7 @@
 #include "skl_universal_plane.h"
 
 #define MAX_COLOR_PIPELINES 1
-#define MAX_COLOROP 4
+#define MAX_COLOROP 5
 #define PLANE_DEGAMMA_SIZE 128
 #define PLANE_GAMMA_SIZE 32
 
@@ -31,6 +31,7 @@ static const struct drm_colorop_funcs intel_colorop_funcs = {
  * the pipeline totally unusable.
  */
 static const enum intel_color_block xe3plpd_primary_plane_pipeline[] = {
+	INTEL_PLANE_CB_CSC_FF,
 	INTEL_PLANE_CB_PRE_CSC_LUT,
 	INTEL_PLANE_CB_CSC,
 	INTEL_PLANE_CB_3DLUT,
@@ -38,6 +39,7 @@ static const enum intel_color_block xe3plpd_primary_plane_pipeline[] = {
 };
 
 static const enum intel_color_block hdr_plane_pipeline[] = {
+	INTEL_PLANE_CB_CSC_FF,
 	INTEL_PLANE_CB_PRE_CSC_LUT,
 	INTEL_PLANE_CB_CSC,
 	INTEL_PLANE_CB_POST_CSC_LUT,
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 0f604bdb4c62..2e5bf02b480f 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1626,7 +1626,8 @@ icl_plane_update_noarm(struct intel_dsb *dsb,
 	intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),
 			   plane_color_ctl);
 
-	if (fb->format->is_yuv && icl_is_hdr_plane(display, plane_id))
+	if (icl_is_hdr_plane(display, plane_id) &&
+	    (fb->format->is_yuv || plane_state->hw.csc_ff_enable))
 		icl_program_input_csc(dsb, plane, plane_state);
 
 	skl_write_plane_wm(dsb, plane, crtc_state);
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* Re: [CI 9/9] drm/i915/color: Add YUV buffer support on HDR planes
  2026-09-02  7:54 ` [CI 9/9] drm/i915/color: Add YUV buffer support on HDR planes Chaitanya Kumar Borah
@ 2026-09-02  8:28   ` sashiko-bot
  0 siblings, 0 replies; 16+ messages in thread
From: sashiko-bot @ 2026-09-02  8:28 UTC (permalink / raw)
  To: Chaitanya Kumar Borah; +Cc: intel-xe, intel-gfx

Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] Logic Error / Fatal Initialization Error: Unhandled color block in `intel_color_pipeline_plane_add_colorop`.
- [High] Hardware Configuration Error: `PLANE_COLOR_INPUT_CSC_ENABLE` is ignored for RGB framebuffers when `csc_ff_enable` is true.
- [Low] Compilation Failure: Undeclared enum value `INTEL_PLANE_CB_CSC_FF`.
- [Low] Compilation Failure: Undeclared struct member `csc_ff_enable`.
--

commit 1c6f477c5724be8b1a87f5ec970f9c13fe79be33
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

drm/i915/color: Add YUV buffer support on HDR planes

This commit adds the INTEL_PLANE_CB_CSC_FF color block as the first stage
for HDR planes to enable YUV-to-RGB color space conversion. It also updates
icl_program_input_csc() to account for color pipeline programming.

> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 6cf8080ee8000..71451a196e165 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
[ ... ]
> @@ -31,6 +31,7 @@ static const struct drm_colorop_funcs intel_colorop_funcs = {
>   * the pipeline totally unusable.
>   */
>  static const enum intel_color_block xe3plpd_primary_plane_pipeline[] = {
> +	INTEL_PLANE_CB_CSC_FF,

[Severity: Low]
Is INTEL_PLANE_CB_CSC_FF defined in this tree? It appears to be an
undeclared enum value here, which will cause a compilation failure.

>  	INTEL_PLANE_CB_PRE_CSC_LUT,
>  	INTEL_PLANE_CB_CSC,
[ ... ]
> @@ -38,6 +39,7 @@ static const enum intel_color_block xe3plpd_primary_plane_pipeline[] = {
>  };
>  
>  static const enum intel_color_block hdr_plane_pipeline[] = {
> +	INTEL_PLANE_CB_CSC_FF,

[Severity: High]
How is this new color block handled during pipeline creation? Looking at
intel_color_pipeline_plane_add_colorop(), there doesn't seem to be a case
for INTEL_PLANE_CB_CSC_FF, meaning it will hit the default path:

intel_color_pipeline_plane_add_colorop() {
    ...
    default:
        drm_err(plane->dev, "Invalid colorop id [%d]", id);
        ret = -EINVAL;
    ...
}

Will this cause pipeline creation to immediately abort and return -EINVAL
when encountering this new block?

>  	INTEL_PLANE_CB_PRE_CSC_LUT,
>  	INTEL_PLANE_CB_CSC,
[ ... ]
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 5cda1ab90e40f..c6ec77c38cc50 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
[ ... ]
> @@ -1616,7 +1616,8 @@ icl_plane_update_noarm(struct intel_dsb *dsb,
>  	intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),
>  			   plane_color_ctl);
>  
> -	if (fb->format->is_yuv && icl_is_hdr_plane(display, plane_id))
> +	if (icl_is_hdr_plane(display, plane_id) &&
> +	    (fb->format->is_yuv || plane_state->hw.csc_ff_enable))

[Severity: Low]
Does struct intel_plane_state contain csc_ff_enable in its hw member?
This looks like an undeclared struct member that will break the build.

[Severity: High]
When csc_ff_enable is explicitly requested for RGB buffers, will the
hardware actually enable the CSC block?

In glk_plane_color_ctl(), the enable bit is only set if the framebuffer
format is YUV:

glk_plane_color_ctl() {
    ...
    } else if (fb->format->is_yuv) {
        plane_color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
    ...
}

Does this mean the fixed-function CSC hardware block remains disabled in
PLANE_COLOR_CTL when we have an RGB framebuffer with csc_ff_enable set to
true?

>  		icl_program_input_csc(dsb, plane, plane_state);
>  
>  	skl_write_plane_wm(dsb, plane, crtc_state);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260902075417.656673-10-chaitanya.kumar.borah@intel.com?part=1

^ permalink raw reply	[flat|nested] 16+ messages in thread

* ✓ CI.KUnit: success for drm/i915/color: Add YUV Support in color pipeline
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
                   ` (8 preceding siblings ...)
  2026-09-02  7:54 ` [CI 9/9] drm/i915/color: Add YUV buffer support on HDR planes Chaitanya Kumar Borah
@ 2026-09-02  9:52 ` Patchwork
  2026-09-02 10:55 ` ✓ Xe.CI.BAT: " Patchwork
  2026-09-02 20:47 ` ✗ Xe.CI.FULL: failure " Patchwork
  11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2026-09-02  9:52 UTC (permalink / raw)
  To: Chaitanya Kumar Borah; +Cc: intel-xe

== Series Details ==

Series: drm/i915/color: Add YUV Support in color pipeline
URL   : https://patchwork.freedesktop.org/series/173195/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[09:49:56] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:50:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:50:21] Starting KUnit Kernel (1/1)...
[09:50:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:50:21] ============= refcount_interrupt (4 subtests) ==============
[09:50:21] [PASSED] test_single_irq_change
[09:50:21] [PASSED] test_nested_irq_change
[09:50:21] [PASSED] test_multiple_irq_change
[09:50:21] [PASSED] test_irq_save
[09:50:21] =============== [PASSED] refcount_interrupt ================
[09:50:21] ================= gpu_buddy (14 subtests) ==================
[09:50:21] [PASSED] gpu_test_buddy_alloc_limit
[09:50:21] [PASSED] gpu_test_buddy_alloc_optimistic
[09:50:21] [PASSED] gpu_test_buddy_alloc_pessimistic
[09:50:21] [PASSED] gpu_test_buddy_alloc_pathological
[09:50:21] [PASSED] gpu_test_buddy_alloc_contiguous
[09:50:21] [PASSED] gpu_test_buddy_alloc_clear
[09:50:21] [PASSED] gpu_test_buddy_alloc_range
[09:50:21] [PASSED] gpu_test_buddy_alloc_range_bias
[09:50:22] [PASSED] gpu_test_buddy_fragmentation_performance
[09:50:23] [PASSED] gpu_test_buddy_dirty_tracker_performance
[09:50:23] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[09:50:23] [PASSED] gpu_test_buddy_offset_aligned_allocation
[09:50:23] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[09:50:23] [PASSED] gpu_test_buddy_addr_to_block
[09:50:23] ==================== [PASSED] gpu_buddy ====================
[09:50:23] ============================================================
[09:50:23] Testing complete. Ran 18 tests: passed: 18
[09:50:23] Elapsed time: 26.571s total, 4.439s configuring, 20.215s building, 1.866s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:50:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:50:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:50:58] Starting KUnit Kernel (1/1)...
[09:50:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:50:59] ============= refcount_interrupt (4 subtests) ==============
[09:50:59] [PASSED] test_single_irq_change
[09:50:59] [PASSED] test_nested_irq_change
[09:50:59] [PASSED] test_multiple_irq_change
[09:50:59] [PASSED] test_irq_save
[09:50:59] =============== [PASSED] refcount_interrupt ================
[09:50:59] ================== guc_buf (11 subtests) ===================
[09:50:59] [PASSED] test_smallest
[09:50:59] [PASSED] test_largest
[09:50:59] [PASSED] test_granular
[09:50:59] [PASSED] test_unique
[09:50:59] [PASSED] test_overlap
[09:50:59] [PASSED] test_reusable
[09:50:59] [PASSED] test_too_big
[09:50:59] [PASSED] test_flush
[09:50:59] [PASSED] test_lookup
[09:50:59] [PASSED] test_data
[09:50:59] [PASSED] test_class
[09:50:59] ===================== [PASSED] guc_buf =====================
[09:50:59] =================== guc_dbm (7 subtests) ===================
[09:50:59] [PASSED] test_empty
[09:50:59] [PASSED] test_default
[09:50:59] ======================== test_size  ========================
[09:50:59] [PASSED] 4
[09:50:59] [PASSED] 8
[09:50:59] [PASSED] 32
[09:50:59] [PASSED] 256
[09:50:59] ==================== [PASSED] test_size ====================
[09:50:59] ======================= test_reuse  ========================
[09:50:59] [PASSED] 4
[09:50:59] [PASSED] 8
[09:50:59] [PASSED] 32
[09:50:59] [PASSED] 256
[09:50:59] =================== [PASSED] test_reuse ====================
[09:50:59] =================== test_range_overlap  ====================
[09:50:59] [PASSED] 4
[09:50:59] [PASSED] 8
[09:50:59] [PASSED] 32
[09:50:59] [PASSED] 256
[09:50:59] =============== [PASSED] test_range_overlap ================
[09:50:59] =================== test_range_compact  ====================
[09:50:59] [PASSED] 4
[09:50:59] [PASSED] 8
[09:50:59] [PASSED] 32
[09:50:59] [PASSED] 256
[09:50:59] =============== [PASSED] test_range_compact ================
[09:50:59] ==================== test_range_spare  =====================
[09:50:59] [PASSED] 4
[09:50:59] [PASSED] 8
[09:50:59] [PASSED] 32
[09:50:59] [PASSED] 256
[09:50:59] ================ [PASSED] test_range_spare =================
[09:50:59] ===================== [PASSED] guc_dbm =====================
[09:50:59] =================== guc_idm (6 subtests) ===================
[09:50:59] [PASSED] bad_init
[09:50:59] [PASSED] no_init
[09:50:59] [PASSED] init_fini
[09:50:59] [PASSED] check_used
[09:50:59] [PASSED] check_quota
[09:50:59] [PASSED] check_all
[09:50:59] ===================== [PASSED] guc_idm =====================
[09:50:59] =============== guc_klv_helpers (9 subtests) ===============
[09:50:59] [PASSED] test_count
[09:50:59] [PASSED] test_encode_u32
[09:50:59] [PASSED] test_encode_u64
[09:50:59] [PASSED] test_encode_string
[09:50:59] [PASSED] test_encode_object_raw
[09:50:59] [PASSED] test_encode_object_klv
[09:50:59] [PASSED] test_encode_object_nested
[09:50:59] [PASSED] test_encode_object_basic
[09:50:59] [PASSED] test_print
[09:50:59] ================= [PASSED] guc_klv_helpers =================
[09:50:59] =================== xe_log (4 subtests) ====================
[09:50:59] [PASSED] demo_cper
[09:50:59] [PASSED] demo_dmesg
[09:50:59] ======================= test_dmesg  ========================
[09:50:59] [PASSED] test_fatal
[09:50:59] [PASSED] test_fatal_tile
[09:50:59] [PASSED] test_fatal_gt
[09:50:59] [PASSED] test_fatal_comp
[09:50:59] [PASSED] test_fatal_comp_tile
[09:50:59] [PASSED] test_fatal_comp_gt
[09:50:59] [PASSED] test_fatal_all
[09:50:59] [PASSED] test_recoverable
[09:50:59] [PASSED] test_recoverable_tile
[09:50:59] [PASSED] test_recoverable_gt
[09:50:59] [PASSED] test_recoverable_comp
[09:50:59] [PASSED] test_recoverable_comp_tile
[09:50:59] [PASSED] test_recoverable_comp_gt
[09:50:59] [PASSED] test_recoverable_all
[09:50:59] [PASSED] test_info
[09:50:59] [PASSED] test_info_tile
[09:50:59] [PASSED] test_info_gt
[09:50:59] [PASSED] test_info_err
[09:50:59] [PASSED] test_info_comp
[09:50:59] [PASSED] test_info_comp_tile
[09:50:59] [PASSED] test_info_comp_gt
[09:50:59] [PASSED] test_info_all
[09:50:59] [PASSED] test_hw_fatal
[09:50:59] [PASSED] test_hw_recoverable
[09:50:59] [PASSED] test_hw_corrected
[09:50:59] [PASSED] test_hw_informational
[09:50:59] =================== [PASSED] test_dmesg ====================
[09:50:59] ====================== test_invalid  =======================
[09:50:59] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[09:50:59] ================== [SKIPPED] test_invalid ==================
[09:50:59] ===================== [PASSED] xe_log ======================
[09:50:59] ================== no_relay (3 subtests) ===================
[09:50:59] [PASSED] xe_drops_guc2pf_if_not_ready
[09:50:59] [PASSED] xe_drops_guc2vf_if_not_ready
[09:50:59] [PASSED] xe_rejects_send_if_not_ready
[09:50:59] ==================== [PASSED] no_relay =====================
[09:50:59] ================== pf_relay (14 subtests) ==================
[09:50:59] [PASSED] pf_rejects_guc2pf_too_short
[09:50:59] [PASSED] pf_rejects_guc2pf_too_long
[09:50:59] [PASSED] pf_rejects_guc2pf_no_payload
[09:50:59] [PASSED] pf_fails_no_payload
[09:50:59] [PASSED] pf_fails_bad_origin
[09:50:59] [PASSED] pf_fails_bad_type
[09:50:59] [PASSED] pf_txn_reports_error
[09:50:59] [PASSED] pf_txn_sends_pf2guc
[09:50:59] [PASSED] pf_sends_pf2guc
[09:50:59] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:50:59] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:50:59] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:50:59] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:50:59] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:50:59] ==================== [PASSED] pf_relay =====================
[09:50:59] ================== vf_relay (3 subtests) ===================
[09:50:59] [PASSED] vf_rejects_guc2vf_too_short
[09:50:59] [PASSED] vf_rejects_guc2vf_too_long
[09:50:59] [PASSED] vf_rejects_guc2vf_no_payload
[09:50:59] ==================== [PASSED] vf_relay =====================
[09:50:59] ================ pf_gt_config (9 subtests) =================
[09:50:59] [PASSED] fair_contexts_1vf
[09:50:59] [PASSED] fair_doorbells_1vf
[09:50:59] [PASSED] fair_ggtt_1vf
[09:50:59] ====================== fair_vram_1vf  ======================
[09:50:59] [PASSED] 3.50 GiB
[09:50:59] [PASSED] 11.5 GiB
[09:50:59] [PASSED] 15.5 GiB
[09:50:59] [PASSED] 31.5 GiB
[09:50:59] [PASSED] 63.5 GiB
[09:50:59] [PASSED] 1.91 GiB
[09:50:59] ================== [PASSED] fair_vram_1vf ==================
[09:50:59] ================ fair_vram_1vf_admin_only  =================
[09:50:59] [PASSED] 3.50 GiB
[09:50:59] [PASSED] 11.5 GiB
[09:50:59] [PASSED] 15.5 GiB
[09:50:59] [PASSED] 31.5 GiB
[09:50:59] [PASSED] 63.5 GiB
[09:50:59] [PASSED] 1.91 GiB
[09:50:59] ============ [PASSED] fair_vram_1vf_admin_only =============
[09:50:59] ====================== fair_contexts  ======================
[09:50:59] [PASSED] 1 VF
[09:50:59] [PASSED] 2 VFs
[09:50:59] [PASSED] 3 VFs
[09:50:59] [PASSED] 4 VFs
[09:50:59] [PASSED] 5 VFs
[09:50:59] [PASSED] 6 VFs
[09:50:59] [PASSED] 7 VFs
[09:50:59] [PASSED] 8 VFs
[09:50:59] [PASSED] 9 VFs
[09:50:59] [PASSED] 10 VFs
[09:50:59] [PASSED] 11 VFs
[09:50:59] [PASSED] 12 VFs
[09:50:59] [PASSED] 13 VFs
[09:50:59] [PASSED] 14 VFs
[09:50:59] [PASSED] 15 VFs
[09:50:59] [PASSED] 16 VFs
[09:50:59] [PASSED] 17 VFs
[09:50:59] [PASSED] 18 VFs
[09:50:59] [PASSED] 19 VFs
[09:50:59] [PASSED] 20 VFs
[09:50:59] [PASSED] 21 VFs
[09:50:59] [PASSED] 22 VFs
[09:50:59] [PASSED] 23 VFs
[09:50:59] [PASSED] 24 VFs
[09:50:59] [PASSED] 25 VFs
[09:50:59] [PASSED] 26 VFs
[09:50:59] [PASSED] 27 VFs
[09:50:59] [PASSED] 28 VFs
[09:50:59] [PASSED] 29 VFs
[09:50:59] [PASSED] 30 VFs
[09:50:59] [PASSED] 31 VFs
[09:50:59] [PASSED] 32 VFs
[09:50:59] [PASSED] 33 VFs
[09:50:59] [PASSED] 34 VFs
[09:50:59] [PASSED] 35 VFs
[09:50:59] [PASSED] 36 VFs
[09:50:59] [PASSED] 37 VFs
[09:50:59] [PASSED] 38 VFs
[09:50:59] [PASSED] 39 VFs
[09:50:59] [PASSED] 40 VFs
[09:50:59] [PASSED] 41 VFs
[09:50:59] [PASSED] 42 VFs
[09:50:59] [PASSED] 43 VFs
[09:50:59] [PASSED] 44 VFs
[09:50:59] [PASSED] 45 VFs
[09:50:59] [PASSED] 46 VFs
[09:50:59] [PASSED] 47 VFs
[09:50:59] [PASSED] 48 VFs
[09:50:59] [PASSED] 49 VFs
[09:50:59] [PASSED] 50 VFs
[09:50:59] [PASSED] 51 VFs
[09:50:59] [PASSED] 52 VFs
[09:50:59] [PASSED] 53 VFs
[09:50:59] [PASSED] 54 VFs
[09:50:59] [PASSED] 55 VFs
[09:50:59] [PASSED] 56 VFs
[09:50:59] [PASSED] 57 VFs
[09:50:59] [PASSED] 58 VFs
[09:50:59] [PASSED] 59 VFs
[09:50:59] [PASSED] 60 VFs
[09:50:59] [PASSED] 61 VFs
[09:50:59] [PASSED] 62 VFs
[09:50:59] [PASSED] 63 VFs
[09:50:59] ================== [PASSED] fair_contexts ==================
[09:50:59] ===================== fair_doorbells  ======================
[09:50:59] [PASSED] 1 VF
[09:50:59] [PASSED] 2 VFs
[09:50:59] [PASSED] 3 VFs
[09:50:59] [PASSED] 4 VFs
[09:50:59] [PASSED] 5 VFs
[09:50:59] [PASSED] 6 VFs
[09:50:59] [PASSED] 7 VFs
[09:50:59] [PASSED] 8 VFs
[09:50:59] [PASSED] 9 VFs
[09:50:59] [PASSED] 10 VFs
[09:50:59] [PASSED] 11 VFs
[09:50:59] [PASSED] 12 VFs
[09:50:59] [PASSED] 13 VFs
[09:50:59] [PASSED] 14 VFs
[09:50:59] [PASSED] 15 VFs
[09:50:59] [PASSED] 16 VFs
[09:50:59] [PASSED] 17 VFs
[09:50:59] [PASSED] 18 VFs
[09:50:59] [PASSED] 19 VFs
[09:50:59] [PASSED] 20 VFs
[09:50:59] [PASSED] 21 VFs
[09:50:59] [PASSED] 22 VFs
[09:50:59] [PASSED] 23 VFs
[09:50:59] [PASSED] 24 VFs
[09:50:59] [PASSED] 25 VFs
[09:50:59] [PASSED] 26 VFs
[09:50:59] [PASSED] 27 VFs
[09:50:59] [PASSED] 28 VFs
[09:50:59] [PASSED] 29 VFs
[09:50:59] [PASSED] 30 VFs
[09:50:59] [PASSED] 31 VFs
[09:50:59] [PASSED] 32 VFs
[09:50:59] [PASSED] 33 VFs
[09:50:59] [PASSED] 34 VFs
[09:50:59] [PASSED] 35 VFs
[09:50:59] [PASSED] 36 VFs
[09:50:59] [PASSED] 37 VFs
[09:50:59] [PASSED] 38 VFs
[09:50:59] [PASSED] 39 VFs
[09:50:59] [PASSED] 40 VFs
[09:50:59] [PASSED] 41 VFs
[09:50:59] [PASSED] 42 VFs
[09:50:59] [PASSED] 43 VFs
[09:50:59] [PASSED] 44 VFs
[09:50:59] [PASSED] 45 VFs
[09:50:59] [PASSED] 46 VFs
[09:50:59] [PASSED] 47 VFs
[09:50:59] [PASSED] 48 VFs
[09:50:59] [PASSED] 49 VFs
[09:50:59] [PASSED] 50 VFs
[09:50:59] [PASSED] 51 VFs
[09:50:59] [PASSED] 52 VFs
[09:50:59] [PASSED] 53 VFs
[09:50:59] [PASSED] 54 VFs
[09:50:59] [PASSED] 55 VFs
[09:50:59] [PASSED] 56 VFs
[09:50:59] [PASSED] 57 VFs
[09:50:59] [PASSED] 58 VFs
[09:50:59] [PASSED] 59 VFs
[09:50:59] [PASSED] 60 VFs
[09:50:59] [PASSED] 61 VFs
[09:50:59] [PASSED] 62 VFs
[09:50:59] [PASSED] 63 VFs
[09:50:59] ================= [PASSED] fair_doorbells ==================
[09:50:59] ======================== fair_ggtt  ========================
[09:50:59] [PASSED] 1 VF
[09:50:59] [PASSED] 2 VFs
[09:50:59] [PASSED] 3 VFs
[09:50:59] [PASSED] 4 VFs
[09:50:59] [PASSED] 5 VFs
[09:50:59] [PASSED] 6 VFs
[09:50:59] [PASSED] 7 VFs
[09:50:59] [PASSED] 8 VFs
[09:50:59] [PASSED] 9 VFs
[09:50:59] [PASSED] 10 VFs
[09:50:59] [PASSED] 11 VFs
[09:50:59] [PASSED] 12 VFs
[09:50:59] [PASSED] 13 VFs
[09:50:59] [PASSED] 14 VFs
[09:50:59] [PASSED] 15 VFs
[09:50:59] [PASSED] 16 VFs
[09:50:59] [PASSED] 17 VFs
[09:50:59] [PASSED] 18 VFs
[09:50:59] [PASSED] 19 VFs
[09:50:59] [PASSED] 20 VFs
[09:50:59] [PASSED] 21 VFs
[09:50:59] [PASSED] 22 VFs
[09:50:59] [PASSED] 23 VFs
[09:50:59] [PASSED] 24 VFs
[09:50:59] [PASSED] 25 VFs
[09:50:59] [PASSED] 26 VFs
[09:50:59] [PASSED] 27 VFs
[09:50:59] [PASSED] 28 VFs
[09:50:59] [PASSED] 29 VFs
[09:50:59] [PASSED] 30 VFs
[09:50:59] [PASSED] 31 VFs
[09:50:59] [PASSED] 32 VFs
[09:50:59] [PASSED] 33 VFs
[09:50:59] [PASSED] 34 VFs
[09:50:59] [PASSED] 35 VFs
[09:50:59] [PASSED] 36 VFs
[09:50:59] [PASSED] 37 VFs
[09:50:59] [PASSED] 38 VFs
[09:50:59] [PASSED] 39 VFs
[09:50:59] [PASSED] 40 VFs
[09:50:59] [PASSED] 41 VFs
[09:50:59] [PASSED] 42 VFs
[09:50:59] [PASSED] 43 VFs
[09:50:59] [PASSED] 44 VFs
[09:50:59] [PASSED] 45 VFs
[09:50:59] [PASSED] 46 VFs
[09:50:59] [PASSED] 47 VFs
[09:50:59] [PASSED] 48 VFs
[09:50:59] [PASSED] 49 VFs
[09:50:59] [PASSED] 50 VFs
[09:50:59] [PASSED] 51 VFs
[09:50:59] [PASSED] 52 VFs
[09:50:59] [PASSED] 53 VFs
[09:50:59] [PASSED] 54 VFs
[09:50:59] [PASSED] 55 VFs
[09:50:59] [PASSED] 56 VFs
[09:50:59] [PASSED] 57 VFs
[09:50:59] [PASSED] 58 VFs
[09:50:59] [PASSED] 59 VFs
[09:50:59] [PASSED] 60 VFs
[09:50:59] [PASSED] 61 VFs
[09:50:59] [PASSED] 62 VFs
[09:50:59] [PASSED] 63 VFs
[09:50:59] ==================== [PASSED] fair_ggtt ====================
[09:50:59] ======================== fair_vram  ========================
[09:50:59] [PASSED] 1 VF
[09:50:59] [PASSED] 2 VFs
[09:50:59] [PASSED] 3 VFs
[09:50:59] [PASSED] 4 VFs
[09:50:59] [PASSED] 5 VFs
[09:50:59] [PASSED] 6 VFs
[09:50:59] [PASSED] 7 VFs
[09:50:59] [PASSED] 8 VFs
[09:50:59] [PASSED] 9 VFs
[09:50:59] [PASSED] 10 VFs
[09:50:59] [PASSED] 11 VFs
[09:50:59] [PASSED] 12 VFs
[09:50:59] [PASSED] 13 VFs
[09:50:59] [PASSED] 14 VFs
[09:50:59] [PASSED] 15 VFs
[09:50:59] [PASSED] 16 VFs
[09:50:59] [PASSED] 17 VFs
[09:50:59] [PASSED] 18 VFs
[09:50:59] [PASSED] 19 VFs
[09:50:59] [PASSED] 20 VFs
[09:50:59] [PASSED] 21 VFs
[09:50:59] [PASSED] 22 VFs
[09:50:59] [PASSED] 23 VFs
[09:50:59] [PASSED] 24 VFs
[09:50:59] [PASSED] 25 VFs
[09:50:59] [PASSED] 26 VFs
[09:50:59] [PASSED] 27 VFs
[09:50:59] [PASSED] 28 VFs
[09:50:59] [PASSED] 29 VFs
[09:50:59] [PASSED] 30 VFs
[09:50:59] [PASSED] 31 VFs
[09:50:59] [PASSED] 32 VFs
[09:50:59] [PASSED] 33 VFs
[09:50:59] [PASSED] 34 VFs
[09:50:59] [PASSED] 35 VFs
[09:50:59] [PASSED] 36 VFs
[09:50:59] [PASSED] 37 VFs
[09:50:59] [PASSED] 38 VFs
[09:50:59] [PASSED] 39 VFs
[09:50:59] [PASSED] 40 VFs
[09:50:59] [PASSED] 41 VFs
[09:50:59] [PASSED] 42 VFs
[09:50:59] [PASSED] 43 VFs
[09:50:59] [PASSED] 44 VFs
[09:50:59] [PASSED] 45 VFs
[09:50:59] [PASSED] 46 VFs
[09:50:59] [PASSED] 47 VFs
[09:50:59] [PASSED] 48 VFs
[09:50:59] [PASSED] 49 VFs
[09:50:59] [PASSED] 50 VFs
[09:50:59] [PASSED] 51 VFs
[09:50:59] [PASSED] 52 VFs
[09:50:59] [PASSED] 53 VFs
[09:50:59] [PASSED] 54 VFs
[09:50:59] [PASSED] 55 VFs
[09:50:59] [PASSED] 56 VFs
[09:50:59] [PASSED] 57 VFs
[09:50:59] [PASSED] 58 VFs
[09:50:59] [PASSED] 59 VFs
[09:50:59] [PASSED] 60 VFs
[09:50:59] [PASSED] 61 VFs
[09:50:59] [PASSED] 62 VFs
[09:50:59] [PASSED] 63 VFs
[09:50:59] ==================== [PASSED] fair_vram ====================
[09:50:59] ================== [PASSED] pf_gt_config ===================
[09:50:59] ===================== lmtt (1 subtest) =====================
[09:50:59] ======================== test_ops  =========================
[09:50:59] [PASSED] 2-level
[09:50:59] [PASSED] multi-level
[09:50:59] ==================== [PASSED] test_ops =====================
[09:50:59] ====================== [PASSED] lmtt =======================
[09:50:59] ================= sriov_packet (1 subtest) =================
[09:50:59] [PASSED] test_descriptor_init
[09:50:59] ================== [PASSED] sriov_packet ===================
[09:50:59] ================= pf_service (11 subtests) =================
[09:50:59] [PASSED] pf_negotiate_any
[09:50:59] [PASSED] pf_negotiate_base_match
[09:50:59] [PASSED] pf_negotiate_base_newer
[09:50:59] [PASSED] pf_negotiate_base_next
[09:50:59] [SKIPPED] pf_negotiate_base_older (no older minor)
[09:50:59] [PASSED] pf_negotiate_base_prev
[09:50:59] [PASSED] pf_negotiate_latest_match
[09:50:59] [PASSED] pf_negotiate_latest_newer
[09:50:59] [PASSED] pf_negotiate_latest_next
[09:50:59] [SKIPPED] pf_negotiate_latest_older (no older minor)
[09:50:59] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[09:50:59] =================== [PASSED] pf_service ====================
[09:50:59] ================= xe_guc_g2g (2 subtests) ==================
[09:50:59] ============== xe_live_guc_g2g_kunit_default  ==============
[09:50:59] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:50:59] ============== xe_live_guc_g2g_kunit_allmem  ===============
[09:50:59] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:50:59] =================== [SKIPPED] xe_guc_g2g ===================
[09:50:59] =================== xe_mocs (2 subtests) ===================
[09:50:59] ================ xe_live_mocs_kernel_kunit  ================
[09:50:59] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:50:59] ================ xe_live_mocs_reset_kunit  =================
[09:50:59] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:50:59] ==================== [SKIPPED] xe_mocs =====================
[09:50:59] ================= xe_migrate (2 subtests) ==================
[09:50:59] ================= xe_migrate_sanity_kunit  =================
[09:50:59] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:50:59] ================== xe_validate_ccs_kunit  ==================
[09:50:59] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:50:59] =================== [SKIPPED] xe_migrate ===================
[09:50:59] ================== xe_dma_buf (1 subtest) ==================
[09:50:59] ==================== xe_dma_buf_kunit  =====================
[09:50:59] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:50:59] =================== [SKIPPED] xe_dma_buf ===================
[09:50:59] ================= xe_bo_shrink (1 subtest) =================
[09:50:59] =================== xe_bo_shrink_kunit  ====================
[09:50:59] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:50:59] ================== [SKIPPED] xe_bo_shrink ==================
[09:50:59] ==================== xe_bo (2 subtests) ====================
[09:50:59] ================== xe_ccs_migrate_kunit  ===================
[09:50:59] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:50:59] ==================== xe_bo_evict_kunit  ====================
[09:50:59] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:50:59] ===================== [SKIPPED] xe_bo ======================
[09:50:59] =================== xe_any (9 subtests) ====================
[09:50:59] [PASSED] test_to_xe
[09:50:59] [PASSED] test_to_dev
[09:50:59] [PASSED] test_to_pdev
[09:50:59] [PASSED] test_to_drm
[09:50:59] [PASSED] test_if_pdev
[09:50:59] [PASSED] test_if_xe
[09:50:59] [PASSED] test_if_tile
[09:50:59] [PASSED] test_if_gt
[09:50:59] [PASSED] test_to_id
[09:50:59] ===================== [PASSED] xe_any ======================
[09:50:59] ==================== args (13 subtests) ====================
[09:50:59] [PASSED] count_args_test
[09:50:59] [PASSED] call_args_example
[09:50:59] [PASSED] call_args_test
[09:50:59] [PASSED] drop_first_arg_example
[09:50:59] [PASSED] drop_first_arg_test
[09:50:59] [PASSED] first_arg_example
[09:50:59] [PASSED] first_arg_test
[09:50:59] [PASSED] last_arg_example
[09:50:59] [PASSED] last_arg_test
[09:50:59] [PASSED] pick_arg_example
[09:50:59] [PASSED] if_args_example
[09:50:59] [PASSED] if_args_test
[09:50:59] [PASSED] sep_comma_example
[09:50:59] ====================== [PASSED] args =======================
[09:50:59] =================== xe_pci (3 subtests) ====================
[09:50:59] ==================== check_graphics_ip  ====================
[09:50:59] [PASSED] 12.00 Xe_LP
[09:50:59] [PASSED] 12.10 Xe_LP+
[09:50:59] [PASSED] 12.55 Xe_HPG
[09:50:59] [PASSED] 12.60 Xe_HPC
[09:50:59] [PASSED] 12.70 Xe_LPG
[09:50:59] [PASSED] 12.71 Xe_LPG
[09:50:59] [PASSED] 12.74 Xe_LPG+
[09:50:59] [PASSED] 20.01 Xe2_HPG
[09:50:59] [PASSED] 20.02 Xe2_HPG
[09:50:59] [PASSED] 20.04 Xe2_LPG
[09:50:59] [PASSED] 30.00 Xe3_LPG
[09:50:59] [PASSED] 30.01 Xe3_LPG
[09:50:59] [PASSED] 30.03 Xe3_LPG
[09:50:59] [PASSED] 30.04 Xe3_LPG
[09:50:59] [PASSED] 30.05 Xe3_LPG
[09:50:59] [PASSED] 35.10 Xe3p_LPG
[09:50:59] [PASSED] 35.11 Xe3p_XPC
[09:50:59] ================ [PASSED] check_graphics_ip ================
[09:50:59] ===================== check_media_ip  ======================
[09:50:59] [PASSED] 12.00 Xe_M
[09:50:59] [PASSED] 12.55 Xe_HPM
[09:50:59] [PASSED] 13.00 Xe_LPM+
[09:50:59] [PASSED] 13.01 Xe2_HPM
[09:50:59] [PASSED] 20.00 Xe2_LPM
[09:50:59] [PASSED] 30.00 Xe3_LPM
[09:50:59] [PASSED] 30.02 Xe3_LPM
[09:50:59] [PASSED] 35.00 Xe3p_LPM
[09:50:59] [PASSED] 35.03 Xe3p_HPM
[09:50:59] ================= [PASSED] check_media_ip ==================
[09:50:59] =================== check_platform_desc  ===================
[09:50:59] [PASSED] 0x9A60 (TIGERLAKE)
[09:50:59] [PASSED] 0x9A68 (TIGERLAKE)
[09:50:59] [PASSED] 0x9A70 (TIGERLAKE)
[09:50:59] [PASSED] 0x9A40 (TIGERLAKE)
[09:50:59] [PASSED] 0x9A49 (TIGERLAKE)
[09:50:59] [PASSED] 0x9A59 (TIGERLAKE)
[09:50:59] [PASSED] 0x9A78 (TIGERLAKE)
[09:50:59] [PASSED] 0x9AC0 (TIGERLAKE)
[09:50:59] [PASSED] 0x9AC9 (TIGERLAKE)
[09:50:59] [PASSED] 0x9AD9 (TIGERLAKE)
[09:50:59] [PASSED] 0x9AF8 (TIGERLAKE)
[09:50:59] [PASSED] 0x4C80 (ROCKETLAKE)
[09:50:59] [PASSED] 0x4C8A (ROCKETLAKE)
[09:50:59] [PASSED] 0x4C8B (ROCKETLAKE)
[09:50:59] [PASSED] 0x4C8C (ROCKETLAKE)
[09:50:59] [PASSED] 0x4C90 (ROCKETLAKE)
[09:50:59] [PASSED] 0x4C9A (ROCKETLAKE)
[09:50:59] [PASSED] 0x4680 (ALDERLAKE_S)
[09:50:59] [PASSED] 0x4682 (ALDERLAKE_S)
[09:50:59] [PASSED] 0x4688 (ALDERLAKE_S)
[09:50:59] [PASSED] 0x468A (ALDERLAKE_S)
[09:50:59] [PASSED] 0x468B (ALDERLAKE_S)
[09:50:59] [PASSED] 0x4690 (ALDERLAKE_S)
[09:50:59] [PASSED] 0x4692 (ALDERLAKE_S)
[09:50:59] [PASSED] 0x4693 (ALDERLAKE_S)
[09:50:59] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46AA (ALDERLAKE_P)
[09:50:59] [PASSED] 0x462A (ALDERLAKE_P)
[09:50:59] [PASSED] 0x4626 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x4628 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:50:59] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:50:59] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:50:59] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:50:59] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:50:59] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:50:59] [PASSED] 0xA721 (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA720 (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:50:59] [PASSED] 0xA780 (ALDERLAKE_S)
[09:50:59] [PASSED] 0xA781 (ALDERLAKE_S)
[09:50:59] [PASSED] 0xA782 (ALDERLAKE_S)
[09:50:59] [PASSED] 0xA783 (ALDERLAKE_S)
[09:50:59] [PASSED] 0xA788 (ALDERLAKE_S)
[09:50:59] [PASSED] 0xA789 (ALDERLAKE_S)
[09:50:59] [PASSED] 0xA78A (ALDERLAKE_S)
[09:50:59] [PASSED] 0xA78B (ALDERLAKE_S)
[09:50:59] [PASSED] 0x4905 (DG1)
[09:50:59] [PASSED] 0x4906 (DG1)
[09:50:59] [PASSED] 0x4907 (DG1)
[09:50:59] [PASSED] 0x4908 (DG1)
[09:50:59] [PASSED] 0x4909 (DG1)
[09:50:59] [PASSED] 0x56C0 (DG2)
[09:50:59] [PASSED] 0x56C2 (DG2)
[09:50:59] [PASSED] 0x56C1 (DG2)
[09:50:59] [PASSED] 0x7D51 (METEORLAKE)
[09:50:59] [PASSED] 0x7DD1 (METEORLAKE)
[09:50:59] [PASSED] 0x7D41 (METEORLAKE)
[09:50:59] [PASSED] 0x7D67 (METEORLAKE)
[09:50:59] [PASSED] 0xB640 (METEORLAKE)
[09:50:59] [PASSED] 0x56A0 (DG2)
[09:50:59] [PASSED] 0x56A1 (DG2)
[09:50:59] [PASSED] 0x56A2 (DG2)
[09:50:59] [PASSED] 0x56BE (DG2)
[09:50:59] [PASSED] 0x56BF (DG2)
[09:50:59] [PASSED] 0x5690 (DG2)
[09:50:59] [PASSED] 0x5691 (DG2)
[09:50:59] [PASSED] 0x5692 (DG2)
[09:50:59] [PASSED] 0x56A5 (DG2)
[09:50:59] [PASSED] 0x56A6 (DG2)
[09:50:59] [PASSED] 0x56B0 (DG2)
[09:50:59] [PASSED] 0x56B1 (DG2)
[09:50:59] [PASSED] 0x56BA (DG2)
[09:50:59] [PASSED] 0x56BB (DG2)
[09:50:59] [PASSED] 0x56BC (DG2)
[09:50:59] [PASSED] 0x56BD (DG2)
[09:50:59] [PASSED] 0x5693 (DG2)
[09:50:59] [PASSED] 0x5694 (DG2)
[09:50:59] [PASSED] 0x5695 (DG2)
[09:50:59] [PASSED] 0x56A3 (DG2)
[09:50:59] [PASSED] 0x56A4 (DG2)
[09:50:59] [PASSED] 0x56B2 (DG2)
[09:50:59] [PASSED] 0x56B3 (DG2)
[09:50:59] [PASSED] 0x5696 (DG2)
[09:50:59] [PASSED] 0x5697 (DG2)
[09:50:59] [PASSED] 0xB69 (PVC)
[09:50:59] [PASSED] 0xB6E (PVC)
[09:50:59] [PASSED] 0xBD4 (PVC)
[09:50:59] [PASSED] 0xBD5 (PVC)
[09:50:59] [PASSED] 0xBD6 (PVC)
[09:50:59] [PASSED] 0xBD7 (PVC)
[09:50:59] [PASSED] 0xBD8 (PVC)
[09:50:59] [PASSED] 0xBD9 (PVC)
[09:50:59] [PASSED] 0xBDA (PVC)
[09:50:59] [PASSED] 0xBDB (PVC)
[09:50:59] [PASSED] 0xBE0 (PVC)
[09:50:59] [PASSED] 0xBE1 (PVC)
[09:50:59] [PASSED] 0xBE5 (PVC)
[09:50:59] [PASSED] 0x7D40 (METEORLAKE)
[09:50:59] [PASSED] 0x7D45 (METEORLAKE)
[09:50:59] [PASSED] 0x7D55 (METEORLAKE)
[09:50:59] [PASSED] 0x7D60 (METEORLAKE)
[09:50:59] [PASSED] 0x7DD5 (METEORLAKE)
[09:50:59] [PASSED] 0x6420 (LUNARLAKE)
[09:50:59] [PASSED] 0x64A0 (LUNARLAKE)
[09:50:59] [PASSED] 0x64B0 (LUNARLAKE)
[09:50:59] [PASSED] 0xE202 (BATTLEMAGE)
[09:50:59] [PASSED] 0xE209 (BATTLEMAGE)
[09:50:59] [PASSED] 0xE20B (BATTLEMAGE)
[09:50:59] [PASSED] 0xE20C (BATTLEMAGE)
[09:50:59] [PASSED] 0xE20D (BATTLEMAGE)
[09:50:59] [PASSED] 0xE210 (BATTLEMAGE)
[09:50:59] [PASSED] 0xE211 (BATTLEMAGE)
[09:50:59] [PASSED] 0xE212 (BATTLEMAGE)
[09:50:59] [PASSED] 0xE216 (BATTLEMAGE)
[09:50:59] [PASSED] 0xE220 (BATTLEMAGE)
[09:50:59] [PASSED] 0xE221 (BATTLEMAGE)
[09:50:59] [PASSED] 0xE222 (BATTLEMAGE)
[09:50:59] [PASSED] 0xE223 (BATTLEMAGE)
[09:50:59] [PASSED] 0xB080 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB081 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB082 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB083 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB084 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB085 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB086 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB087 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB08F (PANTHERLAKE)
[09:50:59] [PASSED] 0xB090 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:50:59] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:50:59] [PASSED] 0xFD80 (PANTHERLAKE)
[09:50:59] [PASSED] 0xFD81 (PANTHERLAKE)
[09:50:59] [PASSED] 0xD740 (NOVALAKE_S)
[09:50:59] [PASSED] 0xD741 (NOVALAKE_S)
[09:50:59] [PASSED] 0xD742 (NOVALAKE_S)
[09:50:59] [PASSED] 0xD743 (NOVALAKE_S)
[09:50:59] [PASSED] 0xD745 (NOVALAKE_S)
[09:50:59] [PASSED] 0xD74A (NOVALAKE_S)
[09:50:59] [PASSED] 0xD74B (NOVALAKE_S)
[09:50:59] [PASSED] 0x674C (CRESCENTISLAND)
[09:50:59] [PASSED] 0x674D (CRESCENTISLAND)
[09:50:59] [PASSED] 0x674E (CRESCENTISLAND)
[09:50:59] [PASSED] 0x674F (CRESCENTISLAND)
[09:50:59] [PASSED] 0x6750 (CRESCENTISLAND)
[09:50:59] [PASSED] 0xD750 (NOVALAKE_P)
[09:50:59] [PASSED] 0xD751 (NOVALAKE_P)
[09:50:59] [PASSED] 0xD752 (NOVALAKE_P)
[09:50:59] [PASSED] 0xD753 (NOVALAKE_P)
[09:50:59] [PASSED] 0xD754 (NOVALAKE_P)
[09:50:59] [PASSED] 0xD755 (NOVALAKE_P)
[09:50:59] [PASSED] 0xD756 (NOVALAKE_P)
[09:50:59] [PASSED] 0xD757 (NOVALAKE_P)
[09:50:59] [PASSED] 0xD75F (NOVALAKE_P)
[09:50:59] =============== [PASSED] check_platform_desc ===============
[09:50:59] ===================== [PASSED] xe_pci ======================
[09:50:59] ============= xe_rtp_tables_test (5 subtests) ==============
[09:50:59] ================== xe_rtp_table_gt_test  ===================
[09:50:59] [PASSED] gt_was/14011060649
[09:50:59] [PASSED] gt_was/14011059788
[09:50:59] [PASSED] gt_was/14015795083
[09:50:59] [PASSED] gt_was/16021867713
[09:50:59] [PASSED] gt_was/14019449301
[09:50:59] [PASSED] gt_was/16028005424
[09:50:59] [PASSED] gt_was/14026578760
[09:50:59] [PASSED] gt_was/1409420604
[09:50:59] [PASSED] gt_was/1408615072
[09:50:59] [PASSED] gt_was/22010523718
[09:50:59] [PASSED] gt_was/14011006942
[09:50:59] [PASSED] gt_was/14014830051
[09:50:59] [PASSED] gt_was/18018781329
[09:50:59] [PASSED] gt_was/1509235366
[09:50:59] [PASSED] gt_was/18018781329
[09:50:59] [PASSED] gt_was/16016694945
[09:50:59] [PASSED] gt_was/14018575942
[09:50:59] [PASSED] gt_was/22016670082
[09:50:59] [PASSED] gt_was/22016670082
[09:50:59] [PASSED] gt_was/14017421178
[09:50:59] [PASSED] gt_was/16025250150
[09:50:59] [PASSED] gt_was/14021871409
[09:50:59] [PASSED] gt_was/16021865536
[09:50:59] [PASSED] gt_was/14021486841
[09:50:59] [PASSED] gt_was/14025160223
[09:50:59] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[09:50:59] [PASSED] gt_was/14025635424
[09:50:59] [PASSED] gt_was/16028005424
[09:50:59] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:50:59] ================== xe_rtp_table_gt_test  ===================
[09:50:59] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[09:50:59] [PASSED] gt_tunings/Tuning: 32B Access Enable
[09:50:59] [PASSED] gt_tunings/Tuning: L3 cache
[09:50:59] [PASSED] gt_tunings/Tuning: L3 cache - media
[09:50:59] [PASSED] gt_tunings/Tuning: Compression Overfetch
[09:50:59] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[09:50:59] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[09:50:59] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[09:50:59] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[09:50:59] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[09:50:59] [PASSED] gt_tunings/Tuning: Stateless compression control
[09:50:59] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[09:50:59] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[09:50:59] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[09:50:59] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[09:50:59] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:50:59] ================== xe_rtp_table_oob_test  ==================
[09:50:59] [PASSED] oob_was/1607983814
[09:50:59] [PASSED] oob_was/16010904313
[09:50:59] [PASSED] oob_was/18022495364
[09:50:59] [PASSED] oob_was/22012773006
[09:50:59] [PASSED] oob_was/14014475959
[09:50:59] [PASSED] oob_was/22011391025
[09:50:59] [PASSED] oob_was/22012727170
[09:50:59] [PASSED] oob_was/22012727685
[09:50:59] [PASSED] oob_was/22016596838
[09:50:59] [PASSED] oob_was/18020744125
[09:50:59] [PASSED] oob_was/1409600907
[09:50:59] [PASSED] oob_was/22014953428
[09:50:59] [PASSED] oob_was/16017236439
[09:50:59] [PASSED] oob_was/14019821291
[09:50:59] [PASSED] oob_was/14015076503
[09:50:59] [PASSED] oob_was/14018913170
[09:50:59] [PASSED] oob_was/14018094691
[09:50:59] [PASSED] oob_was/18024947630
[09:50:59] [PASSED] oob_was/16022287689
[09:50:59] [PASSED] oob_was/13011645652
[09:50:59] [PASSED] oob_was/14022293748
[09:50:59] [PASSED] oob_was/22019794406
[09:50:59] [PASSED] oob_was/22019338487
[09:50:59] [PASSED] oob_was/16023588340
[09:50:59] [PASSED] oob_was/14019789679
[09:50:59] [PASSED] oob_was/14022866841
[09:50:59] [PASSED] oob_was/16021333562
[09:50:59] [PASSED] oob_was/14016712196
[09:50:59] [PASSED] oob_was/14015568240
[09:50:59] [PASSED] oob_was/18013179988
[09:50:59] [PASSED] oob_was/1508761755
[09:50:59] [PASSED] oob_was/16023105232
[09:50:59] [PASSED] oob_was/16026508708
[09:50:59] [PASSED] oob_was/14020001231
[09:50:59] [PASSED] oob_was/16023683509
[09:50:59] [PASSED] oob_was/14025515070
[09:50:59] [PASSED] oob_was/15015404425_disable
[09:50:59] [PASSED] oob_was/16026007364
[09:50:59] [PASSED] oob_was/14020316580
[09:50:59] [PASSED] oob_was/14025883347
[09:50:59] [PASSED] oob_was/16029380221
[09:50:59] [PASSED] oob_was/22022079272
[09:50:59] [PASSED] oob_was/16029897822
[09:50:59] [PASSED] oob_was/14027054324
[09:50:59] ============== [PASSED] xe_rtp_table_oob_test ==============
[09:50:59] ================ xe_rtp_table_dev_oob_test  ================
[09:50:59] [PASSED] device_oob_was/22010954014
[09:50:59] [PASSED] device_oob_was/15015404425
[09:50:59] [PASSED] device_oob_was/22019338487_display
[09:50:59] [PASSED] device_oob_was/14022085890
[09:50:59] [PASSED] device_oob_was/14026539277
[09:50:59] [PASSED] device_oob_was/14026633728
[09:50:59] [PASSED] device_oob_was/14026746987
[09:50:59] [PASSED] device_oob_was/14026779378
[09:50:59] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[09:50:59] ========== xe_rtp_table_missing_upper_bound_test  ==========
[09:50:59] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[09:50:59] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[09:50:59] [PASSED] register_whitelist/1806527549
[09:50:59] [PASSED] register_whitelist/allow_read_ctx_timestamp
[09:50:59] [PASSED] register_whitelist/allow_read_queue_timestamp
[09:50:59] [PASSED] register_whitelist/16014440446
[09:50:59] [PASSED] register_whitelist/16017236439
[09:50:59] [PASSED] register_whitelist/16020183090
[09:50:59] [PASSED] register_whitelist/14024997852
[09:50:59] [PASSED] register_whitelist/14024997852
[09:50:59] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[09:50:59] =============== [PASSED] xe_rtp_tables_test ================
[09:50:59] =================== xe_rtp (3 subtests) ====================
[09:50:59] =================== xe_rtp_rules_tests  ====================
[09:50:59] [PASSED] no
[09:50:59] [PASSED] yes
[09:50:59] [PASSED] no-and-no
[09:50:59] [PASSED] no-and-yes
[09:50:59] [PASSED] yes-and-no
[09:50:59] [PASSED] yes-and-yes
[09:50:59] [PASSED] no-or-no
[09:50:59] [PASSED] no-or-yes
[09:50:59] [PASSED] yes-or-no
[09:50:59] [PASSED] yes-or-yes
[09:50:59] [PASSED] no-yes-or-yes-no
[09:50:59] [PASSED] no-yes-or-yes-yes
[09:50:59] [PASSED] yes-yes-or-no-yes
[09:50:59] [PASSED] yes-yes-or-yes-yes
[09:50:59] [PASSED] no-no-or-yes-or-no
[09:50:59] [PASSED] or
[09:50:59] [PASSED] or-yes
[09:50:59] [PASSED] or-no
[09:50:59] [PASSED] yes-or
[09:50:59] [PASSED] no-or
[09:50:59] [PASSED] no-or-or-yes
[09:50:59] [PASSED] yes-or-or-no
[09:50:59] [PASSED] no-or-or-no
[09:50:59] [PASSED] missing-context-engine-class
[09:50:59] [PASSED] missing-context-engine-class-or-yes
[09:50:59] [PASSED] missing-context-engine-class-or-or-yes
[09:50:59] =============== [PASSED] xe_rtp_rules_tests ================
[09:50:59] =============== xe_rtp_process_to_sr_tests  ================
[09:50:59] [PASSED] coalesce-same-reg
[09:50:59] [PASSED] coalesce-same-reg-literal-and-func
[09:50:59] [PASSED] no-match-no-add
[09:50:59] [PASSED] two-regs-two-entries
[09:50:59] [PASSED] clr-one-set-other
[09:50:59] [PASSED] set-field
[09:50:59] [PASSED] conflict-duplicate
[09:50:59] [PASSED] conflict-not-disjoint
[09:50:59] [PASSED] conflict-not-disjoint-literal-and-func
[09:50:59] [PASSED] conflict-reg-type
[09:50:59] [PASSED] bad-mcr-reg-forced-to-regular
[09:50:59] [PASSED] bad-regular-reg-forced-to-mcr
[09:50:59] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:50:59] ================== xe_rtp_process_tests  ===================
[09:50:59] [PASSED] active1
[09:50:59] [PASSED] active2
[09:50:59] [PASSED] active-inactive
[09:50:59] [PASSED] inactive-active
[09:50:59] [PASSED] inactive-active-inactive
[09:50:59] [PASSED] inactive-inactive-inactive
[09:50:59] ============== [PASSED] xe_rtp_process_tests ===============
[09:50:59] ===================== [PASSED] xe_rtp ======================
[09:50:59] ==================== xe_wa (1 subtest) =====================
[09:50:59] ======================== xe_wa_gt  =========================
[09:50:59] [PASSED] TIGERLAKE B0
[09:50:59] [PASSED] DG1 A0
[09:50:59] [PASSED] DG1 B0
[09:50:59] [PASSED] ALDERLAKE_S A0
[09:50:59] [PASSED] ALDERLAKE_S B0
[09:50:59] [PASSED] ALDERLAKE_S C0
[09:50:59] [PASSED] ALDERLAKE_S D0
[09:50:59] [PASSED] ALDERLAKE_P A0
[09:50:59] [PASSED] ALDERLAKE_P B0
[09:50:59] [PASSED] ALDERLAKE_P C0
[09:50:59] [PASSED] ALDERLAKE_S RPLS D0
[09:50:59] [PASSED] ALDERLAKE_P RPLU E0
[09:50:59] [PASSED] DG2 G10 C0
[09:50:59] [PASSED] DG2 G11 B1
[09:50:59] [PASSED] DG2 G12 A1
[09:50:59] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:50:59] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:50:59] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:50:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:50:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:50:59] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:50:59] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:50:59] ==================== [PASSED] xe_wa_gt =====================
[09:50:59] ====================== [PASSED] xe_wa ======================
[09:50:59] ============================================================
[09:50:59] Testing complete. Ran 793 tests: passed: 765, skipped: 28
[09:50:59] Elapsed time: 36.408s total, 1.830s configuring, 33.861s building, 0.694s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:50:59] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:51:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:51:26] Starting KUnit Kernel (1/1)...
[09:51:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:51:26] ============= refcount_interrupt (4 subtests) ==============
[09:51:26] [PASSED] test_single_irq_change
[09:51:26] [PASSED] test_nested_irq_change
[09:51:26] [PASSED] test_multiple_irq_change
[09:51:26] [PASSED] test_irq_save
[09:51:26] =============== [PASSED] refcount_interrupt ================
[09:51:26] ============ drm_test_pick_cmdline (2 subtests) ============
[09:51:26] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:51:26] =============== drm_test_pick_cmdline_named  ===============
[09:51:26] [PASSED] NTSC
[09:51:26] [PASSED] NTSC-J
[09:51:26] [PASSED] PAL
[09:51:26] [PASSED] PAL-M
[09:51:26] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:51:26] ============== [PASSED] drm_test_pick_cmdline ==============
[09:51:26] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:51:26] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:51:26] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:51:26] =========== drm_validate_clone_mode (2 subtests) ===========
[09:51:26] ============== drm_test_check_in_clone_mode  ===============
[09:51:26] [PASSED] in_clone_mode
[09:51:26] [PASSED] not_in_clone_mode
[09:51:26] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:51:26] =============== drm_test_check_valid_clones  ===============
[09:51:26] [PASSED] not_in_clone_mode
[09:51:26] [PASSED] valid_clone
[09:51:26] [PASSED] invalid_clone
[09:51:26] =========== [PASSED] drm_test_check_valid_clones ===========
[09:51:26] ============= [PASSED] drm_validate_clone_mode =============
[09:51:26] ============= drm_validate_modeset (1 subtest) =============
[09:51:26] [PASSED] drm_test_check_connector_changed_modeset
[09:51:26] ============== [PASSED] drm_validate_modeset ===============
[09:51:26] ====== drm_test_bridge_get_current_state (1 subtest) =======
[09:51:26] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:51:26] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:51:26] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[09:51:26] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:51:26] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:51:26] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[09:51:26] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:51:26] ============== drm_bridge_alloc (2 subtests) ===============
[09:51:26] [PASSED] drm_test_drm_bridge_alloc_basic
[09:51:26] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:51:26] ================ [PASSED] drm_bridge_alloc =================
[09:51:26] ============= drm_bridge_bus_fmt (5 subtests) ==============
[09:51:26] [PASSED] drm_test_bridge_rgb_yuv_rgb
[09:51:26] [PASSED] drm_test_bridge_must_convert_to_yuv444
[09:51:26] [PASSED] drm_test_bridge_hdmi_auto_rgb
[09:51:26] [PASSED] drm_test_bridge_auto_first
[09:51:26] [PASSED] drm_test_bridge_rgb_yuv_no_path
[09:51:26] =============== [PASSED] drm_bridge_bus_fmt ================
[09:51:26] ============= drm_cmdline_parser (40 subtests) =============
[09:51:26] [PASSED] drm_test_cmdline_force_d_only
[09:51:26] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:51:26] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:51:26] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:51:26] [PASSED] drm_test_cmdline_force_e_only
[09:51:26] [PASSED] drm_test_cmdline_res
[09:51:26] [PASSED] drm_test_cmdline_res_vesa
[09:51:26] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:51:26] [PASSED] drm_test_cmdline_res_rblank
[09:51:26] [PASSED] drm_test_cmdline_res_bpp
[09:51:26] [PASSED] drm_test_cmdline_res_refresh
[09:51:26] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:51:26] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:51:26] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:51:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:51:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:51:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:51:26] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:51:26] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:51:26] [PASSED] drm_test_cmdline_res_margins_force_on
[09:51:26] [PASSED] drm_test_cmdline_res_vesa_margins
[09:51:26] [PASSED] drm_test_cmdline_name
[09:51:26] [PASSED] drm_test_cmdline_name_bpp
[09:51:26] [PASSED] drm_test_cmdline_name_option
[09:51:26] [PASSED] drm_test_cmdline_name_bpp_option
[09:51:26] [PASSED] drm_test_cmdline_rotate_0
[09:51:26] [PASSED] drm_test_cmdline_rotate_90
[09:51:26] [PASSED] drm_test_cmdline_rotate_180
[09:51:26] [PASSED] drm_test_cmdline_rotate_270
[09:51:26] [PASSED] drm_test_cmdline_hmirror
[09:51:26] [PASSED] drm_test_cmdline_vmirror
[09:51:26] [PASSED] drm_test_cmdline_margin_options
[09:51:26] [PASSED] drm_test_cmdline_multiple_options
[09:51:26] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:51:26] [PASSED] drm_test_cmdline_extra_and_option
[09:51:26] [PASSED] drm_test_cmdline_freestanding_options
[09:51:26] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:51:26] [PASSED] drm_test_cmdline_panel_orientation
[09:51:26] ================ drm_test_cmdline_invalid  =================
[09:51:26] [PASSED] margin_only
[09:51:26] [PASSED] interlace_only
[09:51:26] [PASSED] res_missing_x
[09:51:26] [PASSED] res_missing_y
[09:51:26] [PASSED] res_bad_y
[09:51:26] [PASSED] res_missing_y_bpp
[09:51:26] [PASSED] res_bad_bpp
[09:51:26] [PASSED] res_bad_refresh
[09:51:26] [PASSED] res_bpp_refresh_force_on_off
[09:51:26] [PASSED] res_invalid_mode
[09:51:26] [PASSED] res_bpp_wrong_place_mode
[09:51:26] [PASSED] name_bpp_refresh
[09:51:26] [PASSED] name_refresh
[09:51:26] [PASSED] name_refresh_wrong_mode
[09:51:26] [PASSED] name_refresh_invalid_mode
[09:51:26] [PASSED] rotate_multiple
[09:51:26] [PASSED] rotate_invalid_val
[09:51:26] [PASSED] rotate_truncated
[09:51:26] [PASSED] invalid_option
[09:51:26] [PASSED] invalid_tv_option
[09:51:26] [PASSED] truncated_tv_option
[09:51:26] ============ [PASSED] drm_test_cmdline_invalid =============
[09:51:26] =============== drm_test_cmdline_tv_options  ===============
[09:51:26] [PASSED] NTSC
[09:51:26] [PASSED] NTSC_443
[09:51:26] [PASSED] NTSC_J
[09:51:26] [PASSED] PAL
[09:51:26] [PASSED] PAL_M
[09:51:26] [PASSED] PAL_N
[09:51:26] [PASSED] SECAM
[09:51:26] [PASSED] MONO_525
[09:51:26] [PASSED] MONO_625
[09:51:26] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:51:26] =============== [PASSED] drm_cmdline_parser ================
[09:51:26] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:51:26] [PASSED] drm_test_connector_hdmi_init_valid
[09:51:26] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:51:26] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:51:26] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:51:26] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:51:26] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:51:26] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:51:26] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:51:26] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[09:51:26] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:51:26] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:51:26] [PASSED] supported_formats=0x5 yuv420_allowed=1
[09:51:26] [PASSED] supported_formats=0x5 yuv420_allowed=0
[09:51:26] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:51:26] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:51:26] [PASSED] drm_test_connector_hdmi_init_null_product
[09:51:26] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:51:26] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:51:26] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:51:26] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:51:26] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:51:26] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:51:26] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:51:26] ========= drm_test_connector_hdmi_init_type_valid  =========
[09:51:26] [PASSED] HDMI-A
[09:51:26] [PASSED] HDMI-B
[09:51:26] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:51:26] ======== drm_test_connector_hdmi_init_type_invalid  ========
[09:51:26] [PASSED] Unknown
[09:51:26] [PASSED] VGA
[09:51:26] [PASSED] DVI-I
[09:51:26] [PASSED] DVI-D
[09:51:26] [PASSED] DVI-A
[09:51:26] [PASSED] Composite
[09:51:26] [PASSED] SVIDEO
[09:51:26] [PASSED] LVDS
[09:51:26] [PASSED] Component
[09:51:26] [PASSED] DIN
[09:51:26] [PASSED] DP
[09:51:26] [PASSED] TV
[09:51:26] [PASSED] eDP
[09:51:26] [PASSED] Virtual
[09:51:26] [PASSED] DSI
[09:51:26] [PASSED] DPI
[09:51:26] [PASSED] Writeback
[09:51:26] [PASSED] SPI
[09:51:26] [PASSED] USB
[09:51:26] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:51:26] ============ [PASSED] drmm_connector_hdmi_init =============
[09:51:26] ============= drmm_connector_init (3 subtests) =============
[09:51:26] [PASSED] drm_test_drmm_connector_init
[09:51:26] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:51:26] ========= drm_test_drmm_connector_init_type_valid  =========
[09:51:26] [PASSED] Unknown
[09:51:26] [PASSED] VGA
[09:51:26] [PASSED] DVI-I
[09:51:26] [PASSED] DVI-D
[09:51:26] [PASSED] DVI-A
[09:51:26] [PASSED] Composite
[09:51:26] [PASSED] SVIDEO
[09:51:26] [PASSED] LVDS
[09:51:26] [PASSED] Component
[09:51:26] [PASSED] DIN
[09:51:26] [PASSED] DP
[09:51:26] [PASSED] HDMI-A
[09:51:26] [PASSED] HDMI-B
[09:51:26] [PASSED] TV
[09:51:26] [PASSED] eDP
[09:51:26] [PASSED] Virtual
[09:51:26] [PASSED] DSI
[09:51:26] [PASSED] DPI
[09:51:26] [PASSED] Writeback
[09:51:26] [PASSED] SPI
[09:51:26] [PASSED] USB
[09:51:26] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:51:26] =============== [PASSED] drmm_connector_init ===============
[09:51:26] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_init
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:51:26] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[09:51:26] [PASSED] Unknown
[09:51:26] [PASSED] VGA
[09:51:26] [PASSED] DVI-I
[09:51:26] [PASSED] DVI-D
[09:51:26] [PASSED] DVI-A
[09:51:26] [PASSED] Composite
[09:51:26] [PASSED] SVIDEO
[09:51:26] [PASSED] LVDS
[09:51:26] [PASSED] Component
[09:51:26] [PASSED] DIN
[09:51:26] [PASSED] DP
[09:51:26] [PASSED] HDMI-A
[09:51:26] [PASSED] HDMI-B
[09:51:26] [PASSED] TV
[09:51:26] [PASSED] eDP
[09:51:26] [PASSED] Virtual
[09:51:26] [PASSED] DSI
[09:51:26] [PASSED] DPI
[09:51:26] [PASSED] Writeback
[09:51:26] [PASSED] SPI
[09:51:26] [PASSED] USB
[09:51:26] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:51:26] ======== drm_test_drm_connector_dynamic_init_name  =========
[09:51:26] [PASSED] Unknown
[09:51:26] [PASSED] VGA
[09:51:26] [PASSED] DVI-I
[09:51:26] [PASSED] DVI-D
[09:51:26] [PASSED] DVI-A
[09:51:26] [PASSED] Composite
[09:51:26] [PASSED] SVIDEO
[09:51:26] [PASSED] LVDS
[09:51:26] [PASSED] Component
[09:51:26] [PASSED] DIN
[09:51:26] [PASSED] DP
[09:51:26] [PASSED] HDMI-A
[09:51:26] [PASSED] HDMI-B
[09:51:26] [PASSED] TV
[09:51:26] [PASSED] eDP
[09:51:26] [PASSED] Virtual
[09:51:26] [PASSED] DSI
[09:51:26] [PASSED] DPI
[09:51:26] [PASSED] Writeback
[09:51:26] [PASSED] SPI
[09:51:26] [PASSED] USB
[09:51:26] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:51:26] =========== [PASSED] drm_connector_dynamic_init ============
[09:51:26] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:51:26] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:51:26] ======= drm_connector_dynamic_register (7 subtests) ========
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:51:26] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:51:26] ========= [PASSED] drm_connector_dynamic_register ==========
[09:51:26] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:51:26] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:51:26] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:51:26] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:51:26] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:51:26] ========== drm_test_get_tv_mode_from_name_valid  ===========
[09:51:26] [PASSED] NTSC
[09:51:26] [PASSED] NTSC-443
[09:51:26] [PASSED] NTSC-J
[09:51:26] [PASSED] PAL
[09:51:26] [PASSED] PAL-M
[09:51:26] [PASSED] PAL-N
[09:51:26] [PASSED] SECAM
[09:51:26] [PASSED] Mono
[09:51:26] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:51:26] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:51:26] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:51:26] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:51:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:51:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:51:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:51:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:51:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:51:26] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:51:26] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[09:51:26] [PASSED] VIC 96
[09:51:26] [PASSED] VIC 97
[09:51:26] [PASSED] VIC 101
[09:51:26] [PASSED] VIC 102
[09:51:26] [PASSED] VIC 106
[09:51:26] [PASSED] VIC 107
[09:51:26] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:51:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:51:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:51:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:51:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:51:26] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:51:26] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:51:26] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:51:26] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[09:51:26] [PASSED] Automatic
[09:51:26] [PASSED] Full
[09:51:26] [PASSED] Limited 16:235
[09:51:26] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:51:26] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:51:26] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:51:26] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:51:26] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[09:51:26] [PASSED] RGB
[09:51:26] [PASSED] YUV 4:2:0
[09:51:26] [PASSED] YUV 4:2:2
[09:51:26] [PASSED] YUV 4:4:4
[09:51:26] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:51:26] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:51:26] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:51:26] ============= drm_damage_helper (21 subtests) ==============
[09:51:26] [PASSED] drm_test_damage_iter_no_damage
[09:51:26] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:51:26] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:51:26] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:51:26] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:51:26] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:51:26] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:51:26] [PASSED] drm_test_damage_iter_simple_damage
[09:51:26] [PASSED] drm_test_damage_iter_single_damage
[09:51:26] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:51:26] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:51:26] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:51:26] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:51:26] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:51:26] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:51:26] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:51:26] [PASSED] drm_test_damage_iter_damage
[09:51:26] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:51:26] [PASSED] drm_test_damage_iter_damage_one_outside
[09:51:26] [PASSED] drm_test_damage_iter_damage_src_moved
[09:51:26] [PASSED] drm_test_damage_iter_damage_not_visible
[09:51:26] ================ [PASSED] drm_damage_helper ================
[09:51:26] ============== drm_dp_mst_helper (3 subtests) ==============
[09:51:26] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[09:51:26] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:51:26] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:51:26] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:51:26] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:51:26] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:51:26] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:51:26] ============== drm_test_dp_mst_calc_pbn_div  ===============
[09:51:26] [PASSED] Link rate 2000000 lane count 4
[09:51:26] [PASSED] Link rate 2000000 lane count 2
[09:51:26] [PASSED] Link rate 2000000 lane count 1
[09:51:26] [PASSED] Link rate 1350000 lane count 4
[09:51:26] [PASSED] Link rate 1350000 lane count 2
[09:51:26] [PASSED] Link rate 1350000 lane count 1
[09:51:26] [PASSED] Link rate 1000000 lane count 4
[09:51:26] [PASSED] Link rate 1000000 lane count 2
[09:51:26] [PASSED] Link rate 1000000 lane count 1
[09:51:26] [PASSED] Link rate 810000 lane count 4
[09:51:26] [PASSED] Link rate 810000 lane count 2
[09:51:26] [PASSED] Link rate 810000 lane count 1
[09:51:26] [PASSED] Link rate 540000 lane count 4
[09:51:26] [PASSED] Link rate 540000 lane count 2
[09:51:26] [PASSED] Link rate 540000 lane count 1
[09:51:26] [PASSED] Link rate 270000 lane count 4
[09:51:26] [PASSED] Link rate 270000 lane count 2
[09:51:26] [PASSED] Link rate 270000 lane count 1
[09:51:26] [PASSED] Link rate 162000 lane count 4
[09:51:26] [PASSED] Link rate 162000 lane count 2
[09:51:26] [PASSED] Link rate 162000 lane count 1
[09:51:26] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:51:26] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[09:51:26] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:51:26] [PASSED] DP_POWER_UP_PHY with port number
[09:51:26] [PASSED] DP_POWER_DOWN_PHY with port number
[09:51:26] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:51:26] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:51:26] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:51:26] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:51:26] [PASSED] DP_QUERY_PAYLOAD with port number
[09:51:26] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:51:26] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:51:26] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:51:26] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:51:26] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:51:26] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:51:26] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:51:26] [PASSED] DP_REMOTE_I2C_READ with port number
[09:51:26] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:51:26] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:51:26] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:51:26] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:51:26] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:51:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:51:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:51:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:51:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:51:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:51:26] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:51:26] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:51:26] ================ [PASSED] drm_dp_mst_helper ================
[09:51:26] ================== drm_exec (7 subtests) ===================
[09:51:26] [PASSED] sanitycheck
[09:51:26] [PASSED] test_lock
[09:51:26] [PASSED] test_lock_unlock
[09:51:26] [PASSED] test_duplicates
[09:51:26] [PASSED] test_prepare
[09:51:26] [PASSED] test_prepare_array
[09:51:26] [PASSED] test_multiple_loops
[09:51:26] ==================== [PASSED] drm_exec =====================
[09:51:26] =========== drm_format_helper_test (17 subtests) ===========
[09:51:26] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:51:26] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:51:26] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:51:26] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:51:26] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:51:26] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:51:26] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:51:26] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:51:26] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:51:26] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:51:26] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:51:26] ============== drm_test_fb_xrgb8888_to_mono  ===============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:51:26] ==================== drm_test_fb_swab  =====================
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ================ [PASSED] drm_test_fb_swab =================
[09:51:26] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:51:26] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[09:51:26] [PASSED] single_pixel_source_buffer
[09:51:26] [PASSED] single_pixel_clip_rectangle
[09:51:26] [PASSED] well_known_colors
[09:51:26] [PASSED] destination_pitch
[09:51:26] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:51:26] ================= drm_test_fb_clip_offset  =================
[09:51:26] [PASSED] pass through
[09:51:26] [PASSED] horizontal offset
[09:51:26] [PASSED] vertical offset
[09:51:26] [PASSED] horizontal and vertical offset
[09:51:26] [PASSED] horizontal offset (custom pitch)
[09:51:26] [PASSED] vertical offset (custom pitch)
[09:51:26] [PASSED] horizontal and vertical offset (custom pitch)
[09:51:26] ============= [PASSED] drm_test_fb_clip_offset =============
[09:51:26] =================== drm_test_fb_memcpy  ====================
[09:51:26] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:51:26] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:51:26] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:51:26] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:51:26] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:51:26] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:51:26] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:51:26] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:51:26] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:51:26] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:51:26] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:51:26] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:51:26] =============== [PASSED] drm_test_fb_memcpy ================
[09:51:26] ============= [PASSED] drm_format_helper_test ==============
[09:51:26] ================= drm_format (18 subtests) =================
[09:51:26] [PASSED] drm_test_format_block_width_invalid
[09:51:26] [PASSED] drm_test_format_block_width_one_plane
[09:51:26] [PASSED] drm_test_format_block_width_two_plane
[09:51:26] [PASSED] drm_test_format_block_width_three_plane
[09:51:26] [PASSED] drm_test_format_block_width_tiled
[09:51:26] [PASSED] drm_test_format_block_height_invalid
[09:51:26] [PASSED] drm_test_format_block_height_one_plane
[09:51:26] [PASSED] drm_test_format_block_height_two_plane
[09:51:26] [PASSED] drm_test_format_block_height_three_plane
[09:51:26] [PASSED] drm_test_format_block_height_tiled
[09:51:26] [PASSED] drm_test_format_min_pitch_invalid
[09:51:26] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:51:26] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:51:26] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:51:26] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:51:26] [PASSED] drm_test_format_min_pitch_two_plane
[09:51:26] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:51:26] [PASSED] drm_test_format_min_pitch_tiled
[09:51:26] =================== [PASSED] drm_format ====================
[09:51:26] ============== drm_framebuffer (10 subtests) ===============
[09:51:26] ========== drm_test_framebuffer_check_src_coords  ==========
[09:51:26] [PASSED] Success: source fits into fb
[09:51:26] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:51:26] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:51:26] [PASSED] Fail: overflowing fb with source width
[09:51:26] [PASSED] Fail: overflowing fb with source height
[09:51:26] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:51:26] [PASSED] drm_test_framebuffer_cleanup
[09:51:26] =============== drm_test_framebuffer_create  ===============
[09:51:26] [PASSED] ABGR8888 normal sizes
[09:51:26] [PASSED] ABGR8888 max sizes
[09:51:26] [PASSED] ABGR8888 pitch greater than min required
[09:51:26] [PASSED] ABGR8888 pitch less than min required
[09:51:26] [PASSED] ABGR8888 Invalid width
[09:51:26] [PASSED] ABGR8888 Invalid buffer handle
[09:51:26] [PASSED] No pixel format
[09:51:26] [PASSED] ABGR8888 Width 0
[09:51:26] [PASSED] ABGR8888 Height 0
[09:51:26] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:51:26] [PASSED] ABGR8888 Large buffer offset
[09:51:26] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:51:26] [PASSED] ABGR8888 Invalid flag
[09:51:26] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:51:26] [PASSED] ABGR8888 Valid buffer modifier
[09:51:26] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:51:26] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:51:26] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:51:26] [PASSED] NV12 Normal sizes
[09:51:26] [PASSED] NV12 Max sizes
[09:51:26] [PASSED] NV12 Invalid pitch
[09:51:26] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:51:26] [PASSED] NV12 different  modifier per-plane
[09:51:26] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:51:26] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:51:26] [PASSED] NV12 Modifier for inexistent plane
[09:51:26] [PASSED] NV12 Handle for inexistent plane
[09:51:26] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:51:26] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:51:26] [PASSED] YVU420 Normal sizes
[09:51:26] [PASSED] YVU420 Max sizes
[09:51:26] [PASSED] YVU420 Invalid pitch
[09:51:26] [PASSED] YVU420 Different pitches
[09:51:26] [PASSED] YVU420 Different buffer offsets/pitches
[09:51:26] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:51:26] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:51:26] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:51:26] [PASSED] YVU420 Valid modifier
[09:51:26] [PASSED] YVU420 Different modifiers per plane
[09:51:26] [PASSED] YVU420 Modifier for inexistent plane
[09:51:26] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:51:26] [PASSED] X0L2 Normal sizes
[09:51:26] [PASSED] X0L2 Max sizes
[09:51:26] [PASSED] X0L2 Invalid pitch
[09:51:26] [PASSED] X0L2 Pitch greater than minimum required
[09:51:26] [PASSED] X0L2 Handle for inexistent plane
[09:51:26] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:51:26] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:51:26] [PASSED] X0L2 Valid modifier
[09:51:26] [PASSED] X0L2 Modifier for inexistent plane
[09:51:26] =========== [PASSED] drm_test_framebuffer_create ===========
[09:51:26] [PASSED] drm_test_framebuffer_free
[09:51:26] [PASSED] drm_test_framebuffer_init
[09:51:26] [PASSED] drm_test_framebuffer_init_bad_format
[09:51:26] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:51:26] [PASSED] drm_test_framebuffer_lookup
[09:51:26] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:51:26] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:51:26] ================= [PASSED] drm_framebuffer =================
[09:51:26] ================ drm_gem_shmem (8 subtests) ================
[09:51:26] [PASSED] drm_gem_shmem_test_obj_create
[09:51:26] [PASSED] drm_gem_shmem_test_obj_create_private
[09:51:26] [PASSED] drm_gem_shmem_test_pin_pages
[09:51:26] [PASSED] drm_gem_shmem_test_vmap
[09:51:26] [PASSED] drm_gem_shmem_test_get_sg_table
[09:51:26] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:51:26] [PASSED] drm_gem_shmem_test_madvise
[09:51:26] [PASSED] drm_gem_shmem_test_purge
[09:51:26] ================== [PASSED] drm_gem_shmem ==================
[09:51:26] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[09:51:26] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:51:26] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:51:26] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:51:26] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:51:26] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:51:26] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:51:26] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[09:51:26] [PASSED] Automatic
[09:51:26] [PASSED] Full
[09:51:26] [PASSED] Limited 16:235
[09:51:26] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:51:26] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:51:26] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:51:26] [PASSED] drm_test_check_disable_connector
[09:51:26] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:51:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:51:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:51:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:51:26] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:51:26] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:51:26] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:51:26] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:51:26] [PASSED] drm_test_check_output_bpc_dvi
[09:51:26] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:51:26] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:51:26] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:51:26] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:51:26] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:51:26] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:51:26] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:51:26] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:51:26] ============ drm_test_check_hdmi_color_format  =============
[09:51:26] [PASSED] AUTO -> RGB
[09:51:26] [PASSED] YCBCR422 -> YUV422
[09:51:26] [PASSED] YCBCR420 -> YUV420
[09:51:26] [PASSED] YCBCR444 -> YUV444
[09:51:26] [PASSED] RGB -> RGB
[09:51:26] ======== [PASSED] drm_test_check_hdmi_color_format =========
[09:51:26] ======== drm_test_check_hdmi_color_format_420_only  ========
[09:51:26] [PASSED] RGB should fail
[09:51:26] [PASSED] YUV444 should fail
[09:51:26] [PASSED] YUV422 should fail
[09:51:26] [PASSED] YUV420 should work
[09:51:26] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[09:51:26] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:51:26] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:51:26] [PASSED] drm_test_check_broadcast_rgb_value
[09:51:26] [PASSED] drm_test_check_bpc_8_value
[09:51:26] [PASSED] drm_test_check_bpc_10_value
[09:51:26] [PASSED] drm_test_check_bpc_12_value
[09:51:26] [PASSED] drm_test_check_format_value
[09:51:26] [PASSED] drm_test_check_tmds_char_value
[09:51:26] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:51:26] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[09:51:26] [PASSED] drm_test_check_mode_valid
[09:51:26] [PASSED] drm_test_check_mode_valid_reject
[09:51:26] [PASSED] drm_test_check_mode_valid_reject_rate
[09:51:26] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:51:26] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[09:51:26] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[09:51:26] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[09:51:26] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:51:26] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[09:51:26] [PASSED] drm_test_check_infoframes
[09:51:26] [PASSED] drm_test_check_reject_avi_infoframe
[09:51:26] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[09:51:26] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[09:51:26] [PASSED] drm_test_check_reject_audio_infoframe
[09:51:26] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[09:51:26] ================= drm_managed (2 subtests) =================
[09:51:26] [PASSED] drm_test_managed_release_action
[09:51:26] [PASSED] drm_test_managed_run_action
[09:51:26] =================== [PASSED] drm_managed ===================
[09:51:26] =================== drm_mm (6 subtests) ====================
[09:51:26] [PASSED] drm_test_mm_init
[09:51:26] [PASSED] drm_test_mm_debug
[09:51:26] [PASSED] drm_test_mm_align32
[09:51:26] [PASSED] drm_test_mm_align64
[09:51:26] [PASSED] drm_test_mm_lowest
[09:51:26] [PASSED] drm_test_mm_highest
[09:51:26] ===================== [PASSED] drm_mm ======================
[09:51:26] ============= drm_modes_analog_tv (5 subtests) =============
[09:51:26] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:51:26] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:51:26] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:51:26] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:51:26] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:51:26] =============== [PASSED] drm_modes_analog_tv ===============
[09:51:26] ============== drm_plane_helper (2 subtests) ===============
[09:51:26] =============== drm_test_check_plane_state  ================
[09:51:26] [PASSED] clipping_simple
[09:51:26] [PASSED] clipping_rotate_reflect
[09:51:26] [PASSED] positioning_simple
[09:51:26] [PASSED] upscaling
[09:51:26] [PASSED] downscaling
[09:51:26] [PASSED] rounding1
[09:51:26] [PASSED] rounding2
[09:51:26] [PASSED] rounding3
[09:51:26] [PASSED] rounding4
[09:51:26] =========== [PASSED] drm_test_check_plane_state ============
[09:51:26] =========== drm_test_check_invalid_plane_state  ============
[09:51:26] [PASSED] positioning_invalid
[09:51:26] [PASSED] upscaling_invalid
[09:51:26] [PASSED] downscaling_invalid
[09:51:26] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:51:26] ================ [PASSED] drm_plane_helper =================
[09:51:26] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:51:26] ====== drm_test_connector_helper_tv_get_modes_check  =======
[09:51:26] [PASSED] None
[09:51:26] [PASSED] PAL
[09:51:26] [PASSED] NTSC
[09:51:26] [PASSED] Both, NTSC Default
[09:51:26] [PASSED] Both, PAL Default
[09:51:26] [PASSED] Both, NTSC Default, with PAL on command-line
[09:51:26] [PASSED] Both, PAL Default, with NTSC on command-line
[09:51:26] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:51:26] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:51:26] ================== drm_rect (9 subtests) ===================
[09:51:26] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:51:26] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:51:26] [PASSED] drm_test_rect_clip_scaled_clipped
[09:51:26] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:51:26] ================= drm_test_rect_intersect  =================
[09:51:26] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:51:26] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:51:26] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:51:26] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:51:26] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:51:26] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:51:26] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:51:26] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:51:26] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:51:26] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:51:26] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:51:26] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:51:26] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:51:26] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:51:26] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:51:26] ============= [PASSED] drm_test_rect_intersect =============
[09:51:26] ================ drm_test_rect_calc_hscale  ================
[09:51:26] [PASSED] normal use
[09:51:26] [PASSED] out of max range
[09:51:26] [PASSED] out of min range
[09:51:26] [PASSED] zero dst
[09:51:26] [PASSED] negative src
[09:51:26] [PASSED] negative dst
[09:51:26] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:51:26] ================ drm_test_rect_calc_vscale  ================
[09:51:26] [PASSED] normal use
[09:51:26] [PASSED] out of max range
[09:51:26] [PASSED] out of min range
[09:51:26] [PASSED] zero dst
[09:51:26] [PASSED] negative src
[09:51:26] [PASSED] negative dst
[09:51:26] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:51:26] ================== drm_test_rect_rotate  ===================
[09:51:26] [PASSED] reflect-x
[09:51:26] [PASSED] reflect-y
[09:51:26] [PASSED] rotate-0
[09:51:26] [PASSED] rotate-90
[09:51:26] [PASSED] rotate-180
[09:51:26] [PASSED] rotate-270
[09:51:26] ============== [PASSED] drm_test_rect_rotate ===============
[09:51:26] ================ drm_test_rect_rotate_inv  =================
[09:51:26] [PASSED] reflect-x
[09:51:26] [PASSED] reflect-y
[09:51:26] [PASSED] rotate-0
[09:51:26] [PASSED] rotate-90
[09:51:26] [PASSED] rotate-180
[09:51:26] [PASSED] rotate-270
[09:51:26] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:51:26] ==================== [PASSED] drm_rect =====================
[09:51:26] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:51:26] ============ drm_test_sysfb_build_fourcc_list  =============
[09:51:26] [PASSED] no native formats
[09:51:26] [PASSED] XRGB8888 as native format
[09:51:26] [PASSED] remove duplicates
[09:51:26] [PASSED] convert alpha formats
[09:51:26] [PASSED] random formats
[09:51:26] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:51:26] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:51:26] ================== drm_fixp (2 subtests) ===================
[09:51:26] [PASSED] drm_test_int2fixp
[09:51:26] [PASSED] drm_test_sm2fixp
[09:51:26] ==================== [PASSED] drm_fixp =====================
[09:51:26] ============================================================
[09:51:26] Testing complete. Ran 641 tests: passed: 641
[09:51:26] Elapsed time: 26.829s total, 1.818s configuring, 24.795s building, 0.192s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:51:26] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:51:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:51:38] Starting KUnit Kernel (1/1)...
[09:51:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:51:38] ============= refcount_interrupt (4 subtests) ==============
[09:51:38] [PASSED] test_single_irq_change
[09:51:38] [PASSED] test_nested_irq_change
[09:51:38] [PASSED] test_multiple_irq_change
[09:51:38] [PASSED] test_irq_save
[09:51:38] =============== [PASSED] refcount_interrupt ================
[09:51:38] ================= ttm_device (5 subtests) ==================
[09:51:38] [PASSED] ttm_device_init_basic
[09:51:38] [PASSED] ttm_device_init_multiple
[09:51:38] [PASSED] ttm_device_fini_basic
[09:51:38] [PASSED] ttm_device_init_no_vma_man
[09:51:38] ================== ttm_device_init_pools  ==================
[09:51:38] [PASSED] No DMA allocations, no DMA32 required
[09:51:38] [PASSED] DMA allocations, DMA32 required
[09:51:38] [PASSED] No DMA allocations, DMA32 required
[09:51:38] [PASSED] DMA allocations, no DMA32 required
[09:51:38] ============== [PASSED] ttm_device_init_pools ==============
[09:51:38] =================== [PASSED] ttm_device ====================
[09:51:38] ================== ttm_pool (8 subtests) ===================
[09:51:38] ================== ttm_pool_alloc_basic  ===================
[09:51:38] [PASSED] One page
[09:51:38] [PASSED] More than one page
[09:51:38] [PASSED] Above the allocation limit
[09:51:38] [PASSED] One page, with coherent DMA mappings enabled
[09:51:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:51:38] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:51:38] ============== ttm_pool_alloc_basic_dma_addr  ==============
[09:51:38] [PASSED] One page
[09:51:38] [PASSED] More than one page
[09:51:38] [PASSED] Above the allocation limit
[09:51:38] [PASSED] One page, with coherent DMA mappings enabled
[09:51:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:51:38] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:51:38] [PASSED] ttm_pool_alloc_order_caching_match
[09:51:38] [PASSED] ttm_pool_alloc_caching_mismatch
[09:51:38] [PASSED] ttm_pool_alloc_order_mismatch
[09:51:38] [PASSED] ttm_pool_free_dma_alloc
[09:51:38] [PASSED] ttm_pool_free_no_dma_alloc
[09:51:38] [PASSED] ttm_pool_fini_basic
[09:51:38] ==================== [PASSED] ttm_pool =====================
[09:51:38] ================ ttm_resource (8 subtests) =================
[09:51:38] ================= ttm_resource_init_basic  =================
[09:51:38] [PASSED] Init resource in TTM_PL_SYSTEM
[09:51:38] [PASSED] Init resource in TTM_PL_VRAM
[09:51:38] [PASSED] Init resource in a private placement
[09:51:38] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:51:38] ============= [PASSED] ttm_resource_init_basic =============
[09:51:38] [PASSED] ttm_resource_init_pinned
[09:51:38] [PASSED] ttm_resource_fini_basic
[09:51:38] [PASSED] ttm_resource_manager_init_basic
[09:51:38] [PASSED] ttm_resource_manager_usage_basic
[09:51:38] [PASSED] ttm_resource_manager_set_used_basic
[09:51:38] [PASSED] ttm_sys_man_alloc_basic
[09:51:38] [PASSED] ttm_sys_man_free_basic
[09:51:38] ================== [PASSED] ttm_resource ===================
[09:51:38] =================== ttm_tt (15 subtests) ===================
[09:51:38] ==================== ttm_tt_init_basic  ====================
[09:51:38] [PASSED] Page-aligned size
[09:51:38] [PASSED] Extra pages requested
[09:51:38] ================ [PASSED] ttm_tt_init_basic ================
[09:51:38] [PASSED] ttm_tt_init_misaligned
[09:51:38] [PASSED] ttm_tt_fini_basic
[09:51:38] [PASSED] ttm_tt_fini_sg
[09:51:38] [PASSED] ttm_tt_fini_shmem
[09:51:38] [PASSED] ttm_tt_create_basic
[09:51:38] [PASSED] ttm_tt_create_invalid_bo_type
[09:51:38] [PASSED] ttm_tt_create_ttm_exists
[09:51:38] [PASSED] ttm_tt_create_failed
[09:51:38] [PASSED] ttm_tt_destroy_basic
[09:51:38] [PASSED] ttm_tt_populate_null_ttm
[09:51:38] [PASSED] ttm_tt_populate_populated_ttm
[09:51:38] [PASSED] ttm_tt_unpopulate_basic
[09:51:38] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:51:38] [PASSED] ttm_tt_swapin_basic
[09:51:38] ===================== [PASSED] ttm_tt ======================
[09:51:38] =================== ttm_bo (14 subtests) ===================
[09:51:38] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[09:51:38] [PASSED] Cannot be interrupted and sleeps
[09:51:38] [PASSED] Cannot be interrupted, locks straight away
[09:51:38] [PASSED] Can be interrupted, sleeps
[09:51:38] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:51:38] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:51:38] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:51:38] [PASSED] ttm_bo_reserve_double_resv
[09:51:38] [PASSED] ttm_bo_reserve_interrupted
[09:51:38] [PASSED] ttm_bo_reserve_deadlock
[09:51:38] [PASSED] ttm_bo_unreserve_basic
[09:51:38] [PASSED] ttm_bo_unreserve_pinned
[09:51:38] [PASSED] ttm_bo_unreserve_bulk
[09:51:38] [PASSED] ttm_bo_fini_basic
[09:51:38] [PASSED] ttm_bo_fini_shared_resv
[09:51:38] [PASSED] ttm_bo_pin_basic
[09:51:38] [PASSED] ttm_bo_pin_unpin_resource
[09:51:38] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:51:38] ===================== [PASSED] ttm_bo ======================
[09:51:38] ============== ttm_bo_validate (22 subtests) ===============
[09:51:38] ============== ttm_bo_init_reserved_sys_man  ===============
[09:51:38] [PASSED] Buffer object for userspace
[09:51:38] [PASSED] Kernel buffer object
[09:51:38] [PASSED] Shared buffer object
[09:51:38] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:51:38] ============== ttm_bo_init_reserved_mock_man  ==============
[09:51:38] [PASSED] Buffer object for userspace
[09:51:38] [PASSED] Kernel buffer object
[09:51:38] [PASSED] Shared buffer object
[09:51:38] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:51:38] [PASSED] ttm_bo_init_reserved_resv
[09:51:38] ================== ttm_bo_validate_basic  ==================
[09:51:38] [PASSED] Buffer object for userspace
[09:51:38] [PASSED] Kernel buffer object
[09:51:38] [PASSED] Shared buffer object
[09:51:38] ============== [PASSED] ttm_bo_validate_basic ==============
[09:51:38] [PASSED] ttm_bo_validate_invalid_placement
[09:51:38] ============= ttm_bo_validate_same_placement  ==============
[09:51:38] [PASSED] System manager
[09:51:38] [PASSED] VRAM manager
[09:51:38] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:51:38] [PASSED] ttm_bo_validate_failed_alloc
[09:51:38] [PASSED] ttm_bo_validate_pinned
[09:51:38] [PASSED] ttm_bo_validate_busy_placement
[09:51:38] ================ ttm_bo_validate_multihop  =================
[09:51:38] [PASSED] Buffer object for userspace
[09:51:38] [PASSED] Kernel buffer object
[09:51:38] [PASSED] Shared buffer object
[09:51:38] ============ [PASSED] ttm_bo_validate_multihop =============
[09:51:38] ========== ttm_bo_validate_no_placement_signaled  ==========
[09:51:38] [PASSED] Buffer object in system domain, no page vector
[09:51:38] [PASSED] Buffer object in system domain with an existing page vector
[09:51:38] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:51:38] ======== ttm_bo_validate_no_placement_not_signaled  ========
[09:51:38] [PASSED] Buffer object for userspace
[09:51:38] [PASSED] Kernel buffer object
[09:51:38] [PASSED] Shared buffer object
[09:51:38] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:51:38] [PASSED] ttm_bo_validate_move_fence_signaled
[09:51:38] ========= ttm_bo_validate_move_fence_not_signaled  =========
[09:51:38] [PASSED] Waits for GPU
[09:51:38] [PASSED] Tries to lock straight away
[09:51:38] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:51:38] [PASSED] ttm_bo_validate_swapout
[09:51:38] [PASSED] ttm_bo_validate_happy_evict
[09:51:38] [PASSED] ttm_bo_validate_all_pinned_evict
[09:51:38] [PASSED] ttm_bo_validate_allowed_only_evict
[09:51:38] [PASSED] ttm_bo_validate_deleted_evict
[09:51:38] [PASSED] ttm_bo_validate_busy_domain_evict
[09:51:38] [PASSED] ttm_bo_validate_evict_gutting
[09:51:38] [PASSED] ttm_bo_validate_recrusive_evict
[09:51:38] ================= [PASSED] ttm_bo_validate =================
[09:51:38] ============================================================
[09:51:38] Testing complete. Ran 106 tests: passed: 106
[09:51:38] Elapsed time: 12.173s total, 1.843s configuring, 10.116s building, 0.181s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[09:51:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:51:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:51:49] Starting KUnit Kernel (1/1)...
[09:51:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:51:49] ============= refcount_interrupt (4 subtests) ==============
[09:51:49] [PASSED] test_single_irq_change
[09:51:49] [PASSED] test_nested_irq_change
[09:51:49] [PASSED] test_multiple_irq_change
[09:51:49] [PASSED] test_irq_save
[09:51:49] =============== [PASSED] refcount_interrupt ================
[09:51:49] =============== dma-buf-fence (12 subtests) ================
[09:51:49] [PASSED] test_sanitycheck
[09:51:49] [PASSED] test_signaling
[09:51:49] [PASSED] test_add_callback
[09:51:49] [PASSED] test_late_add_callback
[09:51:49] [PASSED] test_rm_callback
[09:51:49] [PASSED] test_late_rm_callback
[09:51:49] [PASSED] test_status
[09:51:49] [PASSED] test_error
[09:51:49] [PASSED] test_wait
[09:51:49] [PASSED] test_wait_timeout
[09:51:49] [PASSED] test_stub
[09:51:49] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[09:51:49] ================== [PASSED] dma-buf-fence ==================
[09:51:49] ============ dma-buf-fence-chain (11 subtests) =============
[09:51:49] [PASSED] test_sanitycheck
[09:51:49] [PASSED] test_find_seqno
[09:51:49] [PASSED] test_find_signaled
[09:51:49] [PASSED] test_find_out_of_order
[09:51:54] [PASSED] test_find_gap
[09:51:54] [PASSED] test_find_race
[09:51:54] [PASSED] test_signal_forward
[09:51:54] [PASSED] test_signal_backward
[09:51:54] [PASSED] test_wait_forward
[09:51:54] [PASSED] test_wait_backward
[09:51:54] [PASSED] test_wait_random
[09:51:54] =============== [PASSED] dma-buf-fence-chain ===============
[09:51:54] ============ dma-buf-fence-unwrap (10 subtests) ============
[09:51:54] [PASSED] test_sanitycheck
[09:51:54] [PASSED] test_unwrap_array
[09:51:54] [PASSED] test_unwrap_chain
[09:51:54] [PASSED] test_unwrap_chain_array
[09:51:54] [PASSED] test_unwrap_merge
[09:51:54] [PASSED] test_unwrap_merge_duplicate
[09:51:54] [PASSED] test_unwrap_merge_seqno
[09:51:54] [PASSED] test_unwrap_merge_order
[09:51:54] [PASSED] test_unwrap_merge_complex
[09:51:54] [PASSED] test_unwrap_merge_complex_seqno
[09:51:54] ============== [PASSED] dma-buf-fence-unwrap ===============
[09:51:54] ================ dma-buf-resv (5 subtests) =================
[09:51:54] [PASSED] test_sanitycheck
[09:51:54] ===================== test_signaling  ======================
[09:51:54] [PASSED] kernel
[09:51:54] [PASSED] write
[09:51:54] [PASSED] read
[09:51:54] [PASSED] bookkeep
[09:51:54] ================= [PASSED] test_signaling ==================
[09:51:54] ====================== test_for_each  ======================
[09:51:54] [PASSED] kernel
[09:51:54] [PASSED] write
[09:51:54] [PASSED] read
[09:51:54] [PASSED] bookkeep
[09:51:54] ================== [PASSED] test_for_each ==================
[09:51:54] ================= test_for_each_unlocked  ==================
[09:51:54] [PASSED] kernel
[09:51:54] [PASSED] write
[09:51:54] [PASSED] read
[09:51:54] [PASSED] bookkeep
[09:51:54] ============= [PASSED] test_for_each_unlocked ==============
[09:51:54] ===================== test_get_fences  =====================
[09:51:54] [PASSED] kernel
[09:51:54] [PASSED] write
[09:51:54] [PASSED] read
[09:51:54] [PASSED] bookkeep
[09:51:54] ================= [PASSED] test_get_fences =================
[09:51:54] ================== [PASSED] dma-buf-resv ===================
[09:51:54] ============================================================
[09:51:54] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[09:51:54] Elapsed time: 15.703s total, 1.749s configuring, 8.682s building, 5.268s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 16+ messages in thread

* ✓ Xe.CI.BAT: success for drm/i915/color: Add YUV Support in color pipeline
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
                   ` (9 preceding siblings ...)
  2026-09-02  9:52 ` ✓ CI.KUnit: success for drm/i915/color: Add YUV Support in color pipeline Patchwork
@ 2026-09-02 10:55 ` Patchwork
  2026-09-02 20:47 ` ✗ Xe.CI.FULL: failure " Patchwork
  11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2026-09-02 10:55 UTC (permalink / raw)
  To: Chaitanya Kumar Borah; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 8949 bytes --]

== Series Details ==

Series: drm/i915/color: Add YUV Support in color pipeline
URL   : https://patchwork.freedesktop.org/series/173195/
State : success

== Summary ==

CI Bug Log - changes from xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b_BAT -> xe-pw-173195v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (10 -> 12)
------------------------------

  Additional (2): bat-bmg-2 bat-nvls-1 

Known issues
------------

  Here are the changes found in xe-pw-173195v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@write:
    - bat-bmg-2:          NOTRUN -> [SKIP][1] ([Intel XE#2134]) +4 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@fbdev@write.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-bmg-2:          NOTRUN -> [SKIP][2] ([Intel XE#2233])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
    - bat-nvls-1:         NOTRUN -> [SKIP][3] ([Intel XE#8757])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - bat-bmg-2:          NOTRUN -> [SKIP][4] ([Intel XE#2489] / [Intel XE#3419]) +13 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-nvls-1:         NOTRUN -> [SKIP][5] ([Intel XE#8759])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@kms_dsc@dsc-basic.html

  * igt@kms_flip@basic-flip-vs-modeset:
    - bat-bmg-2:          NOTRUN -> [SKIP][6] ([Intel XE#2482]) +3 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html

  * igt@kms_frontbuffer_tracking@basic:
    - bat-bmg-2:          NOTRUN -> [SKIP][7] ([Intel XE#2434] / [Intel XE#2548] / [Intel XE#6314])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - bat-bmg-2:          NOTRUN -> [SKIP][8] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@xe_evict@evict-small-multi-vm:
    - bat-nvls-1:         NOTRUN -> [SKIP][9] ([Intel XE#8777]) +9 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_evict@evict-small-multi-vm.html

  * igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd:
    - bat-nvls-1:         NOTRUN -> [SKIP][10] ([Intel XE#8744]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html

  * igt@xe_exec_balancer@twice-virtual-userptr-invalidate:
    - bat-nvls-1:         NOTRUN -> [SKIP][11] ([Intel XE#8741]) +17 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_exec_balancer@twice-virtual-userptr-invalidate.html

  * igt@xe_exec_multi_queue@many-queues-userptr-invalidate:
    - bat-nvls-1:         NOTRUN -> [SKIP][12] ([Intel XE#8377]) +13 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_exec_multi_queue@many-queues-userptr-invalidate.html

  * igt@xe_exec_multi_queue@priority:
    - bat-bmg-2:          NOTRUN -> [SKIP][13] ([Intel XE#8364]) +13 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@xe_exec_multi_queue@priority.html

  * igt@xe_huc_copy@huc_copy:
    - bat-nvls-1:         NOTRUN -> [SKIP][14] ([Intel XE#8746])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_huc_copy@huc_copy.html

  * igt@xe_live_ktest@xe_bo:
    - bat-nvls-1:         NOTRUN -> [SKIP][15] ([Intel XE#8792])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_live_ktest@xe_bo.html

  * igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
    - bat-nvls-1:         NOTRUN -> [SKIP][16] ([Intel XE#8791] / [Intel XE#8792])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - bat-bmg-2:          NOTRUN -> [SKIP][17] ([Intel XE#2229])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - bat-nvls-1:         NOTRUN -> [SKIP][18] ([Intel XE#8791])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_mmap@vram:
    - bat-nvls-1:         NOTRUN -> [SKIP][19] ([Intel XE#8747])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_mmap@vram.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-bmg-2:          NOTRUN -> [SKIP][20] ([Intel XE#1420] / [Intel XE#7590])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html
    - bat-nvls-1:         NOTRUN -> [SKIP][21] ([Intel XE#8748])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - bat-bmg-2:          NOTRUN -> [SKIP][22] ([Intel XE#2245] / [Intel XE#7590])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@xe_pat@pat-index-xelp.html
    - bat-nvls-1:         NOTRUN -> [SKIP][23] ([Intel XE#8743])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-bmg-2:          NOTRUN -> [SKIP][24] ([Intel XE#2236] / [Intel XE#7590])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html
    - bat-nvls-1:         NOTRUN -> [SKIP][25] ([Intel XE#8745])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/bat-nvls-1/igt@xe_pat@pat-index-xelpg.html

  
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
  [Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
  [Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
  [Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
  [Intel XE#6314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6314
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8377
  [Intel XE#8741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8741
  [Intel XE#8743]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8743
  [Intel XE#8744]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8744
  [Intel XE#8745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8745
  [Intel XE#8746]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8746
  [Intel XE#8747]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8747
  [Intel XE#8748]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8748
  [Intel XE#8757]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8757
  [Intel XE#8759]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8759
  [Intel XE#8777]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8777
  [Intel XE#8791]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8791
  [Intel XE#8792]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8792


Build changes
-------------

  * Linux: xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b -> xe-pw-173195v1

  IGT_9079: 9079
  xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b: c53467440a5196138d2d6610e269a43b6b47bf6b
  xe-pw-173195v1: 173195v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/index.html

[-- Attachment #2: Type: text/html, Size: 10218 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

* ✗ Xe.CI.FULL: failure for drm/i915/color: Add YUV Support in color pipeline
  2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
                   ` (10 preceding siblings ...)
  2026-09-02 10:55 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-09-02 20:47 ` Patchwork
  11 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2026-09-02 20:47 UTC (permalink / raw)
  To: Chaitanya Kumar Borah; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 55722 bytes --]

== Series Details ==

Series: drm/i915/color: Add YUV Support in color pipeline
URL   : https://patchwork.freedesktop.org/series/173195/
State : failure

== Summary ==

CI Bug Log - changes from xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b_FULL -> xe-pw-173195v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-173195v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-173195v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-173195v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-lnl:          [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-lnl-5/igt@kms_fbcon_fbt@psr-suspend.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-8/igt@kms_fbcon_fbt@psr-suspend.html

  
New tests
---------

  New tests have been introduced between xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b_FULL and xe-pw-173195v1_FULL:

### New IGT tests (86) ###

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.02] s

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.02] s

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.02] s

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.04] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.04] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.04] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.03, 0.04] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.04] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.02] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.02] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.04] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.04] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.02] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.04] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.05] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.03, 0.04] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.02] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.02] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.04] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.02, 0.04] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.02] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.03] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01, 0.02] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.02] s

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.02] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.03] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.02] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.02] s

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-3:
    - Statuses : 2 pass(s)
    - Exec time: [0.21, 0.25] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-4:
    - Statuses : 2 pass(s)
    - Exec time: [0.21, 0.23] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-3:
    - Statuses : 2 pass(s)
    - Exec time: [0.21, 0.25] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-4:
    - Statuses : 2 pass(s)
    - Exec time: [0.20, 0.21] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-3:
    - Statuses : 2 pass(s)
    - Exec time: [0.21, 0.22] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-4:
    - Statuses : 2 pass(s)
    - Exec time: [0.20, 0.22] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.23] s

  * igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.21] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-3:
    - Statuses : 2 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4:
    - Statuses : 2 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-3:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.01] s

  * igt@kms_pm_rpm@legacy-planes-dpms@plane-105:
    - Statuses : 2 pass(s)
    - Exec time: [2.75, 8.05] s

  * igt@kms_pm_rpm@legacy-planes-dpms@plane-140:
    - Statuses : 2 pass(s)
    - Exec time: [2.86, 8.34] s

  * igt@kms_pm_rpm@legacy-planes-dpms@plane-163:
    - Statuses : 2 pass(s)
    - Exec time: [2.84, 7.99] s

  * igt@kms_pm_rpm@legacy-planes-dpms@plane-70:
    - Statuses : 2 pass(s)
    - Exec time: [2.72, 7.96] s

  * igt@kms_pm_rpm@legacy-planes@plane-105:
    - Statuses : 2 pass(s)
    - Exec time: [2.73, 8.06] s

  * igt@kms_pm_rpm@legacy-planes@plane-140:
    - Statuses : 2 pass(s)
    - Exec time: [2.82, 9.19] s

  * igt@kms_pm_rpm@legacy-planes@plane-163:
    - Statuses : 2 pass(s)
    - Exec time: [3.98, 7.99] s

  * igt@kms_pm_rpm@legacy-planes@plane-70:
    - Statuses : 2 pass(s)
    - Exec time: [3.11, 8.05] s

  * igt@kms_pm_rpm@universal-planes-dpms@plane-105:
    - Statuses : 2 pass(s)
    - Exec time: [2.73, 8.03] s

  * igt@kms_pm_rpm@universal-planes-dpms@plane-140:
    - Statuses : 2 pass(s)
    - Exec time: [2.92, 8.04] s

  * igt@kms_pm_rpm@universal-planes-dpms@plane-186:
    - Statuses : 2 pass(s)
    - Exec time: [2.75, 8.39] s

  * igt@kms_pm_rpm@universal-planes-dpms@plane-70:
    - Statuses : 2 pass(s)
    - Exec time: [2.84, 8.03] s

  * igt@kms_pm_rpm@universal-planes@plane-105:
    - Statuses : 1 pass(s)
    - Exec time: [8.05] s

  * igt@kms_pm_rpm@universal-planes@plane-140:
    - Statuses : 1 pass(s)
    - Exec time: [8.06] s

  * igt@kms_pm_rpm@universal-planes@plane-186:
    - Statuses : 1 pass(s)
    - Exec time: [8.06] s

  * igt@kms_pm_rpm@universal-planes@plane-70:
    - Statuses : 1 pass(s)
    - Exec time: [7.95] s

  

Known issues
------------

  Here are the changes found in xe-pw-173195v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [PASS][3] -> [FAIL][4] ([Intel XE#3718] / [Intel XE#6078])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2:
    - shard-bmg:          [PASS][5] -> [FAIL][6] ([Intel XE#6078])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][7] ([Intel XE#3658] / [Intel XE#7360])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#1467] / [Intel XE#7367])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#1124])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#8365])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#2887])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#3432])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#3432])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#306] / [Intel XE#7358])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_frames@hdmi-crc-single:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#373])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_chamelium_frames@hdmi-crc-single.html

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4 (NEW):
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#6969]) +40 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-2/igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4.html

  * igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4 (NEW):
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#6969]) +54 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-10/igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4.html

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4 (NEW):
    - shard-lnl:          NOTRUN -> [SKIP][18] ([Intel XE#6969] / [Intel XE#7006])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-3/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4.html

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4 (NEW):
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#6969] / [Intel XE#7006])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-4/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4.html

  * igt@kms_content_protection@legacy-hdcp14:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#7642])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_content_protection@legacy-hdcp14.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][21] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-rapid-movement-max-size:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#1424])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html

  * igt@kms_flip@2x-plain-flip-fb-recreate:
    - shard-lnl:          NOTRUN -> [SKIP][23] ([Intel XE#1421])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_flip@2x-plain-flip-fb-recreate.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][24] ([Intel XE#7178] / [Intel XE#7351])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#6312] / [Intel XE#651])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][26] ([Intel XE#656] / [Intel XE#7905]) +7 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@drrshdr-2p-pri-indfb-multidraw:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2311]) +3 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrshdr-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-indfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#6312]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y:
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#7399])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#7865]) +5 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@plane-fbc-rte:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2350] / [Intel XE#7503])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-10/igt@kms_frontbuffer_tracking@plane-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-move:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2313]) +3 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#7905]) +4 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-onoff.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#7283])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#8303]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_pm_dc@dc3co-framedrop-check@pr-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#8395] / [Intel XE#8396])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_pm_dc@dc3co-framedrop-check@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-framedrop-check@psr2-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#8396]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_pm_dc@dc3co-framedrop-check@psr2-xrgb8888.html

  * igt@kms_pm_dc@dc5-dpms-negative:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#1131])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_pm_dc@dc5-dpms-negative.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][39] ([Intel XE#2893] / [Intel XE#7304])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#1489])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html

  * igt@kms_psr@fbc-pr-sprite-plane-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-8/igt@kms_psr@fbc-pr-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr2-basic:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#1406] / [Intel XE#7345])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_psr@fbc-psr2-basic.html

  * igt@kms_psr@fbc-psr2-basic@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_psr@fbc-psr2-basic@edp-1.html

  * igt@kms_psr@pr-primary-page-flip:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#1406])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_psr@pr-primary-page-flip.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#3904] / [Intel XE#7342])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#1127] / [Intel XE#5813])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@xe_evict@evict-small-cm:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#6540] / [Intel XE#688])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_evict@evict-small-cm.html

  * igt@xe_exec_balancer@twice-virtual-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#7482]) +2 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_exec_balancer@twice-virtual-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#1392]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html

  * igt@xe_exec_fault_mode@many-multi-queue-invalid-fault:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#8374])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-10/igt@xe_exec_fault_mode@many-multi-queue-invalid-fault.html

  * igt@xe_exec_fault_mode@once-multi-queue:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#8374]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_exec_fault_mode@once-multi-queue.html

  * igt@xe_exec_multi_queue@many-queues-basic-smem:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#8364])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@xe_exec_multi_queue@many-queues-basic-smem.html

  * igt@xe_exec_multi_queue@many-queues-priority-smem:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#8364]) +3 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_exec_multi_queue@many-queues-priority-smem.html

  * igt@xe_exec_reset@gt-stress-reset-memory-pressure:
    - shard-bmg:          [PASS][54] -> [DMESG-WARN][55] ([Intel XE#8649] / [Intel XE#8652])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-3/igt@xe_exec_reset@gt-stress-reset-memory-pressure.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-8/igt@xe_exec_reset@gt-stress-reset-memory-pressure.html

  * igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race:
    - shard-lnl:          [PASS][56] -> [FAIL][57] ([Intel XE#9096])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-lnl-5/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-3/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race.html

  * igt@xe_exec_threads@threads-multi-queue-hang-basic:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#8378]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_exec_threads@threads-multi-queue-hang-basic.html

  * igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run:
    - shard-bmg:          [PASS][59] -> [ABORT][60] ([Intel XE#8007]) +1 other test abort
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-7/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html

  * igt@xe_madvise@atomic-global:
    - shard-lnl:          NOTRUN -> [SKIP][61] ([Intel XE#7980])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_madvise@atomic-global.html

  * igt@xe_page_reclaim@prl-max-entries:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#7793])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-8/igt@xe_page_reclaim@prl-max-entries.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#7599])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-10/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_query@multigpu-query-uc-fw-version-guc:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#944])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@xe_query@multigpu-query-uc-fw-version-guc.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#4130] / [Intel XE#7366])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html

  * igt@xe_sriov_vfio@region-info:
    - shard-lnl:          NOTRUN -> [SKIP][66] ([Intel XE#7724])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_sriov_vfio@region-info.html

  * igt@xe_vm@overcommit-fault-vram-lr-no-overcommit:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#7892])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_vm@overcommit-fault-vram-lr-no-overcommit.html

  
#### Possible fixes ####

  * igt@core_hotunplug@hotunbind-rebind-with-load:
    - shard-bmg:          [SKIP][68] ([Intel XE#8749]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@core_hotunplug@hotunbind-rebind-with-load.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@core_hotunplug@hotunbind-rebind-with-load.html

  * igt@kms_atomic_transition@plane-all-transition:
    - shard-bmg:          [DMESG-FAIL][70] -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_atomic_transition@plane-all-transition.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_atomic_transition@plane-all-transition.html

  * igt@kms_atomic_transition@plane-all-transition@pipe-b-hdmi-a-3:
    - shard-bmg:          [DMESG-FAIL][72] ([Intel XE#7774]) -> [PASS][73]
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_atomic_transition@plane-all-transition@pipe-b-hdmi-a-3.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_atomic_transition@plane-all-transition@pipe-b-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][74] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][75] +1 other test pass
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [FAIL][76] ([Intel XE#7809]) -> [PASS][77]
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_flip@2x-plain-flip-ts-check@ac-dp2-hdmi-a3:
    - shard-bmg:          [FAIL][78] ([Intel XE#6266]) -> [PASS][79] +1 other test pass
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-10/igt@kms_flip@2x-plain-flip-ts-check@ac-dp2-hdmi-a3.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-1/igt@kms_flip@2x-plain-flip-ts-check@ac-dp2-hdmi-a3.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [FAIL][80] ([Intel XE#301]) -> [PASS][81]
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-bmg:          [SKIP][82] ([Intel XE#8710]) -> [PASS][83]
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_pm_rpm@modeset-non-lpsp.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][84] ([Intel XE#6321] / [Intel XE#8355]) -> [PASS][85]
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_exec_system_allocator@threads-many-large-mmap-new-huge-nomemset:
    - shard-bmg:          [INCOMPLETE][86] ([Intel XE#8159]) -> [PASS][87]
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-9/igt@xe_exec_system_allocator@threads-many-large-mmap-new-huge-nomemset.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-10/igt@xe_exec_system_allocator@threads-many-large-mmap-new-huge-nomemset.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early:
    - shard-bmg:          [SKIP][88] ([Intel XE#8589]) -> [PASS][89] +115 other tests pass
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html

  * igt@xe_gt_freq@freq_suspend:
    - shard-bmg:          [ABORT][90] ([Intel XE#9093]) -> [PASS][91]
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-4/igt@xe_gt_freq@freq_suspend.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-8/igt@xe_gt_freq@freq_suspend.html

  
#### Warnings ####

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-bmg:          [SKIP][92] ([Intel XE#8589]) -> [SKIP][93] ([Intel XE#1124]) +1 other test skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p:
    - shard-bmg:          [SKIP][94] ([Intel XE#8589]) -> [SKIP][95] ([Intel XE#7679])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-target-3840x2160p:
    - shard-bmg:          [SKIP][96] ([Intel XE#8589]) -> [SKIP][97] ([Intel XE#367])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_bw@linear-tiling-4-displays-target-3840x2160p.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_bw@linear-tiling-4-displays-target-3840x2160p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          [SKIP][98] ([Intel XE#8589]) -> [SKIP][99] ([Intel XE#3432])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_cdclk@mode-transition:
    - shard-bmg:          [SKIP][100] ([Intel XE#8589]) -> [SKIP][101] ([Intel XE#2724] / [Intel XE#7449])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_cdclk@mode-transition.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-bmg:          [SKIP][102] ([Intel XE#8589]) -> [SKIP][103] ([Intel XE#2252]) +1 other test skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_chamelium_hpd@dp-hpd.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2:
    - shard-lnl:          [SKIP][104] ([Intel XE#6969] / [Intel XE#7006]) -> [SKIP][105] ([Intel XE#6969])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-lnl-2/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-3/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2.html

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2:
    - shard-bmg:          [SKIP][106] ([Intel XE#6969] / [Intel XE#7006]) -> [SKIP][107] ([Intel XE#6969])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-4/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-4/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html

  * igt@kms_content_protection@lic-type-0-hdcp14:
    - shard-bmg:          [SKIP][108] ([Intel XE#8589]) -> [FAIL][109] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_content_protection@lic-type-0-hdcp14.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_content_protection@lic-type-0-hdcp14.html

  * igt@kms_cursor_crc@cursor-sliding-64x21:
    - shard-bmg:          [SKIP][110] ([Intel XE#8589]) -> [SKIP][111] ([Intel XE#2320]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_cursor_crc@cursor-sliding-64x21.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_cursor_crc@cursor-sliding-64x21.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-bmg:          [SKIP][112] ([Intel XE#8589]) -> [SKIP][113] ([Intel XE#8265]) +1 other test skip
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-bmg:          [SKIP][114] ([Intel XE#8589]) -> [SKIP][115] ([Intel XE#7178] / [Intel XE#7351])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][116] ([Intel XE#8589]) -> [SKIP][117] ([Intel XE#2311]) +8 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-indfb-draw-mmap-wc.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-mmap-wc:
    - shard-bmg:          [SKIP][118] ([Intel XE#8589]) -> [SKIP][119] ([Intel XE#7061])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-mmap-wc.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          [SKIP][120] ([Intel XE#8589]) -> [SKIP][121] ([Intel XE#4141]) +3 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-move:
    - shard-bmg:          [SKIP][122] ([Intel XE#8589]) -> [SKIP][123] ([Intel XE#2313]) +7 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-move.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-move.html

  * igt@kms_pm_dc@dc3co-framedrop-check:
    - shard-bmg:          [SKIP][124] ([Intel XE#8589]) -> [SKIP][125] ([Intel XE#8395] / [Intel XE#8396])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_pm_dc@dc3co-framedrop-check.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_pm_dc@dc3co-framedrop-check.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area:
    - shard-bmg:          [SKIP][126] ([Intel XE#8589]) -> [SKIP][127] ([Intel XE#1489])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr@pr-sprite-blt:
    - shard-bmg:          [SKIP][128] ([Intel XE#8589]) -> [SKIP][129] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_psr@pr-sprite-blt.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_psr@pr-sprite-blt.html

  * igt@kms_sharpness_filter@invalid-filter-with-scaler:
    - shard-bmg:          [SKIP][130] ([Intel XE#8589]) -> [SKIP][131] ([Intel XE#6503]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@kms_sharpness_filter@invalid-filter-with-scaler.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@kms_sharpness_filter@invalid-filter-with-scaler.html

  * igt@xe_exec_basic@multigpu-once-userptr-invalidate-race:
    - shard-bmg:          [SKIP][132] ([Intel XE#8589]) -> [SKIP][133] ([Intel XE#2322] / [Intel XE#7372])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_exec_basic@multigpu-once-userptr-invalidate-race.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@xe_exec_basic@multigpu-once-userptr-invalidate-race.html

  * igt@xe_exec_fault_mode@many-multi-queue-imm:
    - shard-bmg:          [SKIP][134] ([Intel XE#8589]) -> [SKIP][135] ([Intel XE#8374]) +2 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_exec_fault_mode@many-multi-queue-imm.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@xe_exec_fault_mode@many-multi-queue-imm.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority:
    - shard-bmg:          [SKIP][136] ([Intel XE#8589]) -> [SKIP][137] ([Intel XE#8364]) +4 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority.html

  * igt@xe_exec_reset@multi-queue-cancel:
    - shard-bmg:          [SKIP][138] ([Intel XE#8589]) -> [SKIP][139] ([Intel XE#8369])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_exec_reset@multi-queue-cancel.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@xe_exec_reset@multi-queue-cancel.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-basic:
    - shard-bmg:          [SKIP][140] ([Intel XE#8589]) -> [SKIP][141] ([Intel XE#8378]) +1 other test skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html

  * igt@xe_multigpu_svm@mgpu-coherency-conflict:
    - shard-lnl:          [SKIP][142] ([Intel XE#6964]) -> [INCOMPLETE][143] ([Intel XE#2594])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-lnl-8/igt@xe_multigpu_svm@mgpu-coherency-conflict.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-1/igt@xe_multigpu_svm@mgpu-coherency-conflict.html

  * igt@xe_peer2peer@read:
    - shard-bmg:          [SKIP][144] ([Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353]) -> [SKIP][145] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_peer2peer@read.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@xe_peer2peer@read.html

  * igt@xe_query@multigpu-query-gt-list:
    - shard-bmg:          [SKIP][146] ([Intel XE#8589]) -> [SKIP][147] ([Intel XE#944])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-5/igt@xe_query@multigpu-query-gt-list.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-3/igt@xe_query@multigpu-query-gt-list.html

  * igt@xe_wedged@basic-wedged:
    - shard-lnl:          [ABORT][148] ([Intel XE#8963]) -> [DMESG-WARN][149] ([Intel XE#8963])
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-lnl-3/igt@xe_wedged@basic-wedged.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-lnl-4/igt@xe_wedged@basic-wedged.html
    - shard-bmg:          [DMESG-WARN][150] ([Intel XE#8963]) -> [ABORT][151] ([Intel XE#8591] / [Intel XE#8963])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b/shard-bmg-2/igt@xe_wedged@basic-wedged.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/shard-bmg-9/igt@xe_wedged@basic-wedged.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1131]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1131
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2350
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7360
  [Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7503
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7724
  [Intel XE#7774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7774
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7980]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7980
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8159]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8159
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8365
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8589]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8589
  [Intel XE#8591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8591
  [Intel XE#8649]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8649
  [Intel XE#8652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8652
  [Intel XE#8710]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8710
  [Intel XE#8749]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8749
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#9093]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9093
  [Intel XE#9096]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9096
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b -> xe-pw-173195v1

  IGT_9079: 9079
  xe-5671-c53467440a5196138d2d6610e269a43b6b47bf6b: c53467440a5196138d2d6610e269a43b6b47bf6b
  xe-pw-173195v1: 173195v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173195v1/index.html

[-- Attachment #2: Type: text/html, Size: 65688 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2026-09-02 20:47 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-09-02  7:54 [CI 0/9] drm/i915/color: Add YUV Support in color pipeline Chaitanya Kumar Borah
2026-09-02  7:54 ` [CI 1/9] drm/i915/color: Add CSC on SDR plane " Chaitanya Kumar Borah
2026-09-02  8:34   ` sashiko-bot
2026-09-02  7:54 ` [CI 2/9] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
2026-09-02  7:54 ` [CI 3/9] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
2026-09-02  7:54 ` [CI 4/9] drm/i915/display: Program CSC on SDR planes based on Fixed Matrix Colorop Chaitanya Kumar Borah
2026-09-02  7:54 ` [CI 5/9] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
2026-09-02  7:54 ` [CI 6/9] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-09-02  7:54 ` [CI 7/9] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
2026-09-02  7:54 ` [CI 8/9] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
2026-09-02  8:34   ` sashiko-bot
2026-09-02  7:54 ` [CI 9/9] drm/i915/color: Add YUV buffer support on HDR planes Chaitanya Kumar Borah
2026-09-02  8:28   ` sashiko-bot
2026-09-02  9:52 ` ✓ CI.KUnit: success for drm/i915/color: Add YUV Support in color pipeline Patchwork
2026-09-02 10:55 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-02 20:47 ` ✗ Xe.CI.FULL: failure " Patchwork

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