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From: sashiko-bot@kernel.org
To: "Matthew Brost" <matthew.brost@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v7 20/24] drm/xe: Add ULLS migration job support to ring ops
Date: Fri, 25 Sep 2026 06:38:44 +0000	[thread overview]
Message-ID: <20260925063845.5830C1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260925045320.1325860-21-matthew.brost@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/xe: GPU hang from CS prefetching uninitialized ULLS jobs
--

commit ca5d0374fab1065ae65164d64f6d5510acadd964
Author: Matthew Brost <matthew.brost@intel.com>

drm/xe: Add ULLS migration job support to ring ops

Add preamble and postamble for ULLS migrations jobs. Preamble clears
current semaphore for reuse. Postamble waits on next semaphore which is
set upon next job submission, then advances the ring tail over that job
with an LRI to RING_TAIL, so submitting it costs the CPU nothing beyond
signalling the semaphore.

> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> index 46ab1f0f35648..9f462bfecb831 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
[ ... ]
> +/* Publish the next job's tail, then park the engine on its semaphore */
> +static int emit_ulls_postamble(struct xe_gt *gt, struct xe_lrc *lrc, u32 *dw,
> +			       int i, u32 seqno, u32 head)
> +{
> +	i = emit_ulls_ring_tail(gt, lrc, dw, i, head);
> +
> +	dw[i++] = MI_SEMAPHORE_WAIT |
> +		MI_SEMW_GGTT |
> +		MI_SEMW_POLL |
> +		MI_SEMW_COMPARE(SAD_EQ_SDD);
> +	dw[i++] = LRC_MIGRATION_ULLS_SEMAPHORE_SIGNAL;

[Severity: High]
Does updating the ring tail to the next job's boundary before blocking on
the semaphore open a window where the Command Streamer (CS) prefetcher can
fetch uninitialized memory into its instruction cache?

When the CPU later writes the next job and signals the semaphore, the
absence of an MMIO tail update means the CS cache might not be invalidated.
Could this cause the CS to execute stale data and hang the GPU?

[ ... ]
> +/* Pad out to the fixed ULLS job size */
> +static int emit_ulls_pad(struct xe_gt *gt, u32 *dw, int i)
> +{
> +	xe_gt_assert(gt, i <= ULLS_JOB_SIZE_DW);
> +
> +	while (i < ULLS_JOB_SIZE_DW)
> +		dw[i++] = MI_NOOP;
> +
> +	return i;
> +}

[Severity: High]
If a ULLS job reaches the maximum size of ULLS_JOB_SIZE_DW (which is 48),
this loop will provide 0 NOOPs of padding.

Will this fail to buffer the prefetcher from the next job's uninitialized
memory, exacerbating the prefetching issue mentioned above?

[ ... ]
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h
> index 52ff96bc41004..ea4af321dd7c4 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
> +++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
[ ... ]
> +/*
> + * ULLS migration jobs advance the ring tail from within the ring itself, so a
> + * job has to know where its successor will end before that successor has been
> + * emitted. Every ULLS job is therefore padded to a fixed size, letting the
> + * next tail be derived arithmetically.
> + *
> + * Sized for the largest such job, emitted by emit_migration_job_gen12():
> + * preamble (4), copy timestamp (8, its size on an SRIOV VF), start seqno
> + * store (4), arbitration off (1), batch buffer starts (2 * 3), pre-parser
> + * bracketed flush invalidate (6), seqno flush (4), user interrupt (3) and
> + * postamble (7 + 5).
> + */
> +#define ULLS_JOB_SIZE_DW 48
> +#define ULLS_JOB_SIZE_BYTES (ULLS_JOB_SIZE_DW * 4)

[Severity: High]
Since this maximum size is exactly equal to the maximal job length, it
guarantees no NOOP padding is appended for the largest jobs. 

Should this maximum size account for additional NOOPs to safely pad the
CS prefetch window?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260925045320.1325860-1-matthew.brost@intel.com?part=20

  reply	other threads:[~2026-09-25  6:38 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-25  4:52 [PATCH v7 00/24] CPU binds and ULLS on migration queue Matthew Brost
2026-09-25  4:52 ` [PATCH v7 01/24] drm/xe: reference VM from PT BOs Matthew Brost
2026-09-25 12:00   ` Francois Dugast
2026-09-25 16:10     ` Matthew Brost
2026-09-25  4:52 ` [PATCH v7 02/24] drm/xe: Drop struct xe_migrate_pt_update argument from populate/clear vfuns Matthew Brost
2026-09-25  4:52 ` [PATCH v7 03/24] drm/xe: Add xe_migrate_update_pgtables_cpu_execute helper Matthew Brost
2026-09-25  4:53 ` [PATCH v7 04/24] drm/xe: Decouple exec queue idle check from LRC Matthew Brost
2026-09-25  4:53 ` [PATCH v7 05/24] drm/xe: Add job count to GuC exec queue snapshot Matthew Brost
2026-09-25  4:53 ` [PATCH v7 06/24] drm/xe: Update xe_bo_put_deferred arguments to include writeback flag Matthew Brost
2026-09-25  4:53 ` [PATCH v7 07/24] drm/xe: Update scheduler job layer to support PT jobs Matthew Brost
2026-09-25 11:23   ` Francois Dugast
2026-09-25  4:53 ` [PATCH v7 08/24] drm/xe: Add helpers to access PT ops Matthew Brost
2026-09-25  4:53 ` [PATCH v7 09/24] drm/xe: Add struct xe_pt_job_ops Matthew Brost
2026-09-25  4:53 ` [PATCH v7 10/24] drm/xe: Update GuC submission backend to run PT jobs Matthew Brost
2026-09-25  5:39   ` sashiko-bot
2026-09-25  5:58     ` Matthew Brost
2026-09-25  4:53 ` [PATCH v7 11/24] drm/xe: Store level in struct xe_vm_pgtable_update Matthew Brost
2026-09-25  4:53 ` [PATCH v7 12/24] drm/xe: Don't use migrate exec queue for page fault binds Matthew Brost
2026-09-25  4:53 ` [PATCH v7 13/24] drm/xe: Enable CPU binds for jobs Matthew Brost
2026-09-25  6:03   ` sashiko-bot
2026-09-25  6:54     ` Matthew Brost
2026-09-25  4:53 ` [PATCH v7 14/24] drm/xe: Remove unused arguments from xe_migrate_pt_update_ops Matthew Brost
2026-09-25  4:53 ` [PATCH v7 15/24] drm/xe: Make bind queues operate cross-tile Matthew Brost
2026-09-25  4:53 ` [PATCH v7 16/24] drm/xe: Add CPU bind layer Matthew Brost
2026-09-25  4:53 ` [PATCH v7 17/24] drm/xe: Add device flag to enable PT mirroring across tiles Matthew Brost
2026-09-25  6:25   ` sashiko-bot
2026-09-25  7:21     ` Matthew Brost
2026-09-25  9:51   ` Francois Dugast
2026-09-25  4:53 ` [PATCH v7 18/24] drm/xe: Add ULLS support to LRC Matthew Brost
2026-09-25  4:53 ` [PATCH v7 19/24] drm/xe: Add ULLS migration job support to migration layer Matthew Brost
2026-09-25  6:34   ` sashiko-bot
2026-09-25  7:17     ` Matthew Brost
2026-09-25 20:10       ` Matthew Brost
2026-09-25  4:53 ` [PATCH v7 20/24] drm/xe: Add ULLS migration job support to ring ops Matthew Brost
2026-09-25  6:38   ` sashiko-bot [this message]
2026-09-25  7:02     ` Matthew Brost
2026-09-25  4:53 ` [PATCH v7 21/24] drm/xe: Add ULLS migration job support to GuC submission Matthew Brost
2026-09-25  6:48   ` sashiko-bot
2026-09-25  7:08     ` Matthew Brost
2026-09-25  4:53 ` [PATCH v7 22/24] drm/xe: Enter ULLS for migration jobs upon page fault or SVM prefetch Matthew Brost
2026-09-25 17:49   ` Maarten Lankhorst
2026-09-25 18:17     ` Matthew Brost
2026-09-25 18:26       ` Maarten Lankhorst
2026-09-25 19:38         ` Matthew Brost
2026-09-25  4:53 ` [PATCH v7 23/24] drm/xe: add migrate ULLS period configfs attribute Matthew Brost
2026-09-25  6:51   ` sashiko-bot
2026-09-25  7:08     ` Matthew Brost
2026-09-25  4:53 ` [PATCH v7 24/24] drm/xe: Document ULLS for migration jobs Matthew Brost
2026-09-25  5:02 ` ✗ CI.checkpatch: warning for CPU binds and ULLS on migration queue (rev9) Patchwork
2026-09-25  5:04 ` ✓ CI.KUnit: success " Patchwork
2026-09-25  5:47 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-25 15:05 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-09-25 16:01   ` Matthew Brost
2026-09-25 18:08 ` [PATCH v7 00/24] CPU binds and ULLS on migration queue Maarten Lankhorst

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