[PATCH v4 0/7] drm/xe: Capture additional HW register state in devcoredump

[PATCH v4 0/7] drm/xe: Capture additional HW register state in devcoredump

[Nareshkumar Gollakoti]

This series extends the Xe devcoredump with additional hardware register
state to improve post-mortem debugging of GPU hangs and faults on Xe3p.

Today the devcoredump captures GuC log/CT, engine and submission state.
When triaging hangs it is often necessary to also know the static HW
configuration (fuses), GuC status/error state, GAM page-fault reporting
and L3 node status at the time of the hang. Collecting these at capture
time makes the dump self-contained and avoids relying on separate
probe-time logging.

To do this, the series adds a small generic MMIO register-dump helper
(descriptor list -> snapshot -> print/free) and uses it for several
register groups. Each group is captured for both the primary GT and,
where applicable, the media GT, and is gated to Xe3p (GRAPHICS_VER >= 35).
Registers requiring MCR steering are read through
xe_gt_mcr_unicast_read_any(); the remaining GAM registers use INSTANCE0
default steering and are read directly.

Snapshots are allocated with GFP_ATOMIC as capture runs inside the
dma_fence signalling section, matching the surrounding captures, and are
freed in the existing devcoredump teardown path.

Patches:
  1  Add the generic reg-dump helpers and capture GT/media fuse registers.
  2  Capture GT and media GuC status/error registers.
  3  Print register offsets alongside names in the GuC engine capture
     output (32- and 64-bit), easing cross-reference with the bspec.
  4  Capture the GAM page-fault report head/tail registers.
  5  Add the TDL gfx registers to the XeHPG extended GuC capture list.
  6  Capture L3 node status registers (MCR, read via unicast_read_any()).
  7  Capture additional engine state registers

Sample devcoredump output gains the following sections:
  **** GT Fuse Register Dump ****
  **** Media GT Fuse Register Dump ****
  **** GT GuC Register Dump ****
  **** Media GT GuC Register Dump ****
  **** GAM PF Report ****
  **** Node Status ****
  ****  Additional engine state registers ****

v3:(Sashiko)
- Use the LOW_DW MMIO offset when printing combined 64-bit register values
  in capture snapshots
- Preserve the existing coredump register-name format and append register
  address as trailing metadata
- Replace the render is not awake message with raw POWERGATE_ENABLE
  bit-state output
- Move engine-class-specific registers out of COMMON_BASE_ENGINE_INSTANCE
  into class-specific capture lists

v4:
- optimized APIs and reduced few structs(Tejas)
- Fixed CI hook error

Nareshkumar Gollakoti (7):
  drm/xe/devcoredump: Capture GT fuse registers in devcoredump
  drm/xe/devcoredump: Add GuC register snapshot to devcoredump
  drm/xe/guc: Print register addresses in capture snapshot output
  drm/xe: dump GAM page fault report registers in devcoredump
  drm/xe/guc: add TDL,SLICE gfx registers to capture list
  drm/xe: capture L3 node status registers in devcoredump
  drm/xe/guc: capture additional engine state registers

 drivers/gpu/drm/xe/regs/xe_engine_regs.h  |  22 ++
 drivers/gpu/drm/xe/regs/xe_gt_regs.h      |  13 +
 drivers/gpu/drm/xe/regs/xe_guc_regs.h     |   5 +
 drivers/gpu/drm/xe/xe_devcoredump.c       | 320 +++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_devcoredump_types.h |  66 +++++
 drivers/gpu/drm/xe/xe_guc_capture.c       |  58 +++-
 6 files changed, 472 insertions(+), 12 deletions(-)

-- 
2.43.0

[PATCH v4 1/7] drm/xe/devcoredump: Capture GT fuse registers in devcoredump

[Nareshkumar Gollakoti]

Capture fuse-related GT register state in the Xe devcoredump to preserve
additional hardware configuration information for postmortem debugging.

Add generic register snapshot storage and helpers for capturing,
printing, and freeing MMIO register dumps. Use them to record both
primary GT and media GT fuse register state during devcoredump snapshot
collection and print the captured values in the coredump output.

Also add the required GT register definitions for RPM and mirror
copy-enable state used by the new dump paths.

v2:(Sashiko)
- Fix GT/media fuse snapshot capture to use the correct GT context.
- Add non-fault GT force wake for cross-GT register capture.
- Skip reading registers when SR-IOV VF.
- Skip media GT capture when media GT is absent.
- Add RPM snapshot print/free handling explicitly.
- Add POWERGATE_ENABLE register to get render awake status

v3:(Sashiko)
- Check RENDER_POWERGATE_ENABLE of POWERGATE_ENABLE register
- Replace "render is not awake" message with "render powergating
  appears not enabled"

v4:
- Reduce multiple apis and optimize the suggest way of struct arrays(Tejas)
- Add document for struct xe_gt_regset gt member(Hook failure)
- Change struct reg_desc to header file
- Remove Graphics version check for these registers set

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h      |   2 +
 drivers/gpu/drm/xe/xe_devcoredump.c       | 215 ++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_devcoredump_types.h |  52 ++++++
 3 files changed, 269 insertions(+)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index f5cd3a94e47f..e93895e0c731 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -22,6 +22,8 @@
 #define   MTL_CC_MASK					REG_GENMASK(12, 9)
 #define   MTL_CRST					0xf
 
+#define RPM_GCD						XE_REG(0xc98)
+
 /* RPM unit config (Gen8+) */
 #define RPM_CONFIG0					XE_REG(0xd00)
 #define   RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_MASK		REG_GENMASK(5, 3)
diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
index ab681b148869..1dbee725f55a 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump.c
+++ b/drivers/gpu/drm/xe/xe_devcoredump.c
@@ -25,6 +25,8 @@
 #include "xe_pm.h"
 #include "xe_sched_job.h"
 #include "xe_vm.h"
+#include "xe_mmio.h"
+#include "regs/xe_gt_regs.h"
 
 /**
  * DOC: Xe device coredump
@@ -69,6 +71,171 @@
 /* 1 hour timeout */
 #define XE_COREDUMP_TIMEOUT_JIFFIES (60 * 60 * HZ)
 
+#define XE_REG_DESC(_reg, _name)	{ .reg = (_reg), .name = (_name) }
+
+static const struct xe_reg_desc xe3p_gt_fuse_reglist[] = {
+	XE_REG_DESC(XELP_GT_GEOMETRY_DSS_ENABLE, "GT_GEOMETRY_DSS_ENABLE"),
+	XE_REG_DESC(XEHP_GT_COMPUTE_DSS_ENABLE, "GT_COMPUTE_DSS_ENABLE"),
+	XE_REG_DESC(XELP_EU_ENABLE, "EU_ENABLE"),
+	XE_REG_DESC(MIRROR_FUSE1, "MIRROR_FUSE1"),
+	XE_REG_DESC(GT_VEBOX_VDBOX_DISABLE, "GT_VEBOX_VDBOX_DISABLE"),
+	XE_REG_DESC(SERVICE_COPY_ENABLE, "SERVICE_COPY_ENABLE"),
+	XE_REG_DESC(RESOURCE_COPY_ENABLE, "COPY_ENABLE_GTFS_GCD"),
+	XE_REG_DESC(XE2_GT_GEOMETRY_DSS_1, "GT_GEOMETRY_DSS_1"),
+	XE_REG_DESC(XE2_GT_GEOMETRY_DSS_2, "GT_GEOMETRY_DSS_2"),
+	XE_REG_DESC(XE2_GT_COMPUTE_DSS_2, "GT_COMPUTE_DSS_2"),
+	XE_REG_DESC(XEHPC_GT_COMPUTE_DSS_ENABLE_EXT, "GT_COMPUTE_DSS_ENABLE_EXT"),
+	XE_REG_DESC(XE3P_XPC_GT_GEOMETRY_DSS_3, "GT_GEOMETRY_DSS_3"),
+	XE_REG_DESC(XE3P_XPC_GT_COMPUTE_DSS_3, "GT_COMPUTE_DSS_3"),
+};
+
+static const struct xe_reg_desc xe3p_media_gt_fuse_reglist[] = {
+	XE_REG_DESC(SERVICE_COPY_ENABLE, "SERVICE_COPY_ENABLE"),
+	XE_REG_DESC(RESOURCE_COPY_ENABLE, "COPY_ENABLE_GTFS_GCD"),
+};
+
+static const struct xe_reg_desc xe3p_gt_rpm_reglist[] = {
+	XE_REG_DESC(RPM_GCD, "RPM_GCD"),
+	XE_REG_DESC(POWERGATE_ENABLE, "POWERGATE_ENABLE"),
+};
+
+static const struct xe_reg_desc xe3p_media_gt_rpm_reglist[] = {
+	XE_REG_DESC(RPM_GCD, "RPM_GCD"),
+};
+
+/**
+ * struct xe_gt_regset - Struct for register descriptor list for GT
+ *
+ * This struct is used to reference the corresponding reglist of
+ * Main GT and media GT
+ */
+struct xe_gt_regset {
+	/** @gt: GT array indexed by tile/GT id starting at 1; element 0 is unused */
+	struct xe_reg_desc_list gt[XE_MAX_GT_PER_TILE + 1];
+};
+
+/**
+ * enum xe_dbg_regset_type - debug register set types
+ * @XE_DBG_REGSET_FUSE: Fuse register set
+ * @XE_DBG_REGSET_RPM: RPM register set
+ * @XE_DBG_REGSET_MAX: Number of debug register set types
+ */
+enum xe_dbg_regset_type {
+	XE_DBG_REGSET_FUSE,
+	XE_DBG_REGSET_RPM,
+	XE_DBG_REGSET_MAX,
+};
+
+static const struct xe_gt_regset xe_dbg_regsets[XE_DBG_REGSET_MAX] = {
+	[XE_DBG_REGSET_FUSE] = {
+		.gt[XE_GT_TYPE_MAIN]  = { xe3p_gt_fuse_reglist,
+					  ARRAY_SIZE(xe3p_gt_fuse_reglist) },
+		.gt[XE_GT_TYPE_MEDIA] = { xe3p_media_gt_fuse_reglist,
+					  ARRAY_SIZE(xe3p_media_gt_fuse_reglist) },
+	},
+	[XE_DBG_REGSET_RPM] = {
+		.gt[XE_GT_TYPE_MAIN]  = { xe3p_gt_rpm_reglist,
+					  ARRAY_SIZE(xe3p_gt_rpm_reglist) },
+		.gt[XE_GT_TYPE_MEDIA] = { xe3p_media_gt_rpm_reglist,
+					  ARRAY_SIZE(xe3p_media_gt_rpm_reglist) },
+	},
+};
+
+static void xe_dbg_reg_snapshot_print(struct drm_printer *p,
+				      const struct xe_dbg_reg_snapshot *snap)
+{
+	u32 i;
+
+	if (!snap)
+		return;
+
+	for (i = 0; i < snap->num_regs; i++)
+		drm_printf(p, " %s [0x%x] = 0x%08x\n",
+			   snap->desc->regs[i].name,
+			   snap->desc->regs[i].reg.addr,
+			   snap->values[i]);
+}
+
+static void xe_dbg_reg_snapshot_free(struct xe_dbg_reg_snapshot *snap)
+{
+	kfree(snap);
+}
+
+static const u32 *xe_dbg_find_value(const struct xe_dbg_reg_snapshot *snap,
+				    struct xe_reg reg)
+{
+	int i;
+
+	if (!snap)
+		return NULL;
+
+	for (i = 0; i < snap->num_regs; i++)
+		if (snap->desc->regs[i].reg.addr == reg.addr)
+			return &snap->values[i];
+
+	return NULL;
+}
+
+static void xe_gt_rpm_snapshot_print(struct drm_printer *p,
+				     const struct xe_dbg_reg_snapshot *snap)
+{
+	const u32 *val;
+
+	xe_dbg_reg_snapshot_print(p, snap);
+
+	if (!snap)
+		return;
+
+	val = xe_dbg_find_value(snap, POWERGATE_ENABLE);
+	if (val && !(*val & RENDER_POWERGATE_ENABLE))
+		drm_puts(p, "render powergating appears not enabled\n");
+}
+
+static struct xe_dbg_reg_snapshot *
+xe_dbg_reg_snapshot_capture_target(struct xe_gt *gt,
+				   const struct xe_reg_desc_list *reglist)
+{
+	struct xe_dbg_reg_snapshot *snap;
+	int i;
+
+	if (IS_SRIOV_VF(gt_to_xe(gt)))
+		return NULL;
+
+	snap = kmalloc(struct_size(snap, values, reglist->num_regs), GFP_ATOMIC);
+	if (!snap)
+		return NULL;
+
+	snap->desc	= reglist;
+	snap->num_regs = reglist->num_regs;
+	for (i = 0; i < reglist->num_regs; i++)
+		snap->values[i] = xe_mmio_read32(&gt->mmio, reglist->regs[i].reg);
+
+	return snap;
+}
+
+static struct xe_dbg_reg_snapshot *
+xe_dbg_gt_snapshot_capture(struct xe_gt *fault_gt, struct xe_gt *other_gt,
+			   enum xe_dbg_regset_type type,
+			   enum xe_gt_type gt_type)
+{
+	struct xe_gt *target_gt;
+
+	if (!fault_gt || !fault_gt->tile)
+		return NULL;
+
+	target_gt = gt_type == XE_GT_TYPE_MEDIA ? fault_gt->tile->media_gt
+						 : fault_gt->tile->primary_gt;
+	if (!target_gt)
+		return NULL;
+
+	/* non-fault GT needs the caller's confirmed forcewake */
+	if (target_gt != fault_gt && target_gt != other_gt)
+		return NULL;
+
+	return xe_dbg_reg_snapshot_capture_target(target_gt,
+						  &xe_dbg_regsets[type].gt[gt_type]);
+}
+
 static struct xe_device *coredump_to_xe(const struct xe_devcoredump *coredump)
 {
 	return container_of(coredump, struct xe_device, devcoredump);
@@ -109,6 +276,15 @@ static ssize_t __xe_devcoredump_read(char *buffer, ssize_t count,
 	drm_printf(&p, "\n**** GT #%d ****\n", ss->gt->info.id);
 	drm_printf(&p, "\tTile: %d\n", ss->gt->tile->id);
 
+	drm_printf(&p, "\n**** GT Fuse Register Dump ****\n");
+	xe_dbg_reg_snapshot_print(&p, ss->gt_fuse);
+	drm_printf(&p, "\n**** Media GT Fuse Register Dump ****\n");
+	xe_dbg_reg_snapshot_print(&p, ss->media_fuse);
+	drm_printf(&p, "\n**** GT RPM Register Dump ****\n");
+	xe_gt_rpm_snapshot_print(&p, ss->gt_rpm);
+	drm_printf(&p, "\n**** Media GT RPM Register Dump ****\n");
+	xe_dbg_reg_snapshot_print(&p, ss->media_gt_rpm);
+
 	drm_puts(&p, "\n**** GuC Log ****\n");
 	xe_guc_log_snapshot_print(ss->guc.log, &p);
 	drm_puts(&p, "\n**** GuC CT ****\n");
@@ -146,6 +322,18 @@ static void xe_devcoredump_snapshot_free(struct xe_devcoredump_snapshot *ss)
 	xe_guc_ct_snapshot_free(ss->guc.ct);
 	ss->guc.ct = NULL;
 
+	xe_dbg_reg_snapshot_free(ss->gt_fuse);
+	ss->gt_fuse = NULL;
+
+	xe_dbg_reg_snapshot_free(ss->media_fuse);
+	ss->media_fuse = NULL;
+
+	xe_dbg_reg_snapshot_free(ss->gt_rpm);
+	ss->gt_rpm = NULL;
+
+	xe_dbg_reg_snapshot_free(ss->media_gt_rpm);
+	ss->media_gt_rpm = NULL;
+
 	if (!IS_ERR_OR_NULL(ss->gt))
 		xe_guc_capture_put_matched_nodes(&ss->gt->uc.guc);
 	ss->matched_node = NULL;
@@ -328,6 +516,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
 	struct xe_guc *guc = &gt->uc.guc;
 	const char *process_name = "no process";
 	bool cookie;
+	struct xe_gt *other_gt;
 
 	ss->snapshot_time = ktime_get_real();
 	ss->boot_time = ktime_get_boottime();
@@ -345,8 +534,34 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
 	/* keep going if fw fails as we still want to save the memory and SW data */
 	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
 
+	other_gt = q->gt->tile->media_gt == q->gt ? q->gt->tile->primary_gt
+					    : q->gt->tile->media_gt;
+	if (other_gt) {
+		CLASS(xe_force_wake, fw_ref_other)(gt_to_fw(other_gt),
+						   XE_FORCEWAKE_ALL);
+		if (!xe_force_wake_ref_has_domain(fw_ref_other.domains, XE_FORCEWAKE_ALL))
+			other_gt = NULL;
+	}
+
 	cookie = dma_fence_begin_signalling();
 
+	ss->gt_fuse      = xe_dbg_gt_snapshot_capture(q->gt,
+						      other_gt,
+						      XE_DBG_REGSET_FUSE,
+						      XE_GT_TYPE_MAIN);
+	ss->media_fuse   = xe_dbg_gt_snapshot_capture(q->gt,
+						      other_gt,
+						      XE_DBG_REGSET_FUSE,
+						      XE_GT_TYPE_MEDIA);
+	ss->gt_rpm       = xe_dbg_gt_snapshot_capture(q->gt,
+						      other_gt,
+						      XE_DBG_REGSET_RPM,
+						      XE_GT_TYPE_MAIN);
+	ss->media_gt_rpm = xe_dbg_gt_snapshot_capture(q->gt,
+						      other_gt,
+						      XE_DBG_REGSET_RPM,
+						      XE_GT_TYPE_MEDIA);
+
 	ss->guc.log = xe_guc_log_snapshot_capture(&guc->log, true);
 	ss->guc.ct = xe_guc_ct_snapshot_capture(&guc->ct);
 
diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h
index a174385a6d83..90cca9ad2877 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump_types.h
+++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h
@@ -14,6 +14,48 @@
 struct xe_device;
 struct xe_gt;
 
+/**
+ * struct xe_reg_desc - Register descriptor struct to make reg list
+ *
+ * This struct is used as descriptor containting reg address and name
+ * of the register to dump its value during coredump for debug purpose.
+ */
+struct xe_reg_desc {
+	/** @reg: The register */
+	struct xe_reg reg;
+	/** @name: Name of the register */
+	const char *name;
+};
+
+/**
+ * struct xe_reg_desc_list - Struct for register descriptor list
+ *
+ * This struct is used to reference the corresponding reglist of
+ * various component
+ */
+struct xe_reg_desc_list {
+	/** @regs: Pointer to an array of register descriptors. */
+	const struct xe_reg_desc *regs;
+	/** @num_regs: refernce for num regs in reg descriptor*/
+	u32 num_regs;
+};
+
+/**
+ * struct xe_dbg_reg_snapshot - Register snapshot
+ *
+ * This struct contains the register values captured at the time of the crash.
+ * It is used to store the register values in a human-readable format for
+ * debugging purposes.
+ */
+struct xe_dbg_reg_snapshot {
+	/** @desc: register descriptor list. */
+	const struct xe_reg_desc_list *desc;
+	/** @num_regs: Number of registers needed for capture. */
+	u32 num_regs;
+	/** @values: register values*/
+	u32 values[];
+};
+
 /**
  * struct xe_devcoredump_snapshot - Crash snapshot
  *
@@ -35,6 +77,16 @@ struct xe_devcoredump_snapshot {
 
 	/** @gt: Affected GT, used by forcewake for delayed capture */
 	struct xe_gt *gt;
+
+	/** @gt_fuse: Fuse snapshot */
+	struct xe_dbg_reg_snapshot *gt_fuse;
+	/** @media_fuse: Media Fuse snapshot */
+	struct xe_dbg_reg_snapshot *media_fuse;
+	/** @gt_rpm: GT RPM snapshot */
+	struct xe_dbg_reg_snapshot *gt_rpm;
+	/** @media_gt_rpm: Media GT RPM snapshot */
+	struct xe_dbg_reg_snapshot *media_gt_rpm;
+
 	/** @work: Workqueue for deferred capture outside of signaling context */
 	struct work_struct work;
 
-- 
2.43.0

[PATCH v4 2/7] drm/xe/devcoredump: Add GuC register snapshot to devcoredump

[Nareshkumar Gollakoti]

Add support for capturing GuC register state as part of the xe
devcoredump snapshot.

Define a dedicated GuC register snapshot structure, record selected
GT and media GuC status/error registers during devcoredump capture,
and free the snapshot during teardown.

Keeping these register values in the devcoredump helps with
post-mortem analysis of GuC-related failures.

v2:(Sashiko)
- Reuse the generic target GT snapshot helper for GuC register capture
- Capture primary and media GuC registers using correct GT MMIO context
- Avoid reading the same on SR-IOV VF
- skip reading media GT GuC registers when media is not present
- drop hardcoded media register address macros

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_guc_regs.h     |  5 +++
 drivers/gpu/drm/xe/xe_devcoredump.c       | 38 +++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_devcoredump_types.h |  5 +++
 3 files changed, 48 insertions(+)

diff --git a/drivers/gpu/drm/xe/regs/xe_guc_regs.h b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
index 5faac8316b66..c13ee6e21e37 100644
--- a/drivers/gpu/drm/xe/regs/xe_guc_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
@@ -150,6 +150,11 @@
 #define GUC_INTR_SW_INT_1			REG_BIT(1)
 #define GUC_INTR_SW_INT_0			REG_BIT(0)
 
+#define GUC_DEVICEID				XE_REG(0xc008)
+#define GUC_SHIM_ERR_TRAP			XE_REG(0xc070)
+#define GUC_HW_FATL_ERR				XE_REG(0xc598)
+#define GUC_HW_NOTIFY_ERR			XE_REG(0xc59c)
+
 #define GUC_NUM_DOORBELLS			256
 
 /* format of the HW-monitored doorbell cacheline */
diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
index 1dbee725f55a..f4a22e46eda7 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump.c
+++ b/drivers/gpu/drm/xe/xe_devcoredump.c
@@ -27,6 +27,7 @@
 #include "xe_vm.h"
 #include "xe_mmio.h"
 #include "regs/xe_gt_regs.h"
+#include "regs/xe_guc_regs.h"
 
 /**
  * DOC: Xe device coredump
@@ -73,6 +74,16 @@
 
 #define XE_REG_DESC(_reg, _name)	{ .reg = (_reg), .name = (_name) }
 
+static const struct xe_reg_desc xe3p_gt_guc_reglist[] = {
+	XE_REG_DESC(GUC_STATUS,	"GUC_STATUS"),
+	XE_REG_DESC(GUC_WOPCM_SIZE,	"GUC_WOPCM_SIZE"),
+	XE_REG_DESC(GUC_DEVICEID,	"GUC_DEVICEID"),
+	XE_REG_DESC(DMA_CTRL,	"DMA_CTRL"),
+	XE_REG_DESC(GUC_HW_FATL_ERR,	"GUC_HW_FATL_ERR"),
+	XE_REG_DESC(GUC_HW_NOTIFY_ERR,	"GUC_HW_NOTIFY_ERR"),
+	XE_REG_DESC(GUC_SHIM_ERR_TRAP,	"GUC_SHIM_ERR_TRAP"),
+};
+
 static const struct xe_reg_desc xe3p_gt_fuse_reglist[] = {
 	XE_REG_DESC(XELP_GT_GEOMETRY_DSS_ENABLE, "GT_GEOMETRY_DSS_ENABLE"),
 	XE_REG_DESC(XEHP_GT_COMPUTE_DSS_ENABLE, "GT_COMPUTE_DSS_ENABLE"),
@@ -118,11 +129,13 @@ struct xe_gt_regset {
  * enum xe_dbg_regset_type - debug register set types
  * @XE_DBG_REGSET_FUSE: Fuse register set
  * @XE_DBG_REGSET_RPM: RPM register set
+ * @XE_DBG_REGSET_GUC: GUC register set
  * @XE_DBG_REGSET_MAX: Number of debug register set types
  */
 enum xe_dbg_regset_type {
 	XE_DBG_REGSET_FUSE,
 	XE_DBG_REGSET_RPM,
+	XE_DBG_REGSET_GUC,
 	XE_DBG_REGSET_MAX,
 };
 
@@ -139,6 +152,12 @@ static const struct xe_gt_regset xe_dbg_regsets[XE_DBG_REGSET_MAX] = {
 		.gt[XE_GT_TYPE_MEDIA] = { xe3p_media_gt_rpm_reglist,
 					  ARRAY_SIZE(xe3p_media_gt_rpm_reglist) },
 	},
+	[XE_DBG_REGSET_GUC] = {
+		.gt[XE_GT_TYPE_MAIN] = { xe3p_gt_guc_reglist,
+					ARRAY_SIZE(xe3p_gt_guc_reglist) },
+		.gt[XE_GT_TYPE_MEDIA] = { xe3p_gt_guc_reglist,
+					  ARRAY_SIZE(xe3p_gt_guc_reglist) },
+	},
 };
 
 static void xe_dbg_reg_snapshot_print(struct drm_printer *p,
@@ -285,6 +304,11 @@ static ssize_t __xe_devcoredump_read(char *buffer, ssize_t count,
 	drm_printf(&p, "\n**** Media GT RPM Register Dump ****\n");
 	xe_dbg_reg_snapshot_print(&p, ss->media_gt_rpm);
 
+	drm_printf(&p, "\n**** GT GuC Register Dump ****\n");
+	xe_dbg_reg_snapshot_print(&p, ss->gt_guc_reg);
+	drm_printf(&p, "\n**** Media GT GuC Register Dump ****\n");
+	xe_dbg_reg_snapshot_print(&p, ss->media_gt_guc_reg);
+
 	drm_puts(&p, "\n**** GuC Log ****\n");
 	xe_guc_log_snapshot_print(ss->guc.log, &p);
 	drm_puts(&p, "\n**** GuC CT ****\n");
@@ -334,6 +358,12 @@ static void xe_devcoredump_snapshot_free(struct xe_devcoredump_snapshot *ss)
 	xe_dbg_reg_snapshot_free(ss->media_gt_rpm);
 	ss->media_gt_rpm = NULL;
 
+	xe_dbg_reg_snapshot_free(ss->gt_guc_reg);
+	ss->gt_guc_reg = NULL;
+
+	xe_dbg_reg_snapshot_free(ss->media_gt_guc_reg);
+	ss->media_gt_guc_reg = NULL;
+
 	if (!IS_ERR_OR_NULL(ss->gt))
 		xe_guc_capture_put_matched_nodes(&ss->gt->uc.guc);
 	ss->matched_node = NULL;
@@ -561,6 +591,14 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
 						      other_gt,
 						      XE_DBG_REGSET_RPM,
 						      XE_GT_TYPE_MEDIA);
+	ss->gt_guc_reg = xe_dbg_gt_snapshot_capture(q->gt,
+						    other_gt,
+						    XE_DBG_REGSET_GUC,
+						    XE_GT_TYPE_MAIN);
+	ss->media_gt_guc_reg = xe_dbg_gt_snapshot_capture(q->gt,
+							  other_gt,
+							  XE_DBG_REGSET_GUC,
+							  XE_GT_TYPE_MEDIA);
 
 	ss->guc.log = xe_guc_log_snapshot_capture(&guc->log, true);
 	ss->guc.ct = xe_guc_ct_snapshot_capture(&guc->ct);
diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h
index 90cca9ad2877..efea306f0fec 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump_types.h
+++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h
@@ -87,6 +87,11 @@ struct xe_devcoredump_snapshot {
 	/** @media_gt_rpm: Media GT RPM snapshot */
 	struct xe_dbg_reg_snapshot *media_gt_rpm;
 
+	/** @gt_guc_reg: gt guc reg snapshot */
+	struct xe_dbg_reg_snapshot *gt_guc_reg;
+	/** @media_gt_guc_reg: media gt guc reg snapshot */
+	struct xe_dbg_reg_snapshot *media_gt_guc_reg;
+
 	/** @work: Workqueue for deferred capture outside of signaling context */
 	struct work_struct work;
 
-- 
2.43.0

[PATCH v4 3/7] drm/xe/guc: Print register addresses in capture snapshot output

[Nareshkumar Gollakoti]

Include register offsets in GuC capture snapshot print output for both
32-bit and 64-bit registers.

When dumping captured engine register state, print each register name
alongside its MMIO offset to make the snapshot output easier to
cross-reference with register definitions and hardware debug
documentation.

This improves postmortem analysis without changing capture contents.

v2:(Sashiko)
- Ensure lower DWORD prints

v3:(Sashiko)
- Use the LOW_DW MMIO offset(capture in last_address)  when combined 64bit
  register values in the dump instead of HI_SW offset
- preserve existing coredump register-name format and append register
  address as trailing metadata as a debug info and avoids disrupting
  existing format

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_guc_capture.c | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 5a4d085660a2..3e99aef53b46 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -1716,6 +1716,7 @@ snapshot_print_by_list_order(struct xe_hw_engine_snapshot *snapshot, struct drm_
 	struct xe_devcoredump_snapshot *devcore_snapshot = &devcoredump->snapshot;
 	struct gcap_reg_list_info *reginfo = NULL;
 	u32 i, last_value = 0;
+	u32 last_address = 0;
 	bool low32_ready = false;
 
 	if (!list || !list->list || list->num_regs == 0)
@@ -1743,6 +1744,7 @@ snapshot_print_by_list_order(struct xe_hw_engine_snapshot *snapshot, struct drm_
 		switch (reg_desc->data_type) {
 		case REG_64BIT_LOW_DW:
 			last_value = value;
+			last_address = reg_desc->reg.addr;
 
 			/*
 			 * A 64 bit register define requires 2 consecutive
@@ -1774,7 +1776,11 @@ snapshot_print_by_list_order(struct xe_hw_engine_snapshot *snapshot, struct drm_
 			XE_WARN_ON(!low32_ready);
 			low32_ready = false;
 
-			drm_printf(p, "\t%s: 0x%016llx\n", reg_desc->regname, value_qw);
+			drm_printf(p, "\t%s: 0x%016llx [addr=0x%x]\n",
+				   reg_desc->regname,
+				   value_qw,
+				   last_address);
+
 			break;
 		}
 
@@ -1788,10 +1794,14 @@ snapshot_print_by_list_order(struct xe_hw_engine_snapshot *snapshot, struct drm_
 			XE_WARN_ON(low32_ready);
 
 			if (FIELD_GET(GUC_REGSET_STEERING_NEEDED, reg_desc->flags))
-				drm_printf(p, "\t%s[%u]: 0x%08x\n", reg_desc->regname,
-					   reg_desc->dss_id, value);
+				drm_printf(p, "\t%s[%u]: 0x%08x [addr=0x%x]\n",
+					   reg_desc->regname,
+					   reg_desc->dss_id, value, reg_desc->reg.addr);
+
 			else
-				drm_printf(p, "\t%s: 0x%08x\n", reg_desc->regname, value);
+				drm_printf(p, "\t%s: 0x%08x [addr=0x%x]\n",
+					   reg_desc->regname, value, reg_desc->reg.addr);
+
 
 			break;
 		}
-- 
2.43.0

[PATCH v4 4/7] drm/xe: dump GAM page fault report registers in devcoredump

[Nareshkumar Gollakoti]

Add PAGE_FLTRPTQ_HEAD_GAMCTRL and PAGE_FLTRPTQ_TAIL_GAMCTRL to the Xe
register definitions and capture them as part of the devcoredump
snapshot.

Include the register dump in the devcoredump output and release the
snapshot during cleanup so page fault report state is available for
post-mortem debugging.

v2:
- As design change made for previous patches. refactored this patch
  as well to accommodate those changes.
- Add PF occurred print when the two register values are not equal

v4:
Refactored as per the patch1 change(Tejas)

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h      |  3 ++
 drivers/gpu/drm/xe/xe_devcoredump.c       | 37 +++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_devcoredump_types.h |  3 ++
 3 files changed, 43 insertions(+)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index e93895e0c731..e9eb0bd04af1 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -530,6 +530,9 @@
 #define   LMEM_EN				REG_BIT(31)
 #define   LMTT_DIR_PTR				REG_GENMASK(30, 0) /* in multiples of 64KB */
 
+#define PAGE_FLTRPTQ_HEAD_GAMCTRL		XE_REG(0xcf90)
+#define PAGE_FLTRPTQ_TAIL_GAMCTRL		XE_REG(0xcf94)
+
 #define HALF_SLICE_CHICKEN5			XE_REG_MCR(0xe188, XE_REG_OPTION_MASKED)
 #define   DISABLE_SAMPLE_G_PERFORMANCE		REG_BIT(0)
 
diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
index f4a22e46eda7..a2a3437ec2f6 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump.c
+++ b/drivers/gpu/drm/xe/xe_devcoredump.c
@@ -114,6 +114,11 @@ static const struct xe_reg_desc xe3p_media_gt_rpm_reglist[] = {
 	XE_REG_DESC(RPM_GCD, "RPM_GCD"),
 };
 
+static const struct xe_reg_desc xe3p_gam_pf_reglist[] = {
+	XE_REG_DESC(PAGE_FLTRPTQ_HEAD_GAMCTRL, "PAGE_FLTRPTQ_HEAD_GAMCTRL"),
+	XE_REG_DESC(PAGE_FLTRPTQ_TAIL_GAMCTRL, "PAGE_FLTRPTQ_TAIL_GAMCTRL"),
+};
+
 /**
  * struct xe_gt_regset - Struct for register descriptor list for GT
  *
@@ -130,12 +135,14 @@ struct xe_gt_regset {
  * @XE_DBG_REGSET_FUSE: Fuse register set
  * @XE_DBG_REGSET_RPM: RPM register set
  * @XE_DBG_REGSET_GUC: GUC register set
+ * @XE_DBG_REGSET_GAM_PF: GAM Pagefault registers set
  * @XE_DBG_REGSET_MAX: Number of debug register set types
  */
 enum xe_dbg_regset_type {
 	XE_DBG_REGSET_FUSE,
 	XE_DBG_REGSET_RPM,
 	XE_DBG_REGSET_GUC,
+	XE_DBG_REGSET_GAM_PF,
 	XE_DBG_REGSET_MAX,
 };
 
@@ -158,6 +165,10 @@ static const struct xe_gt_regset xe_dbg_regsets[XE_DBG_REGSET_MAX] = {
 		.gt[XE_GT_TYPE_MEDIA] = { xe3p_gt_guc_reglist,
 					  ARRAY_SIZE(xe3p_gt_guc_reglist) },
 	},
+	[XE_DBG_REGSET_GAM_PF] = {
+		.gt[XE_GT_TYPE_MAIN] = { xe3p_gam_pf_reglist,
+					ARRAY_SIZE(xe3p_gam_pf_reglist) },
+	},
 };
 
 static void xe_dbg_reg_snapshot_print(struct drm_printer *p,
@@ -195,6 +206,22 @@ static const u32 *xe_dbg_find_value(const struct xe_dbg_reg_snapshot *snap,
 	return NULL;
 }
 
+static void xe_gam_pf_snapshot_print(struct drm_printer *p,
+				     const struct xe_dbg_reg_snapshot *snap)
+{
+	const u32 *val1, *val2;
+
+	xe_dbg_reg_snapshot_print(p, snap);
+
+	if (!snap)
+		return;
+
+	val1 = xe_dbg_find_value(snap, PAGE_FLTRPTQ_HEAD_GAMCTRL);
+	val2 = xe_dbg_find_value(snap, PAGE_FLTRPTQ_TAIL_GAMCTRL);
+	if ((val1 && val2) && (*val1 != *val2))
+		drm_printf(p, "PF occurred, refer to dmesg log for PF info\n");
+}
+
 static void xe_gt_rpm_snapshot_print(struct drm_printer *p,
 				     const struct xe_dbg_reg_snapshot *snap)
 {
@@ -314,6 +341,9 @@ static ssize_t __xe_devcoredump_read(char *buffer, ssize_t count,
 	drm_puts(&p, "\n**** GuC CT ****\n");
 	xe_guc_ct_snapshot_print(ss->guc.ct, &p);
 
+	drm_printf(&p, "\n**** GAM PF Report ****\n");
+	xe_gam_pf_snapshot_print(&p, ss->gam_pf_report);
+
 	drm_puts(&p, "\n**** Contexts ****\n");
 	xe_guc_exec_queue_snapshot_print(ss->ge, &p);
 
@@ -368,6 +398,9 @@ static void xe_devcoredump_snapshot_free(struct xe_devcoredump_snapshot *ss)
 		xe_guc_capture_put_matched_nodes(&ss->gt->uc.guc);
 	ss->matched_node = NULL;
 
+	xe_dbg_reg_snapshot_free(ss->gam_pf_report);
+	ss->gam_pf_report = NULL;
+
 	xe_guc_exec_queue_snapshot_free(ss->ge);
 	ss->ge = NULL;
 
@@ -602,6 +635,10 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
 
 	ss->guc.log = xe_guc_log_snapshot_capture(&guc->log, true);
 	ss->guc.ct = xe_guc_ct_snapshot_capture(&guc->ct);
+	ss->gam_pf_report = xe_dbg_gt_snapshot_capture(q->gt,
+						       other_gt,
+						       XE_DBG_REGSET_GAM_PF,
+						       XE_GT_TYPE_MAIN);
 
 	if (q) {
 		ss->ge = xe_guc_exec_queue_snapshot_capture(q);
diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h
index efea306f0fec..dc5ae67cdaf7 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump_types.h
+++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h
@@ -103,6 +103,9 @@ struct xe_devcoredump_snapshot {
 		struct xe_guc_log_snapshot *log;
 	} guc;
 
+	/** @gam_pf_report: GAM PF report snapshot */
+	struct xe_dbg_reg_snapshot *gam_pf_report;
+
 	/** @ge: GuC Submission Engine snapshot */
 	struct xe_guc_submit_exec_queue_snapshot *ge;
 
-- 
2.43.0

[PATCH v4 5/7] drm/xe/guc: add TDL, SLICE gfx registers to capture list

[Nareshkumar Gollakoti]

Add ROW_INSTDONE_TDL_GFX, SS_LSC_HDC_IDLE_TDL_GFX and SLICE_ARB_STATUS
register definitions and include them in the XeHPG extended GuC capture
register list.

v2:(Sashiko)
- Refactored ROW_INSTDONE_TDL_GFX to ROW_INSTDONE_TDL_GFX
- Add SLICE_ARB_STATUS register to xeHP register list
- Refactor commit message

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h | 5 +++++
 drivers/gpu/drm/xe/xe_guc_capture.c  | 5 ++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index e9eb0bd04af1..2e4cb4957479 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -533,6 +533,8 @@
 #define PAGE_FLTRPTQ_HEAD_GAMCTRL		XE_REG(0xcf90)
 #define PAGE_FLTRPTQ_TAIL_GAMCTRL		XE_REG(0xcf94)
 
+#define SLICE_ARB_STATUS			XE_REG_MCR(0xd814)
+
 #define HALF_SLICE_CHICKEN5			XE_REG_MCR(0xe188, XE_REG_OPTION_MASKED)
 #define   DISABLE_SAMPLE_G_PERFORMANCE		REG_BIT(0)
 
@@ -597,6 +599,9 @@
 #define EU_SYSTOLIC_LIC_THROTTLE_CTL_WITH_LOCK	XE_REG_MCR(0xe534)
 #define   EU_SYSTOLIC_LIC_THROTTLE_CTL_LOCK_BIT	REG_BIT(31)
 
+#define ROW_INSTDONE_TDL_GFX			XE_REG_MCR(0xe580)
+#define SS_LSC_HDC_IDLE_TDL_GFX			XE_REG_MCR(0xe584)
+
 #define XEHP_HDC_CHICKEN0					XE_REG_MCR(0xe5f0, XE_REG_OPTION_MASKED)
 #define   LSC_L1_FLUSH_CTL_3D_DATAPORT_FLUSH_EVENTS_MASK	REG_GENMASK(13, 11)
 #define   DIS_ATOMIC_CHAINING_TYPED_WRITES	REG_BIT(3)
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 3e99aef53b46..6a20eab0f820 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -376,7 +376,10 @@ static const struct __ext_steer_reg xehpg_extregs[] = {
 	{"SC_INSTDONE",			XEHPG_SC_INSTDONE},
 	{"SC_INSTDONE_EXTRA",		XEHPG_SC_INSTDONE_EXTRA},
 	{"SC_INSTDONE_EXTRA2",		XEHPG_SC_INSTDONE_EXTRA2},
-	{"INSTDONE_GEOM_SVGUNIT",	XEHPG_INSTDONE_GEOM_SVGUNIT}
+	{"INSTDONE_GEOM_SVGUNIT",	XEHPG_INSTDONE_GEOM_SVGUNIT},
+	{"ROW_INSTDONE_TDL_GFX",	ROW_INSTDONE_TDL_GFX},
+	{"SS_LSC_HDC_IDLE_TDL_GFX",	SS_LSC_HDC_IDLE_TDL_GFX},
+	{"SLICE_ARB_STATUS",		SLICE_ARB_STATUS}
 };
 
 static void __fill_ext_reg(struct __guc_mmio_reg_descr *ext,
-- 
2.43.0

[PATCH v4 6/7] drm/xe: capture L3 node status registers in devcoredump

[Nareshkumar Gollakoti]

Add L3_NODE_IDLE and L3STAT_LBCF_GFX register definitions and include
them in the devcoredump snapshot as a node status section.

Extend the register descriptor to mark MCR registers so the snapshot
code can read them through xe_gt_mcr_unicast_read_any(), then print and
free the captured node status registers alongside the existing dump
sections.

v2:(Sashiko)
- change L3 node registers as XE_REG_MCR type
- identify mcr register type from reg.mcr
- As generic capture function ensure VF check this will not execute
  on VF Mode.

v4:(Tejas)
- Add L3_NODE type into the enum as changed/added in initial patch

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h      |  3 ++
 drivers/gpu/drm/xe/xe_devcoredump.c       | 34 ++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_devcoredump_types.h | 10 +++++--
 3 files changed, 41 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 2e4cb4957479..55f0eee4e20e 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -454,6 +454,9 @@
 #define   L3_ESC_MASK				REG_BIT(0)
 #define   L3_ESC(value)				REG_FIELD_PREP(L3_ESC_MASK, value)
 
+#define L3_NODE_IDLE				XE_REG_MCR(0xb0b0)
+#define L3STAT_LBCF_GFX				XE_REG_MCR(0xb128)
+
 #define XEHP_L3NODEARBCFG			XE_REG_MCR(0xb0b4)
 #define   XEHP_LNESPARE				REG_BIT(19)
 
diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
index a2a3437ec2f6..db7ccee12006 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump.c
+++ b/drivers/gpu/drm/xe/xe_devcoredump.c
@@ -28,6 +28,7 @@
 #include "xe_mmio.h"
 #include "regs/xe_gt_regs.h"
 #include "regs/xe_guc_regs.h"
+#include "xe_gt_mcr.h"
 
 /**
  * DOC: Xe device coredump
@@ -73,6 +74,7 @@
 #define XE_COREDUMP_TIMEOUT_JIFFIES (60 * 60 * HZ)
 
 #define XE_REG_DESC(_reg, _name)	{ .reg = (_reg), .name = (_name) }
+#define XE_REG_DESC_MCR(_reg, _name)	{ .mcr_reg = (_reg), .name = (_name) }
 
 static const struct xe_reg_desc xe3p_gt_guc_reglist[] = {
 	XE_REG_DESC(GUC_STATUS,	"GUC_STATUS"),
@@ -119,6 +121,11 @@ static const struct xe_reg_desc xe3p_gam_pf_reglist[] = {
 	XE_REG_DESC(PAGE_FLTRPTQ_TAIL_GAMCTRL, "PAGE_FLTRPTQ_TAIL_GAMCTRL"),
 };
 
+static const struct xe_reg_desc xe3p_l3_node_reglist[] = {
+	XE_REG_DESC_MCR(L3_NODE_IDLE, "L3_NODE_IDLE"),
+	XE_REG_DESC_MCR(L3STAT_LBCF_GFX, "L3STAT_LBCF_GFX"),
+};
+
 /**
  * struct xe_gt_regset - Struct for register descriptor list for GT
  *
@@ -136,6 +143,7 @@ struct xe_gt_regset {
  * @XE_DBG_REGSET_RPM: RPM register set
  * @XE_DBG_REGSET_GUC: GUC register set
  * @XE_DBG_REGSET_GAM_PF: GAM Pagefault registers set
+ * @XE_DBG_REGSET_L3_NODE: L3 Node register Set
  * @XE_DBG_REGSET_MAX: Number of debug register set types
  */
 enum xe_dbg_regset_type {
@@ -143,6 +151,7 @@ enum xe_dbg_regset_type {
 	XE_DBG_REGSET_RPM,
 	XE_DBG_REGSET_GUC,
 	XE_DBG_REGSET_GAM_PF,
+	XE_DBG_REGSET_L3_NODE,
 	XE_DBG_REGSET_MAX,
 };
 
@@ -169,6 +178,10 @@ static const struct xe_gt_regset xe_dbg_regsets[XE_DBG_REGSET_MAX] = {
 		.gt[XE_GT_TYPE_MAIN] = { xe3p_gam_pf_reglist,
 					ARRAY_SIZE(xe3p_gam_pf_reglist) },
 	},
+	[XE_DBG_REGSET_L3_NODE] = {
+		.gt[XE_GT_TYPE_MAIN] = { xe3p_l3_node_reglist,
+					 ARRAY_SIZE(xe3p_l3_node_reglist) },
+	},
 };
 
 static void xe_dbg_reg_snapshot_print(struct drm_printer *p,
@@ -253,8 +266,13 @@ xe_dbg_reg_snapshot_capture_target(struct xe_gt *gt,
 
 	snap->desc	= reglist;
 	snap->num_regs = reglist->num_regs;
-	for (i = 0; i < reglist->num_regs; i++)
-		snap->values[i] = xe_mmio_read32(&gt->mmio, reglist->regs[i].reg);
+	for (i = 0; i < reglist->num_regs; i++) {
+		if (reglist->regs[i].reg.mcr)
+			snap->values[i] = xe_gt_mcr_unicast_read_any(gt,
+								     reglist->regs[i].mcr_reg);
+		else
+			snap->values[i] = xe_mmio_read32(&gt->mmio, reglist->regs[i].reg);
+	}
 
 	return snap;
 }
@@ -344,6 +362,9 @@ static ssize_t __xe_devcoredump_read(char *buffer, ssize_t count,
 	drm_printf(&p, "\n**** GAM PF Report ****\n");
 	xe_gam_pf_snapshot_print(&p, ss->gam_pf_report);
 
+	drm_printf(&p, "\n**** Node Status ****\n");
+	xe_dbg_reg_snapshot_print(&p, ss->ns);
+
 	drm_puts(&p, "\n**** Contexts ****\n");
 	xe_guc_exec_queue_snapshot_print(ss->ge, &p);
 
@@ -401,6 +422,9 @@ static void xe_devcoredump_snapshot_free(struct xe_devcoredump_snapshot *ss)
 	xe_dbg_reg_snapshot_free(ss->gam_pf_report);
 	ss->gam_pf_report = NULL;
 
+	xe_dbg_reg_snapshot_free(ss->ns);
+	ss->ns = NULL;
+
 	xe_guc_exec_queue_snapshot_free(ss->ge);
 	ss->ge = NULL;
 
@@ -639,13 +663,15 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
 						       other_gt,
 						       XE_DBG_REGSET_GAM_PF,
 						       XE_GT_TYPE_MAIN);
-
+	ss->ns = xe_dbg_gt_snapshot_capture(q->gt,
+					    other_gt,
+					    XE_DBG_REGSET_L3_NODE,
+					    XE_GT_TYPE_MAIN);
 	if (q) {
 		ss->ge = xe_guc_exec_queue_snapshot_capture(q);
 		if (job)
 			ss->job = xe_sched_job_snapshot_capture(job);
 		ss->vm = xe_vm_snapshot_capture(q->vm);
-
 		xe_engine_snapshot_capture_for_queue(q);
 	}
 
diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h
index dc5ae67cdaf7..8003ff8dfecf 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump_types.h
+++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h
@@ -21,8 +21,12 @@ struct xe_gt;
  * of the register to dump its value during coredump for debug purpose.
  */
 struct xe_reg_desc {
-	/** @reg: The register */
-	struct xe_reg reg;
+	union {
+		/** @reg: The register */
+		struct xe_reg reg;
+		/** @mcr_reg: The mcr register */
+		struct xe_reg_mcr mcr_reg;
+	};
 	/** @name: Name of the register */
 	const char *name;
 };
@@ -105,6 +109,8 @@ struct xe_devcoredump_snapshot {
 
 	/** @gam_pf_report: GAM PF report snapshot */
 	struct xe_dbg_reg_snapshot *gam_pf_report;
+	/** @ns: Node status snapshot */
+	struct xe_dbg_reg_snapshot *ns;
 
 	/** @ge: GuC Submission Engine snapshot */
 	struct xe_guc_submit_exec_queue_snapshot *ge;
-- 
2.43.0

[PATCH v4 7/7] drm/xe/guc: capture additional engine state registers

[Nareshkumar Gollakoti]

Add a wider set of engine state registers to GuC error capture to improve
post-mortem debugging of engine hangs and reset-related failures.

Define the missing register offsets in xe_engine_regs.h and include them in
the GuC capture list. The additional registers cover reset state, front-end
and back-end FSM state, power state, batch buffer state, instruction state,
preemption status, and related chicken/debug controls.

This provides more complete engine context in capture dumps, which should
help root-cause analysis when investigating GuC-reported engine failures.

v3:(Sashiko)
- Move FF_SLICE_CS_CHICKEN1/2 out of COMMON_BASE_ENGINE_INSTANCE
- Add XE3P_RC_SLICE_INSTANCE and include it only in xe3p_rc_inst_regs[]
- Add XE_BCS_RCS_ENGINE_INSTANCE for registers shared only by
  BCS/RCS paths
- Include XE_BCS_RCS_ENGINE_INSTANCE only in
  xe_blt_inst_regs[] and xe3p_rc_inst_regs[]
- Keep COMMON_BASE_ENGINE_INSTANCE limited to registers
  valid across all engine classes

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_engine_regs.h | 22 +++++++++++++++
 drivers/gpu/drm/xe/xe_guc_capture.c      | 35 ++++++++++++++++++++----
 2 files changed, 52 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index 94033982e694..9f328b1b18f5 100644
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -60,6 +60,8 @@
 
 #define RING_START_UDW(base)			XE_REG((base) + 0x48)
 
+#define RING_CSFE_GLB_CHICKEN3(base)		XE_REG((base) + 0x4c)
+
 #define RING_PSMI_CTL(base)			XE_REG((base) + 0x50, XE_REG_OPTION_MASKED)
 #define   RC_SEMA_IDLE_MSG_DISABLE		REG_BIT(12)
 #define   WAIT_FOR_EVENT_POWER_DOWN_DISABLE	REG_BIT(7)
@@ -72,6 +74,7 @@
 #define RING_DMA_FADD_UDW(base)			XE_REG((base) + 0x60)
 #define RING_IPEHR(base)			XE_REG((base) + 0x68)
 #define RING_INSTDONE(base)			XE_REG((base) + 0x6c)
+#define RING_INSTPS(base)			XE_REG((base) + 0x70)
 #define RING_ACTHD(base)			XE_REG((base) + 0x74)
 #define RING_DMA_FADD(base)			XE_REG((base) + 0x78)
 #define RING_HWS_PGA(base)			XE_REG((base) + 0x80)
@@ -102,6 +105,8 @@
 #define   SELECTIVE_READ_GROUP			REG_GENMASK(29, 23)
 #define   SELECTIVE_READ_INSTANCE		REG_GENMASK(22, 16)
 
+#define RESET_CTRL(base)			XE_REG((base) + 0xd0)
+
 /*
  * CMD_CCTL read/write fields take a MOCS value and _not_ a table index.
  * The lsb of each can be considered a separate enabling bit for encryption.
@@ -123,15 +128,21 @@
 #define FF_SLICE_CS_CHICKEN1(base)		XE_REG((base) + 0xe0, XE_REG_OPTION_MASKED)
 #define   FFSC_PERCTX_PREEMPT_CTRL		REG_BIT(14)
 
+#define FF_SLICE_CS_CHICKEN2(base)		XE_REG((base) + 0xe4, XE_REG_OPTION_MASKED)
+
 #define CS_DEBUG_MODE1(base)			XE_REG((base) + 0xec, XE_REG_OPTION_MASKED)
 #define   FF_DOP_CLOCK_GATE_DISABLE		REG_BIT(1)
 #define   REPLAY_MODE_GRANULARITY		REG_BIT(0)
 
 #define INDIRECT_RING_STATE(base)		XE_REG((base) + 0x108)
 
+#define RING_BB_STATE(base)			XE_REG((base) + 0x110)
+
 #define RING_BBADDR(base)			XE_REG((base) + 0x140)
 #define RING_BBADDR_UDW(base)			XE_REG((base) + 0x168)
 
+#define RING_BB_ADDR_DIFF(base)			XE_REG((base) + 0x154)
+
 #define PR_CTR_CTRL(base)			XE_REG((base) + 0x178)
 #define   CTR_COUNT_SELECT_FF			REG_BIT(31)
 #define   CTR_LOGIC_OP_MASK			REG_GENMASK(30, 0)
@@ -148,6 +159,8 @@
 #define   BLIT_CCTL_DST_MOCS_MASK		REG_GENMASK(14, 9)
 #define   BLIT_CCTL_SRC_MOCS_MASK		REG_GENMASK(6, 1)
 
+#define RING_CSBEFSM3(base)			XE_REG((base) + 0x224)
+
 #define RING_EXECLIST_STATUS_LO(base)		XE_REG((base) + 0x234)
 #define RING_EXECLIST_STATUS_HI(base)		XE_REG((base) + 0x234 + 4)
 
@@ -169,9 +182,16 @@
 #define   GFX_MSIX_INTERRUPT_ENABLE		REG_BIT(13)
 #define   GFX_DISABLE_LEGACY_MODE		REG_BIT(3)
 
+#define RING_CSFESM(base)			XE_REG((base) + 0x2a0)
+#define RING_CSFESM2(base)			XE_REG((base) + 0x2a4)
+#define RING_CSFESM3(base)			XE_REG((base) + 0x2a8)
+#define RING_CSPWRFSM(base)			XE_REG((base) + 0x2ac)
+
 #define RING_CSMQDEBUG(base)			XE_REG((base) + 0x2b0)
 #define   CURRENT_ACTIVE_QUEUE_ID_MASK		REG_GENMASK(7, 0)
 
+#define RING_CSBEFSM(base)			XE_REG((base) + 0x2bc)
+
 #define RING_QUEUE_TIMESTAMP(base)		XE_REG((base) + 0x4c0)
 #define RING_QUEUE_TIMESTAMP_UDW(base)		XE_REG((base) + 0x4c0 + 4)
 
@@ -217,6 +237,8 @@
 #define   PREEMPT_GPGPU_LEVEL_MASK		PREEMPT_GPGPU_LEVEL(1, 1)
 #define   PREEMPT_3D_OBJECT_LEVEL		REG_BIT(0)
 
+#define CS_PREEMPTION_STATUS(base)		XE_REG((base) + 0x5ac)
+
 #define CS_GPR_DATA(base, n)			XE_REG((base) + 0x600 + (n) * 4)
 #define CS_GPR_REG(base, n)			CS_GPR_DATA((base), (n) * 2)
 #define CS_GPR_REG_UDW(base, n)			CS_GPR_DATA((base), (n) * 2 + 1)
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 6a20eab0f820..b3c42052b70b 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -127,11 +127,7 @@ struct __guc_capture_parsed_output {
 	{ RING_START(0),		REG_64BIT_LOW_DW, 0,	0,	0,	NULL}, \
 	{ RING_START_UDW(0),		REG_64BIT_HI_DW, 0,	0,	0,	"RING_START"}, \
 	{ RING_DMA_FADD(0),		REG_64BIT_LOW_DW, 0,	0,	0,	NULL}, \
-	{ RING_DMA_FADD_UDW(0),		REG_64BIT_HI_DW, 0,	0,	0,	"RING_DMA_FADD"}, \
-	{ RING_EXECLIST_STATUS_LO(0),	REG_64BIT_LOW_DW, 0,	0,	0,	NULL}, \
-	{ RING_EXECLIST_STATUS_HI(0),	REG_64BIT_HI_DW, 0,	0,	0,	"RING_EXECLIST_STATUS"}, \
-	{ RING_EXECLIST_SQ_CONTENTS_LO(0), REG_64BIT_LOW_DW, 0,	0,	0,	NULL}, \
-	{ RING_EXECLIST_SQ_CONTENTS_HI(0), REG_64BIT_HI_DW, 0,	0,	0,	"RING_EXECLIST_SQ_CONTENTS"}
+	{ RING_DMA_FADD_UDW(0),		REG_64BIT_HI_DW, 0,	0,	0,	"RING_DMA_FADD"}
 
 #define COMMON_XELP_RC_CLASS \
 	{ RCU_MODE,			REG_32BIT,	0,	0,	0,	"RCU_MODE"}
@@ -150,6 +146,32 @@ struct __guc_capture_parsed_output {
 #define XE3P_BASE_ENGINE_INSTANCE \
 	{ RING_CSMQDEBUG(0),		REG_32BIT,	0,	0,	0,	"CSMQDEBUG"}
 
+#define XE3P_RC_SLICE_INSTANCE \
+	{ FF_SLICE_CS_CHICKEN1(0), REG_32BIT, 0, 0, 0, "FF_SLICE_CS_CHICKEN1"}, \
+	{ FF_SLICE_CS_CHICKEN2(0), REG_32BIT, 0, 0, 0, "FF_SLICE_CS_CHICKEN2"}
+
+#define XE_BCS_RCS_ENGINE_INSTANCE \
+	{ RING_EXECLIST_STATUS_LO(0), REG_64BIT_LOW_DW, 0, 0, 0, NULL}, \
+	{ RING_EXECLIST_STATUS_HI(0), REG_64BIT_HI_DW, 0, 0, 0, "RING_EXECLIST_STATUS"}, \
+	{ RING_EXECLIST_SQ_CONTENTS_LO(0), REG_64BIT_LOW_DW, 0, 0, 0, NULL}, \
+	{ RING_EXECLIST_SQ_CONTENTS_HI(0), REG_64BIT_HI_DW, 0, 0, 0, "RING_EXECLIST_SQ_CONTENTS"}, \
+	{ RESET_CTRL(0), REG_32BIT, 0, 0, 0, "RESET_CTRL"}, \
+	{ RING_CSBEFSM3(0), REG_32BIT, 0, 0, 0, "RING_CSBEFSM3"}, \
+	{ RING_CSFESM(0), REG_32BIT, 0, 0, 0, "RING_CSFESM"}, \
+	{ RING_CSFESM2(0), REG_32BIT, 0, 0, 0, "RING_CSFESM2"}, \
+	{ RING_CSFESM3(0), REG_32BIT, 0, 0, 0, "RING_CSFESM3"}, \
+	{ RING_CSPWRFSM(0), REG_32BIT, 0, 0, 0, "RING_CSPWRFSM"}, \
+	{ RING_CSBEFSM(0), REG_32BIT, 0, 0, 0, "RING_CSBEFSM"}, \
+	{ BCS_SWCTRL(0), REG_32BIT, 0, 0, 0, "BCS_SWCTRL"}, \
+	{ RING_CSFE_GLB_CHICKEN3(0), REG_32BIT, 0, 0, 0, "RING_CSFE_GLB_CHICKEN3"}, \
+	{ RING_PSMI_CTL(0), REG_32BIT, 0, 0, 0, "RING_PSMI_CTL"}, \
+	{ RING_INSTPS(0), REG_32BIT, 0, 0, 0, "RING_INSTPS"}, \
+	{ RING_BB_ADDR_DIFF(0), REG_32BIT, 0, 0, 0, "RING_BB_ADDR_DIFF"}, \
+	{ RING_BB_STATE(0), REG_32BIT, 0, 0, 0, "RING_BB_STATE"}, \
+	{ CS_DEBUG_MODE1(0), REG_32BIT, 0, 0, 0, "CS_DEBUG_MODE1"}, \
+	{ CS_CHICKEN1(0), REG_32BIT, 0, 0, 0, "CS_CHICKEN1"}, \
+	{ CS_PREEMPTION_STATUS(0), REG_32BIT, 0, 0, 0, "CS_PREEMPTION_STATUS"}
+
 /* XE_LP Global */
 static const struct __guc_mmio_reg_descr xe_lp_global_regs[] = {
 	COMMON_XELP_BASE_GLOBAL,
@@ -189,6 +211,7 @@ static const struct __guc_mmio_reg_descr xe_vec_inst_regs[] = {
 /* Blitter Per-Engine-Instance */
 static const struct __guc_mmio_reg_descr xe_blt_inst_regs[] = {
 	COMMON_BASE_ENGINE_INSTANCE,
+	XE_BCS_RCS_ENGINE_INSTANCE,
 };
 
 /* XE_LP - GSC Per-Engine-Instance */
@@ -200,6 +223,8 @@ static const struct __guc_mmio_reg_descr xe_lp_gsc_inst_regs[] = {
 static const struct __guc_mmio_reg_descr xe3p_rc_inst_regs[] = {
 	COMMON_BASE_ENGINE_INSTANCE,
 	XE3P_BASE_ENGINE_INSTANCE,
+	XE_BCS_RCS_ENGINE_INSTANCE,
+	XE3P_RC_SLICE_INSTANCE,
 };
 
 /*
-- 
2.43.0

Re: [PATCH v4 1/7] drm/xe/devcoredump: Capture GT fuse registers in devcoredump

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] xe: NULL pointer dereference of q when triggering devcoredump without exec queue
- [Medium] xe: premature release of forcewake reference for other_gt due to scoping
--

commit 2590b539053b321d9d5162da600031b95e05357f
Author: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>

drm/xe/devcoredump: Capture GT fuse registers in devcoredump

This commit captures fuse-related GT register state in the Xe devcoredump
for postmortem debugging. It adds generic register snapshot storage and
helpers to capture, print, and free MMIO register dumps, recording primary
and media GT fuse and RPM register states.

> diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> index ab681b148869f..1dbee725f55a1 100644
> --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
[ ... ]
> @@ -345,8 +534,34 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
>  	/* keep going if fw fails as we still want to save the memory and SW data */
>  	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
>  
> +	other_gt = q->gt->tile->media_gt == q->gt ? q->gt->tile->primary_gt
> +					    : q->gt->tile->media_gt;

[Severity: High]
Does this code trigger a NULL pointer dereference if q is NULL?

For hangs not tied to an exec queue (e.g., TLB invalidation timeouts), the
q parameter to __xe_devcoredump() and devcoredump_snapshot() is explicitly
documented as potentially being NULL. 

Unconditionally dereferencing q here to calculate other_gt and later 
passing q->gt to xe_dbg_gt_snapshot_capture() would cause a kernel panic 
during the crash dumping process.

Should this use the gt parameter passed directly to the function instead
of q->gt?

> +	if (other_gt) {
> +		CLASS(xe_force_wake, fw_ref_other)(gt_to_fw(other_gt),
> +						   XE_FORCEWAKE_ALL);
> +		if (!xe_force_wake_ref_has_domain(fw_ref_other.domains, XE_FORCEWAKE_ALL))
> +			other_gt = NULL;
> +	}

[Severity: Medium]
Are we dropping the forcewake reference for other_gt prematurely here?

The CLASS(xe_force_wake, fw_ref_other) macro uses __cleanup() to
automatically release the forcewake lock when the variable goes out of scope.
Since it is declared inside the if (other_gt) { ... } block, its scope
ends at the closing brace of the if block, immediately running the
destructor (xe_force_wake_put).

Consequently, when xe_dbg_gt_snapshot_capture() and xe_mmio_read32() are
later called to capture registers for other_gt, the device power domain
has already lost its active forcewake reference. Accessing GT MMIO registers
without holding forcewake can lead to hardware timeouts or read failures.

Could the forcewake lock scope be extended to cover the register capture
functions?

> +
>  	cookie = dma_fence_begin_signalling();
>  
> +	ss->gt_fuse      = xe_dbg_gt_snapshot_capture(q->gt,
> +						      other_gt,
> +						      XE_DBG_REGSET_FUSE,
> +						      XE_GT_TYPE_MAIN);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261012145237.3788198-1-naresh.kumar.g@intel.com?part=1

Re: [PATCH v4 4/7] drm/xe: dump GAM page fault report registers in devcoredump

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] NULL pointer dereference of q via q->gt when devcoredump is not tied to an exec queue
- [Medium] Premature release of forcewake for other_gt due to CLASS macro scoping
--

commit be0fac28379d0e5150a5b7bc7c0761e28bfdcbed
Author: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>

drm/xe: dump GAM page fault report registers in devcoredump

This commit adds the PAGE_FLTRPTQ_HEAD_GAMCTRL and PAGE_FLTRPTQ_TAIL_GAMCTRL
registers to the devcoredump snapshot. This state is intended to be available
during cleanup for post-mortem debugging.

> diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> index f4a22e46eda78..a2a3437ec2f62 100644
> --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
[ ... ]
> @@ -602,6 +635,10 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
>  
>  	ss->guc.log = xe_guc_log_snapshot_capture(&guc->log, true);
>  	ss->guc.ct = xe_guc_ct_snapshot_capture(&guc->ct);
> +	ss->gam_pf_report = xe_dbg_gt_snapshot_capture(q->gt,
> +						       other_gt,
> +						       XE_DBG_REGSET_GAM_PF,
> +						       XE_GT_TYPE_MAIN);

[Severity: High]
Can q be NULL here?

If a hardware hang is not tied to an exec queue (for example, a TLB
invalidation timeout triggering via xe_devcoredump_gt()), q is passed as NULL.

Will unconditionally dereferencing q->gt here cause a NULL pointer dereference
and prevent the devcoredump from being created? Should the function use the gt
parameter directly instead of q->gt?

[Severity: Medium]
Is the forcewake for other_gt still held when this register capture occurs?

Earlier in devcoredump_snapshot(), the forcewake for other_gt is acquired
using the CLASS(xe_force_wake, ...) macro inside an if (other_gt) { ... }
block. Because CLASS utilizes the C __attribute__((cleanup)) mechanism, the
forcewake is released as soon as that block ends.

Does this mean the new gam_pf_report capture runs after the forcewake has
already been dropped, potentially leading to hardware timeouts or reading
garbage data?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261012145237.3788198-1-naresh.kumar.g@intel.com?part=4

Re: [PATCH v4 2/7] drm/xe/devcoredump: Add GuC register snapshot to devcoredump

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] xe: NULL pointer dereference of `q` in devcoredump_snapshot()
--

commit e0032c5e9ffbf65f21b038440b113313907d9c4c
Author: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Subject: drm/xe/devcoredump: Add GuC register snapshot to devcoredump

This commit adds support for capturing GuC register state as part of the xe
devcoredump snapshot. It defines a dedicated GuC register snapshot structure
and records selected GT and media GuC status/error registers.

> diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> index 1dbee725f55a1..f4a22e46eda78 100644
> --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
[ ... ]
> @@ -561,6 +591,14 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
>  						      other_gt,
>  						      XE_DBG_REGSET_RPM,
>  						      XE_GT_TYPE_MEDIA);
> +	ss->gt_guc_reg = xe_dbg_gt_snapshot_capture(q->gt,
> +						    other_gt,
> +						    XE_DBG_REGSET_GUC,
> +						    XE_GT_TYPE_MAIN);

[Severity: High]
Can this cause a NULL pointer dereference when devcoredump_snapshot() is
called?

The xe_devcoredump_gt() function explicitly passes NULL for the q (exec queue)
parameter in cases like TLB invalidation timeouts, where the hang is not tied
to a specific queue.

If q is NULL, the unconditional access to q->gt here will trigger a kernel
panic during the error handling path, crashing the system and preventing the
devcoredump from successfully completing.

Would it be safer to use the provided gt argument instead of q->gt?

> +	ss->media_gt_guc_reg = xe_dbg_gt_snapshot_capture(q->gt,
> +							  other_gt,
> +							  XE_DBG_REGSET_GUC,
> +							  XE_GT_TYPE_MEDIA);

[Severity: High]
Similarly, does this unconditional access to q->gt risk a NULL pointer
dereference under the same conditions described above?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261012145237.3788198-1-naresh.kumar.g@intel.com?part=2

Re: [PATCH v4 6/7] drm/xe: capture L3 node status registers in devcoredump

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/xe: NULL pointer dereference of q in devcoredump_snapshot()
--

commit 6161ac10e80fa8c54c67e54542cd9c6bcb0ef507
Author: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
drm/xe: capture L3 node status registers in devcoredump

This commit adds L3_NODE_IDLE and L3STAT_LBCF_GFX registers and captures
them in the devcoredump snapshot. It also extends the register descriptor
to support reading MCR registers.

> diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> index a2a3437ec2f62..db7ccee12006a 100644
> --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
[ ... ]
> @@ -639,13 +663,15 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
>  						       other_gt,
>  						       XE_DBG_REGSET_GAM_PF,
>  						       XE_GT_TYPE_MAIN);
> -
> +	ss->ns = xe_dbg_gt_snapshot_capture(q->gt,
> +					    other_gt,
> +					    XE_DBG_REGSET_L3_NODE,
> +					    XE_GT_TYPE_MAIN);

[Severity: High]
If q is NULL, will accessing q->gt cause a NULL pointer dereference here?

When a devcoredump is triggered for a GT-level hang not tied to an exec queue
(such as a TLB invalidation timeout via xe_devcoredump_gt()), q can be NULL,
which is why the code immediately below checks if (q).

Should this capture use the gt parameter that is passed into
devcoredump_snapshot() instead of q->gt, or should it be moved inside the
if (q) block?

>  	if (q) {
>  		ss->ge = xe_guc_exec_queue_snapshot_capture(q);
>  		if (job)
>  			ss->job = xe_sched_job_snapshot_capture(job);
>  		ss->vm = xe_vm_snapshot_capture(q->vm);
> -
>  		xe_engine_snapshot_capture_for_queue(q);
>  	}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261012145237.3788198-1-naresh.kumar.g@intel.com?part=6

Re: [PATCH v4 7/7] drm/xe/guc: capture additional engine state registers

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] xe: missing GuC capture registers for video and pre-Xe3p render engines
- [Medium] xe: invalid MMIO accesses during GuC error capture due to mixed BCS/RCS registers
--

commit 5e669b4655462fa28596fd46c77d07300abb8f59
Author: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>

    drm/xe/guc: capture additional engine state registers

This patch adds a wider set of engine state registers to the GuC error capture
to improve post-mortem debugging of engine hangs and reset-related failures.

> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
> index 6a20eab0f8204..b3c42052b70bb 100644
> --- a/drivers/gpu/drm/xe/xe_guc_capture.c
> +++ b/drivers/gpu/drm/xe/xe_guc_capture.c
> @@ -127,11 +127,7 @@ struct __guc_capture_parsed_output {
>  	{ RING_START(0),		REG_64BIT_LOW_DW, 0,	0,	0,	NULL}, \
>  	{ RING_START_UDW(0),		REG_64BIT_HI_DW, 0,	0,	0,	"RING_START"}, \
>  	{ RING_DMA_FADD(0),		REG_64BIT_LOW_DW, 0,	0,	0,	NULL}, \
> -	{ RING_DMA_FADD_UDW(0),		REG_64BIT_HI_DW, 0,	0,	0,	"RING_DMA_FADD"}, \
> -	{ RING_EXECLIST_STATUS_LO(0),	REG_64BIT_LOW_DW, 0,	0,	0,	NULL}, \
> -	{ RING_EXECLIST_STATUS_HI(0),	REG_64BIT_HI_DW, 0,	0,	0,	"RING_EXECLIST_STATUS"}, \
> -	{ RING_EXECLIST_SQ_CONTENTS_LO(0), REG_64BIT_LOW_DW, 0,	0,	0,	NULL}, \
> -	{ RING_EXECLIST_SQ_CONTENTS_HI(0), REG_64BIT_HI_DW, 0,	0,	0,	"RING_EXECLIST_SQ_CONTENTS"}
> +	{ RING_DMA_FADD_UDW(0),		REG_64BIT_HI_DW, 0,	0,	0,	"RING_DMA_FADD"}
>  
>  #define COMMON_XELP_RC_CLASS \
>  	{ RCU_MODE,			REG_32BIT,	0,	0,	0,	"RCU_MODE"}

[Severity: Medium]
When removing the execlist registers from COMMON_BASE_ENGINE_INSTANCE,
does this break the capture for engines that rely solely on the common list?

Since the new XE_BCS_RCS_ENGINE_INSTANCE macro is only added to the Blitter
and Xe3p Render lists, this leaves xe_rc_inst_regs (pre-Xe3p render/compute),
xe_vd_inst_regs (video), xe_vec_inst_regs (video enhance), and
xe_lp_gsc_inst_regs without any execlist status tracking during a GuC error
capture.

[ ... ]

> @@ -150,6 +146,32 @@ struct __guc_capture_parsed_output {
>  #define XE3P_BASE_ENGINE_INSTANCE \
>  	{ RING_CSMQDEBUG(0),		REG_32BIT,	0,	0,	0,	"CSMQDEBUG"}
>  
> +#define XE3P_RC_SLICE_INSTANCE \
> +	{ FF_SLICE_CS_CHICKEN1(0), REG_32BIT, 0, 0, 0, "FF_SLICE_CS_CHICKEN1"}, \
> +	{ FF_SLICE_CS_CHICKEN2(0), REG_32BIT, 0, 0, 0, "FF_SLICE_CS_CHICKEN2"}
> +
> +#define XE_BCS_RCS_ENGINE_INSTANCE \
> +	{ RING_EXECLIST_STATUS_LO(0), REG_64BIT_LOW_DW, 0, 0, 0, NULL}, \
> +	{ RING_EXECLIST_STATUS_HI(0), REG_64BIT_HI_DW, 0, 0, 0, "RING_EXECLIST_STATUS"}, \
> +	{ RING_EXECLIST_SQ_CONTENTS_LO(0), REG_64BIT_LOW_DW, 0, 0, 0, NULL}, \
> +	{ RING_EXECLIST_SQ_CONTENTS_HI(0), REG_64BIT_HI_DW, 0, 0, 0, "RING_EXECLIST_SQ_CONTENTS"}, \
> +	{ RESET_CTRL(0), REG_32BIT, 0, 0, 0, "RESET_CTRL"}, \
> +	{ RING_CSBEFSM3(0), REG_32BIT, 0, 0, 0, "RING_CSBEFSM3"}, \
> +	{ RING_CSFESM(0), REG_32BIT, 0, 0, 0, "RING_CSFESM"}, \
> +	{ RING_CSFESM2(0), REG_32BIT, 0, 0, 0, "RING_CSFESM2"}, \
> +	{ RING_CSFESM3(0), REG_32BIT, 0, 0, 0, "RING_CSFESM3"}, \
> +	{ RING_CSPWRFSM(0), REG_32BIT, 0, 0, 0, "RING_CSPWRFSM"}, \
> +	{ RING_CSBEFSM(0), REG_32BIT, 0, 0, 0, "RING_CSBEFSM"}, \
> +	{ BCS_SWCTRL(0), REG_32BIT, 0, 0, 0, "BCS_SWCTRL"}, \
> +	{ RING_CSFE_GLB_CHICKEN3(0), REG_32BIT, 0, 0, 0, "RING_CSFE_GLB_CHICKEN3"}, \
> +	{ RING_PSMI_CTL(0), REG_32BIT, 0, 0, 0, "RING_PSMI_CTL"}, \
> +	{ RING_INSTPS(0), REG_32BIT, 0, 0, 0, "RING_INSTPS"}, \
> +	{ RING_BB_ADDR_DIFF(0), REG_32BIT, 0, 0, 0, "RING_BB_ADDR_DIFF"}, \
> +	{ RING_BB_STATE(0), REG_32BIT, 0, 0, 0, "RING_BB_STATE"}, \
> +	{ CS_DEBUG_MODE1(0), REG_32BIT, 0, 0, 0, "CS_DEBUG_MODE1"}, \
> +	{ CS_CHICKEN1(0), REG_32BIT, 0, 0, 0, "CS_CHICKEN1"}, \
> +	{ CS_PREEMPTION_STATUS(0), REG_32BIT, 0, 0, 0, "CS_PREEMPTION_STATUS"}
> +
>  /* XE_LP Global */
>  static const struct __guc_mmio_reg_descr xe_lp_global_regs[] = {
>  	COMMON_XELP_BASE_GLOBAL,

[ ... ]

> @@ -189,6 +211,7 @@ static const struct __guc_mmio_reg_descr xe_vec_inst_regs[] = {
>  /* Blitter Per-Engine-Instance */
>  static const struct __guc_mmio_reg_descr xe_blt_inst_regs[] = {
>  	COMMON_BASE_ENGINE_INSTANCE,
> +	XE_BCS_RCS_ENGINE_INSTANCE,
>  };
>  
>  /* XE_LP - GSC Per-Engine-Instance */
> @@ -200,6 +223,8 @@ static const struct __guc_mmio_reg_descr xe_lp_gsc_inst_regs[] = {
>  static const struct __guc_mmio_reg_descr xe3p_rc_inst_regs[] = {
>  	COMMON_BASE_ENGINE_INSTANCE,
>  	XE3P_BASE_ENGINE_INSTANCE,
> +	XE_BCS_RCS_ENGINE_INSTANCE,
> +	XE3P_RC_SLICE_INSTANCE,
>  };
>  
>  /*

[Severity: Medium]
Does mixing Blitter and Render exclusive registers into a single macro cause
invalid MMIO accesses?

BCS_SWCTRL is Blitter-specific, while CS_CHICKEN1, CS_DEBUG_MODE1, and
CS_PREEMPTION_STATUS are Render-specific.

Because XE_BCS_RCS_ENGINE_INSTANCE is added to both xe_blt_inst_regs and
xe3p_rc_inst_regs, the GuC error capture will attempt to read unimplemented
MMIO addresses (Blitter offsets on Render engines and vice versa) during a
hang.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261012145237.3788198-1-naresh.kumar.g@intel.com?part=7

✗ CI.checkpatch: warning for drm/xe: Capture additional HW register state in devcoredump (rev4)

[Patchwork]

== Series Details ==

Series: drm/xe: Capture additional HW register state in devcoredump (rev4)
URL   : https://patchwork.freedesktop.org/series/172150/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
6bef5ce5c74dc76b4ee69ab2832c0d1fd63c91c7
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit fb4154b7e6f4d6a80d7731b42b9b1936a2825976
Author: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Date:   Mon Oct 12 20:22:37 2026 +0530

    drm/xe/guc: capture additional engine state registers
    
    Add a wider set of engine state registers to GuC error capture to improve
    post-mortem debugging of engine hangs and reset-related failures.
    
    Define the missing register offsets in xe_engine_regs.h and include them in
    the GuC capture list. The additional registers cover reset state, front-end
    and back-end FSM state, power state, batch buffer state, instruction state,
    preemption status, and related chicken/debug controls.
    
    This provides more complete engine context in capture dumps, which should
    help root-cause analysis when investigating GuC-reported engine failures.
    
    v3:(Sashiko)
    - Move FF_SLICE_CS_CHICKEN1/2 out of COMMON_BASE_ENGINE_INSTANCE
    - Add XE3P_RC_SLICE_INSTANCE and include it only in xe3p_rc_inst_regs[]
    - Add XE_BCS_RCS_ENGINE_INSTANCE for registers shared only by
      BCS/RCS paths
    - Include XE_BCS_RCS_ENGINE_INSTANCE only in
      xe_blt_inst_regs[] and xe3p_rc_inst_regs[]
    - Keep COMMON_BASE_ENGINE_INSTANCE limited to registers
      valid across all engine classes
    
    Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
+ /mt/dim checkpatch 22090ec171ca7cd7d265ec9ac69fdee824bdc65c drm-intel
97a938821147 drm/xe/devcoredump: Capture GT fuse registers in devcoredump
0b07431c27f0 drm/xe/devcoredump: Add GuC register snapshot to devcoredump
d69262978326 drm/xe/guc: Print register addresses in capture snapshot output
a36b537f11ab drm/xe: dump GAM page fault report registers in devcoredump
16da03ac857c drm/xe/guc: add TDL, SLICE gfx registers to capture list
a3443504989d drm/xe: capture L3 node status registers in devcoredump
fb4154b7e6f4 drm/xe/guc: capture additional engine state registers
-:137: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#137: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:149:
+#define XE3P_RC_SLICE_INSTANCE \
+	{ FF_SLICE_CS_CHICKEN1(0), REG_32BIT, 0, 0, 0, "FF_SLICE_CS_CHICKEN1"}, \
+	{ FF_SLICE_CS_CHICKEN2(0), REG_32BIT, 0, 0, 0, "FF_SLICE_CS_CHICKEN2"}

BUT SEE:

   do {} while (0) advice is over-stated in a few situations:

   The more obvious case is macros, like MODULE_PARM_DESC, invoked at
   file-scope, where C disallows code (it must be in functions).  See
   $exceptions if you have one to add by name.

   More troublesome is declarative macros used at top of new scope,
   like DECLARE_PER_CPU.  These might just compile with a do-while-0
   wrapper, but would be incorrect.  Most of these are handled by
   detecting struct,union,etc declaration primitives in $exceptions.

   Theres also macros called inside an if (block), which "return" an
   expression.  These cannot do-while, and need a ({}) wrapper.

   Enjoy this qualification while we work to improve our heuristics.

-:141: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#141: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:153:
+#define XE_BCS_RCS_ENGINE_INSTANCE \
+	{ RING_EXECLIST_STATUS_LO(0), REG_64BIT_LOW_DW, 0, 0, 0, NULL}, \
+	{ RING_EXECLIST_STATUS_HI(0), REG_64BIT_HI_DW, 0, 0, 0, "RING_EXECLIST_STATUS"}, \
+	{ RING_EXECLIST_SQ_CONTENTS_LO(0), REG_64BIT_LOW_DW, 0, 0, 0, NULL}, \
+	{ RING_EXECLIST_SQ_CONTENTS_HI(0), REG_64BIT_HI_DW, 0, 0, 0, "RING_EXECLIST_SQ_CONTENTS"}, \
+	{ RESET_CTRL(0), REG_32BIT, 0, 0, 0, "RESET_CTRL"}, \
+	{ RING_CSBEFSM3(0), REG_32BIT, 0, 0, 0, "RING_CSBEFSM3"}, \
+	{ RING_CSFESM(0), REG_32BIT, 0, 0, 0, "RING_CSFESM"}, \
+	{ RING_CSFESM2(0), REG_32BIT, 0, 0, 0, "RING_CSFESM2"}, \
+	{ RING_CSFESM3(0), REG_32BIT, 0, 0, 0, "RING_CSFESM3"}, \
+	{ RING_CSPWRFSM(0), REG_32BIT, 0, 0, 0, "RING_CSPWRFSM"}, \
+	{ RING_CSBEFSM(0), REG_32BIT, 0, 0, 0, "RING_CSBEFSM"}, \
+	{ BCS_SWCTRL(0), REG_32BIT, 0, 0, 0, "BCS_SWCTRL"}, \
+	{ RING_CSFE_GLB_CHICKEN3(0), REG_32BIT, 0, 0, 0, "RING_CSFE_GLB_CHICKEN3"}, \
+	{ RING_PSMI_CTL(0), REG_32BIT, 0, 0, 0, "RING_PSMI_CTL"}, \
+	{ RING_INSTPS(0), REG_32BIT, 0, 0, 0, "RING_INSTPS"}, \
+	{ RING_BB_ADDR_DIFF(0), REG_32BIT, 0, 0, 0, "RING_BB_ADDR_DIFF"}, \
+	{ RING_BB_STATE(0), REG_32BIT, 0, 0, 0, "RING_BB_STATE"}, \
+	{ CS_DEBUG_MODE1(0), REG_32BIT, 0, 0, 0, "CS_DEBUG_MODE1"}, \
+	{ CS_CHICKEN1(0), REG_32BIT, 0, 0, 0, "CS_CHICKEN1"}, \
+	{ CS_PREEMPTION_STATUS(0), REG_32BIT, 0, 0, 0, "CS_PREEMPTION_STATUS"}

BUT SEE:

   do {} while (0) advice is over-stated in a few situations:

   The more obvious case is macros, like MODULE_PARM_DESC, invoked at
   file-scope, where C disallows code (it must be in functions).  See
   $exceptions if you have one to add by name.

   More troublesome is declarative macros used at top of new scope,
   like DECLARE_PER_CPU.  These might just compile with a do-while-0
   wrapper, but would be incorrect.  Most of these are handled by
   detecting struct,union,etc declaration primitives in $exceptions.

   Theres also macros called inside an if (block), which "return" an
   expression.  These cannot do-while, and need a ({}) wrapper.

   Enjoy this qualification while we work to improve our heuristics.

total: 2 errors, 0 warnings, 0 checks, 135 lines checked

✓ CI.KUnit: success for drm/xe: Capture additional HW register state in devcoredump (rev4)

[Patchwork]

== Series Details ==

Series: drm/xe: Capture additional HW register state in devcoredump (rev4)
URL   : https://patchwork.freedesktop.org/series/172150/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[18:56:52] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:56:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:57:17] Starting KUnit Kernel (1/1)...
[18:57:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:57:17] ================= gpu_buddy (14 subtests) ==================
[18:57:17] [PASSED] gpu_test_buddy_alloc_limit
[18:57:17] [PASSED] gpu_test_buddy_alloc_optimistic
[18:57:17] [PASSED] gpu_test_buddy_alloc_pessimistic
[18:57:17] [PASSED] gpu_test_buddy_alloc_pathological
[18:57:17] [PASSED] gpu_test_buddy_alloc_contiguous
[18:57:17] [PASSED] gpu_test_buddy_alloc_clear
[18:57:17] [PASSED] gpu_test_buddy_alloc_range
[18:57:18] [PASSED] gpu_test_buddy_alloc_range_bias
[18:57:18] [PASSED] gpu_test_buddy_fragmentation_performance
[18:57:19] [PASSED] gpu_test_buddy_dirty_tracker_performance
[18:57:19] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[18:57:19] [PASSED] gpu_test_buddy_offset_aligned_allocation
[18:57:19] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[18:57:19] [PASSED] gpu_test_buddy_addr_to_block
[18:57:19] ==================== [PASSED] gpu_buddy ====================
[18:57:19] ============================================================
[18:57:19] Testing complete. Ran 14 tests: passed: 14
[18:57:19] Elapsed time: 26.961s total, 4.444s configuring, 20.550s building, 1.909s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:57:19] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:57:21] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:57:55] Starting KUnit Kernel (1/1)...
[18:57:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:57:55] ================== guc_buf (11 subtests) ===================
[18:57:55] [PASSED] test_smallest
[18:57:55] [PASSED] test_largest
[18:57:55] [PASSED] test_granular
[18:57:55] [PASSED] test_unique
[18:57:55] [PASSED] test_overlap
[18:57:55] [PASSED] test_reusable
[18:57:55] [PASSED] test_too_big
[18:57:55] [PASSED] test_flush
[18:57:55] [PASSED] test_lookup
[18:57:55] [PASSED] test_data
[18:57:55] [PASSED] test_class
[18:57:55] ===================== [PASSED] guc_buf =====================
[18:57:55] =================== guc_dbm (7 subtests) ===================
[18:57:55] [PASSED] test_empty
[18:57:55] [PASSED] test_default
[18:57:55] ======================== test_size  ========================
[18:57:55] [PASSED] 4
[18:57:55] [PASSED] 8
[18:57:55] [PASSED] 32
[18:57:55] [PASSED] 256
[18:57:55] ==================== [PASSED] test_size ====================
[18:57:55] ======================= test_reuse  ========================
[18:57:55] [PASSED] 4
[18:57:55] [PASSED] 8
[18:57:55] [PASSED] 32
[18:57:55] [PASSED] 256
[18:57:55] =================== [PASSED] test_reuse ====================
[18:57:55] =================== test_range_overlap  ====================
[18:57:55] [PASSED] 4
[18:57:55] [PASSED] 8
[18:57:55] [PASSED] 32
[18:57:55] [PASSED] 256
[18:57:55] =============== [PASSED] test_range_overlap ================
[18:57:55] =================== test_range_compact  ====================
[18:57:55] [PASSED] 4
[18:57:55] [PASSED] 8
[18:57:55] [PASSED] 32
[18:57:55] [PASSED] 256
[18:57:55] =============== [PASSED] test_range_compact ================
[18:57:55] ==================== test_range_spare  =====================
[18:57:55] [PASSED] 4
[18:57:55] [PASSED] 8
[18:57:55] [PASSED] 32
[18:57:55] [PASSED] 256
[18:57:55] ================ [PASSED] test_range_spare =================
[18:57:55] ===================== [PASSED] guc_dbm =====================
[18:57:55] =================== guc_idm (6 subtests) ===================
[18:57:55] [PASSED] bad_init
[18:57:55] [PASSED] no_init
[18:57:55] [PASSED] init_fini
[18:57:55] [PASSED] check_used
[18:57:55] [PASSED] check_quota
[18:57:55] [PASSED] check_all
[18:57:55] ===================== [PASSED] guc_idm =====================
[18:57:55] ============== guc_klv_helpers (13 subtests) ===============
[18:57:55] [PASSED] test_count
[18:57:55] [PASSED] test_encode_u32
[18:57:55] [PASSED] test_encode_u64
[18:57:55] [PASSED] test_encode_string
[18:57:55] [PASSED] test_encode_object_raw
[18:57:55] [PASSED] test_encode_object_klv
[18:57:55] [PASSED] test_encode_object_nested
[18:57:55] [PASSED] test_encode_object_basic
[18:57:55] ===================== test_decode_u16  =====================
[18:57:55] [PASSED] empty
[18:57:55] [PASSED] valid
[18:57:55] [PASSED] max
[18:57:55] [PASSED] big
[18:57:55] [PASSED] long
[18:57:55] ================= [PASSED] test_decode_u16 =================
[18:57:55] ===================== test_decode_u32  =====================
[18:57:55] [PASSED] empty
[18:57:55] [PASSED] valid
[18:57:55] [PASSED] max
[18:57:55] [PASSED] long
[18:57:55] ================= [PASSED] test_decode_u32 =================
[18:57:55] ===================== test_decode_u64  =====================
[18:57:55] [PASSED] empty
[18:57:55] [PASSED] short
[18:57:55] [PASSED] valid
[18:57:55] [PASSED] max
[18:57:55] [PASSED] long
[18:57:55] ================= [PASSED] test_decode_u64 =================
[18:57:55] ===================== test_decode_str  =====================
[18:57:55] [PASSED] empty
[18:57:55] [PASSED] one
[18:57:55] [PASSED] one_trash
[18:57:55] [PASSED] two
[18:57:55] [PASSED] two_trash
[18:57:55] [PASSED] three
[18:57:55] [PASSED] dword
[18:57:55] [PASSED] four
[18:57:55] [PASSED] five
[18:57:55] [PASSED] six
[18:57:55] [PASSED] seven
[18:57:55] [PASSED] qword
[18:57:55] ================= [PASSED] test_decode_str =================
[18:57:55] [PASSED] test_print
[18:57:55] ================= [PASSED] guc_klv_helpers =================
[18:57:55] =================== xe_log (4 subtests) ====================
[18:57:55] [PASSED] demo_cper
[18:57:55] [PASSED] demo_dmesg
[18:57:55] ======================= test_dmesg  ========================
[18:57:55] [PASSED] test_fatal
[18:57:55] [PASSED] test_fatal_tile
[18:57:55] [PASSED] test_fatal_gt
[18:57:55] [PASSED] test_fatal_comp
[18:57:55] [PASSED] test_fatal_comp_tile
[18:57:55] [PASSED] test_fatal_comp_gt
[18:57:55] [PASSED] test_fatal_all
[18:57:55] [PASSED] test_recoverable
[18:57:55] [PASSED] test_recoverable_tile
[18:57:55] [PASSED] test_recoverable_gt
[18:57:55] [PASSED] test_recoverable_comp
[18:57:55] [PASSED] test_recoverable_comp_tile
[18:57:55] [PASSED] test_recoverable_comp_gt
[18:57:55] [PASSED] test_recoverable_all
[18:57:55] [PASSED] test_info
[18:57:55] [PASSED] test_info_tile
[18:57:55] [PASSED] test_info_gt
[18:57:55] [PASSED] test_info_err
[18:57:55] [PASSED] test_info_comp
[18:57:55] [PASSED] test_info_comp_tile
[18:57:55] [PASSED] test_info_comp_gt
[18:57:55] [PASSED] test_info_all
[18:57:55] [PASSED] test_hw_fatal
[18:57:55] [PASSED] test_hw_recoverable
[18:57:55] [PASSED] test_hw_corrected
[18:57:55] [PASSED] test_hw_informational
[18:57:55] =================== [PASSED] test_dmesg ====================
[18:57:55] ====================== test_invalid  =======================
[18:57:55] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[18:57:55] ================== [SKIPPED] test_invalid ==================
[18:57:55] ===================== [PASSED] xe_log ======================
[18:57:55] ================== no_relay (3 subtests) ===================
[18:57:55] [PASSED] xe_drops_guc2pf_if_not_ready
[18:57:55] [PASSED] xe_drops_guc2vf_if_not_ready
[18:57:55] [PASSED] xe_rejects_send_if_not_ready
[18:57:55] ==================== [PASSED] no_relay =====================
[18:57:55] ================== pf_relay (14 subtests) ==================
[18:57:55] [PASSED] pf_rejects_guc2pf_too_short
[18:57:55] [PASSED] pf_rejects_guc2pf_too_long
[18:57:55] [PASSED] pf_rejects_guc2pf_no_payload
[18:57:55] [PASSED] pf_fails_no_payload
[18:57:55] [PASSED] pf_fails_bad_origin
[18:57:55] [PASSED] pf_fails_bad_type
[18:57:55] [PASSED] pf_txn_reports_error
[18:57:55] [PASSED] pf_txn_sends_pf2guc
[18:57:55] [PASSED] pf_sends_pf2guc
[18:57:55] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:57:55] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:57:55] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:57:55] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:57:55] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:57:55] ==================== [PASSED] pf_relay =====================
[18:57:55] ================== vf_relay (3 subtests) ===================
[18:57:55] [PASSED] vf_rejects_guc2vf_too_short
[18:57:55] [PASSED] vf_rejects_guc2vf_too_long
[18:57:55] [PASSED] vf_rejects_guc2vf_no_payload
[18:57:55] ==================== [PASSED] vf_relay =====================
[18:57:55] ================ pf_gt_config (9 subtests) =================
[18:57:55] [PASSED] fair_contexts_1vf
[18:57:55] [PASSED] fair_doorbells_1vf
[18:57:55] [PASSED] fair_ggtt_1vf
[18:57:55] ====================== fair_vram_1vf  ======================
[18:57:55] [PASSED] 3.50 GiB
[18:57:55] [PASSED] 11.5 GiB
[18:57:55] [PASSED] 15.5 GiB
[18:57:55] [PASSED] 31.5 GiB
[18:57:55] [PASSED] 63.5 GiB
[18:57:55] [PASSED] 1.91 GiB
[18:57:55] ================== [PASSED] fair_vram_1vf ==================
[18:57:55] ================ fair_vram_1vf_admin_only  =================
[18:57:55] [PASSED] 3.50 GiB
[18:57:55] [PASSED] 11.5 GiB
[18:57:55] [PASSED] 15.5 GiB
[18:57:55] [PASSED] 31.5 GiB
[18:57:55] [PASSED] 63.5 GiB
[18:57:55] [PASSED] 1.91 GiB
[18:57:55] ============ [PASSED] fair_vram_1vf_admin_only =============
[18:57:55] ====================== fair_contexts  ======================
[18:57:55] [PASSED] 1 VF
[18:57:55] [PASSED] 2 VFs
[18:57:55] [PASSED] 3 VFs
[18:57:55] [PASSED] 4 VFs
[18:57:55] [PASSED] 5 VFs
[18:57:55] [PASSED] 6 VFs
[18:57:55] [PASSED] 7 VFs
[18:57:55] [PASSED] 8 VFs
[18:57:55] [PASSED] 9 VFs
[18:57:55] [PASSED] 10 VFs
[18:57:55] [PASSED] 11 VFs
[18:57:55] [PASSED] 12 VFs
[18:57:55] [PASSED] 13 VFs
[18:57:55] [PASSED] 14 VFs
[18:57:55] [PASSED] 15 VFs
[18:57:55] [PASSED] 16 VFs
[18:57:55] [PASSED] 17 VFs
[18:57:55] [PASSED] 18 VFs
[18:57:55] [PASSED] 19 VFs
[18:57:55] [PASSED] 20 VFs
[18:57:55] [PASSED] 21 VFs
[18:57:55] [PASSED] 22 VFs
[18:57:55] [PASSED] 23 VFs
[18:57:55] [PASSED] 24 VFs
[18:57:55] [PASSED] 25 VFs
[18:57:55] [PASSED] 26 VFs
[18:57:55] [PASSED] 27 VFs
[18:57:55] [PASSED] 28 VFs
[18:57:55] [PASSED] 29 VFs
[18:57:55] [PASSED] 30 VFs
[18:57:55] [PASSED] 31 VFs
[18:57:55] [PASSED] 32 VFs
[18:57:55] [PASSED] 33 VFs
[18:57:55] [PASSED] 34 VFs
[18:57:55] [PASSED] 35 VFs
[18:57:55] [PASSED] 36 VFs
[18:57:55] [PASSED] 37 VFs
[18:57:55] [PASSED] 38 VFs
[18:57:55] [PASSED] 39 VFs
[18:57:55] [PASSED] 40 VFs
[18:57:55] [PASSED] 41 VFs
[18:57:55] [PASSED] 42 VFs
[18:57:55] [PASSED] 43 VFs
[18:57:55] [PASSED] 44 VFs
[18:57:55] [PASSED] 45 VFs
[18:57:55] [PASSED] 46 VFs
[18:57:55] [PASSED] 47 VFs
[18:57:55] [PASSED] 48 VFs
[18:57:55] [PASSED] 49 VFs
[18:57:55] [PASSED] 50 VFs
[18:57:55] [PASSED] 51 VFs
[18:57:55] [PASSED] 52 VFs
[18:57:55] [PASSED] 53 VFs
[18:57:55] [PASSED] 54 VFs
[18:57:55] [PASSED] 55 VFs
[18:57:55] [PASSED] 56 VFs
[18:57:55] [PASSED] 57 VFs
[18:57:55] [PASSED] 58 VFs
[18:57:55] [PASSED] 59 VFs
[18:57:55] [PASSED] 60 VFs
[18:57:55] [PASSED] 61 VFs
[18:57:55] [PASSED] 62 VFs
[18:57:55] [PASSED] 63 VFs
[18:57:55] ================== [PASSED] fair_contexts ==================
[18:57:55] ===================== fair_doorbells  ======================
[18:57:55] [PASSED] 1 VF
[18:57:55] [PASSED] 2 VFs
[18:57:55] [PASSED] 3 VFs
[18:57:55] [PASSED] 4 VFs
[18:57:55] [PASSED] 5 VFs
[18:57:55] [PASSED] 6 VFs
[18:57:55] [PASSED] 7 VFs
[18:57:55] [PASSED] 8 VFs
[18:57:55] [PASSED] 9 VFs
[18:57:55] [PASSED] 10 VFs
[18:57:55] [PASSED] 11 VFs
[18:57:55] [PASSED] 12 VFs
[18:57:55] [PASSED] 13 VFs
[18:57:55] [PASSED] 14 VFs
[18:57:55] [PASSED] 15 VFs
[18:57:55] [PASSED] 16 VFs
[18:57:55] [PASSED] 17 VFs
[18:57:55] [PASSED] 18 VFs
[18:57:55] [PASSED] 19 VFs
[18:57:55] [PASSED] 20 VFs
[18:57:55] [PASSED] 21 VFs
[18:57:55] [PASSED] 22 VFs
[18:57:55] [PASSED] 23 VFs
[18:57:55] [PASSED] 24 VFs
[18:57:55] [PASSED] 25 VFs
[18:57:55] [PASSED] 26 VFs
[18:57:55] [PASSED] 27 VFs
[18:57:55] [PASSED] 28 VFs
[18:57:55] [PASSED] 29 VFs
[18:57:55] [PASSED] 30 VFs
[18:57:55] [PASSED] 31 VFs
[18:57:55] [PASSED] 32 VFs
[18:57:55] [PASSED] 33 VFs
[18:57:55] [PASSED] 34 VFs
[18:57:55] [PASSED] 35 VFs
[18:57:55] [PASSED] 36 VFs
[18:57:55] [PASSED] 37 VFs
[18:57:55] [PASSED] 38 VFs
[18:57:55] [PASSED] 39 VFs
[18:57:55] [PASSED] 40 VFs
[18:57:55] [PASSED] 41 VFs
[18:57:55] [PASSED] 42 VFs
[18:57:55] [PASSED] 43 VFs
[18:57:55] [PASSED] 44 VFs
[18:57:55] [PASSED] 45 VFs
[18:57:55] [PASSED] 46 VFs
[18:57:55] [PASSED] 47 VFs
[18:57:55] [PASSED] 48 VFs
[18:57:55] [PASSED] 49 VFs
[18:57:55] [PASSED] 50 VFs
[18:57:55] [PASSED] 51 VFs
[18:57:55] [PASSED] 52 VFs
[18:57:55] [PASSED] 53 VFs
[18:57:55] [PASSED] 54 VFs
[18:57:55] [PASSED] 55 VFs
[18:57:55] [PASSED] 56 VFs
[18:57:55] [PASSED] 57 VFs
[18:57:55] [PASSED] 58 VFs
[18:57:55] [PASSED] 59 VFs
[18:57:55] [PASSED] 60 VFs
[18:57:55] [PASSED] 61 VFs
[18:57:55] [PASSED] 62 VFs
[18:57:55] [PASSED] 63 VFs
[18:57:55] ================= [PASSED] fair_doorbells ==================
[18:57:55] ======================== fair_ggtt  ========================
[18:57:55] [PASSED] 1 VF
[18:57:55] [PASSED] 2 VFs
[18:57:55] [PASSED] 3 VFs
[18:57:55] [PASSED] 4 VFs
[18:57:55] [PASSED] 5 VFs
[18:57:55] [PASSED] 6 VFs
[18:57:55] [PASSED] 7 VFs
[18:57:55] [PASSED] 8 VFs
[18:57:55] [PASSED] 9 VFs
[18:57:55] [PASSED] 10 VFs
[18:57:55] [PASSED] 11 VFs
[18:57:55] [PASSED] 12 VFs
[18:57:55] [PASSED] 13 VFs
[18:57:55] [PASSED] 14 VFs
[18:57:55] [PASSED] 15 VFs
[18:57:55] [PASSED] 16 VFs
[18:57:55] [PASSED] 17 VFs
[18:57:55] [PASSED] 18 VFs
[18:57:55] [PASSED] 19 VFs
[18:57:55] [PASSED] 20 VFs
[18:57:55] [PASSED] 21 VFs
[18:57:55] [PASSED] 22 VFs
[18:57:55] [PASSED] 23 VFs
[18:57:55] [PASSED] 24 VFs
[18:57:55] [PASSED] 25 VFs
[18:57:55] [PASSED] 26 VFs
[18:57:55] [PASSED] 27 VFs
[18:57:55] [PASSED] 28 VFs
[18:57:55] [PASSED] 29 VFs
[18:57:55] [PASSED] 30 VFs
[18:57:55] [PASSED] 31 VFs
[18:57:55] [PASSED] 32 VFs
[18:57:55] [PASSED] 33 VFs
[18:57:55] [PASSED] 34 VFs
[18:57:55] [PASSED] 35 VFs
[18:57:55] [PASSED] 36 VFs
[18:57:55] [PASSED] 37 VFs
[18:57:55] [PASSED] 38 VFs
[18:57:55] [PASSED] 39 VFs
[18:57:55] [PASSED] 40 VFs
[18:57:55] [PASSED] 41 VFs
[18:57:55] [PASSED] 42 VFs
[18:57:55] [PASSED] 43 VFs
[18:57:55] [PASSED] 44 VFs
[18:57:55] [PASSED] 45 VFs
[18:57:55] [PASSED] 46 VFs
[18:57:55] [PASSED] 47 VFs
[18:57:55] [PASSED] 48 VFs
[18:57:55] [PASSED] 49 VFs
[18:57:55] [PASSED] 50 VFs
[18:57:55] [PASSED] 51 VFs
[18:57:55] [PASSED] 52 VFs
[18:57:55] [PASSED] 53 VFs
[18:57:55] [PASSED] 54 VFs
[18:57:55] [PASSED] 55 VFs
[18:57:55] [PASSED] 56 VFs
[18:57:55] [PASSED] 57 VFs
[18:57:55] [PASSED] 58 VFs
[18:57:55] [PASSED] 59 VFs
[18:57:55] [PASSED] 60 VFs
[18:57:55] [PASSED] 61 VFs
[18:57:55] [PASSED] 62 VFs
[18:57:55] [PASSED] 63 VFs
[18:57:55] ==================== [PASSED] fair_ggtt ====================
[18:57:55] ======================== fair_vram  ========================
[18:57:55] [PASSED] 1 VF
[18:57:55] [PASSED] 2 VFs
[18:57:55] [PASSED] 3 VFs
[18:57:55] [PASSED] 4 VFs
[18:57:55] [PASSED] 5 VFs
[18:57:55] [PASSED] 6 VFs
[18:57:55] [PASSED] 7 VFs
[18:57:55] [PASSED] 8 VFs
[18:57:55] [PASSED] 9 VFs
[18:57:55] [PASSED] 10 VFs
[18:57:55] [PASSED] 11 VFs
[18:57:55] [PASSED] 12 VFs
[18:57:55] [PASSED] 13 VFs
[18:57:55] [PASSED] 14 VFs
[18:57:55] [PASSED] 15 VFs
[18:57:55] [PASSED] 16 VFs
[18:57:55] [PASSED] 17 VFs
[18:57:55] [PASSED] 18 VFs
[18:57:55] [PASSED] 19 VFs
[18:57:55] [PASSED] 20 VFs
[18:57:55] [PASSED] 21 VFs
[18:57:55] [PASSED] 22 VFs
[18:57:55] [PASSED] 23 VFs
[18:57:55] [PASSED] 24 VFs
[18:57:55] [PASSED] 25 VFs
[18:57:55] [PASSED] 26 VFs
[18:57:55] [PASSED] 27 VFs
[18:57:55] [PASSED] 28 VFs
[18:57:55] [PASSED] 29 VFs
[18:57:55] [PASSED] 30 VFs
[18:57:55] [PASSED] 31 VFs
[18:57:55] [PASSED] 32 VFs
[18:57:55] [PASSED] 33 VFs
[18:57:55] [PASSED] 34 VFs
[18:57:55] [PASSED] 35 VFs
[18:57:55] [PASSED] 36 VFs
[18:57:55] [PASSED] 37 VFs
[18:57:55] [PASSED] 38 VFs
[18:57:55] [PASSED] 39 VFs
[18:57:55] [PASSED] 40 VFs
[18:57:55] [PASSED] 41 VFs
[18:57:56] [PASSED] 42 VFs
[18:57:56] [PASSED] 43 VFs
[18:57:56] [PASSED] 44 VFs
[18:57:56] [PASSED] 45 VFs
[18:57:56] [PASSED] 46 VFs
[18:57:56] [PASSED] 47 VFs
[18:57:56] [PASSED] 48 VFs
[18:57:56] [PASSED] 49 VFs
[18:57:56] [PASSED] 50 VFs
[18:57:56] [PASSED] 51 VFs
[18:57:56] [PASSED] 52 VFs
[18:57:56] [PASSED] 53 VFs
[18:57:56] [PASSED] 54 VFs
[18:57:56] [PASSED] 55 VFs
[18:57:56] [PASSED] 56 VFs
[18:57:56] [PASSED] 57 VFs
[18:57:56] [PASSED] 58 VFs
[18:57:56] [PASSED] 59 VFs
[18:57:56] [PASSED] 60 VFs
[18:57:56] [PASSED] 61 VFs
[18:57:56] [PASSED] 62 VFs
[18:57:56] [PASSED] 63 VFs
[18:57:56] ==================== [PASSED] fair_vram ====================
[18:57:56] ================== [PASSED] pf_gt_config ===================
[18:57:56] ===================== lmtt (1 subtest) =====================
[18:57:56] ======================== test_ops  =========================
[18:57:56] [PASSED] 2-level
[18:57:56] [PASSED] multi-level
[18:57:56] ==================== [PASSED] test_ops =====================
[18:57:56] ====================== [PASSED] lmtt =======================
[18:57:56] ================= sriov_packet (1 subtest) =================
[18:57:56] [PASSED] test_descriptor_init
[18:57:56] ================== [PASSED] sriov_packet ===================
[18:57:56] ================= pf_service (11 subtests) =================
[18:57:56] [PASSED] pf_negotiate_any
[18:57:56] [PASSED] pf_negotiate_base_match
[18:57:56] [PASSED] pf_negotiate_base_newer
[18:57:56] [PASSED] pf_negotiate_base_next
[18:57:56] [SKIPPED] pf_negotiate_base_older (no older minor)
[18:57:56] [PASSED] pf_negotiate_base_prev
[18:57:56] [PASSED] pf_negotiate_latest_match
[18:57:56] [PASSED] pf_negotiate_latest_newer
[18:57:56] [PASSED] pf_negotiate_latest_next
[18:57:56] [SKIPPED] pf_negotiate_latest_older (no older minor)
[18:57:56] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[18:57:56] =================== [PASSED] pf_service ====================
[18:57:56] ================= xe_guc_g2g (2 subtests) ==================
[18:57:56] ============== xe_live_guc_g2g_kunit_default  ==============
[18:57:56] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:57:56] ============== xe_live_guc_g2g_kunit_allmem  ===============
[18:57:56] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:57:56] =================== [SKIPPED] xe_guc_g2g ===================
[18:57:56] =================== xe_mocs (2 subtests) ===================
[18:57:56] ================ xe_live_mocs_kernel_kunit  ================
[18:57:56] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:57:56] ================ xe_live_mocs_reset_kunit  =================
[18:57:56] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:57:56] ==================== [SKIPPED] xe_mocs =====================
[18:57:56] ================= xe_migrate (2 subtests) ==================
[18:57:56] ================= xe_migrate_sanity_kunit  =================
[18:57:56] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:57:56] ================== xe_validate_ccs_kunit  ==================
[18:57:56] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:57:56] =================== [SKIPPED] xe_migrate ===================
[18:57:56] ================== xe_dma_buf (1 subtest) ==================
[18:57:56] ==================== xe_dma_buf_kunit  =====================
[18:57:56] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:57:56] =================== [SKIPPED] xe_dma_buf ===================
[18:57:56] ================= xe_bo_shrink (1 subtest) =================
[18:57:56] =================== xe_bo_shrink_kunit  ====================
[18:57:56] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:57:56] ================== [SKIPPED] xe_bo_shrink ==================
[18:57:56] ==================== xe_bo (2 subtests) ====================
[18:57:56] ================== xe_ccs_migrate_kunit  ===================
[18:57:56] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:57:56] ==================== xe_bo_evict_kunit  ====================
[18:57:56] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:57:56] ===================== [SKIPPED] xe_bo ======================
[18:57:56] =================== xe_any (9 subtests) ====================
[18:57:56] [PASSED] test_to_xe
[18:57:56] [PASSED] test_to_dev
[18:57:56] [PASSED] test_to_pdev
[18:57:56] [PASSED] test_to_drm
[18:57:56] [PASSED] test_if_pdev
[18:57:56] [PASSED] test_if_xe
[18:57:56] [PASSED] test_if_tile
[18:57:56] [PASSED] test_if_gt
[18:57:56] [PASSED] test_to_id
[18:57:56] ===================== [PASSED] xe_any ======================
[18:57:56] ==================== args (13 subtests) ====================
[18:57:56] [PASSED] count_args_test
[18:57:56] [PASSED] call_args_example
[18:57:56] [PASSED] call_args_test
[18:57:56] [PASSED] drop_first_arg_example
[18:57:56] [PASSED] drop_first_arg_test
[18:57:56] [PASSED] first_arg_example
[18:57:56] [PASSED] first_arg_test
[18:57:56] [PASSED] last_arg_example
[18:57:56] [PASSED] last_arg_test
[18:57:56] [PASSED] pick_arg_example
[18:57:56] [PASSED] if_args_example
[18:57:56] [PASSED] if_args_test
[18:57:56] [PASSED] sep_comma_example
[18:57:56] ====================== [PASSED] args =======================
[18:57:56] =================== xe_pci (3 subtests) ====================
[18:57:56] ==================== check_graphics_ip  ====================
[18:57:56] [PASSED] 12.00 Xe_LP
[18:57:56] [PASSED] 12.10 Xe_LP+
[18:57:56] [PASSED] 12.55 Xe_HPG
[18:57:56] [PASSED] 12.60 Xe_HPC
[18:57:56] [PASSED] 12.70 Xe_LPG
[18:57:56] [PASSED] 12.71 Xe_LPG
[18:57:56] [PASSED] 12.74 Xe_LPG+
[18:57:56] [PASSED] 20.01 Xe2_HPG
[18:57:56] [PASSED] 20.02 Xe2_HPG
[18:57:56] [PASSED] 20.04 Xe2_LPG
[18:57:56] [PASSED] 30.00 Xe3_LPG
[18:57:56] [PASSED] 30.01 Xe3_LPG
[18:57:56] [PASSED] 30.03 Xe3_LPG
[18:57:56] [PASSED] 30.04 Xe3_LPG
[18:57:56] [PASSED] 30.05 Xe3_LPG
[18:57:56] [PASSED] 35.10 Xe3p_LPG
[18:57:56] [PASSED] 35.11 Xe3p_XPC
[18:57:56] ================ [PASSED] check_graphics_ip ================
[18:57:56] ===================== check_media_ip  ======================
[18:57:56] [PASSED] 12.00 Xe_M
[18:57:56] [PASSED] 12.55 Xe_HPM
[18:57:56] [PASSED] 13.00 Xe_LPM+
[18:57:56] [PASSED] 13.01 Xe2_HPM
[18:57:56] [PASSED] 20.00 Xe2_LPM
[18:57:56] [PASSED] 30.00 Xe3_LPM
[18:57:56] [PASSED] 30.02 Xe3_LPM
[18:57:56] [PASSED] 35.00 Xe3p_LPM
[18:57:56] [PASSED] 35.03 Xe3p_HPM
[18:57:56] ================= [PASSED] check_media_ip ==================
[18:57:56] =================== check_platform_desc  ===================
[18:57:56] [PASSED] 0x9A60 (TIGERLAKE)
[18:57:56] [PASSED] 0x9A68 (TIGERLAKE)
[18:57:56] [PASSED] 0x9A70 (TIGERLAKE)
[18:57:56] [PASSED] 0x9A40 (TIGERLAKE)
[18:57:56] [PASSED] 0x9A49 (TIGERLAKE)
[18:57:56] [PASSED] 0x9A59 (TIGERLAKE)
[18:57:56] [PASSED] 0x9A78 (TIGERLAKE)
[18:57:56] [PASSED] 0x9AC0 (TIGERLAKE)
[18:57:56] [PASSED] 0x9AC9 (TIGERLAKE)
[18:57:56] [PASSED] 0x9AD9 (TIGERLAKE)
[18:57:56] [PASSED] 0x9AF8 (TIGERLAKE)
[18:57:56] [PASSED] 0x4C80 (ROCKETLAKE)
[18:57:56] [PASSED] 0x4C8A (ROCKETLAKE)
[18:57:56] [PASSED] 0x4C8B (ROCKETLAKE)
[18:57:56] [PASSED] 0x4C8C (ROCKETLAKE)
[18:57:56] [PASSED] 0x4C90 (ROCKETLAKE)
[18:57:56] [PASSED] 0x4C9A (ROCKETLAKE)
[18:57:56] [PASSED] 0x4680 (ALDERLAKE_S)
[18:57:56] [PASSED] 0x4682 (ALDERLAKE_S)
[18:57:56] [PASSED] 0x4688 (ALDERLAKE_S)
[18:57:56] [PASSED] 0x468A (ALDERLAKE_S)
[18:57:56] [PASSED] 0x468B (ALDERLAKE_S)
[18:57:56] [PASSED] 0x4690 (ALDERLAKE_S)
[18:57:56] [PASSED] 0x4692 (ALDERLAKE_S)
[18:57:56] [PASSED] 0x4693 (ALDERLAKE_S)
[18:57:56] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46AA (ALDERLAKE_P)
[18:57:56] [PASSED] 0x462A (ALDERLAKE_P)
[18:57:56] [PASSED] 0x4626 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x4628 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:57:56] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:57:56] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:57:56] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:57:56] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:57:56] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:57:56] [PASSED] 0xA721 (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA720 (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:57:56] [PASSED] 0xA780 (ALDERLAKE_S)
[18:57:56] [PASSED] 0xA781 (ALDERLAKE_S)
[18:57:56] [PASSED] 0xA782 (ALDERLAKE_S)
[18:57:56] [PASSED] 0xA783 (ALDERLAKE_S)
[18:57:56] [PASSED] 0xA788 (ALDERLAKE_S)
[18:57:56] [PASSED] 0xA789 (ALDERLAKE_S)
[18:57:56] [PASSED] 0xA78A (ALDERLAKE_S)
[18:57:56] [PASSED] 0xA78B (ALDERLAKE_S)
[18:57:56] [PASSED] 0x4905 (DG1)
[18:57:56] [PASSED] 0x4906 (DG1)
[18:57:56] [PASSED] 0x4907 (DG1)
[18:57:56] [PASSED] 0x4908 (DG1)
[18:57:56] [PASSED] 0x4909 (DG1)
[18:57:56] [PASSED] 0x56C0 (DG2)
[18:57:56] [PASSED] 0x56C2 (DG2)
[18:57:56] [PASSED] 0x56C1 (DG2)
[18:57:56] [PASSED] 0x7D51 (METEORLAKE)
[18:57:56] [PASSED] 0x7DD1 (METEORLAKE)
[18:57:56] [PASSED] 0x7D41 (METEORLAKE)
[18:57:56] [PASSED] 0x7D67 (METEORLAKE)
[18:57:56] [PASSED] 0xB640 (METEORLAKE)
[18:57:56] [PASSED] 0x56A0 (DG2)
[18:57:56] [PASSED] 0x56A1 (DG2)
[18:57:56] [PASSED] 0x56A2 (DG2)
[18:57:56] [PASSED] 0x56BE (DG2)
[18:57:56] [PASSED] 0x56BF (DG2)
[18:57:56] [PASSED] 0x5690 (DG2)
[18:57:56] [PASSED] 0x5691 (DG2)
[18:57:56] [PASSED] 0x5692 (DG2)
[18:57:56] [PASSED] 0x56A5 (DG2)
[18:57:56] [PASSED] 0x56A6 (DG2)
[18:57:56] [PASSED] 0x56B0 (DG2)
[18:57:56] [PASSED] 0x56B1 (DG2)
[18:57:56] [PASSED] 0x56BA (DG2)
[18:57:56] [PASSED] 0x56BB (DG2)
[18:57:56] [PASSED] 0x56BC (DG2)
[18:57:56] [PASSED] 0x56BD (DG2)
[18:57:56] [PASSED] 0x5693 (DG2)
[18:57:56] [PASSED] 0x5694 (DG2)
[18:57:56] [PASSED] 0x5695 (DG2)
[18:57:56] [PASSED] 0x56A3 (DG2)
[18:57:56] [PASSED] 0x56A4 (DG2)
[18:57:56] [PASSED] 0x56B2 (DG2)
[18:57:56] [PASSED] 0x56B3 (DG2)
[18:57:56] [PASSED] 0x5696 (DG2)
[18:57:56] [PASSED] 0x5697 (DG2)
[18:57:56] [PASSED] 0xB69 (PVC)
[18:57:56] [PASSED] 0xB6E (PVC)
[18:57:56] [PASSED] 0xBD4 (PVC)
[18:57:56] [PASSED] 0xBD5 (PVC)
[18:57:56] [PASSED] 0xBD6 (PVC)
[18:57:56] [PASSED] 0xBD7 (PVC)
[18:57:56] [PASSED] 0xBD8 (PVC)
[18:57:56] [PASSED] 0xBD9 (PVC)
[18:57:56] [PASSED] 0xBDA (PVC)
[18:57:56] [PASSED] 0xBDB (PVC)
[18:57:56] [PASSED] 0xBE0 (PVC)
[18:57:56] [PASSED] 0xBE1 (PVC)
[18:57:56] [PASSED] 0xBE5 (PVC)
[18:57:56] [PASSED] 0x7D40 (METEORLAKE)
[18:57:56] [PASSED] 0x7D45 (METEORLAKE)
[18:57:56] [PASSED] 0x7D55 (METEORLAKE)
[18:57:56] [PASSED] 0x7D60 (METEORLAKE)
[18:57:56] [PASSED] 0x7DD5 (METEORLAKE)
[18:57:56] [PASSED] 0x6420 (LUNARLAKE)
[18:57:56] [PASSED] 0x64A0 (LUNARLAKE)
[18:57:56] [PASSED] 0x64B0 (LUNARLAKE)
[18:57:56] [PASSED] 0xE202 (BATTLEMAGE)
[18:57:56] [PASSED] 0xE209 (BATTLEMAGE)
[18:57:56] [PASSED] 0xE20B (BATTLEMAGE)
[18:57:56] [PASSED] 0xE20C (BATTLEMAGE)
[18:57:56] [PASSED] 0xE20D (BATTLEMAGE)
[18:57:56] [PASSED] 0xE210 (BATTLEMAGE)
[18:57:56] [PASSED] 0xE211 (BATTLEMAGE)
[18:57:56] [PASSED] 0xE212 (BATTLEMAGE)
[18:57:56] [PASSED] 0xE216 (BATTLEMAGE)
[18:57:56] [PASSED] 0xE220 (BATTLEMAGE)
[18:57:56] [PASSED] 0xE221 (BATTLEMAGE)
[18:57:56] [PASSED] 0xE222 (BATTLEMAGE)
[18:57:56] [PASSED] 0xE223 (BATTLEMAGE)
[18:57:56] [PASSED] 0xB080 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB081 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB082 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB083 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB084 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB085 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB086 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB087 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB08F (PANTHERLAKE)
[18:57:56] [PASSED] 0xB090 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB0A1 (PANTHERLAKE)
[18:57:56] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:57:56] [PASSED] 0xFD80 (PANTHERLAKE)
[18:57:56] [PASSED] 0xFD81 (PANTHERLAKE)
[18:57:56] [PASSED] 0xD740 (NOVALAKE_S)
[18:57:56] [PASSED] 0xD741 (NOVALAKE_S)
[18:57:56] [PASSED] 0xD742 (NOVALAKE_S)
[18:57:56] [PASSED] 0xD743 (NOVALAKE_S)
[18:57:56] [PASSED] 0xD745 (NOVALAKE_S)
[18:57:56] [PASSED] 0xD74A (NOVALAKE_S)
[18:57:56] [PASSED] 0xD74B (NOVALAKE_S)
[18:57:56] [PASSED] 0x674C (CRESCENTISLAND)
[18:57:56] [PASSED] 0x674D (CRESCENTISLAND)
[18:57:56] [PASSED] 0x674E (CRESCENTISLAND)
[18:57:56] [PASSED] 0x674F (CRESCENTISLAND)
[18:57:56] [PASSED] 0x6750 (CRESCENTISLAND)
[18:57:56] [PASSED] 0x6751 (CRESCENTISLAND)
[18:57:56] [PASSED] 0xD750 (NOVALAKE_P)
[18:57:56] [PASSED] 0xD751 (NOVALAKE_P)
[18:57:56] [PASSED] 0xD752 (NOVALAKE_P)
[18:57:56] [PASSED] 0xD753 (NOVALAKE_P)
[18:57:56] [PASSED] 0xD754 (NOVALAKE_P)
[18:57:56] [PASSED] 0xD755 (NOVALAKE_P)
[18:57:56] [PASSED] 0xD756 (NOVALAKE_P)
[18:57:56] [PASSED] 0xD757 (NOVALAKE_P)
[18:57:56] [PASSED] 0xD75F (NOVALAKE_P)
[18:57:56] =============== [PASSED] check_platform_desc ===============
[18:57:56] ===================== [PASSED] xe_pci ======================
[18:57:56] ============= xe_rtp_tables_test (5 subtests) ==============
[18:57:56] ================== xe_rtp_table_gt_test  ===================
[18:57:56] [PASSED] gt_was/14011060649
[18:57:56] [PASSED] gt_was/14011059788
[18:57:56] [PASSED] gt_was/14015795083
[18:57:56] [PASSED] gt_was/16021867713
[18:57:56] [PASSED] gt_was/14019449301
[18:57:56] [PASSED] gt_was/16028005424
[18:57:56] [PASSED] gt_was/14026578760
[18:57:56] [PASSED] gt_was/1409420604
[18:57:56] [PASSED] gt_was/1408615072
[18:57:56] [PASSED] gt_was/22010523718
[18:57:56] [PASSED] gt_was/14011006942
[18:57:56] [PASSED] gt_was/14014830051
[18:57:56] [PASSED] gt_was/18018781329
[18:57:56] [PASSED] gt_was/1509235366
[18:57:56] [PASSED] gt_was/18018781329
[18:57:56] [PASSED] gt_was/16016694945
[18:57:56] [PASSED] gt_was/14018575942
[18:57:56] [PASSED] gt_was/22016670082
[18:57:56] [PASSED] gt_was/22016670082
[18:57:56] [PASSED] gt_was/14017421178
[18:57:56] [PASSED] gt_was/16025250150
[18:57:56] [PASSED] gt_was/14021871409
[18:57:56] [PASSED] gt_was/16021865536
[18:57:56] [PASSED] gt_was/14021486841
[18:57:56] [PASSED] gt_was/14025160223
[18:57:56] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[18:57:56] [PASSED] gt_was/14025635424
[18:57:56] [PASSED] gt_was/16028005424
[18:57:56] ============== [PASSED] xe_rtp_table_gt_test ===============
[18:57:56] ================== xe_rtp_table_gt_test  ===================
[18:57:56] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[18:57:56] [PASSED] gt_tunings/Tuning: 32B Access Enable
[18:57:56] [PASSED] gt_tunings/Tuning: L3 cache
[18:57:56] [PASSED] gt_tunings/Tuning: L3 cache - media
[18:57:56] [PASSED] gt_tunings/Tuning: Compression Overfetch
[18:57:56] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[18:57:56] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[18:57:56] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[18:57:56] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[18:57:56] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[18:57:56] [PASSED] gt_tunings/Tuning: Stateless compression control
[18:57:56] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[18:57:56] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[18:57:56] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[18:57:56] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[18:57:56] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[18:57:56] ============== [PASSED] xe_rtp_table_gt_test ===============
[18:57:56] ================== xe_rtp_table_oob_test  ==================
[18:57:56] [PASSED] oob_was/1607983814
[18:57:56] [PASSED] oob_was/16010904313
[18:57:56] [PASSED] oob_was/18022495364
[18:57:56] [PASSED] oob_was/22012773006
[18:57:56] [PASSED] oob_was/14014475959
[18:57:56] [PASSED] oob_was/22011391025
[18:57:56] [PASSED] oob_was/22012727170
[18:57:56] [PASSED] oob_was/22012727685
[18:57:56] [PASSED] oob_was/22016596838
[18:57:56] [PASSED] oob_was/18020744125
[18:57:56] [PASSED] oob_was/1409600907
[18:57:56] [PASSED] oob_was/22014953428
[18:57:56] [PASSED] oob_was/16017236439
[18:57:56] [PASSED] oob_was/14019821291
[18:57:56] [PASSED] oob_was/14015076503
[18:57:56] [PASSED] oob_was/22016122933
[18:57:56] [PASSED] oob_was/14018913170
[18:57:56] [PASSED] oob_was/14018094691
[18:57:56] [PASSED] oob_was/18024947630
[18:57:56] [PASSED] oob_was/16022287689
[18:57:56] [PASSED] oob_was/13011645652
[18:57:56] [PASSED] oob_was/14022293748
[18:57:56] [PASSED] oob_was/22019794406
[18:57:56] [PASSED] oob_was/22019338487
[18:57:56] [PASSED] oob_was/16023588340
[18:57:56] [PASSED] oob_was/14019789679
[18:57:56] [PASSED] oob_was/14022866841
[18:57:56] [PASSED] oob_was/16021333562
[18:57:56] [PASSED] oob_was/14016712196
[18:57:56] [PASSED] oob_was/14015568240
[18:57:56] [PASSED] oob_was/18013179988
[18:57:56] [PASSED] oob_was/1508761755
[18:57:56] [PASSED] oob_was/16023105232
[18:57:56] [PASSED] oob_was/16026508708
[18:57:56] [PASSED] oob_was/14020001231
[18:57:56] [PASSED] oob_was/16023683509
[18:57:56] [PASSED] oob_was/14025515070
[18:57:56] [PASSED] oob_was/15015404425_disable
[18:57:56] [PASSED] oob_was/16026007364
[18:57:56] [PASSED] oob_was/14020316580
[18:57:56] [PASSED] oob_was/14025883347
[18:57:56] [PASSED] oob_was/16029380221
[18:57:56] [PASSED] oob_was/22022079272
[18:57:56] [PASSED] oob_was/16029897822
[18:57:56] [PASSED] oob_was/14027054324
[18:57:56] [PASSED] oob_was/14025941587
[18:57:56] [PASSED] oob_was/16030224309
[18:57:56] ============== [PASSED] xe_rtp_table_oob_test ==============
[18:57:56] ================ xe_rtp_table_dev_oob_test  ================
[18:57:56] [PASSED] device_oob_was/22010954014
[18:57:56] [PASSED] device_oob_was/15015404425
[18:57:56] [PASSED] device_oob_was/22019338487_display
[18:57:56] [PASSED] device_oob_was/14022085890
[18:57:56] [PASSED] device_oob_was/14026539277
[18:57:56] [PASSED] device_oob_was/14026633728
[18:57:56] [PASSED] device_oob_was/14026746987
[18:57:56] [PASSED] device_oob_was/14026779378
[18:57:56] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[18:57:56] ========== xe_rtp_table_missing_upper_bound_test  ==========
[18:57:56] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[18:57:56] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[18:57:56] [PASSED] register_whitelist/1806527549
[18:57:56] [PASSED] register_whitelist/allow_read_ctx_timestamp
[18:57:56] [PASSED] register_whitelist/allow_read_queue_timestamp
[18:57:56] [PASSED] register_whitelist/16014440446
[18:57:56] [PASSED] register_whitelist/16017236439
[18:57:56] [PASSED] register_whitelist/16020183090
[18:57:56] [PASSED] register_whitelist/14024997852
[18:57:56] [PASSED] register_whitelist/14024997852
[18:57:56] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[18:57:56] =============== [PASSED] xe_rtp_tables_test ================
[18:57:56] =================== xe_rtp (3 subtests) ====================
[18:57:56] =================== xe_rtp_rules_tests  ====================
[18:57:56] [PASSED] no
[18:57:56] [PASSED] yes
[18:57:56] [PASSED] no-and-no
[18:57:56] [PASSED] no-and-yes
[18:57:56] [PASSED] yes-and-no
[18:57:56] [PASSED] yes-and-yes
[18:57:56] [PASSED] no-or-no
[18:57:56] [PASSED] no-or-yes
[18:57:56] [PASSED] yes-or-no
[18:57:56] [PASSED] yes-or-yes
[18:57:56] [PASSED] no-yes-or-yes-no
[18:57:56] [PASSED] no-yes-or-yes-yes
[18:57:56] [PASSED] yes-yes-or-no-yes
[18:57:56] [PASSED] yes-yes-or-yes-yes
[18:57:56] [PASSED] no-no-or-yes-or-no
[18:57:56] [PASSED] or
[18:57:56] [PASSED] or-yes
[18:57:56] [PASSED] or-no
[18:57:56] [PASSED] yes-or
[18:57:56] [PASSED] no-or
[18:57:56] [PASSED] no-or-or-yes
[18:57:56] [PASSED] yes-or-or-no
[18:57:56] [PASSED] no-or-or-no
[18:57:56] [PASSED] missing-context-engine-class
[18:57:56] [PASSED] missing-context-engine-class-or-yes
[18:57:56] [PASSED] missing-context-engine-class-or-or-yes
[18:57:56] =============== [PASSED] xe_rtp_rules_tests ================
[18:57:56] =============== xe_rtp_process_to_sr_tests  ================
[18:57:56] [PASSED] coalesce-same-reg
[18:57:56] [PASSED] coalesce-same-reg-literal-and-func
[18:57:56] [PASSED] no-match-no-add
[18:57:56] [PASSED] two-regs-two-entries
[18:57:56] [PASSED] clr-one-set-other
[18:57:56] [PASSED] set-field
[18:57:56] [PASSED] conflict-duplicate
[18:57:56] [PASSED] conflict-not-disjoint
[18:57:56] [PASSED] conflict-not-disjoint-literal-and-func
[18:57:56] [PASSED] conflict-reg-type
[18:57:56] [PASSED] bad-mcr-reg-forced-to-regular
[18:57:56] [PASSED] bad-regular-reg-forced-to-mcr
[18:57:56] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:57:56] ================== xe_rtp_process_tests  ===================
[18:57:56] [PASSED] active1
[18:57:56] [PASSED] active2
[18:57:56] [PASSED] active-inactive
[18:57:56] [PASSED] inactive-active
[18:57:56] [PASSED] inactive-active-inactive
[18:57:56] [PASSED] inactive-inactive-inactive
[18:57:56] ============== [PASSED] xe_rtp_process_tests ===============
[18:57:56] ===================== [PASSED] xe_rtp ======================
[18:57:56] ==================== xe_wa (1 subtest) =====================
[18:57:56] ======================== xe_wa_gt  =========================
[18:57:56] [PASSED] TIGERLAKE B0
[18:57:56] [PASSED] DG1 A0
[18:57:56] [PASSED] DG1 B0
[18:57:56] [PASSED] ALDERLAKE_S A0
[18:57:56] [PASSED] ALDERLAKE_S B0
[18:57:56] [PASSED] ALDERLAKE_S C0
[18:57:56] [PASSED] ALDERLAKE_S D0
[18:57:56] [PASSED] ALDERLAKE_P A0
[18:57:56] [PASSED] ALDERLAKE_P B0
[18:57:56] [PASSED] ALDERLAKE_P C0
[18:57:56] [PASSED] ALDERLAKE_S RPLS D0
[18:57:56] [PASSED] ALDERLAKE_P RPLU E0
[18:57:56] [PASSED] DG2 G10 C0
[18:57:56] [PASSED] DG2 G11 B1
[18:57:56] [PASSED] DG2 G12 A1
[18:57:56] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:57:56] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:57:56] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:57:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:57:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:57:56] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:57:56] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:57:56] ==================== [PASSED] xe_wa_gt =====================
[18:57:56] ====================== [PASSED] xe_wa ======================
[18:57:56] ============================================================
[18:57:56] Testing complete. Ran 821 tests: passed: 793, skipped: 28
[18:57:56] Elapsed time: 36.336s total, 1.875s configuring, 33.743s building, 0.707s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:57:56] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:57:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:58:23] Starting KUnit Kernel (1/1)...
[18:58:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:58:23] ============ drm_test_pick_cmdline (2 subtests) ============
[18:58:23] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[18:58:23] =============== drm_test_pick_cmdline_named  ===============
[18:58:23] [PASSED] NTSC
[18:58:23] [PASSED] NTSC-J
[18:58:23] [PASSED] PAL
[18:58:23] [PASSED] PAL-M
[18:58:23] =========== [PASSED] drm_test_pick_cmdline_named ===========
[18:58:23] ============== [PASSED] drm_test_pick_cmdline ==============
[18:58:23] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:58:23] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:58:23] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:58:23] =========== drm_validate_clone_mode (2 subtests) ===========
[18:58:23] ============== drm_test_check_in_clone_mode  ===============
[18:58:23] [PASSED] in_clone_mode
[18:58:23] [PASSED] not_in_clone_mode
[18:58:23] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:58:23] =============== drm_test_check_valid_clones  ===============
[18:58:23] [PASSED] not_in_clone_mode
[18:58:23] [PASSED] valid_clone
[18:58:23] [PASSED] invalid_clone
[18:58:23] =========== [PASSED] drm_test_check_valid_clones ===========
[18:58:23] ============= [PASSED] drm_validate_clone_mode =============
[18:58:23] ============= drm_validate_modeset (1 subtest) =============
[18:58:23] [PASSED] drm_test_check_connector_changed_modeset
[18:58:23] ============== [PASSED] drm_validate_modeset ===============
[18:58:23] ====== drm_test_bridge_get_current_state (1 subtest) =======
[18:58:23] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:58:23] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:58:23] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:58:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:58:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:58:23] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[18:58:23] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:58:23] ============== drm_bridge_alloc (2 subtests) ===============
[18:58:23] [PASSED] drm_test_drm_bridge_alloc_basic
[18:58:23] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:58:23] ================ [PASSED] drm_bridge_alloc =================
[18:58:23] ============= drm_bridge_bus_fmt (5 subtests) ==============
[18:58:23] [PASSED] drm_test_bridge_rgb_yuv_rgb
[18:58:23] [PASSED] drm_test_bridge_must_convert_to_yuv444
[18:58:23] [PASSED] drm_test_bridge_hdmi_auto_rgb
[18:58:23] [PASSED] drm_test_bridge_auto_first
[18:58:23] [PASSED] drm_test_bridge_rgb_yuv_no_path
[18:58:23] =============== [PASSED] drm_bridge_bus_fmt ================
[18:58:23] ============= drm_cmdline_parser (40 subtests) =============
[18:58:23] [PASSED] drm_test_cmdline_force_d_only
[18:58:23] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:58:23] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:58:23] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:58:23] [PASSED] drm_test_cmdline_force_e_only
[18:58:23] [PASSED] drm_test_cmdline_res
[18:58:23] [PASSED] drm_test_cmdline_res_vesa
[18:58:23] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:58:23] [PASSED] drm_test_cmdline_res_rblank
[18:58:23] [PASSED] drm_test_cmdline_res_bpp
[18:58:23] [PASSED] drm_test_cmdline_res_refresh
[18:58:23] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:58:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:58:23] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:58:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:58:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:58:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:58:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:58:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:58:23] [PASSED] drm_test_cmdline_res_margins_force_on
[18:58:23] [PASSED] drm_test_cmdline_res_vesa_margins
[18:58:23] [PASSED] drm_test_cmdline_name
[18:58:23] [PASSED] drm_test_cmdline_name_bpp
[18:58:23] [PASSED] drm_test_cmdline_name_option
[18:58:23] [PASSED] drm_test_cmdline_name_bpp_option
[18:58:23] [PASSED] drm_test_cmdline_rotate_0
[18:58:23] [PASSED] drm_test_cmdline_rotate_90
[18:58:23] [PASSED] drm_test_cmdline_rotate_180
[18:58:23] [PASSED] drm_test_cmdline_rotate_270
[18:58:23] [PASSED] drm_test_cmdline_hmirror
[18:58:23] [PASSED] drm_test_cmdline_vmirror
[18:58:23] [PASSED] drm_test_cmdline_margin_options
[18:58:23] [PASSED] drm_test_cmdline_multiple_options
[18:58:23] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:58:23] [PASSED] drm_test_cmdline_extra_and_option
[18:58:23] [PASSED] drm_test_cmdline_freestanding_options
[18:58:23] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:58:23] [PASSED] drm_test_cmdline_panel_orientation
[18:58:23] ================ drm_test_cmdline_invalid  =================
[18:58:23] [PASSED] margin_only
[18:58:23] [PASSED] interlace_only
[18:58:23] [PASSED] res_missing_x
[18:58:23] [PASSED] res_missing_y
[18:58:23] [PASSED] res_bad_y
[18:58:23] [PASSED] res_missing_y_bpp
[18:58:23] [PASSED] res_bad_bpp
[18:58:23] [PASSED] res_bad_refresh
[18:58:23] [PASSED] res_bpp_refresh_force_on_off
[18:58:23] [PASSED] res_invalid_mode
[18:58:23] [PASSED] res_bpp_wrong_place_mode
[18:58:23] [PASSED] name_bpp_refresh
[18:58:23] [PASSED] name_refresh
[18:58:23] [PASSED] name_refresh_wrong_mode
[18:58:23] [PASSED] name_refresh_invalid_mode
[18:58:23] [PASSED] rotate_multiple
[18:58:23] [PASSED] rotate_invalid_val
[18:58:23] [PASSED] rotate_truncated
[18:58:23] [PASSED] invalid_option
[18:58:23] [PASSED] invalid_tv_option
[18:58:23] [PASSED] truncated_tv_option
[18:58:23] ============ [PASSED] drm_test_cmdline_invalid =============
[18:58:23] =============== drm_test_cmdline_tv_options  ===============
[18:58:23] [PASSED] NTSC
[18:58:23] [PASSED] NTSC_443
[18:58:23] [PASSED] NTSC_J
[18:58:23] [PASSED] PAL
[18:58:23] [PASSED] PAL_M
[18:58:23] [PASSED] PAL_N
[18:58:23] [PASSED] SECAM
[18:58:23] [PASSED] MONO_525
[18:58:23] [PASSED] MONO_625
[18:58:23] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:58:23] =============== [PASSED] drm_cmdline_parser ================
[18:58:23] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:58:23] [PASSED] drm_test_connector_hdmi_init_valid
[18:58:23] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:58:23] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:58:23] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:58:23] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:58:23] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:58:23] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:58:23] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:58:23] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[18:58:23] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:58:23] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:58:23] [PASSED] supported_formats=0x5 yuv420_allowed=1
[18:58:23] [PASSED] supported_formats=0x5 yuv420_allowed=0
[18:58:23] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:58:23] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:58:23] [PASSED] drm_test_connector_hdmi_init_null_product
[18:58:23] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:58:23] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:58:23] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:58:23] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:58:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:58:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:58:23] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:58:23] ========= drm_test_connector_hdmi_init_type_valid  =========
[18:58:23] [PASSED] HDMI-A
[18:58:23] [PASSED] HDMI-B
[18:58:23] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:58:23] ======== drm_test_connector_hdmi_init_type_invalid  ========
[18:58:23] [PASSED] Unknown
[18:58:23] [PASSED] VGA
[18:58:23] [PASSED] DVI-I
[18:58:23] [PASSED] DVI-D
[18:58:23] [PASSED] DVI-A
[18:58:23] [PASSED] Composite
[18:58:23] [PASSED] SVIDEO
[18:58:23] [PASSED] LVDS
[18:58:23] [PASSED] Component
[18:58:23] [PASSED] DIN
[18:58:23] [PASSED] DP
[18:58:23] [PASSED] TV
[18:58:23] [PASSED] eDP
[18:58:23] [PASSED] Virtual
[18:58:23] [PASSED] DSI
[18:58:23] [PASSED] DPI
[18:58:23] [PASSED] Writeback
[18:58:23] [PASSED] SPI
[18:58:23] [PASSED] USB
[18:58:23] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:58:23] ============ [PASSED] drmm_connector_hdmi_init =============
[18:58:23] ============= drmm_connector_init (3 subtests) =============
[18:58:23] [PASSED] drm_test_drmm_connector_init
[18:58:23] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:58:23] ========= drm_test_drmm_connector_init_type_valid  =========
[18:58:23] [PASSED] Unknown
[18:58:23] [PASSED] VGA
[18:58:23] [PASSED] DVI-I
[18:58:23] [PASSED] DVI-D
[18:58:23] [PASSED] DVI-A
[18:58:23] [PASSED] Composite
[18:58:23] [PASSED] SVIDEO
[18:58:23] [PASSED] LVDS
[18:58:23] [PASSED] Component
[18:58:23] [PASSED] DIN
[18:58:23] [PASSED] DP
[18:58:23] [PASSED] HDMI-A
[18:58:23] [PASSED] HDMI-B
[18:58:23] [PASSED] TV
[18:58:23] [PASSED] eDP
[18:58:23] [PASSED] Virtual
[18:58:23] [PASSED] DSI
[18:58:23] [PASSED] DPI
[18:58:23] [PASSED] Writeback
[18:58:23] [PASSED] SPI
[18:58:23] [PASSED] USB
[18:58:23] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:58:23] =============== [PASSED] drmm_connector_init ===============
[18:58:23] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_init
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:58:23] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[18:58:23] [PASSED] Unknown
[18:58:23] [PASSED] VGA
[18:58:23] [PASSED] DVI-I
[18:58:23] [PASSED] DVI-D
[18:58:23] [PASSED] DVI-A
[18:58:23] [PASSED] Composite
[18:58:23] [PASSED] SVIDEO
[18:58:23] [PASSED] LVDS
[18:58:23] [PASSED] Component
[18:58:23] [PASSED] DIN
[18:58:23] [PASSED] DP
[18:58:23] [PASSED] HDMI-A
[18:58:23] [PASSED] HDMI-B
[18:58:23] [PASSED] TV
[18:58:23] [PASSED] eDP
[18:58:23] [PASSED] Virtual
[18:58:23] [PASSED] DSI
[18:58:23] [PASSED] DPI
[18:58:23] [PASSED] Writeback
[18:58:23] [PASSED] SPI
[18:58:23] [PASSED] USB
[18:58:23] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:58:23] ======== drm_test_drm_connector_dynamic_init_name  =========
[18:58:23] [PASSED] Unknown
[18:58:23] [PASSED] VGA
[18:58:23] [PASSED] DVI-I
[18:58:23] [PASSED] DVI-D
[18:58:23] [PASSED] DVI-A
[18:58:23] [PASSED] Composite
[18:58:23] [PASSED] SVIDEO
[18:58:23] [PASSED] LVDS
[18:58:23] [PASSED] Component
[18:58:23] [PASSED] DIN
[18:58:23] [PASSED] DP
[18:58:23] [PASSED] HDMI-A
[18:58:23] [PASSED] HDMI-B
[18:58:23] [PASSED] TV
[18:58:23] [PASSED] eDP
[18:58:23] [PASSED] Virtual
[18:58:23] [PASSED] DSI
[18:58:23] [PASSED] DPI
[18:58:23] [PASSED] Writeback
[18:58:23] [PASSED] SPI
[18:58:23] [PASSED] USB
[18:58:23] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:58:23] =========== [PASSED] drm_connector_dynamic_init ============
[18:58:23] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:58:23] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:58:23] ======= drm_connector_dynamic_register (7 subtests) ========
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:58:23] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:58:23] ========= [PASSED] drm_connector_dynamic_register ==========
[18:58:23] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:58:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:58:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:58:23] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:58:23] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:58:23] ========== drm_test_get_tv_mode_from_name_valid  ===========
[18:58:23] [PASSED] NTSC
[18:58:23] [PASSED] NTSC-443
[18:58:23] [PASSED] NTSC-J
[18:58:23] [PASSED] PAL
[18:58:23] [PASSED] PAL-M
[18:58:23] [PASSED] PAL-N
[18:58:23] [PASSED] SECAM
[18:58:23] [PASSED] Mono
[18:58:23] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:58:23] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:58:23] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:58:23] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:58:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:58:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:58:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:58:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:58:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:58:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:58:23] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[18:58:23] [PASSED] VIC 96
[18:58:23] [PASSED] VIC 97
[18:58:23] [PASSED] VIC 101
[18:58:23] [PASSED] VIC 102
[18:58:23] [PASSED] VIC 106
[18:58:23] [PASSED] VIC 107
[18:58:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:58:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:58:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:58:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:58:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:58:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:58:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:58:23] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:58:23] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[18:58:23] [PASSED] Automatic
[18:58:23] [PASSED] Full
[18:58:23] [PASSED] Limited 16:235
[18:58:23] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:58:23] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:58:23] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:58:23] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:58:23] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[18:58:23] [PASSED] RGB
[18:58:23] [PASSED] YUV 4:2:0
[18:58:23] [PASSED] YUV 4:2:2
[18:58:23] [PASSED] YUV 4:4:4
[18:58:23] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:58:23] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:58:23] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:58:23] ============= drm_damage_helper (21 subtests) ==============
[18:58:23] [PASSED] drm_test_damage_iter_no_damage
[18:58:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:58:23] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:58:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:58:23] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:58:23] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:58:23] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:58:23] [PASSED] drm_test_damage_iter_simple_damage
[18:58:23] [PASSED] drm_test_damage_iter_single_damage
[18:58:23] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:58:23] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:58:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:58:23] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:58:23] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:58:23] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:58:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:58:23] [PASSED] drm_test_damage_iter_damage
[18:58:23] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:58:23] [PASSED] drm_test_damage_iter_damage_one_outside
[18:58:23] [PASSED] drm_test_damage_iter_damage_src_moved
[18:58:23] [PASSED] drm_test_damage_iter_damage_not_visible
[18:58:23] ================ [PASSED] drm_damage_helper ================
[18:58:23] ============== drm_dp_mst_helper (3 subtests) ==============
[18:58:23] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[18:58:23] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:58:23] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:58:23] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:58:23] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:58:23] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:58:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:58:23] ============== drm_test_dp_mst_calc_pbn_div  ===============
[18:58:23] [PASSED] Link rate 2000000 lane count 4
[18:58:23] [PASSED] Link rate 2000000 lane count 2
[18:58:23] [PASSED] Link rate 2000000 lane count 1
[18:58:23] [PASSED] Link rate 1350000 lane count 4
[18:58:23] [PASSED] Link rate 1350000 lane count 2
[18:58:23] [PASSED] Link rate 1350000 lane count 1
[18:58:23] [PASSED] Link rate 1000000 lane count 4
[18:58:23] [PASSED] Link rate 1000000 lane count 2
[18:58:23] [PASSED] Link rate 1000000 lane count 1
[18:58:23] [PASSED] Link rate 810000 lane count 4
[18:58:23] [PASSED] Link rate 810000 lane count 2
[18:58:23] [PASSED] Link rate 810000 lane count 1
[18:58:23] [PASSED] Link rate 540000 lane count 4
[18:58:23] [PASSED] Link rate 540000 lane count 2
[18:58:23] [PASSED] Link rate 540000 lane count 1
[18:58:23] [PASSED] Link rate 270000 lane count 4
[18:58:23] [PASSED] Link rate 270000 lane count 2
[18:58:23] [PASSED] Link rate 270000 lane count 1
[18:58:23] [PASSED] Link rate 162000 lane count 4
[18:58:23] [PASSED] Link rate 162000 lane count 2
[18:58:23] [PASSED] Link rate 162000 lane count 1
[18:58:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:58:23] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[18:58:23] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:58:23] [PASSED] DP_POWER_UP_PHY with port number
[18:58:23] [PASSED] DP_POWER_DOWN_PHY with port number
[18:58:23] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:58:23] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:58:23] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:58:23] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:58:23] [PASSED] DP_QUERY_PAYLOAD with port number
[18:58:23] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:58:23] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:58:23] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:58:23] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:58:23] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:58:23] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:58:23] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:58:23] [PASSED] DP_REMOTE_I2C_READ with port number
[18:58:23] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:58:23] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:58:23] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:58:23] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:58:23] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:58:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:58:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:58:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:58:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:58:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:58:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:58:23] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:58:23] ================ [PASSED] drm_dp_mst_helper ================
[18:58:23] ================== drm_exec (7 subtests) ===================
[18:58:23] [PASSED] sanitycheck
[18:58:23] [PASSED] test_lock
[18:58:23] [PASSED] test_lock_unlock
[18:58:23] [PASSED] test_duplicates
[18:58:23] [PASSED] test_prepare
[18:58:23] [PASSED] test_prepare_array
[18:58:23] [PASSED] test_multiple_loops
[18:58:23] ==================== [PASSED] drm_exec =====================
[18:58:23] =========== drm_format_helper_test (17 subtests) ===========
[18:58:23] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:58:23] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:58:23] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:58:23] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:58:23] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:58:23] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:58:23] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:58:23] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:58:23] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:58:23] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:58:23] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:58:23] ============== drm_test_fb_xrgb8888_to_mono  ===============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:58:23] ==================== drm_test_fb_swab  =====================
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ================ [PASSED] drm_test_fb_swab =================
[18:58:23] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:58:23] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[18:58:23] [PASSED] single_pixel_source_buffer
[18:58:23] [PASSED] single_pixel_clip_rectangle
[18:58:23] [PASSED] well_known_colors
[18:58:23] [PASSED] destination_pitch
[18:58:23] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:58:23] ================= drm_test_fb_clip_offset  =================
[18:58:23] [PASSED] pass through
[18:58:23] [PASSED] horizontal offset
[18:58:23] [PASSED] vertical offset
[18:58:23] [PASSED] horizontal and vertical offset
[18:58:23] [PASSED] horizontal offset (custom pitch)
[18:58:23] [PASSED] vertical offset (custom pitch)
[18:58:23] [PASSED] horizontal and vertical offset (custom pitch)
[18:58:23] ============= [PASSED] drm_test_fb_clip_offset =============
[18:58:23] =================== drm_test_fb_memcpy  ====================
[18:58:23] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:58:23] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:58:23] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:58:23] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:58:23] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:58:23] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:58:23] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:58:23] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:58:23] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:58:23] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:58:23] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:58:23] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:58:23] =============== [PASSED] drm_test_fb_memcpy ================
[18:58:23] ============= [PASSED] drm_format_helper_test ==============
[18:58:23] ================= drm_format (18 subtests) =================
[18:58:23] [PASSED] drm_test_format_block_width_invalid
[18:58:23] [PASSED] drm_test_format_block_width_one_plane
[18:58:23] [PASSED] drm_test_format_block_width_two_plane
[18:58:23] [PASSED] drm_test_format_block_width_three_plane
[18:58:23] [PASSED] drm_test_format_block_width_tiled
[18:58:23] [PASSED] drm_test_format_block_height_invalid
[18:58:23] [PASSED] drm_test_format_block_height_one_plane
[18:58:23] [PASSED] drm_test_format_block_height_two_plane
[18:58:23] [PASSED] drm_test_format_block_height_three_plane
[18:58:23] [PASSED] drm_test_format_block_height_tiled
[18:58:23] [PASSED] drm_test_format_min_pitch_invalid
[18:58:23] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:58:23] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:58:23] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:58:23] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:58:23] [PASSED] drm_test_format_min_pitch_two_plane
[18:58:23] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:58:23] [PASSED] drm_test_format_min_pitch_tiled
[18:58:23] =================== [PASSED] drm_format ====================
[18:58:23] ============== drm_framebuffer (10 subtests) ===============
[18:58:23] ========== drm_test_framebuffer_check_src_coords  ==========
[18:58:23] [PASSED] Success: source fits into fb
[18:58:23] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:58:23] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:58:23] [PASSED] Fail: overflowing fb with source width
[18:58:23] [PASSED] Fail: overflowing fb with source height
[18:58:23] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:58:23] [PASSED] drm_test_framebuffer_cleanup
[18:58:23] =============== drm_test_framebuffer_create  ===============
[18:58:23] [PASSED] ABGR8888 normal sizes
[18:58:23] [PASSED] ABGR8888 max sizes
[18:58:23] [PASSED] ABGR8888 pitch greater than min required
[18:58:23] [PASSED] ABGR8888 pitch less than min required
[18:58:23] [PASSED] ABGR8888 Invalid width
[18:58:23] [PASSED] ABGR8888 Invalid buffer handle
[18:58:23] [PASSED] No pixel format
[18:58:23] [PASSED] ABGR8888 Width 0
[18:58:23] [PASSED] ABGR8888 Height 0
[18:58:23] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:58:23] [PASSED] ABGR8888 Large buffer offset
[18:58:23] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:58:23] [PASSED] ABGR8888 Invalid flag
[18:58:23] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:58:23] [PASSED] ABGR8888 Valid buffer modifier
[18:58:23] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:58:23] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:58:23] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:58:23] [PASSED] NV12 Normal sizes
[18:58:23] [PASSED] NV12 Max sizes
[18:58:23] [PASSED] NV12 Invalid pitch
[18:58:23] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:58:23] [PASSED] NV12 different  modifier per-plane
[18:58:23] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:58:23] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:58:23] [PASSED] NV12 Modifier for inexistent plane
[18:58:23] [PASSED] NV12 Handle for inexistent plane
[18:58:23] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:58:23] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:58:23] [PASSED] YVU420 Normal sizes
[18:58:23] [PASSED] YVU420 Max sizes
[18:58:23] [PASSED] YVU420 Invalid pitch
[18:58:23] [PASSED] YVU420 Different pitches
[18:58:23] [PASSED] YVU420 Different buffer offsets/pitches
[18:58:23] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:58:23] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:58:23] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:58:23] [PASSED] YVU420 Valid modifier
[18:58:23] [PASSED] YVU420 Different modifiers per plane
[18:58:23] [PASSED] YVU420 Modifier for inexistent plane
[18:58:23] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:58:23] [PASSED] X0L2 Normal sizes
[18:58:23] [PASSED] X0L2 Max sizes
[18:58:23] [PASSED] X0L2 Invalid pitch
[18:58:23] [PASSED] X0L2 Pitch greater than minimum required
[18:58:23] [PASSED] X0L2 Handle for inexistent plane
[18:58:23] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:58:23] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:58:23] [PASSED] X0L2 Valid modifier
[18:58:23] [PASSED] X0L2 Modifier for inexistent plane
[18:58:23] =========== [PASSED] drm_test_framebuffer_create ===========
[18:58:23] [PASSED] drm_test_framebuffer_free
[18:58:23] [PASSED] drm_test_framebuffer_init
[18:58:23] [PASSED] drm_test_framebuffer_init_bad_format
[18:58:23] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:58:23] [PASSED] drm_test_framebuffer_lookup
[18:58:23] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:58:23] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:58:23] ================= [PASSED] drm_framebuffer =================
[18:58:23] ================ drm_gem_shmem (8 subtests) ================
[18:58:23] [PASSED] drm_gem_shmem_test_obj_create
[18:58:23] [PASSED] drm_gem_shmem_test_obj_create_private
[18:58:23] [PASSED] drm_gem_shmem_test_pin_pages
[18:58:23] [PASSED] drm_gem_shmem_test_vmap
[18:58:23] [PASSED] drm_gem_shmem_test_get_sg_table
[18:58:23] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:58:23] [PASSED] drm_gem_shmem_test_madvise
[18:58:23] [PASSED] drm_gem_shmem_test_purge
[18:58:23] ================== [PASSED] drm_gem_shmem ==================
[18:58:23] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[18:58:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:58:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:58:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:58:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:58:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:58:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:58:23] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[18:58:23] [PASSED] Automatic
[18:58:23] [PASSED] Full
[18:58:23] [PASSED] Limited 16:235
[18:58:23] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:58:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:58:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:58:23] [PASSED] drm_test_check_disable_connector
[18:58:23] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:58:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:58:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:58:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:58:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:58:23] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:58:23] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:58:23] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:58:23] [PASSED] drm_test_check_output_bpc_dvi
[18:58:23] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:58:23] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:58:23] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:58:23] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:58:23] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:58:23] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:58:23] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:58:23] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:58:23] ============ drm_test_check_hdmi_color_format  =============
[18:58:23] [PASSED] AUTO -> RGB
[18:58:23] [PASSED] YCBCR422 -> YUV422
[18:58:23] [PASSED] YCBCR420 -> YUV420
[18:58:23] [PASSED] YCBCR444 -> YUV444
[18:58:23] [PASSED] RGB -> RGB
[18:58:23] ======== [PASSED] drm_test_check_hdmi_color_format =========
[18:58:23] ======== drm_test_check_hdmi_color_format_420_only  ========
[18:58:23] [PASSED] RGB should fail
[18:58:23] [PASSED] YUV444 should fail
[18:58:23] [PASSED] YUV422 should fail
[18:58:23] [PASSED] YUV420 should work
[18:58:23] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[18:58:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:58:23] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:58:23] [PASSED] drm_test_check_broadcast_rgb_value
[18:58:23] [PASSED] drm_test_check_bpc_8_value
[18:58:23] [PASSED] drm_test_check_bpc_10_value
[18:58:23] [PASSED] drm_test_check_bpc_12_value
[18:58:23] [PASSED] drm_test_check_format_value
[18:58:23] [PASSED] drm_test_check_tmds_char_value
[18:58:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:58:23] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[18:58:23] [PASSED] drm_test_check_mode_valid
[18:58:23] [PASSED] drm_test_check_mode_valid_reject
[18:58:23] [PASSED] drm_test_check_mode_valid_reject_rate
[18:58:23] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:58:23] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[18:58:23] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[18:58:23] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[18:58:23] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:58:23] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[18:58:23] [PASSED] drm_test_check_infoframes
[18:58:23] [PASSED] drm_test_check_reject_avi_infoframe
[18:58:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[18:58:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[18:58:23] [PASSED] drm_test_check_reject_audio_infoframe
[18:58:23] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[18:58:23] ================= drm_managed (2 subtests) =================
[18:58:23] [PASSED] drm_test_managed_release_action
[18:58:23] [PASSED] drm_test_managed_run_action
[18:58:23] =================== [PASSED] drm_managed ===================
[18:58:23] =================== drm_mm (6 subtests) ====================
[18:58:23] [PASSED] drm_test_mm_init
[18:58:23] [PASSED] drm_test_mm_debug
[18:58:23] [PASSED] drm_test_mm_align32
[18:58:23] [PASSED] drm_test_mm_align64
[18:58:23] [PASSED] drm_test_mm_lowest
[18:58:23] [PASSED] drm_test_mm_highest
[18:58:23] ===================== [PASSED] drm_mm ======================
[18:58:23] ============= drm_modes_analog_tv (5 subtests) =============
[18:58:23] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:58:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:58:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:58:23] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:58:23] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:58:23] =============== [PASSED] drm_modes_analog_tv ===============
[18:58:23] ============== drm_panic_helper (3 subtests) ===============
[18:58:23] ============= drm_test_panic_screen_user_map  ==============
[18:58:23] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[18:58:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[18:58:23] ========= [PASSED] drm_test_panic_screen_user_map ==========
[18:58:23] ============= drm_test_panic_screen_user_page  =============
[18:58:23] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[18:58:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[18:58:23] ========= [PASSED] drm_test_panic_screen_user_page =========
[18:58:23] ========== drm_test_panic_screen_user_set_pixel  ===========
[18:58:23] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[18:58:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[18:58:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[18:58:23] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[18:58:23] ================ [PASSED] drm_panic_helper =================
[18:58:23] ============== drm_plane_helper (2 subtests) ===============
[18:58:23] =============== drm_test_check_plane_state  ================
[18:58:23] [PASSED] clipping_simple
[18:58:23] [PASSED] clipping_rotate_reflect
[18:58:23] [PASSED] positioning_simple
[18:58:23] [PASSED] upscaling
[18:58:23] [PASSED] downscaling
[18:58:23] [PASSED] rounding1
[18:58:23] [PASSED] rounding2
[18:58:23] [PASSED] rounding3
[18:58:23] [PASSED] rounding4
[18:58:23] =========== [PASSED] drm_test_check_plane_state ============
[18:58:23] =========== drm_test_check_invalid_plane_state  ============
[18:58:23] [PASSED] positioning_invalid
[18:58:23] [PASSED] upscaling_invalid
[18:58:23] [PASSED] downscaling_invalid
[18:58:23] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:58:23] ================ [PASSED] drm_plane_helper =================
[18:58:23] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:58:23] ====== drm_test_connector_helper_tv_get_modes_check  =======
[18:58:23] [PASSED] None
[18:58:23] [PASSED] PAL
[18:58:23] [PASSED] NTSC
[18:58:23] [PASSED] Both, NTSC Default
[18:58:23] [PASSED] Both, PAL Default
[18:58:23] [PASSED] Both, NTSC Default, with PAL on command-line
[18:58:23] [PASSED] Both, PAL Default, with NTSC on command-line
[18:58:23] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:58:23] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:58:23] ================== drm_rect (9 subtests) ===================
[18:58:23] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:58:23] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:58:23] [PASSED] drm_test_rect_clip_scaled_clipped
[18:58:23] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:58:23] ================= drm_test_rect_intersect  =================
[18:58:23] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:58:23] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:58:23] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:58:23] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:58:23] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:58:23] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:58:23] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:58:23] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:58:23] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:58:23] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:58:23] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:58:23] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:58:23] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:58:23] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:58:23] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[18:58:23] ============= [PASSED] drm_test_rect_intersect =============
[18:58:23] ================ drm_test_rect_calc_hscale  ================
[18:58:23] [PASSED] normal use
[18:58:23] [PASSED] out of max range
[18:58:23] [PASSED] out of min range
[18:58:23] [PASSED] zero dst
[18:58:23] [PASSED] negative src
[18:58:23] [PASSED] negative dst
[18:58:23] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:58:23] ================ drm_test_rect_calc_vscale  ================
[18:58:23] [PASSED] normal use
[18:58:23] [PASSED] out of max range
[18:58:23] [PASSED] out of min range
[18:58:23] [PASSED] zero dst
[18:58:23] [PASSED] negative src
[18:58:23] [PASSED] negative dst
[18:58:23] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:58:23] ================== drm_test_rect_rotate  ===================
[18:58:23] [PASSED] reflect-x
[18:58:23] [PASSED] reflect-y
[18:58:23] [PASSED] rotate-0
[18:58:23] [PASSED] rotate-90
[18:58:23] [PASSED] rotate-180
[18:58:23] [PASSED] rotate-270
[18:58:23] ============== [PASSED] drm_test_rect_rotate ===============
[18:58:23] ================ drm_test_rect_rotate_inv  =================
[18:58:23] [PASSED] reflect-x
[18:58:23] [PASSED] reflect-y
[18:58:23] [PASSED] rotate-0
[18:58:23] [PASSED] rotate-90
[18:58:23] [PASSED] rotate-180
[18:58:23] [PASSED] rotate-270
[18:58:23] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:58:23] ==================== [PASSED] drm_rect =====================
[18:58:23] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:58:23] ============ drm_test_sysfb_build_fourcc_list  =============
[18:58:23] [PASSED] no native formats
[18:58:23] [PASSED] XRGB8888 as native format
[18:58:23] [PASSED] remove duplicates
[18:58:23] [PASSED] convert alpha formats
[18:58:23] [PASSED] random formats
[18:58:23] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:58:23] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:58:23] ================== drm_fixp (2 subtests) ===================
[18:58:23] [PASSED] drm_test_int2fixp
[18:58:23] [PASSED] drm_test_sm2fixp
[18:58:23] ==================== [PASSED] drm_fixp =====================
[18:58:23] ============================================================
[18:58:23] Testing complete. Ran 667 tests: passed: 667
[18:58:23] Elapsed time: 27.319s total, 1.924s configuring, 24.980s building, 0.408s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:58:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:58:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:58:35] Starting KUnit Kernel (1/1)...
[18:58:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:58:35] ================= ttm_device (5 subtests) ==================
[18:58:35] [PASSED] ttm_device_init_basic
[18:58:35] [PASSED] ttm_device_init_multiple
[18:58:35] [PASSED] ttm_device_fini_basic
[18:58:35] [PASSED] ttm_device_init_no_vma_man
[18:58:35] ================== ttm_device_init_pools  ==================
[18:58:35] [PASSED] No DMA allocations, no DMA32 required
[18:58:35] [PASSED] DMA allocations, DMA32 required
[18:58:35] [PASSED] No DMA allocations, DMA32 required
[18:58:35] [PASSED] DMA allocations, no DMA32 required
[18:58:35] ============== [PASSED] ttm_device_init_pools ==============
[18:58:35] =================== [PASSED] ttm_device ====================
[18:58:35] ================== ttm_pool (8 subtests) ===================
[18:58:35] ================== ttm_pool_alloc_basic  ===================
[18:58:35] [PASSED] One page
[18:58:35] [PASSED] More than one page
[18:58:35] [PASSED] Above the allocation limit
[18:58:35] [PASSED] One page, with coherent DMA mappings enabled
[18:58:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:58:35] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:58:35] ============== ttm_pool_alloc_basic_dma_addr  ==============
[18:58:35] [PASSED] One page
[18:58:35] [PASSED] More than one page
[18:58:35] [PASSED] Above the allocation limit
[18:58:35] [PASSED] One page, with coherent DMA mappings enabled
[18:58:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:58:35] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:58:35] [PASSED] ttm_pool_alloc_order_caching_match
[18:58:35] [PASSED] ttm_pool_alloc_caching_mismatch
[18:58:35] [PASSED] ttm_pool_alloc_order_mismatch
[18:58:35] [PASSED] ttm_pool_free_dma_alloc
[18:58:35] [PASSED] ttm_pool_free_no_dma_alloc
[18:58:35] [PASSED] ttm_pool_fini_basic
[18:58:35] ==================== [PASSED] ttm_pool =====================
[18:58:35] ================ ttm_resource (8 subtests) =================
[18:58:35] ================= ttm_resource_init_basic  =================
[18:58:35] [PASSED] Init resource in TTM_PL_SYSTEM
[18:58:35] [PASSED] Init resource in TTM_PL_VRAM
[18:58:35] [PASSED] Init resource in a private placement
[18:58:35] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:58:35] ============= [PASSED] ttm_resource_init_basic =============
[18:58:35] [PASSED] ttm_resource_init_pinned
[18:58:35] [PASSED] ttm_resource_fini_basic
[18:58:35] [PASSED] ttm_resource_manager_init_basic
[18:58:35] [PASSED] ttm_resource_manager_usage_basic
[18:58:35] [PASSED] ttm_resource_manager_set_used_basic
[18:58:35] [PASSED] ttm_sys_man_alloc_basic
[18:58:35] [PASSED] ttm_sys_man_free_basic
[18:58:35] ================== [PASSED] ttm_resource ===================
[18:58:35] =================== ttm_tt (15 subtests) ===================
[18:58:35] ==================== ttm_tt_init_basic  ====================
[18:58:35] [PASSED] Page-aligned size
[18:58:35] [PASSED] Extra pages requested
[18:58:35] ================ [PASSED] ttm_tt_init_basic ================
[18:58:35] [PASSED] ttm_tt_init_misaligned
[18:58:35] [PASSED] ttm_tt_fini_basic
[18:58:35] [PASSED] ttm_tt_fini_sg
[18:58:35] [PASSED] ttm_tt_fini_shmem
[18:58:35] [PASSED] ttm_tt_create_basic
[18:58:35] [PASSED] ttm_tt_create_invalid_bo_type
[18:58:35] [PASSED] ttm_tt_create_ttm_exists
[18:58:35] [PASSED] ttm_tt_create_failed
[18:58:35] [PASSED] ttm_tt_destroy_basic
[18:58:35] [PASSED] ttm_tt_populate_null_ttm
[18:58:35] [PASSED] ttm_tt_populate_populated_ttm
[18:58:35] [PASSED] ttm_tt_unpopulate_basic
[18:58:35] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:58:35] [PASSED] ttm_tt_swapin_basic
[18:58:35] ===================== [PASSED] ttm_tt ======================
[18:58:35] =================== ttm_bo (14 subtests) ===================
[18:58:35] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[18:58:35] [PASSED] Cannot be interrupted and sleeps
[18:58:35] [PASSED] Cannot be interrupted, locks straight away
[18:58:35] [PASSED] Can be interrupted, sleeps
[18:58:35] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:58:35] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:58:35] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:58:36] [PASSED] ttm_bo_reserve_double_resv
[18:58:36] [PASSED] ttm_bo_reserve_interrupted
[18:58:36] [PASSED] ttm_bo_reserve_deadlock
[18:58:36] [PASSED] ttm_bo_unreserve_basic
[18:58:36] [PASSED] ttm_bo_unreserve_pinned
[18:58:36] [PASSED] ttm_bo_unreserve_bulk
[18:58:36] [PASSED] ttm_bo_fini_basic
[18:58:36] [PASSED] ttm_bo_fini_shared_resv
[18:58:36] [PASSED] ttm_bo_pin_basic
[18:58:36] [PASSED] ttm_bo_pin_unpin_resource
[18:58:36] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:58:36] ===================== [PASSED] ttm_bo ======================
[18:58:36] ============== ttm_bo_validate (22 subtests) ===============
[18:58:36] ============== ttm_bo_init_reserved_sys_man  ===============
[18:58:36] [PASSED] Buffer object for userspace
[18:58:36] [PASSED] Kernel buffer object
[18:58:36] [PASSED] Shared buffer object
[18:58:36] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:58:36] ============== ttm_bo_init_reserved_mock_man  ==============
[18:58:36] [PASSED] Buffer object for userspace
[18:58:36] [PASSED] Kernel buffer object
[18:58:36] [PASSED] Shared buffer object
[18:58:36] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:58:36] [PASSED] ttm_bo_init_reserved_resv
[18:58:36] ================== ttm_bo_validate_basic  ==================
[18:58:36] [PASSED] Buffer object for userspace
[18:58:36] [PASSED] Kernel buffer object
[18:58:36] [PASSED] Shared buffer object
[18:58:36] ============== [PASSED] ttm_bo_validate_basic ==============
[18:58:36] [PASSED] ttm_bo_validate_invalid_placement
[18:58:36] ============= ttm_bo_validate_same_placement  ==============
[18:58:36] [PASSED] System manager
[18:58:36] [PASSED] VRAM manager
[18:58:36] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:58:36] [PASSED] ttm_bo_validate_failed_alloc
[18:58:36] [PASSED] ttm_bo_validate_pinned
[18:58:36] [PASSED] ttm_bo_validate_busy_placement
[18:58:36] ================ ttm_bo_validate_multihop  =================
[18:58:36] [PASSED] Buffer object for userspace
[18:58:36] [PASSED] Kernel buffer object
[18:58:36] [PASSED] Shared buffer object
[18:58:36] ============ [PASSED] ttm_bo_validate_multihop =============
[18:58:36] ========== ttm_bo_validate_no_placement_signaled  ==========
[18:58:36] [PASSED] Buffer object in system domain, no page vector
[18:58:36] [PASSED] Buffer object in system domain with an existing page vector
[18:58:36] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:58:36] ======== ttm_bo_validate_no_placement_not_signaled  ========
[18:58:36] [PASSED] Buffer object for userspace
[18:58:36] [PASSED] Kernel buffer object
[18:58:36] [PASSED] Shared buffer object
[18:58:36] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:58:36] [PASSED] ttm_bo_validate_move_fence_signaled
[18:58:36] ========= ttm_bo_validate_move_fence_not_signaled  =========
[18:58:36] [PASSED] Waits for GPU
[18:58:36] [PASSED] Tries to lock straight away
[18:58:36] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:58:36] [PASSED] ttm_bo_validate_swapout
[18:58:36] [PASSED] ttm_bo_validate_happy_evict
[18:58:36] [PASSED] ttm_bo_validate_all_pinned_evict
[18:58:36] [PASSED] ttm_bo_validate_allowed_only_evict
[18:58:36] [PASSED] ttm_bo_validate_deleted_evict
[18:58:36] [PASSED] ttm_bo_validate_busy_domain_evict
[18:58:36] [PASSED] ttm_bo_validate_evict_gutting
[18:58:36] [PASSED] ttm_bo_validate_recrusive_evict
[18:58:36] ================= [PASSED] ttm_bo_validate =================
[18:58:36] ============================================================
[18:58:36] Testing complete. Ran 102 tests: passed: 102
[18:58:36] Elapsed time: 12.378s total, 1.920s configuring, 10.193s building, 0.223s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[18:58:36] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:58:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:58:46] Starting KUnit Kernel (1/1)...
[18:58:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:58:46] =============== dma-buf-fence (12 subtests) ================
[18:58:46] [PASSED] test_sanitycheck
[18:58:46] [PASSED] test_signaling
[18:58:46] [PASSED] test_add_callback
[18:58:46] [PASSED] test_late_add_callback
[18:58:46] [PASSED] test_rm_callback
[18:58:46] [PASSED] test_late_rm_callback
[18:58:46] [PASSED] test_status
[18:58:46] [PASSED] test_error
[18:58:46] [PASSED] test_wait
[18:58:46] [PASSED] test_wait_timeout
[18:58:46] [PASSED] test_stub
[18:58:46] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[18:58:46] ================== [PASSED] dma-buf-fence ==================
[18:58:46] ============ dma-buf-fence-chain (11 subtests) =============
[18:58:46] [PASSED] test_sanitycheck
[18:58:46] [PASSED] test_find_seqno
[18:58:46] [PASSED] test_find_signaled
[18:58:46] [PASSED] test_find_out_of_order
[18:58:51] [PASSED] test_find_gap
[18:58:51] [PASSED] test_find_race
[18:58:51] [PASSED] test_signal_forward
[18:58:52] [PASSED] test_signal_backward
[18:58:52] [PASSED] test_wait_forward
[18:58:52] [PASSED] test_wait_backward
[18:58:52] [PASSED] test_wait_random
[18:58:52] =============== [PASSED] dma-buf-fence-chain ===============
[18:58:52] ============ dma-buf-fence-unwrap (10 subtests) ============
[18:58:52] [PASSED] test_sanitycheck
[18:58:52] [PASSED] test_unwrap_array
[18:58:52] [PASSED] test_unwrap_chain
[18:58:52] [PASSED] test_unwrap_chain_array
[18:58:52] [PASSED] test_unwrap_merge
[18:58:52] [PASSED] test_unwrap_merge_duplicate
[18:58:52] [PASSED] test_unwrap_merge_seqno
[18:58:52] [PASSED] test_unwrap_merge_order
[18:58:52] [PASSED] test_unwrap_merge_complex
[18:58:52] [PASSED] test_unwrap_merge_complex_seqno
[18:58:52] ============== [PASSED] dma-buf-fence-unwrap ===============
[18:58:52] ================ dma-buf-resv (5 subtests) =================
[18:58:52] [PASSED] test_sanitycheck
[18:58:52] ===================== test_signaling  ======================
[18:58:52] [PASSED] kernel
[18:58:52] [PASSED] write
[18:58:52] [PASSED] read
[18:58:52] [PASSED] bookkeep
[18:58:52] ================= [PASSED] test_signaling ==================
[18:58:52] ====================== test_for_each  ======================
[18:58:52] [PASSED] kernel
[18:58:52] [PASSED] write
[18:58:52] [PASSED] read
[18:58:52] [PASSED] bookkeep
[18:58:52] ================== [PASSED] test_for_each ==================
[18:58:52] ================= test_for_each_unlocked  ==================
[18:58:52] [PASSED] kernel
[18:58:52] [PASSED] write
[18:58:52] [PASSED] read
[18:58:52] [PASSED] bookkeep
[18:58:52] ============= [PASSED] test_for_each_unlocked ==============
[18:58:52] ===================== test_get_fences  =====================
[18:58:52] [PASSED] kernel
[18:58:52] [PASSED] write
[18:58:52] [PASSED] read
[18:58:52] [PASSED] bookkeep
[18:58:52] ================= [PASSED] test_get_fences =================
[18:58:52] ================== [PASSED] dma-buf-resv ===================
[18:58:52] ============================================================
[18:58:52] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[18:58:52] Elapsed time: 15.880s total, 1.848s configuring, 8.761s building, 5.253s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe: Capture additional HW register state in devcoredump (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 980 bytes --]

== Series Details ==

Series: drm/xe: Capture additional HW register state in devcoredump (rev4)
URL   : https://patchwork.freedesktop.org/series/172150/
State : success

== Summary ==

CI Bug Log - changes from xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0_BAT -> xe-pw-172150v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0 -> xe-pw-172150v4

  IGT_9140: 3b0daa274edb520204660fa1e15424b66ce0aea0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0: c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0
  xe-pw-172150v4: 172150v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/index.html

[-- Attachment #2: Type: text/html, Size: 1528 bytes --]

✓ Xe.CI.FULL: success for drm/xe: Capture additional HW register state in devcoredump (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 73814 bytes --]

== Series Details ==

Series: drm/xe: Capture additional HW register state in devcoredump (rev4)
URL   : https://patchwork.freedesktop.org/series/172150/
State : success

== Summary ==

CI Bug Log - changes from xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0_FULL -> xe-pw-172150v4_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-172150v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-ptl:          NOTRUN -> [SKIP][1] ([Intel XE#5901]) +1 other test skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-ptl:          NOTRUN -> [SKIP][2] ([Intel XE#6925])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][3] ([Intel XE#1407]) +3 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#7059] / [Intel XE#7085])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-ptl:          NOTRUN -> [SKIP][5] ([Intel XE#5808]) +3 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +6 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-lnl:          NOTRUN -> [SKIP][7] ([Intel XE#1124]) +4 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_bw@connected-linear-tiling-2-displays-target-2560x1440p:
    - shard-ptl:          NOTRUN -> [SKIP][8] ([Intel XE#7679])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_bw@connected-linear-tiling-2-displays-target-2560x1440p.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-3840x2160p:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#7679]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_bw@connected-linear-tiling-3-displays-target-3840x2160p.html

  * igt@kms_bw@linear-tiling-3-displays-target-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#367])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@kms_bw@linear-tiling-3-displays-target-2560x1440p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2:
    - shard-bmg:          NOTRUN -> [ABORT][11] ([Intel XE#9375])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][12] ([Intel XE#9365])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-edp-1:
    - shard-ptl:          NOTRUN -> [ABORT][13] ([Intel XE#7084] / [Intel XE#9378])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-edp-1.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#3432])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs:
    - shard-ptl:          NOTRUN -> [SKIP][15] ([Intel XE#5822]) +6 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2887]) +8 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#2887]) +8 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2652]) +12 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_chamelium_audio@dp-audio:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#373]) +4 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_chamelium_audio@dp-audio.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-ptl:          NOTRUN -> [SKIP][20] ([Intel XE#5824])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2325] / [Intel XE#7358]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_color@gamma:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#306] / [Intel XE#7358])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_chamelium_color@gamma.html

  * igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020-lut1d:
    - shard-ptl:          NOTRUN -> [SKIP][23] ([Intel XE#8391])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020-lut1d.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2252]) +6 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
    - shard-ptl:          NOTRUN -> [SKIP][25] ([Intel XE#2252])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-3:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#6969]) +7 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-3/igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-3.html

  * igt@kms_content_protection@content-type-change:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#7642])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#6974])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html

  * igt@kms_content_protection@srm:
    - shard-ptl:          NOTRUN -> [SKIP][29] ([Intel XE#7642])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@type1:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#7642])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-3/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-ptl:          NOTRUN -> [SKIP][31] ([Intel XE#5846])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2320])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-512x170:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#2321] / [Intel XE#7355])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_cursor_crc@cursor-sliding-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#1424]) +2 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-edp-1:
    - shard-ptl:          [PASS][35] -> [ABORT][36] ([Intel XE#9362]) +5 other tests abort
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-3/igt@kms_cursor_crc@cursor-suspend@pipe-a-edp-1.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@kms_cursor_crc@cursor-suspend@pipe-a-edp-1.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#309] / [Intel XE#7343]) +6 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#1508])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dp_link_training@uhbr-sst-direct-train:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#9529])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@kms_dp_link_training@uhbr-sst-direct-train.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-ptl:          NOTRUN -> [SKIP][40] ([Intel XE#9009])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#4331] / [Intel XE#7227])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#8265]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#8265]) +2 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_feature_discovery@chamelium:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#701] / [Intel XE#7359])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-ptl:          NOTRUN -> [SKIP][45] ([Intel XE#2375])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@dsc:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#8586])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_feature_discovery@dsc.html

  * igt@kms_feature_discovery@hdr:
    - shard-ptl:          NOTRUN -> [SKIP][47] ([Intel XE#9287])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_feature_discovery@hdr.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#1421])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
    - shard-ptl:          NOTRUN -> [SKIP][49] ([Intel XE#2316])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [PASS][50] -> [FAIL][51] ([Intel XE#301])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@plain-flip-ts-check:
    - shard-bmg:          [PASS][52] -> [FAIL][53] ([Intel XE#3098]) +1 other test fail
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-6/igt@kms_flip@plain-flip-ts-check.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-8/igt@kms_flip@plain-flip-ts-check.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#7178] / [Intel XE#7349])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-ptl:          NOTRUN -> [SKIP][55] ([Intel XE#7178]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#7179])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#7178] / [Intel XE#7349])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#7178] / [Intel XE#7351])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#2311]) +29 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#7061] / [Intel XE#7356]) +3 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-render:
    - shard-ptl:          NOTRUN -> [SKIP][61] ([Intel XE#7061]) +2 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@drrshdr-rgb101010-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#6312]) +9 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_frontbuffer_tracking@drrshdr-rgb101010-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#656] / [Intel XE#7905]) +17 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#4141]) +7 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-ptl:          NOTRUN -> [ABORT][65] ([Intel XE#9362])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][66] ([Intel XE#6312] / [Intel XE#651]) +7 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][67] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary:
    - shard-ptl:          NOTRUN -> [SKIP][68] ([Intel XE#5800] / [Intel XE#6312]) +2 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-pri-indfb-draw-render:
    - shard-ptl:          NOTRUN -> [SKIP][69] ([Intel XE#6312])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-abgr161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#7061]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrshdr-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][71] ([Intel XE#5812]) +16 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#1469] / [Intel XE#7399])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#2313]) +32 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][74] ([Intel XE#7905]) +23 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#7061]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#7061] / [Intel XE#7356])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#7865]) +8 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][78] ([Intel XE#7865]) +6 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#7308])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#3374] / [Intel XE#3544])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-lnl:          NOTRUN -> [SKIP][81] ([Intel XE#1503])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-lnl:          NOTRUN -> [SKIP][82] ([Intel XE#7591])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping:
    - shard-ptl:          NOTRUN -> [SKIP][83] ([Intel XE#7283])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5:
    - shard-lnl:          NOTRUN -> [SKIP][84] ([Intel XE#8303]) +1 other test skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier:
    - shard-lnl:          NOTRUN -> [SKIP][85] ([Intel XE#7283]) +3 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html

  * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#8303]) +1 other test skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#7283]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_plane@pixel-format-yf-tiled-modifier.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-ptl:          NOTRUN -> [SKIP][88] ([Intel XE#4596] / [Intel XE#5854])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][89] ([Intel XE#5020] / [Intel XE#7348])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a:
    - shard-lnl:          NOTRUN -> [SKIP][90] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-ptl:          NOTRUN -> [SKIP][92] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420:
    - shard-ptl:          NOTRUN -> [SKIP][93] ([Intel XE#8396]) +1 other test skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-lnl:          NOTRUN -> [FAIL][94] ([Intel XE#2029] / [Intel XE#7395])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#2893] / [Intel XE#7304])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][97] ([Intel XE#1489]) +2 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr@fbc-pr-no-drrs:
    - shard-lnl:          NOTRUN -> [SKIP][98] ([Intel XE#1406]) +1 other test skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_psr@fbc-pr-no-drrs.html

  * igt@kms_psr@fbc-psr2-primary-blt:
    - shard-lnl:          NOTRUN -> [SKIP][99] ([Intel XE#1406] / [Intel XE#7345])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_psr@fbc-psr2-primary-blt.html

  * igt@kms_psr@fbc-psr2-primary-blt@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][100] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_psr@fbc-psr2-primary-blt@edp-1.html

  * igt@kms_psr@fbc-psr2-sprite-blt@edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][101] ([Intel XE#1406] / [Intel XE#5835]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_psr@fbc-psr2-sprite-blt@edp-1.html

  * igt@kms_psr@psr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#2234] / [Intel XE#2850]) +5 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#3904] / [Intel XE#7342])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-ptl:          NOTRUN -> [SKIP][105] ([Intel XE#5821])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-lnl:          NOTRUN -> [SKIP][106] ([Intel XE#1127] / [Intel XE#5813])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-lnl:          NOTRUN -> [SKIP][107] ([Intel XE#1435] / [Intel XE#9142])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-ptl:          NOTRUN -> [SKIP][108] ([Intel XE#5910])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@kms_sharpness_filter@filter-basic:
    - shard-bmg:          NOTRUN -> [SKIP][109] ([Intel XE#6503])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_sharpness_filter@filter-basic.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-lnl:          NOTRUN -> [SKIP][110] ([Intel XE#362] / [Intel XE#5848])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vblank@ts-continuation-suspend:
    - shard-ptl:          [PASS][111] -> [ABORT][112] ([Intel XE#9375]) +3 other tests abort
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-5/igt@kms_vblank@ts-continuation-suspend.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-1/igt@kms_vblank@ts-continuation-suspend.html

  * igt@kms_vrr@flip-suspend@pipe-a-edp-1:
    - shard-ptl:          NOTRUN -> [FAIL][113] ([Intel XE#4227] / [Intel XE#7397]) +1 other test fail
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@kms_vrr@flip-suspend@pipe-a-edp-1.html

  * igt@kms_vrr@max-min:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#1499] / [Intel XE#9271])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@kms_vrr@max-min.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-lnl:          NOTRUN -> [SKIP][115] ([Intel XE#1499] / [Intel XE#9271])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@xe_ccs@suspend-resume@tile4-compressed-compfmt0-system-vram01:
    - shard-bmg:          NOTRUN -> [ABORT][116] ([Intel XE#9362])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@xe_ccs@suspend-resume@tile4-compressed-compfmt0-system-vram01.html

  * igt@xe_compute_preempt@compute-preempt-many-vram-evict:
    - shard-lnl:          NOTRUN -> [SKIP][117] ([Intel XE#5191] / [Intel XE#7316] / [Intel XE#7346])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_compute_preempt@compute-preempt-many-vram-evict.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-bmg:          NOTRUN -> [SKIP][118] ([Intel XE#2504] / [Intel XE#7319] / [Intel XE#7350])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-3/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][119] -> [INCOMPLETE][120] ([Intel XE#6321] / [Intel XE#8355])
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-2/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-beng-mixed-threads-small:
    - shard-ptl:          NOTRUN -> [SKIP][121] ([Intel XE#5764]) +2 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_evict@evict-beng-mixed-threads-small.html

  * igt@xe_evict@evict-large-external-cm:
    - shard-lnl:          NOTRUN -> [SKIP][122] ([Intel XE#6540] / [Intel XE#688]) +5 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_evict@evict-large-external-cm.html

  * igt@xe_evict@evict-small-multi-queue-cm:
    - shard-bmg:          NOTRUN -> [SKIP][123] ([Intel XE#8370])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@xe_evict@evict-small-multi-queue-cm.html

  * igt@xe_exec_balancer@no-exec-cm-parallel-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][124] ([Intel XE#7482]) +9 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_exec_balancer@no-exec-cm-parallel-userptr-invalidate-race.html

  * igt@xe_exec_balancer@no-exec-virtual-userptr-invalidate-race:
    - shard-ptl:          NOTRUN -> [SKIP][125] ([Intel XE#7482]) +6 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@xe_exec_balancer@no-exec-virtual-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind:
    - shard-ptl:          NOTRUN -> [SKIP][126] ([Intel XE#5575] / [Intel XE#7484]) +2 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
    - shard-lnl:          NOTRUN -> [SKIP][127] ([Intel XE#1392]) +3 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html

  * igt@xe_exec_basic@multigpu-no-exec-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][128] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@xe_exec_basic@multigpu-no-exec-rebind.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][129] ([Intel XE#8374]) +3 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_exec_fault_mode@many-multi-queue-rebind.html

  * igt@xe_exec_fault_mode@twice-multi-queue-invalid-userptr-fault:
    - shard-lnl:          NOTRUN -> [SKIP][130] ([Intel XE#8374]) +3 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_exec_fault_mode@twice-multi-queue-invalid-userptr-fault.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-imm:
    - shard-bmg:          NOTRUN -> [SKIP][131] ([Intel XE#8374]) +6 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-3/igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-imm.html

  * igt@xe_exec_mix_modes@exec-multi-queue-spinner-interrupted-lr:
    - shard-ptl:          NOTRUN -> [SKIP][132] ([Intel XE#9003])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_exec_mix_modes@exec-multi-queue-spinner-interrupted-lr.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd-smem:
    - shard-lnl:          NOTRUN -> [SKIP][133] ([Intel XE#8364]) +15 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd-smem.html

  * igt@xe_exec_multi_queue@max-queues-basic:
    - shard-bmg:          NOTRUN -> [SKIP][134] ([Intel XE#8364]) +12 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@xe_exec_multi_queue@max-queues-basic.html

  * igt@xe_exec_multi_queue@max-queues-preempt-mode-priority:
    - shard-ptl:          NOTRUN -> [SKIP][135] ([Intel XE#8364]) +8 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_exec_multi_queue@max-queues-preempt-mode-priority.html

  * igt@xe_exec_reset@cm-multi-queue-cat-error:
    - shard-lnl:          NOTRUN -> [SKIP][136] ([Intel XE#8369]) +1 other test skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_exec_reset@cm-multi-queue-cat-error.html

  * igt@xe_exec_reset@cm-multi-queue-gt-reset:
    - shard-bmg:          NOTRUN -> [SKIP][137] ([Intel XE#8369])
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@xe_exec_reset@cm-multi-queue-gt-reset.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][138] ([Intel XE#8378]) +3 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate.html

  * igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][139] ([Intel XE#8378]) +4 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr.html

  * igt@xe_exec_threads@threads-multi-queue-userptr-rebind-err:
    - shard-ptl:          NOTRUN -> [SKIP][140] ([Intel XE#8378])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_exec_threads@threads-multi-queue-userptr-rebind-err.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init:
    - shard-bmg:          [PASS][141] -> [ABORT][142] ([Intel XE#9463])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-8/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html

  * igt@xe_media_fill@media-fill:
    - shard-lnl:          NOTRUN -> [SKIP][143] ([Intel XE#560] / [Intel XE#7321] / [Intel XE#7453])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_media_fill@media-fill.html

  * igt@xe_mmap@small-bar:
    - shard-bmg:          NOTRUN -> [SKIP][144] ([Intel XE#586] / [Intel XE#7323] / [Intel XE#7384])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@xe_mmap@small-bar.html

  * igt@xe_mmap@vram:
    - shard-ptl:          NOTRUN -> [SKIP][145] ([Intel XE#5776])
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_mmap@vram.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-basic:
    - shard-bmg:          NOTRUN -> [SKIP][146] ([Intel XE#6964]) +4 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@xe_multigpu_svm@mgpu-atomic-op-basic.html

  * igt@xe_multigpu_svm@mgpu-migration-basic:
    - shard-ptl:          NOTRUN -> [SKIP][147] ([Intel XE#6964])
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_multigpu_svm@mgpu-migration-basic.html

  * igt@xe_multigpu_svm@mgpu-migration-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][148] ([Intel XE#6964])
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_multigpu_svm@mgpu-migration-prefetch.html

  * igt@xe_oa@non-zero-reason-all:
    - shard-ptl:          [PASS][149] -> [FAIL][150] ([Intel XE#7334]) +1 other test fail
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-1/igt@xe_oa@non-zero-reason-all.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-5/igt@xe_oa@non-zero-reason-all.html

  * igt@xe_page_reclaim@prl-invalidate-full:
    - shard-ptl:          NOTRUN -> [SKIP][151] ([Intel XE#7793])
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_page_reclaim@prl-invalidate-full.html

  * igt@xe_pat@l2-flush-opt-svm-pat-restrict:
    - shard-lnl:          NOTRUN -> [SKIP][152] ([Intel XE#7590] / [Intel XE#7772])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_pat@l2-flush-opt-svm-pat-restrict.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-lnl:          NOTRUN -> [SKIP][153] ([Intel XE#1420] / [Intel XE#2838] / [Intel XE#7590])
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_peer2peer@write:
    - shard-bmg:          NOTRUN -> [SKIP][154] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@xe_peer2peer@write.html

  * igt@xe_pm@d3cold-mocs:
    - shard-ptl:          NOTRUN -> [SKIP][155] ([Intel XE#5741])
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_pm@d3cold-mocs.html

  * igt@xe_pm@d3hot-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][156] ([Intel XE#5742] / [Intel XE#7328] / [Intel XE#7400])
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@xe_pm@d3hot-i2c.html

  * igt@xe_pm@s3-vm-bind-unbind-all:
    - shard-lnl:          NOTRUN -> [SKIP][157] ([Intel XE#584] / [Intel XE#7369]) +1 other test skip
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_pm@s3-vm-bind-unbind-all.html

  * igt@xe_pm@s4-vm-bind-userptr:
    - shard-lnl:          [PASS][158] -> [ABORT][159] ([Intel XE#9362]) +2 other tests abort
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-lnl-5/igt@xe_pm@s4-vm-bind-userptr.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-1/igt@xe_pm@s4-vm-bind-userptr.html

  * igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy:
    - shard-bmg:          NOTRUN -> [SKIP][160] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html

  * igt@xe_query@multigpu-query-invalid-size:
    - shard-lnl:          NOTRUN -> [SKIP][161] ([Intel XE#944]) +1 other test skip
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_query@multigpu-query-invalid-size.html

  * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
    - shard-ptl:          NOTRUN -> [SKIP][162] ([Intel XE#6019])
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html

  * igt@xe_query@multigpu-query-uc-fw-version-guc:
    - shard-bmg:          NOTRUN -> [SKIP][163] ([Intel XE#944])
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@xe_query@multigpu-query-uc-fw-version-guc.html

  * igt@xe_sriov_admin@bulk-sched-priority-vfs-disabled:
    - shard-lnl:          NOTRUN -> [SKIP][164] ([Intel XE#7174])
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_sriov_admin@bulk-sched-priority-vfs-disabled.html

  * igt@xe_sriov_flr@flr-each-isolation:
    - shard-lnl:          NOTRUN -> [SKIP][165] ([Intel XE#3342])
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_sriov_flr@flr-each-isolation.html

  * igt@xe_sriov_vram@vf-access-after-resize-up:
    - shard-lnl:          NOTRUN -> [SKIP][166] ([Intel XE#6376] / [Intel XE#7330] / [Intel XE#7422])
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_sriov_vram@vf-access-after-resize-up.html

  * igt@xe_vm@bind-array-enobufs:
    - shard-ptl:          NOTRUN -> [FAIL][167] ([Intel XE#9424])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@xe_vm@bind-array-enobufs.html

  * igt@xe_vm@out-of-memory:
    - shard-lnl:          NOTRUN -> [SKIP][168] ([Intel XE#5745] / [Intel XE#7892])
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_vm@out-of-memory.html

  * igt@xe_vm@overcommit-nonfault-vram-no-lr:
    - shard-ptl:          NOTRUN -> [SKIP][169] ([Intel XE#7892])
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_vm@overcommit-nonfault-vram-no-lr.html

  * igt@xe_wedged@basic-wedged:
    - shard-lnl:          NOTRUN -> [DMESG-WARN][170] ([Intel XE#8963])
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-7/igt@xe_wedged@basic-wedged.html

  
#### Possible fixes ####

  * igt@core_hotunplug@hotreplug:
    - shard-bmg:          [ABORT][171] ([Intel XE#9463]) -> [PASS][172]
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-2/igt@core_hotunplug@hotreplug.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-10/igt@core_hotunplug@hotreplug.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-hdmi-a-3:
    - shard-bmg:          [INCOMPLETE][173] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][174]
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-hdmi-a-3.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-edp-1:
    - shard-ptl:          [ABORT][175] ([Intel XE#7084] / [Intel XE#9362]) -> [PASS][176]
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-1/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-edp-1.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-edp-1.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [FAIL][177] ([Intel XE#301]) -> [PASS][178]
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_plane@plane-panning-bottom-right-suspend:
    - shard-ptl:          [ABORT][179] ([Intel XE#9363]) -> [PASS][180] +1 other test pass
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-7/igt@kms_plane@plane-panning-bottom-right-suspend.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@kms_plane@plane-panning-bottom-right-suspend.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-ptl:          [FAIL][181] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][182]
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-4/igt@kms_vrr@flip-basic-fastset.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-3/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1:
    - shard-ptl:          [FAIL][183] ([Intel XE#6293] / [Intel XE#7397]) -> [PASS][184]
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-4/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-3/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html

  * igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-vram01-vram01:
    - shard-bmg:          [ABORT][185] ([Intel XE#9362] / [Intel XE#9425]) -> [PASS][186]
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-4/igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-vram01-vram01.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-vram01-vram01.html

  * igt@xe_module_load@load:
    - shard-ptl:          ([SKIP][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [PASS][195], [PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212]) ([Intel XE#9286]) -> ([PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236], [PASS][237])
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-5/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-1/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-6/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-4/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-6/igt@xe_module_load@load.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-6/igt@xe_module_load@load.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-2/igt@xe_module_load@load.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-8/igt@xe_module_load@load.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-8/igt@xe_module_load@load.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-4/igt@xe_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-5/igt@xe_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-7/igt@xe_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-3/igt@xe_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-2/igt@xe_module_load@load.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-1/igt@xe_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-2/igt@xe_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-1/igt@xe_module_load@load.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-3/igt@xe_module_load@load.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-7/igt@xe_module_load@load.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-7/igt@xe_module_load@load.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-5/igt@xe_module_load@load.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-3/igt@xe_module_load@load.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-4/igt@xe_module_load@load.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-1/igt@xe_module_load@load.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-5/igt@xe_module_load@load.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-8/igt@xe_module_load@load.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-4/igt@xe_module_load@load.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-4/igt@xe_module_load@load.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-1/igt@xe_module_load@load.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-2/igt@xe_module_load@load.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-4/igt@xe_module_load@load.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-1/igt@xe_module_load@load.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_module_load@load.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_module_load@load.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_module_load@load.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@xe_module_load@load.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-4/igt@xe_module_load@load.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@xe_module_load@load.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-6/igt@xe_module_load@load.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-5/igt@xe_module_load@load.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-1/igt@xe_module_load@load.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-7/igt@xe_module_load@load.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-3/igt@xe_module_load@load.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-3/igt@xe_module_load@load.html
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-3/igt@xe_module_load@load.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-5/igt@xe_module_load@load.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-2/igt@xe_module_load@load.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-7/igt@xe_module_load@load.html
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-7/igt@xe_module_load@load.html
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-7/igt@xe_module_load@load.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-3/igt@xe_module_load@load.html

  * igt@xe_pm@s4-mocs:
    - shard-ptl:          [ABORT][238] ([Intel XE#9362]) -> [PASS][239]
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-3/igt@xe_pm@s4-mocs.html
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-8/igt@xe_pm@s4-mocs.html

  
#### Warnings ####

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][240] ([Intel XE#7084] / [Intel XE#8150]) -> [ABORT][241] ([Intel XE#9393])
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
    - shard-ptl:          [ABORT][242] ([Intel XE#7084] / [Intel XE#9362]) -> [ABORT][243] ([Intel XE#7084] / [Intel XE#9378])
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-ptl-1/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-ptl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][244] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][245] ([Intel XE#2509] / [Intel XE#7437])
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_ccs@suspend-resume:
    - shard-bmg:          [ABORT][246] ([Intel XE#9362] / [Intel XE#9425]) -> [ABORT][247] ([Intel XE#9362])
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-4/igt@xe_ccs@suspend-resume.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@xe_ccs@suspend-resume.html

  * igt@xe_exec_reset@gt-reset-fault-injection:
    - shard-bmg:          [ABORT][248] ([Intel XE#9145] / [Intel XE#9463]) -> [DMESG-WARN][249] ([Intel XE#9130])
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-10/igt@xe_exec_reset@gt-reset-fault-injection.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-6/igt@xe_exec_reset@gt-reset-fault-injection.html

  * igt@xe_pat@pat-sw-hw-suspend:
    - shard-bmg:          [ABORT][250] ([Intel XE#9362]) -> [FAIL][251] ([Intel XE#7695])
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0/shard-bmg-9/igt@xe_pat@pat-sw-hw-suspend.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/shard-bmg-3/igt@xe_pat@pat-sw-hw-suspend.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
  [Intel XE#5741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5741
  [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
  [Intel XE#5745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5745
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5776
  [Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
  [Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5821
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5824]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5824
  [Intel XE#5835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5835
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5846]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5846
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
  [Intel XE#5901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5901
  [Intel XE#5910]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5910
  [Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
  [Intel XE#6293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6293
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6925
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7316
  [Intel XE#7319]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7319
  [Intel XE#7321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7321
  [Intel XE#7323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7323
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7328
  [Intel XE#7330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7330
  [Intel XE#7334]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7334
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7346
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7350
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7359
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7384]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7384
  [Intel XE#7395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7395
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7400
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7422
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7453
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7591
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
  [Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
  [Intel XE#7772]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7772
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8391
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8586
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#9003]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9003
  [Intel XE#9009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9009
  [Intel XE#9130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9130
  [Intel XE#9142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9142
  [Intel XE#9145]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9145
  [Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
  [Intel XE#9286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9286
  [Intel XE#9287]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9287
  [Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
  [Intel XE#9363]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9363
  [Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
  [Intel XE#9375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9375
  [Intel XE#9378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9378
  [Intel XE#9393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9393
  [Intel XE#9424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9424
  [Intel XE#9425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9425
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#9463]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9463
  [Intel XE#9529]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9529


Build changes
-------------

  * Linux: xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0 -> xe-pw-172150v4

  IGT_9140: 3b0daa274edb520204660fa1e15424b66ce0aea0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5932-c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0: c159c34a6f6ab5c1931e5e0f0d6d34ad23528bf0
  xe-pw-172150v4: 172150v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172150v4/index.html

[-- Attachment #2: Type: text/html, Size: 84157 bytes --]