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From: Badal Nilawar <badal.nilawar@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: anshuman.gupta@intel.com, rodrigo.vivi@intel.com,
	daniele.ceraolospurio@intel.com, raag.jadav@intel.com,
	riana.tauro@intel.com, mallesh.koujalagi@intel.com,
	aravind.iddamsetty@intel.com, himal.prasad.ghimiray@intel.com,
	arvind.yadav@intel.com, syed.abdul.muqthyar.ahmed@intel.com,
	nitin.r.gote@intel.com
Subject: [PATCH v5 07/13] drm/xe/xe_ras: Report device memory errors using SIGID
Date: Fri, 23 Oct 2026 10:04:29 +0530	[thread overview]
Message-ID: <20261023043422.681260-22-badal.nilawar@intel.com> (raw)
In-Reply-To: <20261023043422.681260-15-badal.nilawar@intel.com>

Use xe_log_comp_info helper to report device memory errors using the
corresponding SIGID.

Example:
	xe 0000:03:00.0: [drm] SIGID=202 (020100020008002000300000)
DEVICE_MEMORY: Double-bit ECC error detected at sw address 0x63000

Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
---
v5:
  - Log unknown memory errors
  - Add example log in commit message (Raag)
---
 drivers/gpu/drm/xe/xe_ras.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 95e87c635b04..5ebfc6e8dfc7 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -643,6 +643,7 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
 static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_array *arr)
 {
 	struct xe_ras_memory_error *info = (void *)arr->details;
+	u8 cper_sev = ras_sev_to_cper_sev(arr->counter.common.severity);
 	int ret;
 
 	/*
@@ -654,17 +655,30 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
 	 */
 	switch (info->category) {
 	case XE_RAS_MEMORY_POISON:
-		xe_info(xe, "[RAS]: Poison error detected\n");
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Poison error detected\n");
 		break;
 	case XE_RAS_MEMORY_DATA_PARITY:
-		xe_info(xe, "[RAS]: Data parity error detected\n");
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Data parity error detected\n");
 		break;
 	case XE_RAS_MEMORY_DB_ECC:
 		ret = handle_page_offline(xe, info->sw_address, true);
-		if (ret)
+		if (ret) {
+			xe_log_comp(xe, cper_sev, DEVICE_MEMORY,
+				    &arr->counter, sizeof(arr->counter),
+				    "Failed to recover double-bit ECC error at sw address 0x%llx\n",
+				    info->sw_address);
 			return XE_RAS_RECOVERY_ACTION_RESET;
+		}
+
+		xe_log_comp_info(xe, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+				 "Double-bit ECC error at sw address 0x%llx\n",
+				 info->sw_address);
 		break;
 	default:
+		xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
+			    "Unknown error detected\n");
 		return XE_RAS_RECOVERY_ACTION_RESET;
 	}
 
-- 
2.54.0


  parent reply	other threads:[~2026-10-23  4:17 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-23  4:34 [PATCH v5 00/13] Add CPER logging support for CRI Badal Nilawar
2026-10-23  4:24 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev5) Patchwork
2026-10-23  4:26 ` ✓ CI.KUnit: success " Patchwork
2026-10-23  4:34 ` [PATCH v5 01/13] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
2026-10-24 11:38   ` Raag Jadav
2026-10-23  4:34 ` [PATCH v5 02/13] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-10-24 11:50   ` Raag Jadav
2026-10-23  4:34 ` [PATCH v5 03/13] drm/xe/cper: Initialize Intel-specific section header Badal Nilawar
2026-10-23  4:30   ` sashiko-bot
2026-10-26  5:57   ` Raag Jadav
2026-10-23  4:34 ` [PATCH v5 04/13] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
2026-10-26  9:54   ` Raag Jadav
2026-10-27  3:34     ` Nilawar, Badal
2026-10-23  4:34 ` [PATCH v5 05/13] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
2026-10-26 11:31   ` Raag Jadav
2026-10-23  4:34 ` [PATCH v5 06/13] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-10-26 12:29   ` Raag Jadav
2026-10-27  4:21     ` Nilawar, Badal
2026-10-23  4:34 ` Badal Nilawar [this message]
2026-10-26 12:47   ` [PATCH v5 07/13] drm/xe/xe_ras: Report device memory errors using SIGID Raag Jadav
2026-10-26 18:31     ` Nilawar, Badal
2026-10-27  1:29       ` Raag Jadav
2026-10-27  6:03         ` Nilawar, Badal
2026-10-23  4:34 ` [PATCH v5 08/13] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-10-23  6:24   ` Mallesh, Koujalagi
2026-10-27 12:43   ` Raag Jadav
2026-10-23  4:34 ` [PATCH v5 09/13] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-10-23  6:16   ` Mallesh, Koujalagi
2026-10-26 12:57   ` Raag Jadav
2026-10-23  4:34 ` [PATCH v5 10/13] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-10-26 15:17   ` Raag Jadav
2026-10-27  4:13     ` Raag Jadav
2026-10-23  4:34 ` [PATCH v5 11/13] drm/xe/xe_ras: Report unknown " Badal Nilawar
2026-10-23  4:34 ` [PATCH v5 12/13] drm/xe/xe_ras: Add support to retrieve info queue data Badal Nilawar
2026-10-23  4:34 ` [PATCH v5 13/13] drm/xe/cper: Prepare Intel CPER info records Badal Nilawar
2026-10-23  6:34 ` ✓ Xe.CI.FULL: success for Add CPER logging support for CRI (rev5) Patchwork
2026-10-23  6:35 ` ✓ Xe.CI.BAT: " Patchwork

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