From: Raag Jadav <raag.jadav@intel.com>
To: Badal Nilawar <badal.nilawar@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, daniele.ceraolospurio@intel.com,
riana.tauro@intel.com, mallesh.koujalagi@intel.com,
aravind.iddamsetty@intel.com, himal.prasad.ghimiray@intel.com,
arvind.yadav@intel.com, syed.abdul.muqthyar.ahmed@intel.com,
nitin.r.gote@intel.com
Subject: Re: [PATCH v5 09/13] drm/xe/xe_ras: Report soc internal errors using SIGID
Date: Mon, 26 Oct 2026 13:57:05 +0100 [thread overview]
Message-ID: <at9OIcg1DJRF78UC@black.igk.intel.com> (raw)
In-Reply-To: <20261023043422.681260-24-badal.nilawar@intel.com>
On Fri, Oct 23, 2026 at 10:04:31AM +0530, Badal Nilawar wrote:
> Use xe_log_* helpers to report soc internal errors.
>
> Example:
> xe 0000:03:00.0: [drm] *ERROR* SIGID=205 FATAL
> (020600700000000000000000) [Hardware Error]: SOC_INTERNAL:
> PUNIT error detected: 0x00000002
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> Cc: Riana Tauro <riana.tauro@intel.com>
> ---
> v5:
> - Log unknown soc internal errors
> ---
> drivers/gpu/drm/xe/xe_ras.c | 16 +++++++++-------
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 1f94dd1fb91b..4408fc530900 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -608,7 +608,6 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
> {
> struct xe_ras_soc_error *info = (void *)arr->details;
> struct xe_ras_soc_error_source *source = &info->source;
> - struct xe_ras_error_class *counter = &arr->counter;
>
> if (source->csc) {
> struct xe_ras_csc_error *csc_error = (void *)info->details;
> @@ -622,9 +621,8 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
> * is required.
> */
> if (csc_error->hec_fw_error) {
> - xe_err(xe, "[RAS]: CSC %s detected: 0x%x\n",
> - sev_to_str(counter->common.severity),
> - csc_error->hec_fw_error);
> + xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
> + "CSC error detected: 0x%08x\n", csc_error->hec_fw_error);
> xe_survivability_mode_runtime_enable(xe);
> return XE_RAS_RECOVERY_ACTION_DISCONNECT;
> }
> @@ -632,15 +630,19 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
> struct xe_ras_ieh_error *ieh_error = (void *)info->details;
>
> if (ieh_error->global_error_status & XE_RAS_SOC_IEH_PUNIT) {
> - xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
> - sev_to_str(counter->common.severity),
> - ieh_error->global_error_status);
> + xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
> + "PUNIT error detected: 0x%08x\n",
> + ieh_error->global_error_status);
> punit_error_handler(xe);
> return XE_RAS_RECOVERY_ACTION_DISCONNECT;
> }
> }
>
> /* For other SoC internal errors, request a reset as recovery mechanism */
> + xe_log_comp(xe, ras_sev_to_cper_sev(arr->counter.common.severity), SOC_INTERNAL,
> + &arr->counter, sizeof(arr->counter),
> + "Unknown error detected (csc=%u ieh=%u)\n",
If the error is unknown, we may want to print the entire source using 0x%08x.
Raag
> + source->csc, source->ieh);
> return XE_RAS_RECOVERY_ACTION_RESET;
> }
>
> --
> 2.54.0
>
next prev parent reply other threads:[~2026-10-26 12:57 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-23 4:34 [PATCH v5 00/13] Add CPER logging support for CRI Badal Nilawar
2026-10-23 4:24 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev5) Patchwork
2026-10-23 4:26 ` ✓ CI.KUnit: success " Patchwork
2026-10-23 4:34 ` [PATCH v5 01/13] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
2026-10-24 11:38 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 02/13] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-10-24 11:50 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 03/13] drm/xe/cper: Initialize Intel-specific section header Badal Nilawar
2026-10-23 4:30 ` sashiko-bot
2026-10-26 5:57 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 04/13] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
2026-10-26 9:54 ` Raag Jadav
2026-10-27 3:34 ` Nilawar, Badal
2026-10-23 4:34 ` [PATCH v5 05/13] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
2026-10-26 11:31 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 06/13] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-10-26 12:29 ` Raag Jadav
2026-10-27 4:21 ` Nilawar, Badal
2026-10-23 4:34 ` [PATCH v5 07/13] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-10-26 12:47 ` Raag Jadav
2026-10-26 18:31 ` Nilawar, Badal
2026-10-27 1:29 ` Raag Jadav
2026-10-27 6:03 ` Nilawar, Badal
2026-10-23 4:34 ` [PATCH v5 08/13] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-10-23 6:24 ` Mallesh, Koujalagi
2026-10-27 12:43 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 09/13] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-10-23 6:16 ` Mallesh, Koujalagi
2026-10-26 12:57 ` Raag Jadav [this message]
2026-10-23 4:34 ` [PATCH v5 10/13] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-10-26 15:17 ` Raag Jadav
2026-10-27 4:13 ` Raag Jadav
2026-10-23 4:34 ` [PATCH v5 11/13] drm/xe/xe_ras: Report unknown " Badal Nilawar
2026-10-23 4:34 ` [PATCH v5 12/13] drm/xe/xe_ras: Add support to retrieve info queue data Badal Nilawar
2026-10-23 4:34 ` [PATCH v5 13/13] drm/xe/cper: Prepare Intel CPER info records Badal Nilawar
2026-10-23 6:34 ` ✓ Xe.CI.FULL: success for Add CPER logging support for CRI (rev5) Patchwork
2026-10-23 6:35 ` ✓ Xe.CI.BAT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=at9OIcg1DJRF78UC@black.igk.intel.com \
--to=raag.jadav@intel.com \
--cc=anshuman.gupta@intel.com \
--cc=aravind.iddamsetty@intel.com \
--cc=arvind.yadav@intel.com \
--cc=badal.nilawar@intel.com \
--cc=daniele.ceraolospurio@intel.com \
--cc=himal.prasad.ghimiray@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=mallesh.koujalagi@intel.com \
--cc=nitin.r.gote@intel.com \
--cc=riana.tauro@intel.com \
--cc=rodrigo.vivi@intel.com \
--cc=syed.abdul.muqthyar.ahmed@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox