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From: "Summers, Stuart" <stuart.summers@intel.com>
To: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"Brost,  Matthew" <matthew.brost@intel.com>
Cc: "Roper, Matthew D" <matthew.d.roper@intel.com>,
	"De Marchi, Lucas" <lucas.demarchi@intel.com>
Subject: Re: [PATCH v2 09/12] drm/xe: Add xe_tlb_inval_idle helper
Date: Mon, 10 Nov 2025 18:48:42 +0000	[thread overview]
Message-ID: <2bf02520f70c3068b19fea9bac1bb0a289f965ad.camel@intel.com> (raw)
In-Reply-To: <20251104195616.3339137-10-matthew.brost@intel.com>

On Tue, 2025-11-04 at 11:56 -0800, Matthew Brost wrote:
> Introduce the xe_tlb_inval_idle helper to detect whether any TLB
> invalidations are currently in flight. This is used in context-based
> TLB
> invalidations to determine whether dummy TLB invalidations need to be
> sent to maintain proper TLB invalidation fence ordering..
> 
> v2:
>  - Implement xe_tlb_inval_idle based on pending list
> 
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>

I don't have any issue with this patch or the next one, but I want to
hold on full review until we have a working solution for the
registration/deregistration placement of this.

Thanks,
Stuart

> ---
>  drivers/gpu/drm/xe/xe_tlb_inval.c | 21 +++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_tlb_inval.h |  2 ++
>  2 files changed, 23 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c
> b/drivers/gpu/drm/xe/xe_tlb_inval.c
> index 7ee081b94f90..7ae6b9f884e9 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> @@ -44,11 +44,14 @@ static void xe_tlb_inval_fence_fini(struct
> xe_tlb_inval_fence *fence)
>  static void
>  xe_tlb_inval_fence_signal(struct xe_tlb_inval_fence *fence)
>  {
> +       struct xe_tlb_inval *tlb_inval = fence->tlb_inval;
>         bool stack = test_bit(FENCE_STACK_BIT, &fence->base.flags);
>  
>         lockdep_assert_held(&fence->tlb_inval->pending_lock);
>  
>         list_del(&fence->link);
> +       if (list_empty(&tlb_inval->pending_fences))
> +               cancel_delayed_work(&tlb_inval->fence_tdr);
>         trace_xe_tlb_inval_fence_signal(fence->tlb_inval->xe, fence);
>         xe_tlb_inval_fence_fini(fence);
>         dma_fence_signal(&fence->base);
> @@ -443,3 +446,21 @@ void xe_tlb_inval_fence_init(struct xe_tlb_inval
> *tlb_inval,
>                 dma_fence_get(&fence->base);
>         fence->tlb_inval = tlb_inval;
>  }
> +
> +/**
> + * xe_tlb_inval_idle() - Initialize TLB invalidation is idle
> + * @tlb_inval: TLB invalidation client
> + *
> + * Check the TLB invalidation seqno to determine if it is idle
> (i.e., no TLB
> + * invalidations are in flight). Expected to be called in the
> backend after the
> + * fence has been added to the pending list, and takes this into
> account.
> + *
> + * Return: True if TLB invalidation client is idle, False otherwise
> + */
> +bool xe_tlb_inval_idle(struct xe_tlb_inval *tlb_inval)
> +{
> +       lockdep_assert_held(&tlb_inval->seqno_lock);
> +
> +       guard(spinlock_irq)(&tlb_inval->pending_lock);
> +       return list_is_singular(&tlb_inval->pending_fences);
> +}
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.h
> b/drivers/gpu/drm/xe/xe_tlb_inval.h
> index 05614915463a..44a6d9177489 100644
> --- a/drivers/gpu/drm/xe/xe_tlb_inval.h
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval.h
> @@ -43,4 +43,6 @@ xe_tlb_inval_fence_wait(struct xe_tlb_inval_fence
> *fence)
>  
>  void xe_tlb_inval_done_handler(struct xe_tlb_inval *tlb_inval, int
> seqno);
>  
> +bool xe_tlb_inval_idle(struct xe_tlb_inval *tlb_inval);
> +
>  #endif /* _XE_TLB_INVAL_ */


  reply	other threads:[~2025-11-10 18:48 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-04 19:56 [PATCH v2 00/12] Context based TLB invalidations Matthew Brost
2025-11-04 19:56 ` [PATCH v2 01/12] drm/xe: Add normalize_invalidation_range Matthew Brost
2025-11-06 20:03   ` Summers, Stuart
2025-11-04 19:56 ` [PATCH v2 02/12] drm/xe: Make usm.asid_to_vm allocation use GFP_NOWAIT Matthew Brost
2025-11-06 22:08   ` Summers, Stuart
2025-11-06 22:13   ` Summers, Stuart
2025-11-04 19:56 ` [PATCH v2 03/12] drm/xe: Add xe_device_asid_to_vm helper Matthew Brost
2025-12-11 22:07   ` Matt Atwood
2025-11-04 19:56 ` [PATCH v2 04/12] drm/xe: Add vm to exec queues association Matthew Brost
2025-11-06 22:15   ` Summers, Stuart
2025-12-12 21:03   ` Summers, Stuart
2025-12-12 21:24     ` Matthew Brost
2025-12-12 21:37       ` Summers, Stuart
2025-11-04 19:56 ` [PATCH v2 05/12] drm/xe: Taint TLB invalidation seqno lock with GFP_KERNEL Matthew Brost
2025-12-11 22:35   ` Matt Atwood
2025-11-04 19:56 ` [PATCH v2 06/12] drm/xe: Do not forward invalid TLB invalidation seqnos to upper layers Matthew Brost
2025-11-06 22:05   ` Summers, Stuart
2025-11-04 19:56 ` [PATCH v2 07/12] drm/xe: Rename send_tlb_inval_ppgtt to send_tlb_inval_asid_ppgtt Matthew Brost
2025-11-06 20:22   ` Summers, Stuart
2025-11-04 19:56 ` [PATCH v2 08/12] drm/xe: Add send_tlb_inval_ppgtt helper Matthew Brost
2025-11-06 20:25   ` Summers, Stuart
2025-11-04 19:56 ` [PATCH v2 09/12] drm/xe: Add xe_tlb_inval_idle helper Matthew Brost
2025-11-10 18:48   ` Summers, Stuart [this message]
2025-12-12 22:00     ` Summers, Stuart
2025-11-04 19:56 ` [PATCH v2 10/12] drm/xe: Add exec queue active vfunc Matthew Brost
2025-11-04 19:56 ` [PATCH v2 11/12] drm/xe: Add context-based invalidation to GuC TLB invalidation backend Matthew Brost
2025-11-06 21:50   ` Summers, Stuart
2025-11-07  7:01     ` Matthew Brost
2025-11-10 19:29       ` Summers, Stuart
2025-11-11  1:01         ` Matthew Brost
2025-12-12 22:30   ` Summers, Stuart
2025-11-04 19:56 ` [PATCH v2 12/12] drm/xe: Enable context TLB invalidations for CI Matthew Brost

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