From: John Harrison <john.c.harrison@intel.com>
To: Nirmoy Das <nirmoy.das@intel.com>, <intel-xe@lists.freedesktop.org>
Cc: Badal Nilawar <badal.nilawar@intel.com>,
Matthew Auld <matthew.auld@intel.com>,
Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>,
Lucas De Marchi <lucas.demarchi@intel.com>,
<stable@vger.kernel.org>, Matthew Brost <matthew.brost@intel.com>
Subject: Re: [PATCH v5 2/3] drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout
Date: Fri, 1 Nov 2024 11:49:47 -0700 [thread overview]
Message-ID: <30f5ef7f-f58e-4c9f-a5f4-7a487f9b7fc6@intel.com> (raw)
In-Reply-To: <20241029120117.449694-2-nirmoy.das@intel.com>
On 10/29/2024 05:01, Nirmoy Das wrote:
> Flush xe ordered_wq in case of ufence timeout which is observed
> on LNL and that points to recent scheduling issue with E-cores.
>
> This is similar to the recent fix:
> commit e51527233804 ("drm/xe/guc/ct: Flush g2h worker in case of g2h
> response timeout") and should be removed once there is a E-core
> scheduling fix for LNL.
>
> v2: Add platform check(Himal)
> s/__flush_workqueue/flush_workqueue(Jani)
> v3: Remove gfx platform check as the issue related to cpu
> platform(John)
> v4: Use the Common macro(John) and print when the flush resolves
> timeout(Matt B)
>
> Cc: Badal Nilawar <badal.nilawar@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: <stable@vger.kernel.org> # v6.11+
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2754
> Suggested-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/xe/xe_wait_user_fence.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> index f5deb81eba01..5b4264ea38bd 100644
> --- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
> +++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> @@ -155,6 +155,13 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> }
>
> if (!timeout) {
> + LNL_FLUSH_WORKQUEUE(xe->ordered_wq);
> + err = do_compare(addr, args->value, args->mask,
> + args->op);
> + if (err <= 0) {
> + drm_dbg(&xe->drm, "LNL_FLUSH_WORKQUEUE resolved ufence timeout\n");
Should this not be a warning as well? To match the one in the G2H code,
with the reason being that we want CI to track how often this is occurring.
John.
> + break;
> + }
> err = -ETIME;
> break;
> }
next prev parent reply other threads:[~2024-11-01 18:49 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-29 12:01 [PATCH v5 1/3] drm/xe: Move LNL scheduling WA to xe_device.h Nirmoy Das
2024-10-29 12:01 ` [PATCH v5 2/3] drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout Nirmoy Das
2024-11-01 13:21 ` Matthew Auld
2024-11-01 18:49 ` John Harrison [this message]
2024-10-29 12:01 ` [PATCH v5 3/3] drm/xe/guc/tlb: Flush g2h worker in case of tlb timeout Nirmoy Das
2024-11-01 13:19 ` Matthew Auld
2024-11-01 18:51 ` John Harrison
2024-11-04 11:20 ` Nirmoy Das
2024-10-29 14:57 ` ✓ CI.Patch_applied: success for series starting with [v5,1/3] drm/xe: Move LNL scheduling WA to xe_device.h Patchwork
2024-10-29 14:58 ` ✗ CI.checkpatch: warning " Patchwork
2024-10-29 14:59 ` ✓ CI.KUnit: success " Patchwork
2024-10-29 15:10 ` ✓ CI.Build: " Patchwork
2024-10-29 15:13 ` ✓ CI.Hooks: " Patchwork
2024-10-29 15:14 ` ✓ CI.checksparse: " Patchwork
2024-10-29 15:41 ` ✓ CI.BAT: " Patchwork
2024-10-29 17:47 ` ✗ CI.FULL: failure " Patchwork
2024-11-01 13:09 ` [PATCH v5 1/3] " Nirmoy Das
2024-11-01 13:21 ` Matthew Auld
2024-11-01 13:44 ` Nirmoy Das
2024-11-01 15:47 ` Lucas De Marchi
2024-11-01 18:48 ` John Harrison
2024-11-04 9:52 ` Nirmoy Das
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