[PATCH v3 0/9] drm/i915/psr: PSR2 and Panel Replay with the joiner

[PATCH v3 0/9] drm/i915/psr: PSR2 and Panel Replay with the joiner

[Mika Kahola]

This is v3 of [1], with the following changes

- All pipe planes are in the state before the selective fetch check runs,
  so the local drm_atomic_add_affected_planes() and the plane support
  recheck are gone. The plane loop now runs on full update as well,
  plane states come out of the duplicate with a zero sized area.
- New patch resolving the PSR encoders through the joiner primary. The
  secondary has a zero uapi.encoder_mask, so intel_psr_lock(),
  intel_psr_wait_for_idle_locked() and the PSR2_MAN_TRK_CTL
  programming were all silently doing nothing for it (Jouni)
- Apply the SU area WAs on the merged area instead of per pipe.
  Wa 14019834836 was skipped altogether when only a secondary pipe had
  damage, as it looks at uapi.encoder_mask (Jouni)
- Back to pipe_src for the selective fetch area (Jouni)
- Split the merge patch up, the helper extraction and the alignment
  loop condition are now separate patches, leaving the merge patch
  with only the joiner handling

[1] https://lore.kernel.org/intel-xe/20261012124145.1960050-1-mika.kahola@intel.com/

Mika Kahola (9):
  drm/i915/psr: Track all joined pipes for frontbuffer tracking
  drm/i915/psr: Exclude the joiner secondary from active_non_psr_pipes
  drm/i915/psr: Take the selective fetch area from pipe_src
  drm/i915/psr: Split the selective fetch calculation into helpers
  drm/i915/psr: Derive the alignment loop condition from the SU area
  drm/i915/psr: Merge the selective fetch area across joined pipes
  drm/i915/psr: Resolve the PSR encoders through the joiner primary
  drm/i915/psr: Allow Panel Replay and PSR2 with joiner
  drm/i915/display: Allow forcing the joiner on eDP

 .../drm/i915/display/intel_display_debugfs.c  |   5 +-
 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  12 +-
 drivers/gpu/drm/i915/display/intel_psr.c      | 364 +++++++++++++-----
 4 files changed, 274 insertions(+), 108 deletions(-)

-- 
2.43.0

[PATCH v3 1/9] drm/i915/psr: Track all joined pipes for frontbuffer tracking

[Mika Kahola]

psr.pipe is the joiner primary only, so frontbuffer bits coming from a
secondary pipe get masked out and the update goes unnoticed. Add
psr.pipe_mask covering every joined pipe and use that instead.

No functional change, joiner is still rejected in compute_config().

v2: Split the active_non_psr_pipes change into its own patch (Jouni)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 25 ++++++++++++++-----
 2 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8f9fb2603638a..4756e50a3b707 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1802,6 +1802,7 @@ struct intel_psr {
 	bool enabled;
 	int pause_counter;
 	enum pipe pipe;
+	u8 pipe_mask;
 	enum transcoder transcoder;
 	bool active;
 	struct work_struct work;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4ae47d33096a6..27ccccdc72315 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -36,6 +36,7 @@
 #include "intel_cursor_regs.h"
 #include "intel_ddi.h"
 #include "intel_de.h"
+#include "intel_display.h"
 #include "intel_display_irq.h"
 #include "intel_display_regs.h"
 #include "intel_display_rpm.h"
@@ -1802,6 +1803,19 @@ static void psr2_dc3co_disable_work(struct work_struct *work)
 	mutex_unlock(&intel_dp->psr.lock);
 }
 
+/* Frontbuffer bits for every pipe driving this PSR/Panel Replay instance. */
+static unsigned int psr_frontbuffer_mask(struct intel_dp *intel_dp)
+{
+	struct intel_display *display = to_intel_display(intel_dp);
+	unsigned int mask = 0;
+	enum pipe pipe;
+
+	for_each_pipe_masked(display, pipe, intel_dp->psr.pipe_mask)
+		mask |= INTEL_FRONTBUFFER_ALL_MASK(pipe);
+
+	return mask;
+}
+
 static void
 psr2_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits)
 {
@@ -1817,8 +1831,7 @@ psr2_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits
 	 * At every frontbuffer flush flip event modified delay of delayed work,
 	 * when delayed work schedules that means display has been idle.
 	 */
-	if (!(frontbuffer_bits &
-	    INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe)))
+	if (!(frontbuffer_bits & psr_frontbuffer_mask(intel_dp)))
 		return;
 
 	mod_delayed_work(display->wq.unordered, &intel_dp->psr.dc3co_work,
@@ -2179,6 +2192,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
 	intel_dp->psr.busy_frontbuffer_bits = 0;
 	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
+	intel_dp->psr.pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
 	intel_dp->psr.transcoder = crtc_state->cpu_transcoder;
 	/* DC5/DC6 requires at least 6 idle frames */
 	val = usecs_to_jiffies(intel_get_frame_time_us(crtc_state) * 6);
@@ -2398,6 +2412,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 	intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
 	intel_dp->psr.active_non_psr_pipes = 0;
 	intel_dp->psr.pkg_c_latency_used = 0;
+	intel_dp->psr.pipe_mask = 0;
 	cancel_delayed_work(&intel_dp->psr.dc3co_work);
 	intel_dp->psr.dc3co_allowed = false;
 }
@@ -3617,8 +3632,7 @@ void intel_psr_invalidate(struct intel_display *display,
 			continue;
 		}
 
-		pipe_frontbuffer_bits &=
-			INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe);
+		pipe_frontbuffer_bits &= psr_frontbuffer_mask(intel_dp);
 		intel_dp->psr.busy_frontbuffer_bits |= pipe_frontbuffer_bits;
 
 		if (pipe_frontbuffer_bits)
@@ -3698,8 +3712,7 @@ void intel_psr_flush(struct intel_display *display,
 			continue;
 		}
 
-		pipe_frontbuffer_bits &=
-			INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe);
+		pipe_frontbuffer_bits &= psr_frontbuffer_mask(intel_dp);
 		intel_dp->psr.busy_frontbuffer_bits &= ~pipe_frontbuffer_bits;
 
 		/*
-- 
2.43.0

Re: [PATCH v3 1/9] drm/i915/psr: Track all joined pipes for frontbuffer tracking

[Hogander, Jouni]

On Fri, 2026-10-23 at 10:00 +0000, Mika Kahola wrote:
> psr.pipe is the joiner primary only, so frontbuffer bits coming from
> a
> secondary pipe get masked out and the update goes unnoticed. Add
> psr.pipe_mask covering every joined pipe and use that instead.
> 
> No functional change, joiner is still rejected in compute_config().
> 
> v2: Split the active_non_psr_pipes change into its own patch (Jouni)
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

> ---
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/display/intel_psr.c      | 25 ++++++++++++++---
> --
>  2 files changed, 20 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 8f9fb2603638a..4756e50a3b707 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1802,6 +1802,7 @@ struct intel_psr {
>  	bool enabled;
>  	int pause_counter;
>  	enum pipe pipe;
> +	u8 pipe_mask;
>  	enum transcoder transcoder;
>  	bool active;
>  	struct work_struct work;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4ae47d33096a6..27ccccdc72315 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -36,6 +36,7 @@
>  #include "intel_cursor_regs.h"
>  #include "intel_ddi.h"
>  #include "intel_de.h"
> +#include "intel_display.h"
>  #include "intel_display_irq.h"
>  #include "intel_display_regs.h"
>  #include "intel_display_rpm.h"
> @@ -1802,6 +1803,19 @@ static void psr2_dc3co_disable_work(struct
> work_struct *work)
>  	mutex_unlock(&intel_dp->psr.lock);
>  }
>  
> +/* Frontbuffer bits for every pipe driving this PSR/Panel Replay
> instance. */
> +static unsigned int psr_frontbuffer_mask(struct intel_dp *intel_dp)
> +{
> +	struct intel_display *display = to_intel_display(intel_dp);
> +	unsigned int mask = 0;
> +	enum pipe pipe;
> +
> +	for_each_pipe_masked(display, pipe, intel_dp->psr.pipe_mask)
> +		mask |= INTEL_FRONTBUFFER_ALL_MASK(pipe);
> +
> +	return mask;
> +}
> +
>  static void
>  psr2_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int
> frontbuffer_bits)
>  {
> @@ -1817,8 +1831,7 @@ psr2_dc3co_flush_locked(struct intel_dp
> *intel_dp, unsigned int frontbuffer_bits
>  	 * At every frontbuffer flush flip event modified delay of
> delayed work,
>  	 * when delayed work schedules that means display has been
> idle.
>  	 */
> -	if (!(frontbuffer_bits &
> -	    INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe)))
> +	if (!(frontbuffer_bits & psr_frontbuffer_mask(intel_dp)))
>  		return;
>  
>  	mod_delayed_work(display->wq.unordered, &intel_dp-
> >psr.dc3co_work,
> @@ -2179,6 +2192,7 @@ static void intel_psr_enable_locked(struct
> intel_dp *intel_dp,
>  	intel_dp->psr.panel_replay_enabled = crtc_state-
> >has_panel_replay;
>  	intel_dp->psr.busy_frontbuffer_bits = 0;
>  	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)-
> >pipe;
> +	intel_dp->psr.pipe_mask =
> intel_crtc_joined_pipe_mask(crtc_state);
>  	intel_dp->psr.transcoder = crtc_state->cpu_transcoder;
>  	/* DC5/DC6 requires at least 6 idle frames */
>  	val = usecs_to_jiffies(intel_get_frame_time_us(crtc_state) *
> 6);
> @@ -2398,6 +2412,7 @@ static void intel_psr_disable_locked(struct
> intel_dp *intel_dp)
>  	intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
>  	intel_dp->psr.active_non_psr_pipes = 0;
>  	intel_dp->psr.pkg_c_latency_used = 0;
> +	intel_dp->psr.pipe_mask = 0;
>  	cancel_delayed_work(&intel_dp->psr.dc3co_work);
>  	intel_dp->psr.dc3co_allowed = false;
>  }
> @@ -3617,8 +3632,7 @@ void intel_psr_invalidate(struct intel_display
> *display,
>  			continue;
>  		}
>  
> -		pipe_frontbuffer_bits &=
> -			INTEL_FRONTBUFFER_ALL_MASK(intel_dp-
> >psr.pipe);
> +		pipe_frontbuffer_bits &=
> psr_frontbuffer_mask(intel_dp);
>  		intel_dp->psr.busy_frontbuffer_bits |=
> pipe_frontbuffer_bits;
>  
>  		if (pipe_frontbuffer_bits)
> @@ -3698,8 +3712,7 @@ void intel_psr_flush(struct intel_display
> *display,
>  			continue;
>  		}
>  
> -		pipe_frontbuffer_bits &=
> -			INTEL_FRONTBUFFER_ALL_MASK(intel_dp-
> >psr.pipe);
> +		pipe_frontbuffer_bits &=
> psr_frontbuffer_mask(intel_dp);
>  		intel_dp->psr.busy_frontbuffer_bits &=
> ~pipe_frontbuffer_bits;
>  
>  		/*

[PATCH v3 2/9] drm/i915/psr: Exclude the joiner secondary from active_non_psr_pipes

[Mika Kahola]

active_non_psr_pipes holds the pipes that are active but not driving
PSR. Masking out only the primary leaves the joiner secondary counted
as a non-PSR pipe, even though it belongs to the same PSR instance,
which blocks DC5/DC6 and keeps Wa_16025596647 applied.

No functional change, joiner is still rejected in compute_config().

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 27ccccdc72315..fb9b5013a9649 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1862,7 +1862,7 @@ void intel_psr_set_non_psr_pipes(struct intel_dp *intel_dp,
 	active_pipes = intel_calc_active_pipes(state, active_pipes);
 
 	crtc_state->active_non_psr_pipes = active_pipes &
-		~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe);
+		~intel_crtc_joined_pipe_mask(crtc_state);
 }
 
 void intel_psr_compute_config(struct intel_dp *intel_dp,
-- 
2.43.0

Re: [PATCH v3 2/9] drm/i915/psr: Exclude the joiner secondary from active_non_psr_pipes

[Hogander, Jouni]

On Fri, 2026-10-23 at 10:00 +0000, Mika Kahola wrote:
> active_non_psr_pipes holds the pipes that are active but not driving
> PSR. Masking out only the primary leaves the joiner secondary counted
> as a non-PSR pipe, even though it belongs to the same PSR instance,
> which blocks DC5/DC6 and keeps Wa_16025596647 applied.
> 
> No functional change, joiner is still rejected in compute_config().
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 27ccccdc72315..fb9b5013a9649 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1862,7 +1862,7 @@ void intel_psr_set_non_psr_pipes(struct
> intel_dp *intel_dp,
>  	active_pipes = intel_calc_active_pipes(state, active_pipes);
>  
>  	crtc_state->active_non_psr_pipes = active_pipes &
> -		~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe);
> +		~intel_crtc_joined_pipe_mask(crtc_state);
>  }
>  
>  void intel_psr_compute_config(struct intel_dp *intel_dp,

[PATCH v3 3/9] drm/i915/psr: Take the selective fetch area from pipe_src

[Mika Kahola]

The adjusted mode spans all the joined pipes, so it is the wrong
reference for a per-pipe area. pipe_src is this pipe's own share, and
it is the space plane destination rectangles are clipped into.

No functional change, the two are the same without a joiner.

v2: Use pipe_mode instead of pipe_src (Jouni)
v3: Back to pipe_src (Jouni)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index fb9b5013a9649..2a4d6681d50e3 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2917,8 +2917,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 	struct drm_rect display_area = {
 		.x1 = 0,
 		.y1 = 0,
-		.x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
-		.y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay,
+		.x2 = drm_rect_width(&crtc_state->pipe_src),
+		.y2 = drm_rect_height(&crtc_state->pipe_src),
 	};
 	bool full_update = false, su_area_changed;
 	int i;
-- 
2.43.0

Re: [PATCH v3 3/9] drm/i915/psr: Take the selective fetch area from pipe_src

[Hogander, Jouni]

On Fri, 2026-10-23 at 10:00 +0000, Mika Kahola wrote:
> The adjusted mode spans all the joined pipes, so it is the wrong
> reference for a per-pipe area. pipe_src is this pipe's own share, and
> it is the space plane destination rectangles are clipped into.
> 
> No functional change, the two are the same without a joiner.
> 
> v2: Use pipe_mode instead of pipe_src (Jouni)
> v3: Back to pipe_src (Jouni)
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index fb9b5013a9649..2a4d6681d50e3 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2917,8 +2917,8 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  	struct drm_rect display_area = {
>  		.x1 = 0,
>  		.y1 = 0,
> -		.x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
> -		.y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay,
> +		.x2 = drm_rect_width(&crtc_state->pipe_src),
> +		.y2 = drm_rect_height(&crtc_state->pipe_src),
>  	};
>  	bool full_update = false, su_area_changed;
>  	int i;

[PATCH v3 4/9] drm/i915/psr: Split the selective fetch calculation into helpers

[Mika Kahola]

The joiner needs every joined pipe to have its selective update area
calculated before any of them sets the plane areas, but
intel_psr2_sel_fetch_update() does both in one go. Move the two halves
into psr2_sel_fetch_compute_su_area() and
psr2_sel_fetch_apply_su_area() and call them in turn.

No functional change.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 147 ++++++++++++++---------
 1 file changed, 90 insertions(+), 57 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 2a4d6681d50e3..9db064fb39afd 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2906,11 +2906,10 @@ intel_psr_apply_su_area_workarounds(struct intel_crtc_state *crtc_state)
 		intel_psr_apply_pr_link_on_su_wa(crtc_state);
 }
 
-int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
-				struct intel_crtc *crtc)
+static void psr2_sel_fetch_compute_su_area(struct intel_atomic_state *state,
+					   struct intel_crtc *crtc,
+					   bool *full_update)
 {
-	const struct intel_crtc_state *old_crtc_state =
-		intel_atomic_get_old_crtc_state(state, crtc);
 	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
 	struct intel_plane_state *new_plane_state, *old_plane_state;
 	struct intel_plane *plane;
@@ -2920,24 +2919,9 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 		.x2 = drm_rect_width(&crtc_state->pipe_src),
 		.y2 = drm_rect_height(&crtc_state->pipe_src),
 	};
-	bool full_update = false, su_area_changed;
 	int i;
 
-	/*
-	 * Selective fetch is not always usable, for instance it is dropped
-	 * while pipe CRC is active. The planes keep their selective fetch
-	 * enable bit set in hardware over that, and a plane disabled while
-	 * selective fetch is off never gets the bit cleared. Once selective
-	 * fetch comes back the hardware would resume fetching for a plane that
-	 * is no longer enabled and keep its DDB range reserved, so have the
-	 * plane update drop the bit for every plane of the pipe as selective
-	 * fetch is turned off.
-	 */
-	crtc_state->clear_psr2_sel_fetch = old_crtc_state->enable_psr2_sel_fetch &&
-		!crtc_state->enable_psr2_sel_fetch;
-
-	if (!crtc_state->enable_psr2_sel_fetch)
-		return 0;
+	*full_update = false;
 
 	crtc_state->psr2_su_area.x1 = 0;
 	crtc_state->psr2_su_area.y1 = -1;
@@ -2945,8 +2929,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 	crtc_state->psr2_su_area.y2 = -1;
 
 	if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) {
-		full_update = true;
-		goto skip_su_area_calc;
+		*full_update = true;
+		return;
 	}
 
 	/*
@@ -2969,7 +2953,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 
 		if (new_plane_state->uapi.visible &&
 		    !psr2_sel_fetch_plane_state_supported(new_plane_state)) {
-			full_update = true;
+			*full_update = true;
 			break;
 		}
 
@@ -3026,42 +3010,24 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 	 * calculation for those.
 	 */
 	if (crtc_state->psr2_su_area.y1 == -1)
-		full_update = true;
-
-	if (full_update)
-		goto skip_su_area_calc;
-
-	intel_psr_apply_su_area_workarounds(crtc_state);
-
-	do {
-		bool cursor_in_su_area = false;
-
-		/*
-		 * Adjust su area to cover cursor fully as necessary
-		 * (early transport). A visible cursor is in the state
-		 * even when it is not updated by itself as all planes
-		 * of the pipe are added into the state before the plane
-		 * checks when selective fetch is enabled.
-		 */
-		intel_psr2_sel_fetch_et_alignment(state, crtc, &display_area,
-						  &cursor_in_su_area);
-
-		su_area_changed = intel_psr2_sel_fetch_pipe_alignment(crtc_state);
+		*full_update = true;
+}
 
-		/*
-		 * If the cursor was outside the SU area before
-		 * alignment, the alignment step (which only expands
-		 * SU) may pull the cursor partially inside, so we
-		 * must run ET alignment again to fully cover it. But
-		 * if the cursor was already fully inside before
-		 * alignment, expanding the SU area won't change that,
-		 * so no further work is needed.
-		 */
-		if (cursor_in_su_area)
-			break;
-	} while (su_area_changed);
+static int psr2_sel_fetch_apply_su_area(struct intel_atomic_state *state,
+					struct intel_crtc *crtc,
+					bool full_update)
+{
+	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+	struct intel_plane_state *new_plane_state, *old_plane_state;
+	struct intel_plane *plane;
+	struct drm_rect display_area = {
+		.x1 = 0,
+		.y1 = 0,
+		.x2 = drm_rect_width(&crtc_state->pipe_src),
+		.y2 = drm_rect_height(&crtc_state->pipe_src),
+	};
+	int i;
 
-skip_su_area_calc:
 	if (full_update)
 		clip_area_update(&crtc_state->psr2_su_area, &display_area,
 				 &display_area);
@@ -3121,6 +3087,73 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 	return 0;
 }
 
+int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
+				struct intel_crtc *crtc)
+{
+	const struct intel_crtc_state *old_crtc_state =
+		intel_atomic_get_old_crtc_state(state, crtc);
+	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+	struct drm_rect display_area = {
+		.x1 = 0,
+		.y1 = 0,
+		.x2 = drm_rect_width(&crtc_state->pipe_src),
+		.y2 = drm_rect_height(&crtc_state->pipe_src),
+	};
+	bool full_update, su_area_changed;
+
+	/*
+	 * Selective fetch is not always usable, for instance it is dropped
+	 * while pipe CRC is active. The planes keep their selective fetch
+	 * enable bit set in hardware over that, and a plane disabled while
+	 * selective fetch is off never gets the bit cleared. Once selective
+	 * fetch comes back the hardware would resume fetching for a plane that
+	 * is no longer enabled and keep its DDB range reserved, so have the
+	 * plane update drop the bit for every plane of the pipe as selective
+	 * fetch is turned off.
+	 */
+	crtc_state->clear_psr2_sel_fetch = old_crtc_state->enable_psr2_sel_fetch &&
+		!crtc_state->enable_psr2_sel_fetch;
+
+	if (!crtc_state->enable_psr2_sel_fetch)
+		return 0;
+
+	psr2_sel_fetch_compute_su_area(state, crtc, &full_update);
+
+	if (!full_update) {
+		intel_psr_apply_su_area_workarounds(crtc_state);
+
+		do {
+			bool cursor_in_su_area = false;
+
+			/*
+			 * Adjust su area to cover cursor fully as necessary
+			 * (early transport). A visible cursor is in the state
+			 * even when it is not updated by itself as all planes
+			 * of the pipe are added into the state before the plane
+			 * checks when selective fetch is enabled.
+			 */
+			intel_psr2_sel_fetch_et_alignment(state, crtc, &display_area,
+							  &cursor_in_su_area);
+
+			su_area_changed = intel_psr2_sel_fetch_pipe_alignment(crtc_state);
+
+			/*
+			 * If the cursor was outside the SU area before
+			 * alignment, the alignment step (which only expands
+			 * SU) may pull the cursor partially inside, so we
+			 * must run ET alignment again to fully cover it. But
+			 * if the cursor was already fully inside before
+			 * alignment, expanding the SU area won't change that,
+			 * so no further work is needed.
+			 */
+			if (cursor_in_su_area)
+				break;
+		} while (su_area_changed);
+	}
+
+	return psr2_sel_fetch_apply_su_area(state, crtc, full_update);
+}
+
 void intel_psr2_panic_force_full_update(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
-- 
2.43.0

Re: [PATCH v3 4/9] drm/i915/psr: Split the selective fetch calculation into helpers

[Hogander, Jouni]

On Fri, 2026-10-23 at 10:00 +0000, Mika Kahola wrote:
> The joiner needs every joined pipe to have its selective update area
> calculated before any of them sets the plane areas, but
> intel_psr2_sel_fetch_update() does both in one go. Move the two
> halves
> into psr2_sel_fetch_compute_su_area() and
> psr2_sel_fetch_apply_su_area() and call them in turn.
> 
> No functional change.
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 147 ++++++++++++++-------
> --
>  1 file changed, 90 insertions(+), 57 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 2a4d6681d50e3..9db064fb39afd 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2906,11 +2906,10 @@ intel_psr_apply_su_area_workarounds(struct
> intel_crtc_state *crtc_state)
>  		intel_psr_apply_pr_link_on_su_wa(crtc_state);
>  }
>  
> -int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> -				struct intel_crtc *crtc)
> +static void psr2_sel_fetch_compute_su_area(struct intel_atomic_state
> *state,
> +					   struct intel_crtc *crtc,
> +					   bool *full_update)
>  {
> -	const struct intel_crtc_state *old_crtc_state =
> -		intel_atomic_get_old_crtc_state(state, crtc);
>  	struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
>  	struct intel_plane_state *new_plane_state, *old_plane_state;
>  	struct intel_plane *plane;
> @@ -2920,24 +2919,9 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  		.x2 = drm_rect_width(&crtc_state->pipe_src),
>  		.y2 = drm_rect_height(&crtc_state->pipe_src),
>  	};
> -	bool full_update = false, su_area_changed;
>  	int i;
>  
> -	/*
> -	 * Selective fetch is not always usable, for instance it is
> dropped
> -	 * while pipe CRC is active. The planes keep their selective
> fetch
> -	 * enable bit set in hardware over that, and a plane
> disabled while
> -	 * selective fetch is off never gets the bit cleared. Once
> selective
> -	 * fetch comes back the hardware would resume fetching for a
> plane that
> -	 * is no longer enabled and keep its DDB range reserved, so
> have the
> -	 * plane update drop the bit for every plane of the pipe as
> selective
> -	 * fetch is turned off.
> -	 */
> -	crtc_state->clear_psr2_sel_fetch = old_crtc_state-
> >enable_psr2_sel_fetch &&
> -		!crtc_state->enable_psr2_sel_fetch;
> -
> -	if (!crtc_state->enable_psr2_sel_fetch)
> -		return 0;
> +	*full_update = false;
>  
>  	crtc_state->psr2_su_area.x1 = 0;
>  	crtc_state->psr2_su_area.y1 = -1;
> @@ -2945,8 +2929,8 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  	crtc_state->psr2_su_area.y2 = -1;
>  
>  	if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) {
> -		full_update = true;
> -		goto skip_su_area_calc;
> +		*full_update = true;
> +		return;
>  	}
>  
>  	/*
> @@ -2969,7 +2953,7 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  
>  		if (new_plane_state->uapi.visible &&
>  		   
> !psr2_sel_fetch_plane_state_supported(new_plane_state)) {
> -			full_update = true;
> +			*full_update = true;
>  			break;
>  		}
>  
> @@ -3026,42 +3010,24 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  	 * calculation for those.
>  	 */
>  	if (crtc_state->psr2_su_area.y1 == -1)
> -		full_update = true;
> -
> -	if (full_update)
> -		goto skip_su_area_calc;
> -
> -	intel_psr_apply_su_area_workarounds(crtc_state);
> -
> -	do {
> -		bool cursor_in_su_area = false;
> -
> -		/*
> -		 * Adjust su area to cover cursor fully as necessary
> -		 * (early transport). A visible cursor is in the
> state
> -		 * even when it is not updated by itself as all
> planes
> -		 * of the pipe are added into the state before the
> plane
> -		 * checks when selective fetch is enabled.
> -		 */
> -		intel_psr2_sel_fetch_et_alignment(state, crtc,
> &display_area,
> -						 
> &cursor_in_su_area);
> -
> -		su_area_changed =
> intel_psr2_sel_fetch_pipe_alignment(crtc_state);
> +		*full_update = true;
> +}
>  
> -		/*
> -		 * If the cursor was outside the SU area before
> -		 * alignment, the alignment step (which only expands
> -		 * SU) may pull the cursor partially inside, so we
> -		 * must run ET alignment again to fully cover it.
> But
> -		 * if the cursor was already fully inside before
> -		 * alignment, expanding the SU area won't change
> that,
> -		 * so no further work is needed.
> -		 */
> -		if (cursor_in_su_area)
> -			break;
> -	} while (su_area_changed);
> +static int psr2_sel_fetch_apply_su_area(struct intel_atomic_state
> *state,
> +					struct intel_crtc *crtc,
> +					bool full_update)
> +{
> +	struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> +	struct intel_plane_state *new_plane_state, *old_plane_state;
> +	struct intel_plane *plane;
> +	struct drm_rect display_area = {
> +		.x1 = 0,
> +		.y1 = 0,
> +		.x2 = drm_rect_width(&crtc_state->pipe_src),
> +		.y2 = drm_rect_height(&crtc_state->pipe_src),
> +	};
> +	int i;
>  
> -skip_su_area_calc:
>  	if (full_update)
>  		clip_area_update(&crtc_state->psr2_su_area,
> &display_area,
>  				 &display_area);
> @@ -3121,6 +3087,73 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  	return 0;
>  }
>  
> +int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> +				struct intel_crtc *crtc)
> +{
> +	const struct intel_crtc_state *old_crtc_state =
> +		intel_atomic_get_old_crtc_state(state, crtc);
> +	struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> +	struct drm_rect display_area = {
> +		.x1 = 0,
> +		.y1 = 0,
> +		.x2 = drm_rect_width(&crtc_state->pipe_src),
> +		.y2 = drm_rect_height(&crtc_state->pipe_src),
> +	};
> +	bool full_update, su_area_changed;
> +
> +	/*
> +	 * Selective fetch is not always usable, for instance it is
> dropped
> +	 * while pipe CRC is active. The planes keep their selective
> fetch
> +	 * enable bit set in hardware over that, and a plane
> disabled while
> +	 * selective fetch is off never gets the bit cleared. Once
> selective
> +	 * fetch comes back the hardware would resume fetching for a
> plane that
> +	 * is no longer enabled and keep its DDB range reserved, so
> have the
> +	 * plane update drop the bit for every plane of the pipe as
> selective
> +	 * fetch is turned off.
> +	 */
> +	crtc_state->clear_psr2_sel_fetch = old_crtc_state-
> >enable_psr2_sel_fetch &&
> +		!crtc_state->enable_psr2_sel_fetch;
> +
> +	if (!crtc_state->enable_psr2_sel_fetch)
> +		return 0;
> +
> +	psr2_sel_fetch_compute_su_area(state, crtc, &full_update);
> +
> +	if (!full_update) {
> +		intel_psr_apply_su_area_workarounds(crtc_state);
> +
> +		do {
> +			bool cursor_in_su_area = false;
> +
> +			/*
> +			 * Adjust su area to cover cursor fully as
> necessary
> +			 * (early transport). A visible cursor is in
> the state
> +			 * even when it is not updated by itself as
> all planes
> +			 * of the pipe are added into the state
> before the plane
> +			 * checks when selective fetch is enabled.
> +			 */
> +			intel_psr2_sel_fetch_et_alignment(state,
> crtc, &display_area,
> +							 
> &cursor_in_su_area);
> +
> +			su_area_changed =
> intel_psr2_sel_fetch_pipe_alignment(crtc_state);
> +
> +			/*
> +			 * If the cursor was outside the SU area
> before
> +			 * alignment, the alignment step (which only
> expands
> +			 * SU) may pull the cursor partially inside,
> so we
> +			 * must run ET alignment again to fully
> cover it. But
> +			 * if the cursor was already fully inside
> before
> +			 * alignment, expanding the SU area won't
> change that,
> +			 * so no further work is needed.
> +			 */
> +			if (cursor_in_su_area)
> +				break;
> +		} while (su_area_changed);
> +	}
> +
> +	return psr2_sel_fetch_apply_su_area(state, crtc,
> full_update);
> +}
> +
>  void intel_psr2_panic_force_full_update(const struct
> intel_crtc_state *crtc_state)
>  {
>  	struct intel_display *display =
> to_intel_display(crtc_state);

[PATCH v3 5/9] drm/i915/psr: Derive the alignment loop condition from the SU area

[Mika Kahola]

The loop aligning the selective update area decides whether to run
again from two partial signals, the return value of
intel_psr2_sel_fetch_pipe_alignment() and the cursor_in_su_area out
parameter of intel_psr2_sel_fetch_et_alignment(). Neither answers what
the loop actually asks, which is whether the area changed at all, and
neither survives a step that grows the area between rounds.

Compare the area against a snapshot taken at the top of the loop
instead. Both alignment steps only ever expand the area, so this still
converges. A cursor already inside the area when alignment moves it
now takes one extra round, which changes nothing and exits.

The return value and the out parameter are now unused, drop them.

Split out of the joiner selective fetch merge patch, where Sashiko
suggested removing cursor_in_su_area.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 37 ++++++------------------
 1 file changed, 9 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 9db064fb39afd..102133e80abc5 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2748,12 +2748,11 @@ static void clip_area_update(struct drm_rect *overlap_damage_area,
 		overlap_damage_area->y2 = inter.y2;
 }
 
-static bool intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_state)
+static void intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
 	u16 y_alignment;
-	bool su_area_changed = false;
 
 	/* ADLP aligns the SU region to vdsc slice height in case dsc is enabled */
 	if (crtc_state->dsc.compression_enable &&
@@ -2762,18 +2761,12 @@ static bool intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st
 	else
 		y_alignment = crtc_state->su_y_granularity;
 
-	if (crtc_state->psr2_su_area.y1 % y_alignment) {
+	if (crtc_state->psr2_su_area.y1 % y_alignment)
 		crtc_state->psr2_su_area.y1 -= crtc_state->psr2_su_area.y1 % y_alignment;
-		su_area_changed = true;
-	}
 
-	if (crtc_state->psr2_su_area.y2 % y_alignment) {
+	if (crtc_state->psr2_su_area.y2 % y_alignment)
 		crtc_state->psr2_su_area.y2 = ((crtc_state->psr2_su_area.y2 /
 						y_alignment) + 1) * y_alignment;
-		su_area_changed = true;
-	}
-
-	return su_area_changed;
 }
 
 /*
@@ -2783,8 +2776,7 @@ static bool intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st
 static void
 intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
 				  struct intel_crtc *crtc,
-				  struct drm_rect *display_area,
-				  bool *cursor_in_su_area)
+				  struct drm_rect *display_area)
 {
 	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
 	struct intel_plane_state *new_plane_state;
@@ -2812,7 +2804,6 @@ intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
 
 		clip_area_update(&crtc_state->psr2_su_area, &new_plane_state->uapi.dst,
 				 display_area);
-		*cursor_in_su_area = true;
 	}
 }
 
@@ -3123,7 +3114,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 		intel_psr_apply_su_area_workarounds(crtc_state);
 
 		do {
-			bool cursor_in_su_area = false;
+			struct drm_rect old_su_area = crtc_state->psr2_su_area;
 
 			/*
 			 * Adjust su area to cover cursor fully as necessary
@@ -3132,22 +3123,12 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 			 * of the pipe are added into the state before the plane
 			 * checks when selective fetch is enabled.
 			 */
-			intel_psr2_sel_fetch_et_alignment(state, crtc, &display_area,
-							  &cursor_in_su_area);
+			intel_psr2_sel_fetch_et_alignment(state, crtc, &display_area);
 
-			su_area_changed = intel_psr2_sel_fetch_pipe_alignment(crtc_state);
+			intel_psr2_sel_fetch_pipe_alignment(crtc_state);
 
-			/*
-			 * If the cursor was outside the SU area before
-			 * alignment, the alignment step (which only expands
-			 * SU) may pull the cursor partially inside, so we
-			 * must run ET alignment again to fully cover it. But
-			 * if the cursor was already fully inside before
-			 * alignment, expanding the SU area won't change that,
-			 * so no further work is needed.
-			 */
-			if (cursor_in_su_area)
-				break;
+			su_area_changed = !drm_rect_equals(&crtc_state->psr2_su_area,
+							   &old_su_area);
 		} while (su_area_changed);
 	}
 
-- 
2.43.0

Re: [PATCH v3 5/9] drm/i915/psr: Derive the alignment loop condition from the SU area

[Hogander, Jouni]

On Fri, 2026-10-23 at 10:00 +0000, Mika Kahola wrote:
> The loop aligning the selective update area decides whether to run
> again from two partial signals, the return value of
> intel_psr2_sel_fetch_pipe_alignment() and the cursor_in_su_area out
> parameter of intel_psr2_sel_fetch_et_alignment(). Neither answers
> what
> the loop actually asks, which is whether the area changed at all, and
> neither survives a step that grows the area between rounds.
> 
> Compare the area against a snapshot taken at the top of the loop
> instead. Both alignment steps only ever expand the area, so this
> still
> converges. A cursor already inside the area when alignment moves it
> now takes one extra round, which changes nothing and exits.
> 
> The return value and the out parameter are now unused, drop them.
> 
> Split out of the joiner selective fetch merge patch, where Sashiko
> suggested removing cursor_in_su_area.
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 37 ++++++----------------
> --
>  1 file changed, 9 insertions(+), 28 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 9db064fb39afd..102133e80abc5 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2748,12 +2748,11 @@ static void clip_area_update(struct drm_rect
> *overlap_damage_area,
>  		overlap_damage_area->y2 = inter.y2;
>  }
>  
> -static bool intel_psr2_sel_fetch_pipe_alignment(struct
> intel_crtc_state *crtc_state)
> +static void intel_psr2_sel_fetch_pipe_alignment(struct
> intel_crtc_state *crtc_state)
>  {
>  	struct intel_display *display =
> to_intel_display(crtc_state);
>  	const struct drm_dsc_config *vdsc_cfg = &crtc_state-
> >dsc.config;
>  	u16 y_alignment;
> -	bool su_area_changed = false;
>  
>  	/* ADLP aligns the SU region to vdsc slice height in case
> dsc is enabled */
>  	if (crtc_state->dsc.compression_enable &&
> @@ -2762,18 +2761,12 @@ static bool
> intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st
>  	else
>  		y_alignment = crtc_state->su_y_granularity;
>  
> -	if (crtc_state->psr2_su_area.y1 % y_alignment) {
> +	if (crtc_state->psr2_su_area.y1 % y_alignment)
>  		crtc_state->psr2_su_area.y1 -= crtc_state-
> >psr2_su_area.y1 % y_alignment;
> -		su_area_changed = true;
> -	}
>  
> -	if (crtc_state->psr2_su_area.y2 % y_alignment) {
> +	if (crtc_state->psr2_su_area.y2 % y_alignment)
>  		crtc_state->psr2_su_area.y2 = ((crtc_state-
> >psr2_su_area.y2 /
>  						y_alignment) + 1) *
> y_alignment;
> -		su_area_changed = true;
> -	}
> -
> -	return su_area_changed;
>  }
>  
>  /*
> @@ -2783,8 +2776,7 @@ static bool
> intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st
>  static void
>  intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
>  				  struct intel_crtc *crtc,
> -				  struct drm_rect *display_area,
> -				  bool *cursor_in_su_area)
> +				  struct drm_rect *display_area)
>  {
>  	struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
>  	struct intel_plane_state *new_plane_state;
> @@ -2812,7 +2804,6 @@ intel_psr2_sel_fetch_et_alignment(struct
> intel_atomic_state *state,
>  
>  		clip_area_update(&crtc_state->psr2_su_area,
> &new_plane_state->uapi.dst,
>  				 display_area);
> -		*cursor_in_su_area = true;
>  	}
>  }
>  
> @@ -3123,7 +3114,7 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  		intel_psr_apply_su_area_workarounds(crtc_state);
>  
>  		do {
> -			bool cursor_in_su_area = false;
> +			struct drm_rect old_su_area = crtc_state-
> >psr2_su_area;
>  
>  			/*
>  			 * Adjust su area to cover cursor fully as
> necessary
> @@ -3132,22 +3123,12 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  			 * of the pipe are added into the state
> before the plane
>  			 * checks when selective fetch is enabled.
>  			 */
> -			intel_psr2_sel_fetch_et_alignment(state,
> crtc, &display_area,
> -							 
> &cursor_in_su_area);
> +			intel_psr2_sel_fetch_et_alignment(state,
> crtc, &display_area);
>  
> -			su_area_changed =
> intel_psr2_sel_fetch_pipe_alignment(crtc_state);
> +			intel_psr2_sel_fetch_pipe_alignment(crtc_sta
> te);
>  
> -			/*
> -			 * If the cursor was outside the SU area
> before
> -			 * alignment, the alignment step (which only
> expands
> -			 * SU) may pull the cursor partially inside,
> so we
> -			 * must run ET alignment again to fully
> cover it. But
> -			 * if the cursor was already fully inside
> before
> -			 * alignment, expanding the SU area won't
> change that,
> -			 * so no further work is needed.
> -			 */
> -			if (cursor_in_su_area)
> -				break;
> +			su_area_changed =
> !drm_rect_equals(&crtc_state->psr2_su_area,
> +							  
> &old_su_area);
>  		} while (su_area_changed);
>  	}
>  

[PATCH v3 6/9] drm/i915/psr: Merge the selective fetch area across joined pipes

[Mika Kahola]

PSR2_MAN_TRK_CTL is per transcoder and a joined config has only one
transcoder, so both joined pipes would program it and the primary
would win. Merge the per-pipe areas, hand the result back to every
joined pipe before the plane areas are set and write the transcoder
register from the primary only. The joiner splits the image
horizontally, so the pipes share the Y coordinate space and all of
them have to fetch the merged range.

A joined pipe can legitimately have no damage of its own, plane
visibility is computed per pipe against the translated pipe_src, so a
plane confined to one half is not visible on the other pipe. Keep such
a pipe out of the merge instead of treating it as a failed area
calculation, and only fall back to a full update when no joined pipe
has any damage.

Merging only ever grows the area, so a cursor that did not intersect
the area of its own pipe can end up partially covered by the merged
one. Run the alignment on the merged area and merge again as long as
that keeps growing it.

The SU area WAs clamp the region that ends up in the per transcoder
PSR2_MAN_TRK_CTL, so they have to run on the merged area. Applying them
per pipe before the merge evaluated them against a partial area, and
Wa 14019834836 was skipped altogether when only a secondary pipe had
damage, as it looks at uapi.encoder_mask and that is zero for the
joiner secondary. Apply them once on the merged area from the primary
and hand the result back to every joined pipe.

On full update assign the whole display area rather than clipping into
the existing one. A pipe whose damage calculation was skipped, because
another joined pipe already forced the full update, has no area to clip
into.

v2: Do not force a full update when a joined pipe has no damage of its
    own, skip the empty pipes in the merge (Jouni)
    Redo the early transport alignment on the merged area, a cursor can
    end up partially covered once the area grows (Jouni)
    Break out of the compute loop on the first full update (Jouni)
v3: Follow the pipe_src change in the previous patch (Jouni)
    Apply the SU area WAs on the merged area instead of per pipe,
    the joiner secondary has no encoders for them to look at (Jouni)
    Split the helper extraction and the alignment loop condition into
    their own patches, this one now only adds the joiner handling

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 183 ++++++++++++++++++-----
 1 file changed, 145 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 102133e80abc5..ffbb1e55c2b5a 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2661,9 +2661,11 @@ void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
 		break;
 	}
 
-	intel_de_write_dsb(display, dsb,
-			   PSR2_MAN_TRK_CTL(display, cpu_transcoder),
-			   crtc_state->psr2_man_track_ctl);
+	/* The joined pipes drive one transcoder, so program it once. */
+	if (!intel_crtc_is_joiner_secondary(crtc_state))
+		intel_de_write_dsb(display, dsb,
+				   PSR2_MAN_TRK_CTL(display, cpu_transcoder),
+				   crtc_state->psr2_man_track_ctl);
 
 	if (!crtc_state->enable_psr2_su_region_et)
 		return;
@@ -2880,6 +2882,11 @@ intel_psr_apply_su_area_workarounds(struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 
+	/*
+	 * Called on the merged area, with the joiner primary crtc_state. The
+	 * secondary has no encoders of its own and the WAs below have to see
+	 * the whole SU region that goes into PSR2_MAN_TRK_CTL.
+	 */
 	/* Wa_14014971492 */
 	if (!crtc_state->has_panel_replay &&
 	    ((IS_DISPLAY_VERx100_STEP(display, 1400, STEP_A0, STEP_B0) ||
@@ -2993,15 +3000,91 @@ static void psr2_sel_fetch_compute_su_area(struct intel_atomic_state *state,
 
 		clip_area_update(&crtc_state->psr2_su_area, &damaged_area, &display_area);
 	}
+}
 
-	/*
-	 * TODO: For now we are just using full update in case
-	 * selective fetch area calculation fails. To optimize this we
-	 * should identify cases where this happens and fix the area
-	 * calculation for those.
-	 */
-	if (crtc_state->psr2_su_area.y1 == -1)
-		*full_update = true;
+static void psr2_sel_fetch_set_su_area(struct intel_atomic_state *state,
+				       u8 joined_pipes, int y1, int y2)
+{
+	struct intel_display *display = to_intel_display(state);
+	struct intel_crtc *crtc;
+
+	for_each_intel_crtc_in_pipe_mask(display, crtc, joined_pipes) {
+		struct intel_crtc_state *crtc_state =
+			intel_atomic_get_new_crtc_state(state, crtc);
+
+		crtc_state->psr2_su_area.y1 = y1;
+		crtc_state->psr2_su_area.y2 = y2;
+	}
+}
+
+/*
+ * One transcoder means one SU region. Joining splits the image horizontally, so
+ * the pipes share the Y range. Returns false if no joined pipe has any damage.
+ */
+static bool psr2_sel_fetch_merge_su_area(struct intel_atomic_state *state,
+					 u8 joined_pipes)
+{
+	struct intel_display *display = to_intel_display(state);
+	struct intel_crtc_state *crtc_state;
+	struct intel_crtc *crtc;
+	int y1 = INT_MAX, y2 = INT_MIN;
+
+	for_each_intel_crtc_in_pipe_mask(display, crtc, joined_pipes) {
+		crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+
+		/* An empty area must not drag the merged one down. */
+		if (crtc_state->psr2_su_area.y1 == -1)
+			continue;
+
+		y1 = min(y1, crtc_state->psr2_su_area.y1);
+		y2 = max(y2, crtc_state->psr2_su_area.y2);
+	}
+
+	if (y1 == INT_MAX)
+		return false;
+
+	psr2_sel_fetch_set_su_area(state, joined_pipes, y1, y2);
+
+	return true;
+}
+
+/*
+ * Merging only grows the area, so a cursor that missed its own pipe's area can
+ * end up partially covered. Realign on the merged area until it stops growing.
+ */
+static void psr2_sel_fetch_align_su_area(struct intel_atomic_state *state,
+					 u8 joined_pipes)
+{
+	struct intel_display *display = to_intel_display(state);
+	struct intel_crtc *crtc;
+	bool su_area_changed;
+
+	do {
+		su_area_changed = false;
+
+		for_each_intel_crtc_in_pipe_mask(display, crtc, joined_pipes) {
+			struct intel_crtc_state *crtc_state =
+				intel_atomic_get_new_crtc_state(state, crtc);
+			struct drm_rect display_area = {
+				.x1 = 0,
+				.y1 = 0,
+				.x2 = drm_rect_width(&crtc_state->pipe_src),
+				.y2 = drm_rect_height(&crtc_state->pipe_src),
+			};
+			struct drm_rect old_su_area = crtc_state->psr2_su_area;
+
+			/* Needs the planes already pulled into the state. */
+			intel_psr2_sel_fetch_et_alignment(state, crtc, &display_area);
+
+			intel_psr2_sel_fetch_pipe_alignment(crtc_state);
+
+			su_area_changed |= !drm_rect_equals(&crtc_state->psr2_su_area,
+							    &old_su_area);
+		}
+
+		if (su_area_changed)
+			psr2_sel_fetch_merge_su_area(state, joined_pipes);
+	} while (su_area_changed);
 }
 
 static int psr2_sel_fetch_apply_su_area(struct intel_atomic_state *state,
@@ -3019,9 +3102,14 @@ static int psr2_sel_fetch_apply_su_area(struct intel_atomic_state *state,
 	};
 	int i;
 
+	/*
+	 * On full update the whole pipe is fetched, the plane loop below then
+	 * gives every visible plane its full area. Plane states come out of
+	 * the duplicate with a zero sized area, so this has to run on full
+	 * update as well.
+	 */
 	if (full_update)
-		clip_area_update(&crtc_state->psr2_su_area, &display_area,
-				 &display_area);
+		crtc_state->psr2_su_area = display_area;
 
 	/*
 	 * Now that we have the pipe damaged area check if it intersect with
@@ -3075,22 +3163,21 @@ static int psr2_sel_fetch_apply_su_area(struct intel_atomic_state *state,
 	psr2_man_trk_ctl_calc(crtc_state, full_update);
 	crtc_state->pipe_srcsz_early_tpt =
 		psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);
+
 	return 0;
 }
 
 int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 				struct intel_crtc *crtc)
 {
+	struct intel_display *display = to_intel_display(state);
 	const struct intel_crtc_state *old_crtc_state =
 		intel_atomic_get_old_crtc_state(state, crtc);
 	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
-	struct drm_rect display_area = {
-		.x1 = 0,
-		.y1 = 0,
-		.x2 = drm_rect_width(&crtc_state->pipe_src),
-		.y2 = drm_rect_height(&crtc_state->pipe_src),
-	};
-	bool full_update, su_area_changed;
+	struct intel_crtc *joined_crtc;
+	bool full_update = false;
+	u8 joined_pipes;
+	int ret;
 
 	/*
 	 * Selective fetch is not always usable, for instance it is dropped
@@ -3108,31 +3195,51 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 	if (!crtc_state->enable_psr2_sel_fetch)
 		return 0;
 
-	psr2_sel_fetch_compute_su_area(state, crtc, &full_update);
+	/* The joined pipes are handled in one go from the primary. */
+	if (intel_crtc_is_joiner_secondary(crtc_state))
+		return 0;
 
-	if (!full_update) {
-		intel_psr_apply_su_area_workarounds(crtc_state);
+	joined_pipes = intel_crtc_joined_pipe_mask(crtc_state);
 
-		do {
-			struct drm_rect old_su_area = crtc_state->psr2_su_area;
+	for_each_intel_crtc_in_pipe_mask(display, joined_crtc, joined_pipes) {
+		psr2_sel_fetch_compute_su_area(state, joined_crtc, &full_update);
 
-			/*
-			 * Adjust su area to cover cursor fully as necessary
-			 * (early transport). A visible cursor is in the state
-			 * even when it is not updated by itself as all planes
-			 * of the pipe are added into the state before the plane
-			 * checks when selective fetch is enabled.
-			 */
-			intel_psr2_sel_fetch_et_alignment(state, crtc, &display_area);
+		/* One pipe falling back takes all of them with it. */
+		if (full_update)
+			break;
+	}
 
-			intel_psr2_sel_fetch_pipe_alignment(crtc_state);
+	/*
+	 * TODO: For now we are just using full update in case selective fetch
+	 * area calculation fails. To optimize this we should identify cases
+	 * where this happens and fix the area calculation for those.
+	 */
+	if (!full_update && !psr2_sel_fetch_merge_su_area(state, joined_pipes))
+		full_update = true;
 
-			su_area_changed = !drm_rect_equals(&crtc_state->psr2_su_area,
-							   &old_su_area);
-		} while (su_area_changed);
+	if (!full_update) {
+		/*
+		 * The WAs clamp the SU region that ends up in the per
+		 * transcoder PSR2_MAN_TRK_CTL, so they have to run on the
+		 * merged area rather than on the per pipe ones. crtc_state is
+		 * the joiner primary, the only one carrying the encoders the
+		 * WAs look at, and the merge guarantees a non empty area.
+		 */
+		intel_psr_apply_su_area_workarounds(crtc_state);
+		psr2_sel_fetch_set_su_area(state, joined_pipes,
+					   crtc_state->psr2_su_area.y1,
+					   crtc_state->psr2_su_area.y2);
+
+		psr2_sel_fetch_align_su_area(state, joined_pipes);
 	}
 
-	return psr2_sel_fetch_apply_su_area(state, crtc, full_update);
+	for_each_intel_crtc_in_pipe_mask(display, joined_crtc, joined_pipes) {
+		ret = psr2_sel_fetch_apply_su_area(state, joined_crtc, full_update);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
 }
 
 void intel_psr2_panic_force_full_update(const struct intel_crtc_state *crtc_state)
-- 
2.43.0

Re: [PATCH v3 6/9] drm/i915/psr: Merge the selective fetch area across joined pipes

[Hogander, Jouni]

On Fri, 2026-10-23 at 10:00 +0000, Mika Kahola wrote:
> PSR2_MAN_TRK_CTL is per transcoder and a joined config has only one
> transcoder, so both joined pipes would program it and the primary
> would win. Merge the per-pipe areas, hand the result back to every
> joined pipe before the plane areas are set and write the transcoder
> register from the primary only. The joiner splits the image
> horizontally, so the pipes share the Y coordinate space and all of
> them have to fetch the merged range.
> 
> A joined pipe can legitimately have no damage of its own, plane
> visibility is computed per pipe against the translated pipe_src, so a
> plane confined to one half is not visible on the other pipe. Keep
> such
> a pipe out of the merge instead of treating it as a failed area
> calculation, and only fall back to a full update when no joined pipe
> has any damage.
> 
> Merging only ever grows the area, so a cursor that did not intersect
> the area of its own pipe can end up partially covered by the merged
> one. Run the alignment on the merged area and merge again as long as
> that keeps growing it.
> 
> The SU area WAs clamp the region that ends up in the per transcoder
> PSR2_MAN_TRK_CTL, so they have to run on the merged area. Applying
> them
> per pipe before the merge evaluated them against a partial area, and
> Wa 14019834836 was skipped altogether when only a secondary pipe had
> damage, as it looks at uapi.encoder_mask and that is zero for the
> joiner secondary. Apply them once on the merged area from the primary
> and hand the result back to every joined pipe.
> 
> On full update assign the whole display area rather than clipping
> into
> the existing one. A pipe whose damage calculation was skipped,
> because
> another joined pipe already forced the full update, has no area to
> clip
> into.
> 
> v2: Do not force a full update when a joined pipe has no damage of
> its
>     own, skip the empty pipes in the merge (Jouni)
>     Redo the early transport alignment on the merged area, a cursor
> can
>     end up partially covered once the area grows (Jouni)
>     Break out of the compute loop on the first full update (Jouni)
> v3: Follow the pipe_src change in the previous patch (Jouni)
>     Apply the SU area WAs on the merged area instead of per pipe,
>     the joiner secondary has no encoders for them to look at (Jouni)
>     Split the helper extraction and the alignment loop condition into
>     their own patches, this one now only adds the joiner handling
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 183 ++++++++++++++++++---
> --
>  1 file changed, 145 insertions(+), 38 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 102133e80abc5..ffbb1e55c2b5a 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2661,9 +2661,11 @@ void
> intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
>  		break;
>  	}
>  
> -	intel_de_write_dsb(display, dsb,
> -			   PSR2_MAN_TRK_CTL(display,
> cpu_transcoder),
> -			   crtc_state->psr2_man_track_ctl);
> +	/* The joined pipes drive one transcoder, so program it
> once. */
> +	if (!intel_crtc_is_joiner_secondary(crtc_state))
> +		intel_de_write_dsb(display, dsb,
> +				   PSR2_MAN_TRK_CTL(display,
> cpu_transcoder),
> +				   crtc_state->psr2_man_track_ctl);
>  
>  	if (!crtc_state->enable_psr2_su_region_et)
>  		return;
> @@ -2880,6 +2882,11 @@ intel_psr_apply_su_area_workarounds(struct
> intel_crtc_state *crtc_state)
>  {
>  	struct intel_display *display =
> to_intel_display(crtc_state);
>  
> +	/*
> +	 * Called on the merged area, with the joiner primary
> crtc_state. The
> +	 * secondary has no encoders of its own and the WAs below
> have to see
> +	 * the whole SU region that goes into PSR2_MAN_TRK_CTL.
> +	 */
>  	/* Wa_14014971492 */
>  	if (!crtc_state->has_panel_replay &&
>  	    ((IS_DISPLAY_VERx100_STEP(display, 1400, STEP_A0,
> STEP_B0) ||
> @@ -2993,15 +3000,91 @@ static void
> psr2_sel_fetch_compute_su_area(struct intel_atomic_state *state,
>  
>  		clip_area_update(&crtc_state->psr2_su_area,
> &damaged_area, &display_area);
>  	}
> +}
>  
> -	/*
> -	 * TODO: For now we are just using full update in case
> -	 * selective fetch area calculation fails. To optimize this
> we
> -	 * should identify cases where this happens and fix the area
> -	 * calculation for those.
> -	 */
> -	if (crtc_state->psr2_su_area.y1 == -1)
> -		*full_update = true;
> +static void psr2_sel_fetch_set_su_area(struct intel_atomic_state
> *state,
> +				       u8 joined_pipes, int y1, int
> y2)
> +{
> +	struct intel_display *display = to_intel_display(state);
> +	struct intel_crtc *crtc;
> +
> +	for_each_intel_crtc_in_pipe_mask(display, crtc,
> joined_pipes) {
> +		struct intel_crtc_state *crtc_state =
> +			intel_atomic_get_new_crtc_state(state,
> crtc);
> +
> +		crtc_state->psr2_su_area.y1 = y1;
> +		crtc_state->psr2_su_area.y2 = y2;
> +	}
> +}
> +
> +/*
> + * One transcoder means one SU region. Joining splits the image
> horizontally, so
> + * the pipes share the Y range. Returns false if no joined pipe has
> any damage.
> + */
> +static bool psr2_sel_fetch_merge_su_area(struct intel_atomic_state
> *state,
> +					 u8 joined_pipes)
> +{
> +	struct intel_display *display = to_intel_display(state);
> +	struct intel_crtc_state *crtc_state;
> +	struct intel_crtc *crtc;
> +	int y1 = INT_MAX, y2 = INT_MIN;
> +
> +	for_each_intel_crtc_in_pipe_mask(display, crtc,
> joined_pipes) {
> +		crtc_state = intel_atomic_get_new_crtc_state(state,
> crtc);
> +
> +		/* An empty area must not drag the merged one down.
> */
> +		if (crtc_state->psr2_su_area.y1 == -1)
> +			continue;
> +
> +		y1 = min(y1, crtc_state->psr2_su_area.y1);
> +		y2 = max(y2, crtc_state->psr2_su_area.y2);
> +	}
> +
> +	if (y1 == INT_MAX)
> +		return false;
> +
> +	psr2_sel_fetch_set_su_area(state, joined_pipes, y1, y2);
> +
> +	return true;
> +}
> +
> +/*
> + * Merging only grows the area, so a cursor that missed its own
> pipe's area can
> + * end up partially covered. Realign on the merged area until it
> stops growing.
> + */
> +static void psr2_sel_fetch_align_su_area(struct intel_atomic_state
> *state,
> +					 u8 joined_pipes)
> +{
> +	struct intel_display *display = to_intel_display(state);
> +	struct intel_crtc *crtc;
> +	bool su_area_changed;
> +
> +	do {
> +		su_area_changed = false;
> +
> +		for_each_intel_crtc_in_pipe_mask(display, crtc,
> joined_pipes) {
> +			struct intel_crtc_state *crtc_state =
> +				intel_atomic_get_new_crtc_state(stat
> e, crtc);
> +			struct drm_rect display_area = {
> +				.x1 = 0,
> +				.y1 = 0,
> +				.x2 = drm_rect_width(&crtc_state-
> >pipe_src),
> +				.y2 = drm_rect_height(&crtc_state-
> >pipe_src),
> +			};
> +			struct drm_rect old_su_area = crtc_state-
> >psr2_su_area;
> +
> +			/* Needs the planes already pulled into the
> state. */
> +			intel_psr2_sel_fetch_et_alignment(state,
> crtc, &display_area);
> +
> +			intel_psr2_sel_fetch_pipe_alignment(crtc_sta
> te);
> +
> +			su_area_changed |=
> !drm_rect_equals(&crtc_state->psr2_su_area,
> +							   
> &old_su_area);
> +		}
> +
> +		if (su_area_changed)
> +			psr2_sel_fetch_merge_su_area(state,
> joined_pipes);
> +	} while (su_area_changed);
>  }
>  
>  static int psr2_sel_fetch_apply_su_area(struct intel_atomic_state
> *state,
> @@ -3019,9 +3102,14 @@ static int psr2_sel_fetch_apply_su_area(struct
> intel_atomic_state *state,
>  	};
>  	int i;
>  
> +	/*
> +	 * On full update the whole pipe is fetched, the plane loop
> below then
> +	 * gives every visible plane its full area. Plane states
> come out of
> +	 * the duplicate with a zero sized area, so this has to run
> on full
> +	 * update as well.
> +	 */
>  	if (full_update)
> -		clip_area_update(&crtc_state->psr2_su_area,
> &display_area,
> -				 &display_area);
> +		crtc_state->psr2_su_area = display_area;
>  
>  	/*
>  	 * Now that we have the pipe damaged area check if it
> intersect with
> @@ -3075,22 +3163,21 @@ static int
> psr2_sel_fetch_apply_su_area(struct intel_atomic_state *state,
>  	psr2_man_trk_ctl_calc(crtc_state, full_update);
>  	crtc_state->pipe_srcsz_early_tpt =
>  		psr2_pipe_srcsz_early_tpt_calc(crtc_state,
> full_update);
> +
>  	return 0;
>  }
>  
>  int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
>  				struct intel_crtc *crtc)
>  {
> +	struct intel_display *display = to_intel_display(state);
>  	const struct intel_crtc_state *old_crtc_state =
>  		intel_atomic_get_old_crtc_state(state, crtc);
>  	struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> -	struct drm_rect display_area = {
> -		.x1 = 0,
> -		.y1 = 0,
> -		.x2 = drm_rect_width(&crtc_state->pipe_src),
> -		.y2 = drm_rect_height(&crtc_state->pipe_src),
> -	};
> -	bool full_update, su_area_changed;
> +	struct intel_crtc *joined_crtc;
> +	bool full_update = false;
> +	u8 joined_pipes;
> +	int ret;
>  
>  	/*
>  	 * Selective fetch is not always usable, for instance it is
> dropped
> @@ -3108,31 +3195,51 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  	if (!crtc_state->enable_psr2_sel_fetch)
>  		return 0;
>  
> -	psr2_sel_fetch_compute_su_area(state, crtc, &full_update);
> +	/* The joined pipes are handled in one go from the primary.
> */
> +	if (intel_crtc_is_joiner_secondary(crtc_state))
> +		return 0;
>  
> -	if (!full_update) {
> -		intel_psr_apply_su_area_workarounds(crtc_state);
> +	joined_pipes = intel_crtc_joined_pipe_mask(crtc_state);
>  
> -		do {
> -			struct drm_rect old_su_area = crtc_state-
> >psr2_su_area;
> +	for_each_intel_crtc_in_pipe_mask(display, joined_crtc,
> joined_pipes) {
> +		psr2_sel_fetch_compute_su_area(state, joined_crtc,
> &full_update);
>  
> -			/*
> -			 * Adjust su area to cover cursor fully as
> necessary
> -			 * (early transport). A visible cursor is in
> the state
> -			 * even when it is not updated by itself as
> all planes
> -			 * of the pipe are added into the state
> before the plane
> -			 * checks when selective fetch is enabled.
> -			 */
> -			intel_psr2_sel_fetch_et_alignment(state,
> crtc, &display_area);
> +		/* One pipe falling back takes all of them with it.
> */
> +		if (full_update)
> +			break;
> +	}
>  
> -
> 			intel_psr2_sel_fetch_pipe_alignment(crtc_state);
> +	/*
> +	 * TODO: For now we are just using full update in case
> selective fetch
> +	 * area calculation fails. To optimize this we should
> identify cases
> +	 * where this happens and fix the area calculation for
> those.
> +	 */
> +	if (!full_update && !psr2_sel_fetch_merge_su_area(state,
> joined_pipes))
> +		full_update = true;
>  
> -			su_area_changed =
> !drm_rect_equals(&crtc_state->psr2_su_area,
> -							  
> &old_su_area);
> -		} while (su_area_changed);
> +	if (!full_update) {
> +		/*
> +		 * The WAs clamp the SU region that ends up in the
> per
> +		 * transcoder PSR2_MAN_TRK_CTL, so they have to run
> on the
> +		 * merged area rather than on the per pipe ones.
> crtc_state is
> +		 * the joiner primary, the only one carrying the
> encoders the
> +		 * WAs look at, and the merge guarantees a non empty
> area.
> +		 */
> +		intel_psr_apply_su_area_workarounds(crtc_state);
> +		psr2_sel_fetch_set_su_area(state, joined_pipes,
> +					   crtc_state-
> >psr2_su_area.y1,
> +					   crtc_state-
> >psr2_su_area.y2);
> +
> +		psr2_sel_fetch_align_su_area(state, joined_pipes);
>  	}
>  
> -	return psr2_sel_fetch_apply_su_area(state, crtc,
> full_update);
> +	for_each_intel_crtc_in_pipe_mask(display, joined_crtc,
> joined_pipes) {
> +		ret = psr2_sel_fetch_apply_su_area(state,
> joined_crtc, full_update);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return 0;
>  }
>  
>  void intel_psr2_panic_force_full_update(const struct
> intel_crtc_state *crtc_state)

[PATCH v3 7/9] drm/i915/psr: Resolve the PSR encoders through the joiner primary

[Mika Kahola]

A joiner secondary has no encoders of its own, uapi.encoder_mask is
zero, so for_each_intel_encoder_mask_with_psr() iterates nothing on its
crtc_state. intel_psr_lock()/intel_psr_unlock() then take no lock at
all, intel_psr_wait_for_idle_locked() never waits, and
intel_psr2_program_trans_man_trk_ctl() skips the cff check and hands the
encoder list head to intel_dsc_su_et_parameters_configure().

PSR is a transcoder level feature driven by the primary, so take the
encoders from there for a secondary.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 26 ++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ffbb1e55c2b5a..f1d52c39d8834 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2638,6 +2638,24 @@ static void intel_psr_force_update(struct intel_dp *intel_dp)
 	intel_de_write(display, CURSURFLIVE(display, intel_dp->psr.pipe), 0);
 }
 
+/*
+ * The joiner secondary has no encoders of its own, its uapi.encoder_mask is
+ * zero. PSR is a transcoder level feature driven by the primary, so take the
+ * encoders from there. Only valid once the state has been swapped in, i.e.
+ * from the commit phase.
+ */
+static u32 psr_encoder_mask(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *primary_crtc;
+
+	if (!intel_crtc_is_joiner_secondary(crtc_state))
+		return crtc_state->uapi.encoder_mask;
+
+	primary_crtc = intel_primary_crtc(crtc_state);
+
+	return to_intel_crtc_state(primary_crtc->base.state)->uapi.encoder_mask;
+}
+
 void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
 					  const struct intel_crtc_state *crtc_state)
 {
@@ -2650,7 +2668,7 @@ void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
 		return;
 
 	for_each_intel_encoder_mask_with_psr(display->drm, encoder,
-					     crtc_state->uapi.encoder_mask) {
+					     psr_encoder_mask(crtc_state)) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 		if (!dsb)
@@ -3464,7 +3482,7 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat
 		return;
 
 	for_each_intel_encoder_mask_with_psr(display->drm, encoder,
-					     new_crtc_state->uapi.encoder_mask) {
+					     psr_encoder_mask(new_crtc_state)) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 		int ret;
 
@@ -4109,7 +4127,7 @@ void intel_psr_lock(const struct intel_crtc_state *crtc_state)
 		return;
 
 	for_each_intel_encoder_mask_with_psr(display->drm, encoder,
-					     crtc_state->uapi.encoder_mask) {
+					     psr_encoder_mask(crtc_state)) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 		mutex_lock(&intel_dp->psr.lock);
@@ -4132,7 +4150,7 @@ void intel_psr_unlock(const struct intel_crtc_state *crtc_state)
 		return;
 
 	for_each_intel_encoder_mask_with_psr(display->drm, encoder,
-					     crtc_state->uapi.encoder_mask) {
+					     psr_encoder_mask(crtc_state)) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
 		mutex_unlock(&intel_dp->psr.lock);
-- 
2.43.0

Re: [PATCH v3 7/9] drm/i915/psr: Resolve the PSR encoders through the joiner primary

[Hogander, Jouni]

On Fri, 2026-10-23 at 10:00 +0000, Mika Kahola wrote:
> A joiner secondary has no encoders of its own, uapi.encoder_mask is
> zero, so for_each_intel_encoder_mask_with_psr() iterates nothing on
> its
> crtc_state. intel_psr_lock()/intel_psr_unlock() then take no lock at
> all, intel_psr_wait_for_idle_locked() never waits, and
> intel_psr2_program_trans_man_trk_ctl() skips the cff check and hands
> the
> encoder list head to intel_dsc_su_et_parameters_configure().
> 
> PSR is a transcoder level feature driven by the primary, so take the
> encoders from there for a secondary.
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 26 ++++++++++++++++++++--
> --
>  1 file changed, 22 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index ffbb1e55c2b5a..f1d52c39d8834 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2638,6 +2638,24 @@ static void intel_psr_force_update(struct
> intel_dp *intel_dp)
>  	intel_de_write(display, CURSURFLIVE(display, intel_dp-
> >psr.pipe), 0);
>  }
>  
> +/*
> + * The joiner secondary has no encoders of its own, its
> uapi.encoder_mask is
> + * zero. PSR is a transcoder level feature driven by the primary, so
> take the
> + * encoders from there. Only valid once the state has been swapped
> in, i.e.
> + * from the commit phase.
> + */
> +static u32 psr_encoder_mask(const struct intel_crtc_state
> *crtc_state)
> +{
> +	struct intel_crtc *primary_crtc;
> +
> +	if (!intel_crtc_is_joiner_secondary(crtc_state))
> +		return crtc_state->uapi.encoder_mask;
> +
> +	primary_crtc = intel_primary_crtc(crtc_state);
> +
> +	return to_intel_crtc_state(primary_crtc->base.state)-
> >uapi.encoder_mask;
> +}
> +
>  void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
>  					  const struct
> intel_crtc_state *crtc_state)
>  {
> @@ -2650,7 +2668,7 @@ void
> intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
>  		return;
>  
>  	for_each_intel_encoder_mask_with_psr(display->drm, encoder,
> -					     crtc_state-
> >uapi.encoder_mask) {
> +					    
> psr_encoder_mask(crtc_state)) {
>  		struct intel_dp *intel_dp =
> enc_to_intel_dp(encoder);
>  
>  		if (!dsb)
> @@ -3464,7 +3482,7 @@ void intel_psr_wait_for_idle_locked(const
> struct intel_crtc_state *new_crtc_stat
>  		return;
>  
>  	for_each_intel_encoder_mask_with_psr(display->drm, encoder,
> -					     new_crtc_state-
> >uapi.encoder_mask) {
> +					    
> psr_encoder_mask(new_crtc_state)) {
>  		struct intel_dp *intel_dp =
> enc_to_intel_dp(encoder);
>  		int ret;
>  
> @@ -4109,7 +4127,7 @@ void intel_psr_lock(const struct
> intel_crtc_state *crtc_state)
>  		return;
>  
>  	for_each_intel_encoder_mask_with_psr(display->drm, encoder,
> -					     crtc_state-
> >uapi.encoder_mask) {
> +					    
> psr_encoder_mask(crtc_state)) {
>  		struct intel_dp *intel_dp =
> enc_to_intel_dp(encoder);
>  
>  		mutex_lock(&intel_dp->psr.lock);
> @@ -4132,7 +4150,7 @@ void intel_psr_unlock(const struct
> intel_crtc_state *crtc_state)
>  		return;
>  
>  	for_each_intel_encoder_mask_with_psr(display->drm, encoder,
> -					     crtc_state-
> >uapi.encoder_mask) {
> +					    
> psr_encoder_mask(crtc_state)) {
>  		struct intel_dp *intel_dp =
> enc_to_intel_dp(encoder);
>  
>  		mutex_unlock(&intel_dp->psr.lock);

[PATCH v3 8/9] drm/i915/psr: Allow Panel Replay and PSR2 with joiner

[Mika Kahola]

PSR is rejected outright whenever the joiner is in use. Panel Replay and
PSR2 selective update do work with the joiner, so only keep rejecting
plain PSR1.

The eDP Panel Replay pipe A/B restriction only looks at the primary
pipe. joiner_pipes is a contiguous mask anchored at the primary pipe, so
a joined config on pipe B extends to pipe C, which has no PSR/Panel
Replay register block. Test the whole joined pipe mask instead, which is
a no-op without the joiner.

PSR1/PSR2 have no equivalent pipe A/B check today. That is a
pre-existing gap independent of the joiner and is left alone here.

v2: Drop psr_joiner_config_valid(), it duplicated the existing eDP Panel
    Replay pipe A/B check and wrongly applied it to DP Panel Replay (Jouni)
    Extend that existing check to the joined pipe mask instead (Jouni)
    Keep only the joiner specific checks: PSR1 and YUV 4:2:0 (Jouni)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 34 +++++++++++++++---------
 1 file changed, 21 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f1d52c39d8834..288836d4a993c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1598,6 +1598,13 @@ static bool intel_sel_update_config_valid(struct intel_crtc_state *crtc_state,
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
 	struct intel_display *display = to_intel_display(intel_dp);
 
+	if (crtc_state->joiner_pipes && !crtc_state->dsc.compression_enable &&
+	    crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+		drm_dbg_kms(display->drm,
+			    "Selective update not enabled, uncompressed joiner does not support YUV 4:2:0\n");
+		goto unsupported;
+	}
+
 	if (HAS_PSR2_SEL_FETCH(display) &&
 	    !intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) &&
 	    !HAS_PSR_HW_TRACKING(display)) {
@@ -1745,8 +1752,8 @@ static bool _panel_replay_compute_config(struct intel_crtc_state *crtc_state,
 
 	/* Remaining checks are for eDP only */
 
-	if (to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_A &&
-	    to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_B)
+	/* Every joined pipe needs its own PSR/Panel Replay register block. */
+	if (intel_crtc_joined_pipe_mask(crtc_state) & ~(BIT(PIPE_A) | BIT(PIPE_B)))
 		return false;
 
 	/* 128b/132b Panel Replay is not supported on eDP */
@@ -1890,17 +1897,6 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 		return;
 	}
 
-	/*
-	 * FIXME figure out what is wrong with PSR+joiner and
-	 * fix it. Presumably something related to the fact that
-	 * PSR is a transcoder level feature.
-	 */
-	if (crtc_state->joiner_pipes) {
-		drm_dbg_kms(display->drm,
-			    "PSR disabled due to joiner\n");
-		return;
-	}
-
 	/* Only used for state verification. */
 	crtc_state->panel_replay_dsc_support = connector->dp.panel_replay_caps.dsc_support;
 	crtc_state->has_panel_replay = _panel_replay_compute_config(crtc_state, conn_state);
@@ -1912,6 +1908,14 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 		return;
 
 	crtc_state->has_sel_update = intel_sel_update_config_valid(crtc_state, conn_state);
+
+	/* Plain PSR1 is not supported with joiner. */
+	if (crtc_state->joiner_pipes && !crtc_state->has_panel_replay &&
+	    !crtc_state->has_sel_update) {
+		drm_dbg_kms(display->drm,
+			    "PSR disabled, PSR1 not supported with joiner\n");
+		crtc_state->has_psr = false;
+	}
 }
 
 void intel_psr_get_config(struct intel_encoder *encoder,
@@ -4755,6 +4759,10 @@ void intel_psr_compute_config_late(struct intel_dp *intel_dp,
 		crtc_state->has_sel_update = false;
 		crtc_state->enable_psr2_su_region_et = false;
 		crtc_state->enable_psr2_sel_fetch = false;
+
+		/* Plain PSR1 is not supported with joiner. */
+		if (crtc_state->joiner_pipes)
+			crtc_state->has_psr = false;
 	}
 
 	/* Wa_18037818876 */
-- 
2.43.0

Re: [PATCH v3 8/9] drm/i915/psr: Allow Panel Replay and PSR2 with joiner

[Hogander, Jouni]

On Fri, 2026-10-23 at 10:00 +0000, Mika Kahola wrote:
> PSR is rejected outright whenever the joiner is in use. Panel Replay
> and
> PSR2 selective update do work with the joiner, so only keep rejecting
> plain PSR1.
> 
> The eDP Panel Replay pipe A/B restriction only looks at the primary
> pipe. joiner_pipes is a contiguous mask anchored at the primary pipe,
> so
> a joined config on pipe B extends to pipe C, which has no PSR/Panel
> Replay register block. Test the whole joined pipe mask instead, which
> is
> a no-op without the joiner.
> 
> PSR1/PSR2 have no equivalent pipe A/B check today. That is a
> pre-existing gap independent of the joiner and is left alone here.
> 
> v2: Drop psr_joiner_config_valid(), it duplicated the existing eDP
> Panel
>     Replay pipe A/B check and wrongly applied it to DP Panel Replay
> (Jouni)
>     Extend that existing check to the joined pipe mask instead
> (Jouni)
>     Keep only the joiner specific checks: PSR1 and YUV 4:2:0 (Jouni)
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>

I couldn't find any mention in Bspec about joiner and PSR2 + HW
tracking. Anyways Not sure if there is even need for handling that case
. There is probably no eDP panels with need for joiner in that old HW:

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 34 +++++++++++++++-------
> --
>  1 file changed, 21 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index f1d52c39d8834..288836d4a993c 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1598,6 +1598,13 @@ static bool
> intel_sel_update_config_valid(struct intel_crtc_state *crtc_state,
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
>  	struct intel_display *display = to_intel_display(intel_dp);
>  
> +	if (crtc_state->joiner_pipes && !crtc_state-
> >dsc.compression_enable &&
> +	    crtc_state->output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR420) {
> +		drm_dbg_kms(display->drm,
> +			    "Selective update not enabled,
> uncompressed joiner does not support YUV 4:2:0\n");
> +		goto unsupported;
> +	}
> +
>  	if (HAS_PSR2_SEL_FETCH(display) &&
>  	    !intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state)
> &&
>  	    !HAS_PSR_HW_TRACKING(display)) {
> @@ -1745,8 +1752,8 @@ static bool _panel_replay_compute_config(struct
> intel_crtc_state *crtc_state,
>  
>  	/* Remaining checks are for eDP only */
>  
> -	if (to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_A &&
> -	    to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_B)
> +	/* Every joined pipe needs its own PSR/Panel Replay register
> block. */
> +	if (intel_crtc_joined_pipe_mask(crtc_state) & ~(BIT(PIPE_A)
> | BIT(PIPE_B)))
>  		return false;
>  
>  	/* 128b/132b Panel Replay is not supported on eDP */
> @@ -1890,17 +1897,6 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>  		return;
>  	}
>  
> -	/*
> -	 * FIXME figure out what is wrong with PSR+joiner and
> -	 * fix it. Presumably something related to the fact that
> -	 * PSR is a transcoder level feature.
> -	 */
> -	if (crtc_state->joiner_pipes) {
> -		drm_dbg_kms(display->drm,
> -			    "PSR disabled due to joiner\n");
> -		return;
> -	}
> -
>  	/* Only used for state verification. */
>  	crtc_state->panel_replay_dsc_support = connector-
> >dp.panel_replay_caps.dsc_support;
>  	crtc_state->has_panel_replay =
> _panel_replay_compute_config(crtc_state, conn_state);
> @@ -1912,6 +1908,14 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>  		return;
>  
>  	crtc_state->has_sel_update =
> intel_sel_update_config_valid(crtc_state, conn_state);
> +
> +	/* Plain PSR1 is not supported with joiner. */
> +	if (crtc_state->joiner_pipes && !crtc_state-
> >has_panel_replay &&
> +	    !crtc_state->has_sel_update) {
> +		drm_dbg_kms(display->drm,
> +			    "PSR disabled, PSR1 not supported with
> joiner\n");
> +		crtc_state->has_psr = false;
> +	}
>  }
>  
>  void intel_psr_get_config(struct intel_encoder *encoder,
> @@ -4755,6 +4759,10 @@ void intel_psr_compute_config_late(struct
> intel_dp *intel_dp,
>  		crtc_state->has_sel_update = false;
>  		crtc_state->enable_psr2_su_region_et = false;
>  		crtc_state->enable_psr2_sel_fetch = false;
> +
> +		/* Plain PSR1 is not supported with joiner. */
> +		if (crtc_state->joiner_pipes)
> +			crtc_state->has_psr = false;
>  	}
>  
>  	/* Wa_18037818876 */

[PATCH v3 9/9] drm/i915/display: Allow forcing the joiner on eDP

[Mika Kahola]

intel_dp_has_joiner() rejects eDP unless the VBT enables the pipe
joiner, and the debugfs file is only created when that returns true, so
i915_joiner_force_enable can never turn it on.

Always create the file for DP and eDP, and let a forced pipe count
above one override the VBT.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_debugfs.c |  5 ++---
 drivers/gpu/drm/i915/display/intel_dp.c              | 12 +++++++++---
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 3e302f23f2474..e55fa01addb54 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1352,9 +1352,8 @@ void intel_connector_debugfs_add(struct intel_connector *connector)
 				    connector, &i915_dsc_fractional_bpp_fops);
 	}
 
-	if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
-	     connector_type == DRM_MODE_CONNECTOR_eDP) &&
-	    intel_dp_has_joiner(intel_attached_dp(connector))) {
+	if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
+	    connector_type == DRM_MODE_CONNECTOR_eDP) {
 		debugfs_create_file("i915_joiner_force_enable", 0644, root,
 				    connector, &i915_joiner_fops);
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index d8c0d9381471d..ec0b4885e33ac 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -473,9 +473,15 @@ bool intel_dp_has_joiner(struct intel_dp *intel_dp)
 	if (intel_dp->mso_link_count)
 		return false;
 
-	if (intel_dp_is_edp(intel_dp) &&
-	    !connector->panel.vbt.edp.pipe_joiner_enable)
-		return false;
+	if (intel_dp_is_edp(intel_dp)) {
+		bool pipe_joiner_enable = connector->panel.vbt.edp.pipe_joiner_enable;
+
+		if (connector->force_joined_pipes > 1)
+			pipe_joiner_enable = true;
+
+		if (!pipe_joiner_enable)
+			return false;
+	}
 
 	return DISPLAY_VER(display) >= 12 ||
 		(DISPLAY_VER(display) == 11 &&
-- 
2.43.0

✓ CI.KUnit: success for drm/i915/psr: PSR2 and Panel Replay with the joiner

[Patchwork]

== Series Details ==

Series: drm/i915/psr: PSR2 and Panel Replay with the joiner
URL   : https://patchwork.freedesktop.org/series/176714/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[10:09:48] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:09:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:10:13] Starting KUnit Kernel (1/1)...
[10:10:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:10:13] ================= gpu_buddy (14 subtests) ==================
[10:10:13] [PASSED] gpu_test_buddy_alloc_limit
[10:10:13] [PASSED] gpu_test_buddy_alloc_optimistic
[10:10:13] [PASSED] gpu_test_buddy_alloc_pessimistic
[10:10:13] [PASSED] gpu_test_buddy_alloc_pathological
[10:10:13] [PASSED] gpu_test_buddy_alloc_contiguous
[10:10:13] [PASSED] gpu_test_buddy_alloc_clear
[10:10:13] [PASSED] gpu_test_buddy_alloc_range
[10:10:13] [PASSED] gpu_test_buddy_alloc_range_bias
[10:10:14] [PASSED] gpu_test_buddy_fragmentation_performance
[10:10:14] [PASSED] gpu_test_buddy_dirty_tracker_performance
[10:10:14] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[10:10:14] [PASSED] gpu_test_buddy_offset_aligned_allocation
[10:10:14] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[10:10:14] [PASSED] gpu_test_buddy_addr_to_block
[10:10:14] ==================== [PASSED] gpu_buddy ====================
[10:10:14] ============================================================
[10:10:14] Testing complete. Ran 14 tests: passed: 14
[10:10:14] Elapsed time: 26.648s total, 4.500s configuring, 20.281s building, 1.814s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:10:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:10:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:10:55] Starting KUnit Kernel (1/1)...
[10:10:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:10:55] ================== guc_buf (11 subtests) ===================
[10:10:55] [PASSED] test_smallest
[10:10:55] [PASSED] test_largest
[10:10:55] [PASSED] test_granular
[10:10:55] [PASSED] test_unique
[10:10:55] [PASSED] test_overlap
[10:10:55] [PASSED] test_reusable
[10:10:55] [PASSED] test_too_big
[10:10:55] [PASSED] test_flush
[10:10:55] [PASSED] test_lookup
[10:10:55] [PASSED] test_data
[10:10:55] [PASSED] test_class
[10:10:55] ===================== [PASSED] guc_buf =====================
[10:10:55] =================== guc_dbm (7 subtests) ===================
[10:10:55] [PASSED] test_empty
[10:10:55] [PASSED] test_default
[10:10:55] ======================== test_size  ========================
[10:10:55] [PASSED] 4
[10:10:55] [PASSED] 8
[10:10:55] [PASSED] 32
[10:10:55] [PASSED] 256
[10:10:55] ==================== [PASSED] test_size ====================
[10:10:55] ======================= test_reuse  ========================
[10:10:55] [PASSED] 4
[10:10:55] [PASSED] 8
[10:10:55] [PASSED] 32
[10:10:55] [PASSED] 256
[10:10:55] =================== [PASSED] test_reuse ====================
[10:10:55] =================== test_range_overlap  ====================
[10:10:55] [PASSED] 4
[10:10:55] [PASSED] 8
[10:10:55] [PASSED] 32
[10:10:55] [PASSED] 256
[10:10:55] =============== [PASSED] test_range_overlap ================
[10:10:55] =================== test_range_compact  ====================
[10:10:55] [PASSED] 4
[10:10:55] [PASSED] 8
[10:10:55] [PASSED] 32
[10:10:55] [PASSED] 256
[10:10:55] =============== [PASSED] test_range_compact ================
[10:10:55] ==================== test_range_spare  =====================
[10:10:55] [PASSED] 4
[10:10:55] [PASSED] 8
[10:10:55] [PASSED] 32
[10:10:55] [PASSED] 256
[10:10:55] ================ [PASSED] test_range_spare =================
[10:10:55] ===================== [PASSED] guc_dbm =====================
[10:10:55] ================== guc_idm (22 subtests) ===================
[10:10:55] [PASSED] bad_init
[10:10:55] [PASSED] no_init
[10:10:55] [PASSED] init_fini
[10:10:55] [PASSED] check_init_small
[10:10:55] [PASSED] check_init_shared
[10:10:55] [PASSED] check_used
[10:10:55] [PASSED] check_quota
[10:10:55] [PASSED] check_all
[10:10:55] [PASSED] check_limits
[10:10:55] [PASSED] check_overlap
[10:10:55] [PASSED] check_overlap_alloc
[10:10:55] [PASSED] check_overlap_release
[10:10:55] [PASSED] check_overlap_partial_init
[10:10:55] [PASSED] check_overlap_partial_shared_range_blocking
[10:10:55] [PASSED] check_used_usable
[10:10:55] [PASSED] check_used_shareable
[10:10:55] [PASSED] check_used_mixed
[10:10:55] [PASSED] check_release_usable_range
[10:10:55] [PASSED] check_release_shareable_range
[10:10:55] [PASSED] check_split_boundaries
[10:10:55] [PASSED] check_shareable_spare
[10:10:55] [PASSED] check_shareable_spare_fragmented_tail
[10:10:55] ===================== [PASSED] guc_idm =====================
[10:10:55] ============== guc_klv_helpers (13 subtests) ===============
[10:10:55] [PASSED] test_count
[10:10:55] [PASSED] test_encode_u32
[10:10:55] [PASSED] test_encode_u64
[10:10:55] [PASSED] test_encode_string
[10:10:55] [PASSED] test_encode_object_raw
[10:10:55] [PASSED] test_encode_object_klv
[10:10:55] [PASSED] test_encode_object_nested
[10:10:55] [PASSED] test_encode_object_basic
[10:10:55] ===================== test_decode_u16  =====================
[10:10:55] [PASSED] empty
[10:10:55] [PASSED] valid
[10:10:55] [PASSED] max
[10:10:55] [PASSED] big
[10:10:55] [PASSED] long
[10:10:55] ================= [PASSED] test_decode_u16 =================
[10:10:55] ===================== test_decode_u32  =====================
[10:10:55] [PASSED] empty
[10:10:55] [PASSED] valid
[10:10:55] [PASSED] max
[10:10:55] [PASSED] long
[10:10:55] ================= [PASSED] test_decode_u32 =================
[10:10:55] ===================== test_decode_u64  =====================
[10:10:55] [PASSED] empty
[10:10:55] [PASSED] short
[10:10:55] [PASSED] valid
[10:10:55] [PASSED] max
[10:10:55] [PASSED] long
[10:10:55] ================= [PASSED] test_decode_u64 =================
[10:10:55] ===================== test_decode_str  =====================
[10:10:55] [PASSED] empty
[10:10:55] [PASSED] one
[10:10:55] [PASSED] one_trash
[10:10:55] [PASSED] two
[10:10:55] [PASSED] two_trash
[10:10:55] [PASSED] three
[10:10:55] [PASSED] dword
[10:10:55] [PASSED] four
[10:10:55] [PASSED] five
[10:10:55] [PASSED] six
[10:10:55] [PASSED] seven
[10:10:55] [PASSED] qword
[10:10:55] ================= [PASSED] test_decode_str =================
[10:10:55] [PASSED] test_print
[10:10:55] ================= [PASSED] guc_klv_helpers =================
[10:10:55] =================== xe_log (4 subtests) ====================
[10:10:55] [PASSED] demo_cper
[10:10:55] [PASSED] demo_dmesg
[10:10:55] ======================= test_dmesg  ========================
[10:10:55] [PASSED] test_fatal
[10:10:55] [PASSED] test_fatal_tile
[10:10:55] [PASSED] test_fatal_gt
[10:10:55] [PASSED] test_fatal_comp
[10:10:55] [PASSED] test_fatal_comp_tile
[10:10:55] [PASSED] test_fatal_comp_gt
[10:10:55] [PASSED] test_fatal_all
[10:10:55] [PASSED] test_recoverable
[10:10:55] [PASSED] test_recoverable_tile
[10:10:55] [PASSED] test_recoverable_gt
[10:10:55] [PASSED] test_recoverable_comp
[10:10:55] [PASSED] test_recoverable_comp_tile
[10:10:55] [PASSED] test_recoverable_comp_gt
[10:10:55] [PASSED] test_recoverable_all
[10:10:55] [PASSED] test_info
[10:10:55] [PASSED] test_info_tile
[10:10:55] [PASSED] test_info_gt
[10:10:55] [PASSED] test_info_err
[10:10:55] [PASSED] test_info_comp
[10:10:55] [PASSED] test_info_comp_tile
[10:10:55] [PASSED] test_info_comp_gt
[10:10:55] [PASSED] test_info_all
[10:10:55] [PASSED] test_hw_fatal
[10:10:55] [PASSED] test_hw_recoverable
[10:10:55] [PASSED] test_hw_corrected
[10:10:55] [PASSED] test_hw_informational
[10:10:55] =================== [PASSED] test_dmesg ====================
[10:10:55] ====================== test_invalid  =======================
[10:10:55] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[10:10:55] ================== [SKIPPED] test_invalid ==================
[10:10:55] ===================== [PASSED] xe_log ======================
[10:10:55] ================== no_relay (3 subtests) ===================
[10:10:55] [PASSED] xe_drops_guc2pf_if_not_ready
[10:10:55] [PASSED] xe_drops_guc2vf_if_not_ready
[10:10:55] [PASSED] xe_rejects_send_if_not_ready
[10:10:55] ==================== [PASSED] no_relay =====================
[10:10:55] ================== pf_relay (14 subtests) ==================
[10:10:55] [PASSED] pf_rejects_guc2pf_too_short
[10:10:55] [PASSED] pf_rejects_guc2pf_too_long
[10:10:55] [PASSED] pf_rejects_guc2pf_no_payload
[10:10:55] [PASSED] pf_fails_no_payload
[10:10:55] [PASSED] pf_fails_bad_origin
[10:10:55] [PASSED] pf_fails_bad_type
[10:10:55] [PASSED] pf_txn_reports_error
[10:10:55] [PASSED] pf_txn_sends_pf2guc
[10:10:55] [PASSED] pf_sends_pf2guc
[10:10:55] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:10:55] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:10:55] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:10:55] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:10:55] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:10:55] ==================== [PASSED] pf_relay =====================
[10:10:55] ================== vf_relay (3 subtests) ===================
[10:10:55] [PASSED] vf_rejects_guc2vf_too_short
[10:10:55] [PASSED] vf_rejects_guc2vf_too_long
[10:10:55] [PASSED] vf_rejects_guc2vf_no_payload
[10:10:55] ==================== [PASSED] vf_relay =====================
[10:10:55] ================ pf_gt_config (9 subtests) =================
[10:10:55] [PASSED] fair_contexts_1vf
[10:10:55] [PASSED] fair_doorbells_1vf
[10:10:55] [PASSED] fair_ggtt_1vf
[10:10:55] ====================== fair_vram_1vf  ======================
[10:10:55] [PASSED] 3.50 GiB
[10:10:55] [PASSED] 11.5 GiB
[10:10:55] [PASSED] 15.5 GiB
[10:10:55] [PASSED] 31.5 GiB
[10:10:55] [PASSED] 63.5 GiB
[10:10:55] [PASSED] 1.91 GiB
[10:10:55] ================== [PASSED] fair_vram_1vf ==================
[10:10:55] ================ fair_vram_1vf_admin_only  =================
[10:10:55] [PASSED] 3.50 GiB
[10:10:55] [PASSED] 11.5 GiB
[10:10:55] [PASSED] 15.5 GiB
[10:10:55] [PASSED] 31.5 GiB
[10:10:55] [PASSED] 63.5 GiB
[10:10:55] [PASSED] 1.91 GiB
[10:10:55] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:10:55] ====================== fair_contexts  ======================
[10:10:55] [PASSED] 1 VF
[10:10:55] [PASSED] 2 VFs
[10:10:55] [PASSED] 3 VFs
[10:10:55] [PASSED] 4 VFs
[10:10:55] [PASSED] 5 VFs
[10:10:55] [PASSED] 6 VFs
[10:10:55] [PASSED] 7 VFs
[10:10:55] [PASSED] 8 VFs
[10:10:55] [PASSED] 9 VFs
[10:10:55] [PASSED] 10 VFs
[10:10:55] [PASSED] 11 VFs
[10:10:55] [PASSED] 12 VFs
[10:10:55] [PASSED] 13 VFs
[10:10:55] [PASSED] 14 VFs
[10:10:55] [PASSED] 15 VFs
[10:10:55] [PASSED] 16 VFs
[10:10:55] [PASSED] 17 VFs
[10:10:55] [PASSED] 18 VFs
[10:10:55] [PASSED] 19 VFs
[10:10:55] [PASSED] 20 VFs
[10:10:55] [PASSED] 21 VFs
[10:10:55] [PASSED] 22 VFs
[10:10:55] [PASSED] 23 VFs
[10:10:55] [PASSED] 24 VFs
[10:10:55] [PASSED] 25 VFs
[10:10:55] [PASSED] 26 VFs
[10:10:55] [PASSED] 27 VFs
[10:10:55] [PASSED] 28 VFs
[10:10:55] [PASSED] 29 VFs
[10:10:55] [PASSED] 30 VFs
[10:10:55] [PASSED] 31 VFs
[10:10:55] [PASSED] 32 VFs
[10:10:55] [PASSED] 33 VFs
[10:10:55] [PASSED] 34 VFs
[10:10:55] [PASSED] 35 VFs
[10:10:55] [PASSED] 36 VFs
[10:10:55] [PASSED] 37 VFs
[10:10:55] [PASSED] 38 VFs
[10:10:55] [PASSED] 39 VFs
[10:10:55] [PASSED] 40 VFs
[10:10:55] [PASSED] 41 VFs
[10:10:55] [PASSED] 42 VFs
[10:10:55] [PASSED] 43 VFs
[10:10:55] [PASSED] 44 VFs
[10:10:55] [PASSED] 45 VFs
[10:10:55] [PASSED] 46 VFs
[10:10:55] [PASSED] 47 VFs
[10:10:55] [PASSED] 48 VFs
[10:10:55] [PASSED] 49 VFs
[10:10:55] [PASSED] 50 VFs
[10:10:55] [PASSED] 51 VFs
[10:10:55] [PASSED] 52 VFs
[10:10:55] [PASSED] 53 VFs
[10:10:55] [PASSED] 54 VFs
[10:10:55] [PASSED] 55 VFs
[10:10:55] [PASSED] 56 VFs
[10:10:55] [PASSED] 57 VFs
[10:10:55] [PASSED] 58 VFs
[10:10:55] [PASSED] 59 VFs
[10:10:55] [PASSED] 60 VFs
[10:10:55] [PASSED] 61 VFs
[10:10:55] [PASSED] 62 VFs
[10:10:55] [PASSED] 63 VFs
[10:10:55] ================== [PASSED] fair_contexts ==================
[10:10:55] ===================== fair_doorbells  ======================
[10:10:55] [PASSED] 1 VF
[10:10:55] [PASSED] 2 VFs
[10:10:55] [PASSED] 3 VFs
[10:10:55] [PASSED] 4 VFs
[10:10:55] [PASSED] 5 VFs
[10:10:55] [PASSED] 6 VFs
[10:10:55] [PASSED] 7 VFs
[10:10:55] [PASSED] 8 VFs
[10:10:55] [PASSED] 9 VFs
[10:10:55] [PASSED] 10 VFs
[10:10:55] [PASSED] 11 VFs
[10:10:55] [PASSED] 12 VFs
[10:10:55] [PASSED] 13 VFs
[10:10:55] [PASSED] 14 VFs
[10:10:55] [PASSED] 15 VFs
[10:10:55] [PASSED] 16 VFs
[10:10:55] [PASSED] 17 VFs
[10:10:55] [PASSED] 18 VFs
[10:10:55] [PASSED] 19 VFs
[10:10:55] [PASSED] 20 VFs
[10:10:55] [PASSED] 21 VFs
[10:10:55] [PASSED] 22 VFs
[10:10:55] [PASSED] 23 VFs
[10:10:55] [PASSED] 24 VFs
[10:10:55] [PASSED] 25 VFs
[10:10:55] [PASSED] 26 VFs
[10:10:55] [PASSED] 27 VFs
[10:10:55] [PASSED] 28 VFs
[10:10:55] [PASSED] 29 VFs
[10:10:55] [PASSED] 30 VFs
[10:10:55] [PASSED] 31 VFs
[10:10:55] [PASSED] 32 VFs
[10:10:55] [PASSED] 33 VFs
[10:10:55] [PASSED] 34 VFs
[10:10:55] [PASSED] 35 VFs
[10:10:55] [PASSED] 36 VFs
[10:10:55] [PASSED] 37 VFs
[10:10:55] [PASSED] 38 VFs
[10:10:55] [PASSED] 39 VFs
[10:10:55] [PASSED] 40 VFs
[10:10:55] [PASSED] 41 VFs
[10:10:55] [PASSED] 42 VFs
[10:10:55] [PASSED] 43 VFs
[10:10:55] [PASSED] 44 VFs
[10:10:55] [PASSED] 45 VFs
[10:10:55] [PASSED] 46 VFs
[10:10:55] [PASSED] 47 VFs
[10:10:55] [PASSED] 48 VFs
[10:10:55] [PASSED] 49 VFs
[10:10:55] [PASSED] 50 VFs
[10:10:55] [PASSED] 51 VFs
[10:10:55] [PASSED] 52 VFs
[10:10:55] [PASSED] 53 VFs
[10:10:55] [PASSED] 54 VFs
[10:10:55] [PASSED] 55 VFs
[10:10:55] [PASSED] 56 VFs
[10:10:55] [PASSED] 57 VFs
[10:10:55] [PASSED] 58 VFs
[10:10:55] [PASSED] 59 VFs
[10:10:55] [PASSED] 60 VFs
[10:10:55] [PASSED] 61 VFs
[10:10:55] [PASSED] 62 VFs
[10:10:55] [PASSED] 63 VFs
[10:10:55] ================= [PASSED] fair_doorbells ==================
[10:10:55] ======================== fair_ggtt  ========================
[10:10:55] [PASSED] 1 VF
[10:10:55] [PASSED] 2 VFs
[10:10:55] [PASSED] 3 VFs
[10:10:55] [PASSED] 4 VFs
[10:10:55] [PASSED] 5 VFs
[10:10:55] [PASSED] 6 VFs
[10:10:55] [PASSED] 7 VFs
[10:10:55] [PASSED] 8 VFs
[10:10:55] [PASSED] 9 VFs
[10:10:55] [PASSED] 10 VFs
[10:10:55] [PASSED] 11 VFs
[10:10:55] [PASSED] 12 VFs
[10:10:55] [PASSED] 13 VFs
[10:10:55] [PASSED] 14 VFs
[10:10:55] [PASSED] 15 VFs
[10:10:55] [PASSED] 16 VFs
[10:10:55] [PASSED] 17 VFs
[10:10:55] [PASSED] 18 VFs
[10:10:55] [PASSED] 19 VFs
[10:10:55] [PASSED] 20 VFs
[10:10:55] [PASSED] 21 VFs
[10:10:55] [PASSED] 22 VFs
[10:10:55] [PASSED] 23 VFs
[10:10:55] [PASSED] 24 VFs
[10:10:55] [PASSED] 25 VFs
[10:10:55] [PASSED] 26 VFs
[10:10:55] [PASSED] 27 VFs
[10:10:55] [PASSED] 28 VFs
[10:10:55] [PASSED] 29 VFs
[10:10:55] [PASSED] 30 VFs
[10:10:55] [PASSED] 31 VFs
[10:10:55] [PASSED] 32 VFs
[10:10:55] [PASSED] 33 VFs
[10:10:55] [PASSED] 34 VFs
[10:10:56] [PASSED] 35 VFs
[10:10:56] [PASSED] 36 VFs
[10:10:56] [PASSED] 37 VFs
[10:10:56] [PASSED] 38 VFs
[10:10:56] [PASSED] 39 VFs
[10:10:56] [PASSED] 40 VFs
[10:10:56] [PASSED] 41 VFs
[10:10:56] [PASSED] 42 VFs
[10:10:56] [PASSED] 43 VFs
[10:10:56] [PASSED] 44 VFs
[10:10:56] [PASSED] 45 VFs
[10:10:56] [PASSED] 46 VFs
[10:10:56] [PASSED] 47 VFs
[10:10:56] [PASSED] 48 VFs
[10:10:56] [PASSED] 49 VFs
[10:10:56] [PASSED] 50 VFs
[10:10:56] [PASSED] 51 VFs
[10:10:56] [PASSED] 52 VFs
[10:10:56] [PASSED] 53 VFs
[10:10:56] [PASSED] 54 VFs
[10:10:56] [PASSED] 55 VFs
[10:10:56] [PASSED] 56 VFs
[10:10:56] [PASSED] 57 VFs
[10:10:56] [PASSED] 58 VFs
[10:10:56] [PASSED] 59 VFs
[10:10:56] [PASSED] 60 VFs
[10:10:56] [PASSED] 61 VFs
[10:10:56] [PASSED] 62 VFs
[10:10:56] [PASSED] 63 VFs
[10:10:56] ==================== [PASSED] fair_ggtt ====================
[10:10:56] ======================== fair_vram  ========================
[10:10:56] [PASSED] 1 VF
[10:10:56] [PASSED] 2 VFs
[10:10:56] [PASSED] 3 VFs
[10:10:56] [PASSED] 4 VFs
[10:10:56] [PASSED] 5 VFs
[10:10:56] [PASSED] 6 VFs
[10:10:56] [PASSED] 7 VFs
[10:10:56] [PASSED] 8 VFs
[10:10:56] [PASSED] 9 VFs
[10:10:56] [PASSED] 10 VFs
[10:10:56] [PASSED] 11 VFs
[10:10:56] [PASSED] 12 VFs
[10:10:56] [PASSED] 13 VFs
[10:10:56] [PASSED] 14 VFs
[10:10:56] [PASSED] 15 VFs
[10:10:56] [PASSED] 16 VFs
[10:10:56] [PASSED] 17 VFs
[10:10:56] [PASSED] 18 VFs
[10:10:56] [PASSED] 19 VFs
[10:10:56] [PASSED] 20 VFs
[10:10:56] [PASSED] 21 VFs
[10:10:56] [PASSED] 22 VFs
[10:10:56] [PASSED] 23 VFs
[10:10:56] [PASSED] 24 VFs
[10:10:56] [PASSED] 25 VFs
[10:10:56] [PASSED] 26 VFs
[10:10:56] [PASSED] 27 VFs
[10:10:56] [PASSED] 28 VFs
[10:10:56] [PASSED] 29 VFs
[10:10:56] [PASSED] 30 VFs
[10:10:56] [PASSED] 31 VFs
[10:10:56] [PASSED] 32 VFs
[10:10:56] [PASSED] 33 VFs
[10:10:56] [PASSED] 34 VFs
[10:10:56] [PASSED] 35 VFs
[10:10:56] [PASSED] 36 VFs
[10:10:56] [PASSED] 37 VFs
[10:10:56] [PASSED] 38 VFs
[10:10:56] [PASSED] 39 VFs
[10:10:56] [PASSED] 40 VFs
[10:10:56] [PASSED] 41 VFs
[10:10:56] [PASSED] 42 VFs
[10:10:56] [PASSED] 43 VFs
[10:10:56] [PASSED] 44 VFs
[10:10:56] [PASSED] 45 VFs
[10:10:56] [PASSED] 46 VFs
[10:10:56] [PASSED] 47 VFs
[10:10:56] [PASSED] 48 VFs
[10:10:56] [PASSED] 49 VFs
[10:10:56] [PASSED] 50 VFs
[10:10:56] [PASSED] 51 VFs
[10:10:56] [PASSED] 52 VFs
[10:10:56] [PASSED] 53 VFs
[10:10:56] [PASSED] 54 VFs
[10:10:56] [PASSED] 55 VFs
[10:10:56] [PASSED] 56 VFs
[10:10:56] [PASSED] 57 VFs
[10:10:56] [PASSED] 58 VFs
[10:10:56] [PASSED] 59 VFs
[10:10:56] [PASSED] 60 VFs
[10:10:56] [PASSED] 61 VFs
[10:10:56] [PASSED] 62 VFs
[10:10:56] [PASSED] 63 VFs
[10:10:56] ==================== [PASSED] fair_vram ====================
[10:10:56] ================== [PASSED] pf_gt_config ===================
[10:10:56] ===================== lmtt (1 subtest) =====================
[10:10:56] ======================== test_ops  =========================
[10:10:56] [PASSED] 2-level
[10:10:56] [PASSED] multi-level
[10:10:56] ==================== [PASSED] test_ops =====================
[10:10:56] ====================== [PASSED] lmtt =======================
[10:10:56] ================= sriov_packet (1 subtest) =================
[10:10:56] [PASSED] test_descriptor_init
[10:10:56] ================== [PASSED] sriov_packet ===================
[10:10:56] ================= pf_service (11 subtests) =================
[10:10:56] [PASSED] pf_negotiate_any
[10:10:56] [PASSED] pf_negotiate_base_match
[10:10:56] [PASSED] pf_negotiate_base_newer
[10:10:56] [PASSED] pf_negotiate_base_next
[10:10:56] [SKIPPED] pf_negotiate_base_older (no older minor)
[10:10:56] [PASSED] pf_negotiate_base_prev
[10:10:56] [PASSED] pf_negotiate_latest_match
[10:10:56] [PASSED] pf_negotiate_latest_newer
[10:10:56] [PASSED] pf_negotiate_latest_next
[10:10:56] [SKIPPED] pf_negotiate_latest_older (no older minor)
[10:10:56] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[10:10:56] =================== [PASSED] pf_service ====================
[10:10:56] ================= xe_guc_g2g (2 subtests) ==================
[10:10:56] ============== xe_live_guc_g2g_kunit_default  ==============
[10:10:56] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:10:56] ============== xe_live_guc_g2g_kunit_allmem  ===============
[10:10:56] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:10:56] =================== [SKIPPED] xe_guc_g2g ===================
[10:10:56] =================== xe_mocs (2 subtests) ===================
[10:10:56] ================ xe_live_mocs_kernel_kunit  ================
[10:10:56] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:10:56] ================ xe_live_mocs_reset_kunit  =================
[10:10:56] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:10:56] ==================== [SKIPPED] xe_mocs =====================
[10:10:56] ================= xe_migrate (3 subtests) ==================
[10:10:56] ================= xe_migrate_sanity_kunit  =================
[10:10:56] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:10:56] ================== xe_validate_ccs_kunit  ==================
[10:10:56] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:10:56] ============= xe_migrate_access_memory_kunit  ==============
[10:10:56] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[10:10:56] =================== [SKIPPED] xe_migrate ===================
[10:10:56] ================== xe_dma_buf (1 subtest) ==================
[10:10:56] ==================== xe_dma_buf_kunit  =====================
[10:10:56] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:10:56] =================== [SKIPPED] xe_dma_buf ===================
[10:10:56] ================= xe_bo_shrink (1 subtest) =================
[10:10:56] =================== xe_bo_shrink_kunit  ====================
[10:10:56] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:10:56] ================== [SKIPPED] xe_bo_shrink ==================
[10:10:56] ==================== xe_bo (2 subtests) ====================
[10:10:56] ================== xe_ccs_migrate_kunit  ===================
[10:10:56] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:10:56] ==================== xe_bo_evict_kunit  ====================
[10:10:56] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:10:56] ===================== [SKIPPED] xe_bo ======================
[10:10:56] =================== xe_any (9 subtests) ====================
[10:10:56] [PASSED] test_to_xe
[10:10:56] [PASSED] test_to_dev
[10:10:56] [PASSED] test_to_pdev
[10:10:56] [PASSED] test_to_drm
[10:10:56] [PASSED] test_if_pdev
[10:10:56] [PASSED] test_if_xe
[10:10:56] [PASSED] test_if_tile
[10:10:56] [PASSED] test_if_gt
[10:10:56] [PASSED] test_to_id
[10:10:56] ===================== [PASSED] xe_any ======================
[10:10:56] ==================== args (13 subtests) ====================
[10:10:56] [PASSED] count_args_test
[10:10:56] [PASSED] call_args_example
[10:10:56] [PASSED] call_args_test
[10:10:56] [PASSED] drop_first_arg_example
[10:10:56] [PASSED] drop_first_arg_test
[10:10:56] [PASSED] first_arg_example
[10:10:56] [PASSED] first_arg_test
[10:10:56] [PASSED] last_arg_example
[10:10:56] [PASSED] last_arg_test
[10:10:56] [PASSED] pick_arg_example
[10:10:56] [PASSED] if_args_example
[10:10:56] [PASSED] if_args_test
[10:10:56] [PASSED] sep_comma_example
[10:10:56] ====================== [PASSED] args =======================
[10:10:56] =================== xe_pci (3 subtests) ====================
[10:10:56] ==================== check_graphics_ip  ====================
[10:10:56] [PASSED] 12.00 Xe_LP
[10:10:56] [PASSED] 12.10 Xe_LP+
[10:10:56] [PASSED] 12.55 Xe_HPG
[10:10:56] [PASSED] 12.60 Xe_HPC
[10:10:56] [PASSED] 12.70 Xe_LPG
[10:10:56] [PASSED] 12.71 Xe_LPG
[10:10:56] [PASSED] 12.74 Xe_LPG+
[10:10:56] [PASSED] 20.01 Xe2_HPG
[10:10:56] [PASSED] 20.02 Xe2_HPG
[10:10:56] [PASSED] 20.04 Xe2_LPG
[10:10:56] [PASSED] 30.00 Xe3_LPG
[10:10:56] [PASSED] 30.01 Xe3_LPG
[10:10:56] [PASSED] 30.03 Xe3_LPG
[10:10:56] [PASSED] 30.04 Xe3_LPG
[10:10:56] [PASSED] 30.05 Xe3_LPG
[10:10:56] [PASSED] 35.10 Xe3p_LPG
[10:10:56] [PASSED] 35.11 Xe3p_XPC
[10:10:56] ================ [PASSED] check_graphics_ip ================
[10:10:56] ===================== check_media_ip  ======================
[10:10:56] [PASSED] 12.00 Xe_M
[10:10:56] [PASSED] 12.55 Xe_HPM
[10:10:56] [PASSED] 13.00 Xe_LPM+
[10:10:56] [PASSED] 13.01 Xe2_HPM
[10:10:56] [PASSED] 20.00 Xe2_LPM
[10:10:56] [PASSED] 30.00 Xe3_LPM
[10:10:56] [PASSED] 30.02 Xe3_LPM
[10:10:56] [PASSED] 35.00 Xe3p_LPM
[10:10:56] [PASSED] 35.03 Xe3p_HPM
[10:10:56] ================= [PASSED] check_media_ip ==================
[10:10:56] =================== check_platform_desc  ===================
[10:10:56] [PASSED] 0x9A60 (TIGERLAKE)
[10:10:56] [PASSED] 0x9A68 (TIGERLAKE)
[10:10:56] [PASSED] 0x9A70 (TIGERLAKE)
[10:10:56] [PASSED] 0x9A40 (TIGERLAKE)
[10:10:56] [PASSED] 0x9A49 (TIGERLAKE)
[10:10:56] [PASSED] 0x9A59 (TIGERLAKE)
[10:10:56] [PASSED] 0x9A78 (TIGERLAKE)
[10:10:56] [PASSED] 0x9AC0 (TIGERLAKE)
[10:10:56] [PASSED] 0x9AC9 (TIGERLAKE)
[10:10:56] [PASSED] 0x9AD9 (TIGERLAKE)
[10:10:56] [PASSED] 0x9AF8 (TIGERLAKE)
[10:10:56] [PASSED] 0x4C80 (ROCKETLAKE)
[10:10:56] [PASSED] 0x4C8A (ROCKETLAKE)
[10:10:56] [PASSED] 0x4C8B (ROCKETLAKE)
[10:10:56] [PASSED] 0x4C8C (ROCKETLAKE)
[10:10:56] [PASSED] 0x4C90 (ROCKETLAKE)
[10:10:56] [PASSED] 0x4C9A (ROCKETLAKE)
[10:10:56] [PASSED] 0x4680 (ALDERLAKE_S)
[10:10:56] [PASSED] 0x4682 (ALDERLAKE_S)
[10:10:56] [PASSED] 0x4688 (ALDERLAKE_S)
[10:10:56] [PASSED] 0x468A (ALDERLAKE_S)
[10:10:56] [PASSED] 0x468B (ALDERLAKE_S)
[10:10:56] [PASSED] 0x4690 (ALDERLAKE_S)
[10:10:56] [PASSED] 0x4692 (ALDERLAKE_S)
[10:10:56] [PASSED] 0x4693 (ALDERLAKE_S)
[10:10:56] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46AA (ALDERLAKE_P)
[10:10:56] [PASSED] 0x462A (ALDERLAKE_P)
[10:10:56] [PASSED] 0x4626 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x4628 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:10:56] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:10:56] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:10:56] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:10:56] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:10:56] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:10:56] [PASSED] 0xA721 (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA720 (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:10:56] [PASSED] 0xA780 (ALDERLAKE_S)
[10:10:56] [PASSED] 0xA781 (ALDERLAKE_S)
[10:10:56] [PASSED] 0xA782 (ALDERLAKE_S)
[10:10:56] [PASSED] 0xA783 (ALDERLAKE_S)
[10:10:56] [PASSED] 0xA788 (ALDERLAKE_S)
[10:10:56] [PASSED] 0xA789 (ALDERLAKE_S)
[10:10:56] [PASSED] 0xA78A (ALDERLAKE_S)
[10:10:56] [PASSED] 0xA78B (ALDERLAKE_S)
[10:10:56] [PASSED] 0x4905 (DG1)
[10:10:56] [PASSED] 0x4906 (DG1)
[10:10:56] [PASSED] 0x4907 (DG1)
[10:10:56] [PASSED] 0x4908 (DG1)
[10:10:56] [PASSED] 0x4909 (DG1)
[10:10:56] [PASSED] 0x56C0 (DG2)
[10:10:56] [PASSED] 0x56C2 (DG2)
[10:10:56] [PASSED] 0x56C1 (DG2)
[10:10:56] [PASSED] 0x7D51 (METEORLAKE)
[10:10:56] [PASSED] 0x7DD1 (METEORLAKE)
[10:10:56] [PASSED] 0x7D41 (METEORLAKE)
[10:10:56] [PASSED] 0x7D67 (METEORLAKE)
[10:10:56] [PASSED] 0xB640 (METEORLAKE)
[10:10:56] [PASSED] 0x56A0 (DG2)
[10:10:56] [PASSED] 0x56A1 (DG2)
[10:10:56] [PASSED] 0x56A2 (DG2)
[10:10:56] [PASSED] 0x56BE (DG2)
[10:10:56] [PASSED] 0x56BF (DG2)
[10:10:56] [PASSED] 0x5690 (DG2)
[10:10:56] [PASSED] 0x5691 (DG2)
[10:10:56] [PASSED] 0x5692 (DG2)
[10:10:56] [PASSED] 0x56A5 (DG2)
[10:10:56] [PASSED] 0x56A6 (DG2)
[10:10:56] [PASSED] 0x56B0 (DG2)
[10:10:56] [PASSED] 0x56B1 (DG2)
[10:10:56] [PASSED] 0x56BA (DG2)
[10:10:56] [PASSED] 0x56BB (DG2)
[10:10:56] [PASSED] 0x56BC (DG2)
[10:10:56] [PASSED] 0x56BD (DG2)
[10:10:56] [PASSED] 0x5693 (DG2)
[10:10:56] [PASSED] 0x5694 (DG2)
[10:10:56] [PASSED] 0x5695 (DG2)
[10:10:56] [PASSED] 0x56A3 (DG2)
[10:10:56] [PASSED] 0x56A4 (DG2)
[10:10:56] [PASSED] 0x56B2 (DG2)
[10:10:56] [PASSED] 0x56B3 (DG2)
[10:10:56] [PASSED] 0x5696 (DG2)
[10:10:56] [PASSED] 0x5697 (DG2)
[10:10:56] [PASSED] 0xB69 (PVC)
[10:10:56] [PASSED] 0xB6E (PVC)
[10:10:56] [PASSED] 0xBD4 (PVC)
[10:10:56] [PASSED] 0xBD5 (PVC)
[10:10:56] [PASSED] 0xBD6 (PVC)
[10:10:56] [PASSED] 0xBD7 (PVC)
[10:10:56] [PASSED] 0xBD8 (PVC)
[10:10:56] [PASSED] 0xBD9 (PVC)
[10:10:56] [PASSED] 0xBDA (PVC)
[10:10:56] [PASSED] 0xBDB (PVC)
[10:10:56] [PASSED] 0xBE0 (PVC)
[10:10:56] [PASSED] 0xBE1 (PVC)
[10:10:56] [PASSED] 0xBE5 (PVC)
[10:10:56] [PASSED] 0x7D40 (METEORLAKE)
[10:10:56] [PASSED] 0x7D45 (METEORLAKE)
[10:10:56] [PASSED] 0x7D55 (METEORLAKE)
[10:10:56] [PASSED] 0x7D60 (METEORLAKE)
[10:10:56] [PASSED] 0x7DD5 (METEORLAKE)
[10:10:56] [PASSED] 0x6420 (LUNARLAKE)
[10:10:56] [PASSED] 0x64A0 (LUNARLAKE)
[10:10:56] [PASSED] 0x64B0 (LUNARLAKE)
[10:10:56] [PASSED] 0xE202 (BATTLEMAGE)
[10:10:56] [PASSED] 0xE209 (BATTLEMAGE)
[10:10:56] [PASSED] 0xE20B (BATTLEMAGE)
[10:10:56] [PASSED] 0xE20C (BATTLEMAGE)
[10:10:56] [PASSED] 0xE20D (BATTLEMAGE)
[10:10:56] [PASSED] 0xE210 (BATTLEMAGE)
[10:10:56] [PASSED] 0xE211 (BATTLEMAGE)
[10:10:56] [PASSED] 0xE212 (BATTLEMAGE)
[10:10:56] [PASSED] 0xE216 (BATTLEMAGE)
[10:10:56] [PASSED] 0xE220 (BATTLEMAGE)
[10:10:56] [PASSED] 0xE221 (BATTLEMAGE)
[10:10:56] [PASSED] 0xE222 (BATTLEMAGE)
[10:10:56] [PASSED] 0xE223 (BATTLEMAGE)
[10:10:56] [PASSED] 0xB080 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB081 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB082 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB083 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB084 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB085 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB086 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB087 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB08F (PANTHERLAKE)
[10:10:56] [PASSED] 0xB090 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB0A1 (PANTHERLAKE)
[10:10:56] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:10:56] [PASSED] 0xFD80 (PANTHERLAKE)
[10:10:56] [PASSED] 0xFD81 (PANTHERLAKE)
[10:10:56] [PASSED] 0xD740 (NOVALAKE_S)
[10:10:56] [PASSED] 0xD741 (NOVALAKE_S)
[10:10:56] [PASSED] 0xD742 (NOVALAKE_S)
[10:10:56] [PASSED] 0xD743 (NOVALAKE_S)
[10:10:56] [PASSED] 0xD745 (NOVALAKE_S)
[10:10:56] [PASSED] 0xD74A (NOVALAKE_S)
[10:10:56] [PASSED] 0xD74B (NOVALAKE_S)
[10:10:56] [PASSED] 0x674C (CRESCENTISLAND)
[10:10:56] [PASSED] 0x674D (CRESCENTISLAND)
[10:10:56] [PASSED] 0x674E (CRESCENTISLAND)
[10:10:56] [PASSED] 0x674F (CRESCENTISLAND)
[10:10:56] [PASSED] 0x6750 (CRESCENTISLAND)
[10:10:56] [PASSED] 0x6751 (CRESCENTISLAND)
[10:10:56] [PASSED] 0xD750 (NOVALAKE_P)
[10:10:56] [PASSED] 0xD751 (NOVALAKE_P)
[10:10:56] [PASSED] 0xD752 (NOVALAKE_P)
[10:10:56] [PASSED] 0xD753 (NOVALAKE_P)
[10:10:56] [PASSED] 0xD754 (NOVALAKE_P)
[10:10:56] [PASSED] 0xD755 (NOVALAKE_P)
[10:10:56] [PASSED] 0xD756 (NOVALAKE_P)
[10:10:56] [PASSED] 0xD757 (NOVALAKE_P)
[10:10:56] [PASSED] 0xD75F (NOVALAKE_P)
[10:10:56] =============== [PASSED] check_platform_desc ===============
[10:10:56] ===================== [PASSED] xe_pci ======================
[10:10:56] ============= xe_rtp_tables_test (5 subtests) ==============
[10:10:56] ================== xe_rtp_table_gt_test  ===================
[10:10:56] [PASSED] gt_was/14011060649
[10:10:56] [PASSED] gt_was/14011059788
[10:10:56] [PASSED] gt_was/14015795083
[10:10:56] [PASSED] gt_was/16021867713
[10:10:56] [PASSED] gt_was/14019449301
[10:10:56] [PASSED] gt_was/16028005424
[10:10:56] [PASSED] gt_was/14026578760
[10:10:56] [PASSED] gt_was/1409420604
[10:10:56] [PASSED] gt_was/1408615072
[10:10:56] [PASSED] gt_was/22010523718
[10:10:56] [PASSED] gt_was/14011006942
[10:10:56] [PASSED] gt_was/14014830051
[10:10:56] [PASSED] gt_was/18018781329
[10:10:56] [PASSED] gt_was/1509235366
[10:10:56] [PASSED] gt_was/18018781329
[10:10:56] [PASSED] gt_was/16016694945
[10:10:56] [PASSED] gt_was/14018575942
[10:10:56] [PASSED] gt_was/22016670082
[10:10:56] [PASSED] gt_was/22016670082
[10:10:56] [PASSED] gt_was/14017421178
[10:10:56] [PASSED] gt_was/16025250150
[10:10:56] [PASSED] gt_was/14021871409
[10:10:56] [PASSED] gt_was/16021865536
[10:10:56] [PASSED] gt_was/14021486841
[10:10:56] [PASSED] gt_was/14025160223
[10:10:56] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[10:10:56] [PASSED] gt_was/14025635424
[10:10:56] [PASSED] gt_was/16028005424
[10:10:56] ============== [PASSED] xe_rtp_table_gt_test ===============
[10:10:56] ================== xe_rtp_table_gt_test  ===================
[10:10:56] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[10:10:56] [PASSED] gt_tunings/Tuning: 32B Access Enable
[10:10:56] [PASSED] gt_tunings/Tuning: L3 cache
[10:10:56] [PASSED] gt_tunings/Tuning: L3 cache - media
[10:10:56] [PASSED] gt_tunings/Tuning: Compression Overfetch
[10:10:56] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[10:10:56] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[10:10:56] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[10:10:56] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[10:10:56] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[10:10:56] [PASSED] gt_tunings/Tuning: Stateless compression control
[10:10:56] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[10:10:56] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[10:10:56] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[10:10:56] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[10:10:56] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[10:10:56] ============== [PASSED] xe_rtp_table_gt_test ===============
[10:10:56] ================== xe_rtp_table_oob_test  ==================
[10:10:56] [PASSED] oob_was/1607983814
[10:10:56] [PASSED] oob_was/16010904313
[10:10:56] [PASSED] oob_was/18022495364
[10:10:56] [PASSED] oob_was/22012773006
[10:10:56] [PASSED] oob_was/14014475959
[10:10:56] [PASSED] oob_was/22011391025
[10:10:56] [PASSED] oob_was/22012727170
[10:10:56] [PASSED] oob_was/22012727685
[10:10:56] [PASSED] oob_was/22016596838
[10:10:56] [PASSED] oob_was/18020744125
[10:10:56] [PASSED] oob_was/1409600907
[10:10:56] [PASSED] oob_was/22014953428
[10:10:56] [PASSED] oob_was/16017236439
[10:10:56] [PASSED] oob_was/14019821291
[10:10:56] [PASSED] oob_was/14015076503
[10:10:56] [PASSED] oob_was/22016122933
[10:10:56] [PASSED] oob_was/14018913170
[10:10:56] [PASSED] oob_was/14018094691
[10:10:56] [PASSED] oob_was/18024947630
[10:10:56] [PASSED] oob_was/16022287689
[10:10:56] [PASSED] oob_was/13011645652
[10:10:56] [PASSED] oob_was/14022293748
[10:10:56] [PASSED] oob_was/22019794406
[10:10:56] [PASSED] oob_was/22019338487
[10:10:56] [PASSED] oob_was/16023588340
[10:10:56] [PASSED] oob_was/14019789679
[10:10:56] [PASSED] oob_was/14022866841
[10:10:56] [PASSED] oob_was/16021333562
[10:10:56] [PASSED] oob_was/14016712196
[10:10:56] [PASSED] oob_was/14015568240
[10:10:56] [PASSED] oob_was/18013179988
[10:10:56] [PASSED] oob_was/1508761755
[10:10:56] [PASSED] oob_was/16023105232
[10:10:56] [PASSED] oob_was/16026508708
[10:10:56] [PASSED] oob_was/14020001231
[10:10:56] [PASSED] oob_was/16023683509
[10:10:56] [PASSED] oob_was/14025515070
[10:10:56] [PASSED] oob_was/15015404425_disable
[10:10:56] [PASSED] oob_was/16026007364
[10:10:56] [PASSED] oob_was/14020316580
[10:10:56] [PASSED] oob_was/14025883347
[10:10:56] [PASSED] oob_was/16029380221
[10:10:56] [PASSED] oob_was/22022079272
[10:10:56] [PASSED] oob_was/16029897822
[10:10:56] [PASSED] oob_was/14027054324
[10:10:56] [PASSED] oob_was/14025941587
[10:10:56] [PASSED] oob_was/16030224309
[10:10:56] ============== [PASSED] xe_rtp_table_oob_test ==============
[10:10:56] ================ xe_rtp_table_dev_oob_test  ================
[10:10:56] [PASSED] device_oob_was/22010954014
[10:10:56] [PASSED] device_oob_was/15015404425
[10:10:56] [PASSED] device_oob_was/22019338487_display
[10:10:56] [PASSED] device_oob_was/14022085890
[10:10:56] [PASSED] device_oob_was/14026539277
[10:10:56] [PASSED] device_oob_was/14026633728
[10:10:56] [PASSED] device_oob_was/14026746987
[10:10:56] [PASSED] device_oob_was/14026779378
[10:10:56] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[10:10:56] ========== xe_rtp_table_missing_upper_bound_test  ==========
[10:10:56] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[10:10:56] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[10:10:56] [PASSED] register_whitelist/1806527549
[10:10:56] [PASSED] register_whitelist/allow_read_ctx_timestamp
[10:10:56] [PASSED] register_whitelist/allow_read_queue_timestamp
[10:10:56] [PASSED] register_whitelist/16014440446
[10:10:56] [PASSED] register_whitelist/16017236439
[10:10:56] [PASSED] register_whitelist/16020183090
[10:10:56] [PASSED] register_whitelist/14024997852
[10:10:56] [PASSED] register_whitelist/14024997852
[10:10:56] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[10:10:56] =============== [PASSED] xe_rtp_tables_test ================
[10:10:56] =================== xe_rtp (3 subtests) ====================
[10:10:56] =================== xe_rtp_rules_tests  ====================
[10:10:56] [PASSED] no
[10:10:56] [PASSED] yes
[10:10:56] [PASSED] no-and-no
[10:10:56] [PASSED] no-and-yes
[10:10:56] [PASSED] yes-and-no
[10:10:56] [PASSED] yes-and-yes
[10:10:56] [PASSED] no-or-no
[10:10:56] [PASSED] no-or-yes
[10:10:56] [PASSED] yes-or-no
[10:10:56] [PASSED] yes-or-yes
[10:10:56] [PASSED] no-yes-or-yes-no
[10:10:56] [PASSED] no-yes-or-yes-yes
[10:10:56] [PASSED] yes-yes-or-no-yes
[10:10:56] [PASSED] yes-yes-or-yes-yes
[10:10:56] [PASSED] no-no-or-yes-or-no
[10:10:56] [PASSED] or
[10:10:56] [PASSED] or-yes
[10:10:56] [PASSED] or-no
[10:10:56] [PASSED] yes-or
[10:10:56] [PASSED] no-or
[10:10:56] [PASSED] no-or-or-yes
[10:10:56] [PASSED] yes-or-or-no
[10:10:56] [PASSED] no-or-or-no
[10:10:56] [PASSED] missing-context-engine-class
[10:10:56] [PASSED] missing-context-engine-class-or-yes
[10:10:56] [PASSED] missing-context-engine-class-or-or-yes
[10:10:56] =============== [PASSED] xe_rtp_rules_tests ================
[10:10:56] =============== xe_rtp_process_to_sr_tests  ================
[10:10:56] [PASSED] coalesce-same-reg
[10:10:56] [PASSED] coalesce-same-reg-literal-and-func
[10:10:56] [PASSED] no-match-no-add
[10:10:56] [PASSED] two-regs-two-entries
[10:10:56] [PASSED] clr-one-set-other
[10:10:56] [PASSED] set-field
[10:10:56] [PASSED] conflict-duplicate
[10:10:56] [PASSED] conflict-not-disjoint
[10:10:56] [PASSED] conflict-not-disjoint-literal-and-func
[10:10:56] [PASSED] conflict-reg-type
[10:10:56] [PASSED] bad-mcr-reg-forced-to-regular
[10:10:56] [PASSED] bad-regular-reg-forced-to-mcr
[10:10:56] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:10:56] ================== xe_rtp_process_tests  ===================
[10:10:56] [PASSED] active1
[10:10:56] [PASSED] active2
[10:10:56] [PASSED] active-inactive
[10:10:56] [PASSED] inactive-active
[10:10:56] [PASSED] inactive-active-inactive
[10:10:56] [PASSED] inactive-inactive-inactive
[10:10:56] ============== [PASSED] xe_rtp_process_tests ===============
[10:10:56] ===================== [PASSED] xe_rtp ======================
[10:10:56] ==================== xe_wa (1 subtest) =====================
[10:10:56] ======================== xe_wa_gt  =========================
[10:10:56] [PASSED] TIGERLAKE B0
[10:10:56] [PASSED] DG1 A0
[10:10:56] [PASSED] DG1 B0
[10:10:56] [PASSED] ALDERLAKE_S A0
[10:10:56] [PASSED] ALDERLAKE_S B0
[10:10:56] [PASSED] ALDERLAKE_S C0
[10:10:56] [PASSED] ALDERLAKE_S D0
[10:10:56] [PASSED] ALDERLAKE_P A0
[10:10:56] [PASSED] ALDERLAKE_P B0
[10:10:56] [PASSED] ALDERLAKE_P C0
[10:10:56] [PASSED] ALDERLAKE_S RPLS D0
[10:10:56] [PASSED] ALDERLAKE_P RPLU E0
[10:10:56] [PASSED] DG2 G10 C0
[10:10:56] [PASSED] DG2 G11 B1
[10:10:56] [PASSED] DG2 G12 A1
[10:10:56] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:10:56] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:10:56] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:10:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:10:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:10:56] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:10:56] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:10:56] ==================== [PASSED] xe_wa_gt =====================
[10:10:56] ====================== [PASSED] xe_wa ======================
[10:10:56] ============================================================
[10:10:56] Testing complete. Ran 838 tests: passed: 809, skipped: 29
[10:10:56] Elapsed time: 41.109s total, 1.832s configuring, 38.511s building, 0.731s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:10:56] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:10:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:11:23] Starting KUnit Kernel (1/1)...
[10:11:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:11:23] ============ drm_test_pick_cmdline (2 subtests) ============
[10:11:23] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:11:23] =============== drm_test_pick_cmdline_named  ===============
[10:11:23] [PASSED] NTSC
[10:11:23] [PASSED] NTSC-J
[10:11:23] [PASSED] PAL
[10:11:23] [PASSED] PAL-M
[10:11:23] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:11:23] ============== [PASSED] drm_test_pick_cmdline ==============
[10:11:23] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:11:23] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:11:23] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:11:23] =========== drm_validate_clone_mode (2 subtests) ===========
[10:11:23] ============== drm_test_check_in_clone_mode  ===============
[10:11:23] [PASSED] in_clone_mode
[10:11:23] [PASSED] not_in_clone_mode
[10:11:23] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:11:23] =============== drm_test_check_valid_clones  ===============
[10:11:23] [PASSED] not_in_clone_mode
[10:11:23] [PASSED] valid_clone
[10:11:23] [PASSED] invalid_clone
[10:11:23] =========== [PASSED] drm_test_check_valid_clones ===========
[10:11:23] ============= [PASSED] drm_validate_clone_mode =============
[10:11:23] ============= drm_validate_modeset (1 subtest) =============
[10:11:23] [PASSED] drm_test_check_connector_changed_modeset
[10:11:23] ============== [PASSED] drm_validate_modeset ===============
[10:11:23] ====== drm_test_bridge_get_current_state (1 subtest) =======
[10:11:23] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:11:23] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:11:23] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:11:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:11:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:11:23] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[10:11:23] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:11:23] ============== drm_bridge_alloc (2 subtests) ===============
[10:11:23] [PASSED] drm_test_drm_bridge_alloc_basic
[10:11:23] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:11:23] ================ [PASSED] drm_bridge_alloc =================
[10:11:23] ============= drm_bridge_bus_fmt (5 subtests) ==============
[10:11:23] [PASSED] drm_test_bridge_rgb_yuv_rgb
[10:11:23] [PASSED] drm_test_bridge_must_convert_to_yuv444
[10:11:23] [PASSED] drm_test_bridge_hdmi_auto_rgb
[10:11:23] [PASSED] drm_test_bridge_auto_first
[10:11:23] [PASSED] drm_test_bridge_rgb_yuv_no_path
[10:11:23] =============== [PASSED] drm_bridge_bus_fmt ================
[10:11:23] ============= drm_cmdline_parser (40 subtests) =============
[10:11:23] [PASSED] drm_test_cmdline_force_d_only
[10:11:23] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:11:23] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:11:23] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:11:23] [PASSED] drm_test_cmdline_force_e_only
[10:11:23] [PASSED] drm_test_cmdline_res
[10:11:23] [PASSED] drm_test_cmdline_res_vesa
[10:11:23] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:11:23] [PASSED] drm_test_cmdline_res_rblank
[10:11:23] [PASSED] drm_test_cmdline_res_bpp
[10:11:23] [PASSED] drm_test_cmdline_res_refresh
[10:11:23] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:11:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:11:23] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:11:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:11:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:11:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:11:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:11:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:11:23] [PASSED] drm_test_cmdline_res_margins_force_on
[10:11:23] [PASSED] drm_test_cmdline_res_vesa_margins
[10:11:23] [PASSED] drm_test_cmdline_name
[10:11:23] [PASSED] drm_test_cmdline_name_bpp
[10:11:23] [PASSED] drm_test_cmdline_name_option
[10:11:23] [PASSED] drm_test_cmdline_name_bpp_option
[10:11:23] [PASSED] drm_test_cmdline_rotate_0
[10:11:23] [PASSED] drm_test_cmdline_rotate_90
[10:11:23] [PASSED] drm_test_cmdline_rotate_180
[10:11:23] [PASSED] drm_test_cmdline_rotate_270
[10:11:23] [PASSED] drm_test_cmdline_hmirror
[10:11:23] [PASSED] drm_test_cmdline_vmirror
[10:11:23] [PASSED] drm_test_cmdline_margin_options
[10:11:23] [PASSED] drm_test_cmdline_multiple_options
[10:11:23] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:11:23] [PASSED] drm_test_cmdline_extra_and_option
[10:11:23] [PASSED] drm_test_cmdline_freestanding_options
[10:11:23] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:11:23] [PASSED] drm_test_cmdline_panel_orientation
[10:11:23] ================ drm_test_cmdline_invalid  =================
[10:11:23] [PASSED] margin_only
[10:11:23] [PASSED] interlace_only
[10:11:23] [PASSED] res_missing_x
[10:11:23] [PASSED] res_missing_y
[10:11:23] [PASSED] res_bad_y
[10:11:23] [PASSED] res_missing_y_bpp
[10:11:23] [PASSED] res_bad_bpp
[10:11:23] [PASSED] res_bad_refresh
[10:11:23] [PASSED] res_bpp_refresh_force_on_off
[10:11:23] [PASSED] res_invalid_mode
[10:11:23] [PASSED] res_bpp_wrong_place_mode
[10:11:23] [PASSED] name_bpp_refresh
[10:11:23] [PASSED] name_refresh
[10:11:23] [PASSED] name_refresh_wrong_mode
[10:11:23] [PASSED] name_refresh_invalid_mode
[10:11:23] [PASSED] rotate_multiple
[10:11:23] [PASSED] rotate_invalid_val
[10:11:23] [PASSED] rotate_truncated
[10:11:23] [PASSED] invalid_option
[10:11:23] [PASSED] invalid_tv_option
[10:11:23] [PASSED] truncated_tv_option
[10:11:23] ============ [PASSED] drm_test_cmdline_invalid =============
[10:11:23] =============== drm_test_cmdline_tv_options  ===============
[10:11:23] [PASSED] NTSC
[10:11:23] [PASSED] NTSC_443
[10:11:23] [PASSED] NTSC_J
[10:11:23] [PASSED] PAL
[10:11:23] [PASSED] PAL_M
[10:11:23] [PASSED] PAL_N
[10:11:23] [PASSED] SECAM
[10:11:23] [PASSED] MONO_525
[10:11:23] [PASSED] MONO_625
[10:11:23] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:11:23] =============== [PASSED] drm_cmdline_parser ================
[10:11:23] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:11:23] [PASSED] drm_test_connector_hdmi_init_valid
[10:11:23] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:11:23] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:11:23] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:11:23] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:11:23] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:11:23] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:11:23] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:11:23] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[10:11:23] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:11:23] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:11:23] [PASSED] supported_formats=0x5 yuv420_allowed=1
[10:11:23] [PASSED] supported_formats=0x5 yuv420_allowed=0
[10:11:23] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:11:23] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:11:23] [PASSED] drm_test_connector_hdmi_init_null_product
[10:11:23] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:11:23] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:11:23] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:11:23] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:11:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:11:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:11:23] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:11:23] ========= drm_test_connector_hdmi_init_type_valid  =========
[10:11:23] [PASSED] HDMI-A
[10:11:23] [PASSED] HDMI-B
[10:11:23] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:11:23] ======== drm_test_connector_hdmi_init_type_invalid  ========
[10:11:23] [PASSED] Unknown
[10:11:23] [PASSED] VGA
[10:11:23] [PASSED] DVI-I
[10:11:23] [PASSED] DVI-D
[10:11:23] [PASSED] DVI-A
[10:11:23] [PASSED] Composite
[10:11:23] [PASSED] SVIDEO
[10:11:23] [PASSED] LVDS
[10:11:23] [PASSED] Component
[10:11:23] [PASSED] DIN
[10:11:23] [PASSED] DP
[10:11:23] [PASSED] TV
[10:11:23] [PASSED] eDP
[10:11:23] [PASSED] Virtual
[10:11:23] [PASSED] DSI
[10:11:23] [PASSED] DPI
[10:11:23] [PASSED] Writeback
[10:11:23] [PASSED] SPI
[10:11:23] [PASSED] USB
[10:11:23] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:11:23] ============ [PASSED] drmm_connector_hdmi_init =============
[10:11:23] ============= drmm_connector_init (3 subtests) =============
[10:11:23] [PASSED] drm_test_drmm_connector_init
[10:11:23] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:11:23] ========= drm_test_drmm_connector_init_type_valid  =========
[10:11:23] [PASSED] Unknown
[10:11:23] [PASSED] VGA
[10:11:23] [PASSED] DVI-I
[10:11:23] [PASSED] DVI-D
[10:11:23] [PASSED] DVI-A
[10:11:23] [PASSED] Composite
[10:11:23] [PASSED] SVIDEO
[10:11:23] [PASSED] LVDS
[10:11:23] [PASSED] Component
[10:11:23] [PASSED] DIN
[10:11:23] [PASSED] DP
[10:11:23] [PASSED] HDMI-A
[10:11:23] [PASSED] HDMI-B
[10:11:23] [PASSED] TV
[10:11:23] [PASSED] eDP
[10:11:23] [PASSED] Virtual
[10:11:23] [PASSED] DSI
[10:11:23] [PASSED] DPI
[10:11:23] [PASSED] Writeback
[10:11:23] [PASSED] SPI
[10:11:23] [PASSED] USB
[10:11:23] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:11:23] =============== [PASSED] drmm_connector_init ===============
[10:11:23] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_init
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:11:23] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[10:11:23] [PASSED] Unknown
[10:11:23] [PASSED] VGA
[10:11:23] [PASSED] DVI-I
[10:11:23] [PASSED] DVI-D
[10:11:23] [PASSED] DVI-A
[10:11:23] [PASSED] Composite
[10:11:23] [PASSED] SVIDEO
[10:11:23] [PASSED] LVDS
[10:11:23] [PASSED] Component
[10:11:23] [PASSED] DIN
[10:11:23] [PASSED] DP
[10:11:23] [PASSED] HDMI-A
[10:11:23] [PASSED] HDMI-B
[10:11:23] [PASSED] TV
[10:11:23] [PASSED] eDP
[10:11:23] [PASSED] Virtual
[10:11:23] [PASSED] DSI
[10:11:23] [PASSED] DPI
[10:11:23] [PASSED] Writeback
[10:11:23] [PASSED] SPI
[10:11:23] [PASSED] USB
[10:11:23] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:11:23] ======== drm_test_drm_connector_dynamic_init_name  =========
[10:11:23] [PASSED] Unknown
[10:11:23] [PASSED] VGA
[10:11:23] [PASSED] DVI-I
[10:11:23] [PASSED] DVI-D
[10:11:23] [PASSED] DVI-A
[10:11:23] [PASSED] Composite
[10:11:23] [PASSED] SVIDEO
[10:11:23] [PASSED] LVDS
[10:11:23] [PASSED] Component
[10:11:23] [PASSED] DIN
[10:11:23] [PASSED] DP
[10:11:23] [PASSED] HDMI-A
[10:11:23] [PASSED] HDMI-B
[10:11:23] [PASSED] TV
[10:11:23] [PASSED] eDP
[10:11:23] [PASSED] Virtual
[10:11:23] [PASSED] DSI
[10:11:23] [PASSED] DPI
[10:11:23] [PASSED] Writeback
[10:11:23] [PASSED] SPI
[10:11:23] [PASSED] USB
[10:11:23] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:11:23] =========== [PASSED] drm_connector_dynamic_init ============
[10:11:23] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:11:23] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:11:23] ======= drm_connector_dynamic_register (7 subtests) ========
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:11:23] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:11:23] ========= [PASSED] drm_connector_dynamic_register ==========
[10:11:23] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:11:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:11:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:11:23] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:11:23] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:11:23] ========== drm_test_get_tv_mode_from_name_valid  ===========
[10:11:23] [PASSED] NTSC
[10:11:23] [PASSED] NTSC-443
[10:11:23] [PASSED] NTSC-J
[10:11:23] [PASSED] PAL
[10:11:23] [PASSED] PAL-M
[10:11:23] [PASSED] PAL-N
[10:11:23] [PASSED] SECAM
[10:11:23] [PASSED] Mono
[10:11:23] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:11:23] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:11:23] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:11:23] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:11:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:11:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:11:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:11:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:11:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:11:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:11:23] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[10:11:23] [PASSED] VIC 96
[10:11:23] [PASSED] VIC 97
[10:11:23] [PASSED] VIC 101
[10:11:23] [PASSED] VIC 102
[10:11:23] [PASSED] VIC 106
[10:11:23] [PASSED] VIC 107
[10:11:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:11:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:11:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:11:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:11:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:11:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:11:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:11:23] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:11:23] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[10:11:23] [PASSED] Automatic
[10:11:23] [PASSED] Full
[10:11:23] [PASSED] Limited 16:235
[10:11:23] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:11:23] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:11:23] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:11:23] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:11:23] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[10:11:23] [PASSED] RGB
[10:11:23] [PASSED] YUV 4:2:0
[10:11:23] [PASSED] YUV 4:2:2
[10:11:23] [PASSED] YUV 4:4:4
[10:11:23] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:11:23] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:11:23] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:11:23] ============= drm_damage_helper (21 subtests) ==============
[10:11:23] [PASSED] drm_test_damage_iter_no_damage
[10:11:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:11:23] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:11:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:11:23] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:11:23] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:11:23] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:11:23] [PASSED] drm_test_damage_iter_simple_damage
[10:11:23] [PASSED] drm_test_damage_iter_single_damage
[10:11:23] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:11:23] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:11:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:11:23] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:11:23] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:11:23] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:11:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:11:23] [PASSED] drm_test_damage_iter_damage
[10:11:23] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:11:23] [PASSED] drm_test_damage_iter_damage_one_outside
[10:11:23] [PASSED] drm_test_damage_iter_damage_src_moved
[10:11:23] [PASSED] drm_test_damage_iter_damage_not_visible
[10:11:23] ================ [PASSED] drm_damage_helper ================
[10:11:23] ============== drm_dp_mst_helper (3 subtests) ==============
[10:11:23] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[10:11:23] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:11:23] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:11:23] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:11:23] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:11:23] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:11:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:11:23] ============== drm_test_dp_mst_calc_pbn_div  ===============
[10:11:23] [PASSED] Link rate 2000000 lane count 4
[10:11:23] [PASSED] Link rate 2000000 lane count 2
[10:11:23] [PASSED] Link rate 2000000 lane count 1
[10:11:23] [PASSED] Link rate 1350000 lane count 4
[10:11:23] [PASSED] Link rate 1350000 lane count 2
[10:11:23] [PASSED] Link rate 1350000 lane count 1
[10:11:23] [PASSED] Link rate 1000000 lane count 4
[10:11:23] [PASSED] Link rate 1000000 lane count 2
[10:11:23] [PASSED] Link rate 1000000 lane count 1
[10:11:23] [PASSED] Link rate 810000 lane count 4
[10:11:23] [PASSED] Link rate 810000 lane count 2
[10:11:23] [PASSED] Link rate 810000 lane count 1
[10:11:23] [PASSED] Link rate 540000 lane count 4
[10:11:23] [PASSED] Link rate 540000 lane count 2
[10:11:23] [PASSED] Link rate 540000 lane count 1
[10:11:23] [PASSED] Link rate 270000 lane count 4
[10:11:23] [PASSED] Link rate 270000 lane count 2
[10:11:23] [PASSED] Link rate 270000 lane count 1
[10:11:23] [PASSED] Link rate 162000 lane count 4
[10:11:23] [PASSED] Link rate 162000 lane count 2
[10:11:23] [PASSED] Link rate 162000 lane count 1
[10:11:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:11:23] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[10:11:23] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:11:23] [PASSED] DP_POWER_UP_PHY with port number
[10:11:23] [PASSED] DP_POWER_DOWN_PHY with port number
[10:11:23] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:11:23] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:11:23] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:11:23] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:11:23] [PASSED] DP_QUERY_PAYLOAD with port number
[10:11:23] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:11:23] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:11:23] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:11:23] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:11:23] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:11:23] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:11:23] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:11:23] [PASSED] DP_REMOTE_I2C_READ with port number
[10:11:23] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:11:23] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:11:23] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:11:23] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:11:23] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:11:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:11:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:11:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:11:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:11:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:11:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:11:23] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:11:23] ================ [PASSED] drm_dp_mst_helper ================
[10:11:23] ================== drm_exec (7 subtests) ===================
[10:11:23] [PASSED] sanitycheck
[10:11:23] [PASSED] test_lock
[10:11:23] [PASSED] test_lock_unlock
[10:11:23] [PASSED] test_duplicates
[10:11:23] [PASSED] test_prepare
[10:11:23] [PASSED] test_prepare_array
[10:11:23] [PASSED] test_multiple_loops
[10:11:23] ==================== [PASSED] drm_exec =====================
[10:11:23] =========== drm_format_helper_test (17 subtests) ===========
[10:11:23] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:11:23] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:11:23] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:11:23] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:11:23] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:11:23] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:11:23] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:11:23] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:11:23] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:11:23] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:11:23] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:11:23] ============== drm_test_fb_xrgb8888_to_mono  ===============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:11:23] ==================== drm_test_fb_swab  =====================
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ================ [PASSED] drm_test_fb_swab =================
[10:11:23] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:11:23] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[10:11:23] [PASSED] single_pixel_source_buffer
[10:11:23] [PASSED] single_pixel_clip_rectangle
[10:11:23] [PASSED] well_known_colors
[10:11:23] [PASSED] destination_pitch
[10:11:23] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:11:23] ================= drm_test_fb_clip_offset  =================
[10:11:23] [PASSED] pass through
[10:11:23] [PASSED] horizontal offset
[10:11:23] [PASSED] vertical offset
[10:11:23] [PASSED] horizontal and vertical offset
[10:11:23] [PASSED] horizontal offset (custom pitch)
[10:11:23] [PASSED] vertical offset (custom pitch)
[10:11:23] [PASSED] horizontal and vertical offset (custom pitch)
[10:11:23] ============= [PASSED] drm_test_fb_clip_offset =============
[10:11:23] =================== drm_test_fb_memcpy  ====================
[10:11:23] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:11:23] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:11:23] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:11:23] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:11:23] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:11:23] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:11:23] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:11:23] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:11:23] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:11:23] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:11:23] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:11:23] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:11:23] =============== [PASSED] drm_test_fb_memcpy ================
[10:11:23] ============= [PASSED] drm_format_helper_test ==============
[10:11:23] ================= drm_format (18 subtests) =================
[10:11:23] [PASSED] drm_test_format_block_width_invalid
[10:11:23] [PASSED] drm_test_format_block_width_one_plane
[10:11:23] [PASSED] drm_test_format_block_width_two_plane
[10:11:23] [PASSED] drm_test_format_block_width_three_plane
[10:11:23] [PASSED] drm_test_format_block_width_tiled
[10:11:23] [PASSED] drm_test_format_block_height_invalid
[10:11:23] [PASSED] drm_test_format_block_height_one_plane
[10:11:23] [PASSED] drm_test_format_block_height_two_plane
[10:11:23] [PASSED] drm_test_format_block_height_three_plane
[10:11:23] [PASSED] drm_test_format_block_height_tiled
[10:11:23] [PASSED] drm_test_format_min_pitch_invalid
[10:11:23] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:11:23] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:11:23] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:11:23] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:11:23] [PASSED] drm_test_format_min_pitch_two_plane
[10:11:23] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:11:23] [PASSED] drm_test_format_min_pitch_tiled
[10:11:23] =================== [PASSED] drm_format ====================
[10:11:23] ============== drm_framebuffer (10 subtests) ===============
[10:11:23] ========== drm_test_framebuffer_check_src_coords  ==========
[10:11:23] [PASSED] Success: source fits into fb
[10:11:23] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:11:23] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:11:23] [PASSED] Fail: overflowing fb with source width
[10:11:23] [PASSED] Fail: overflowing fb with source height
[10:11:23] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:11:23] [PASSED] drm_test_framebuffer_cleanup
[10:11:23] =============== drm_test_framebuffer_create  ===============
[10:11:23] [PASSED] ABGR8888 normal sizes
[10:11:23] [PASSED] ABGR8888 max sizes
[10:11:23] [PASSED] ABGR8888 pitch greater than min required
[10:11:23] [PASSED] ABGR8888 pitch less than min required
[10:11:23] [PASSED] ABGR8888 Invalid width
[10:11:23] [PASSED] ABGR8888 Invalid buffer handle
[10:11:23] [PASSED] No pixel format
[10:11:23] [PASSED] ABGR8888 Width 0
[10:11:23] [PASSED] ABGR8888 Height 0
[10:11:23] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:11:23] [PASSED] ABGR8888 Large buffer offset
[10:11:23] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:11:23] [PASSED] ABGR8888 Invalid flag
[10:11:23] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:11:23] [PASSED] ABGR8888 Valid buffer modifier
[10:11:23] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:11:23] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:11:23] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:11:23] [PASSED] NV12 Normal sizes
[10:11:23] [PASSED] NV12 Max sizes
[10:11:23] [PASSED] NV12 Invalid pitch
[10:11:23] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:11:23] [PASSED] NV12 different  modifier per-plane
[10:11:23] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:11:23] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:11:23] [PASSED] NV12 Modifier for inexistent plane
[10:11:23] [PASSED] NV12 Handle for inexistent plane
[10:11:23] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:11:23] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:11:23] [PASSED] YVU420 Normal sizes
[10:11:23] [PASSED] YVU420 Max sizes
[10:11:23] [PASSED] YVU420 Invalid pitch
[10:11:23] [PASSED] YVU420 Different pitches
[10:11:23] [PASSED] YVU420 Different buffer offsets/pitches
[10:11:23] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:11:23] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:11:23] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:11:23] [PASSED] YVU420 Valid modifier
[10:11:23] [PASSED] YVU420 Different modifiers per plane
[10:11:23] [PASSED] YVU420 Modifier for inexistent plane
[10:11:23] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:11:23] [PASSED] X0L2 Normal sizes
[10:11:23] [PASSED] X0L2 Max sizes
[10:11:23] [PASSED] X0L2 Invalid pitch
[10:11:23] [PASSED] X0L2 Pitch greater than minimum required
[10:11:23] [PASSED] X0L2 Handle for inexistent plane
[10:11:23] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:11:23] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:11:23] [PASSED] X0L2 Valid modifier
[10:11:23] [PASSED] X0L2 Modifier for inexistent plane
[10:11:23] =========== [PASSED] drm_test_framebuffer_create ===========
[10:11:23] [PASSED] drm_test_framebuffer_free
[10:11:23] [PASSED] drm_test_framebuffer_init
[10:11:23] [PASSED] drm_test_framebuffer_init_bad_format
[10:11:23] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:11:23] [PASSED] drm_test_framebuffer_lookup
[10:11:23] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:11:23] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:11:23] ================= [PASSED] drm_framebuffer =================
[10:11:23] ================ drm_gem_shmem (8 subtests) ================
[10:11:23] [PASSED] drm_gem_shmem_test_obj_create
[10:11:23] [PASSED] drm_gem_shmem_test_obj_create_private
[10:11:23] [PASSED] drm_gem_shmem_test_pin_pages
[10:11:23] [PASSED] drm_gem_shmem_test_vmap
[10:11:23] [PASSED] drm_gem_shmem_test_get_sg_table
[10:11:23] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:11:23] [PASSED] drm_gem_shmem_test_madvise
[10:11:23] [PASSED] drm_gem_shmem_test_purge
[10:11:23] ================== [PASSED] drm_gem_shmem ==================
[10:11:23] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[10:11:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:11:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:11:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:11:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:11:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:11:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:11:23] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[10:11:23] [PASSED] Automatic
[10:11:23] [PASSED] Full
[10:11:23] [PASSED] Limited 16:235
[10:11:23] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:11:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:11:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:11:23] [PASSED] drm_test_check_disable_connector
[10:11:23] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:11:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:11:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:11:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:11:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:11:23] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:11:23] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:11:23] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:11:23] [PASSED] drm_test_check_output_bpc_dvi
[10:11:23] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:11:23] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:11:23] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:11:23] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:11:23] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:11:23] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:11:23] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:11:23] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:11:23] ============ drm_test_check_hdmi_color_format  =============
[10:11:23] [PASSED] AUTO -> RGB
[10:11:23] [PASSED] YCBCR422 -> YUV422
[10:11:23] [PASSED] YCBCR420 -> YUV420
[10:11:23] [PASSED] YCBCR444 -> YUV444
[10:11:23] [PASSED] RGB -> RGB
[10:11:23] ======== [PASSED] drm_test_check_hdmi_color_format =========
[10:11:23] ======== drm_test_check_hdmi_color_format_420_only  ========
[10:11:23] [PASSED] RGB should fail
[10:11:23] [PASSED] YUV444 should fail
[10:11:23] [PASSED] YUV422 should fail
[10:11:23] [PASSED] YUV420 should work
[10:11:23] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[10:11:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:11:23] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:11:23] [PASSED] drm_test_check_broadcast_rgb_value
[10:11:23] [PASSED] drm_test_check_bpc_8_value
[10:11:23] [PASSED] drm_test_check_bpc_10_value
[10:11:23] [PASSED] drm_test_check_bpc_12_value
[10:11:23] [PASSED] drm_test_check_format_value
[10:11:23] [PASSED] drm_test_check_tmds_char_value
[10:11:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:11:23] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[10:11:23] [PASSED] drm_test_check_mode_valid
[10:11:23] [PASSED] drm_test_check_mode_valid_reject
[10:11:23] [PASSED] drm_test_check_mode_valid_reject_rate
[10:11:23] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:11:23] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[10:11:23] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[10:11:23] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[10:11:23] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:11:23] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:11:23] [PASSED] drm_test_check_infoframes
[10:11:23] [PASSED] drm_test_check_reject_avi_infoframe
[10:11:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:11:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:11:23] [PASSED] drm_test_check_reject_audio_infoframe
[10:11:23] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:11:23] ================= drm_managed (2 subtests) =================
[10:11:23] [PASSED] drm_test_managed_release_action
[10:11:23] [PASSED] drm_test_managed_run_action
[10:11:23] =================== [PASSED] drm_managed ===================
[10:11:23] =================== drm_mm (6 subtests) ====================
[10:11:23] [PASSED] drm_test_mm_init
[10:11:23] [PASSED] drm_test_mm_debug
[10:11:23] [PASSED] drm_test_mm_align32
[10:11:23] [PASSED] drm_test_mm_align64
[10:11:23] [PASSED] drm_test_mm_lowest
[10:11:23] [PASSED] drm_test_mm_highest
[10:11:23] ===================== [PASSED] drm_mm ======================
[10:11:23] ============= drm_modes_analog_tv (5 subtests) =============
[10:11:23] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:11:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:11:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:11:23] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:11:23] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:11:23] =============== [PASSED] drm_modes_analog_tv ===============
[10:11:23] ============== drm_panic_helper (3 subtests) ===============
[10:11:23] ============= drm_test_panic_screen_user_map  ==============
[10:11:23] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:11:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:11:23] ========= [PASSED] drm_test_panic_screen_user_map ==========
[10:11:23] ============= drm_test_panic_screen_user_page  =============
[10:11:23] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:11:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:11:23] ========= [PASSED] drm_test_panic_screen_user_page =========
[10:11:23] ========== drm_test_panic_screen_user_set_pixel  ===========
[10:11:23] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:11:23] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[10:11:23] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[10:11:23] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[10:11:23] ================ [PASSED] drm_panic_helper =================
[10:11:23] ============== drm_plane_helper (2 subtests) ===============
[10:11:23] =============== drm_test_check_plane_state  ================
[10:11:23] [PASSED] clipping_simple
[10:11:23] [PASSED] clipping_rotate_reflect
[10:11:23] [PASSED] positioning_simple
[10:11:23] [PASSED] upscaling
[10:11:23] [PASSED] downscaling
[10:11:23] [PASSED] rounding1
[10:11:23] [PASSED] rounding2
[10:11:23] [PASSED] rounding3
[10:11:23] [PASSED] rounding4
[10:11:23] =========== [PASSED] drm_test_check_plane_state ============
[10:11:23] =========== drm_test_check_invalid_plane_state  ============
[10:11:23] [PASSED] positioning_invalid
[10:11:23] [PASSED] upscaling_invalid
[10:11:23] [PASSED] downscaling_invalid
[10:11:23] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:11:23] ================ [PASSED] drm_plane_helper =================
[10:11:23] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:11:23] ====== drm_test_connector_helper_tv_get_modes_check  =======
[10:11:23] [PASSED] None
[10:11:23] [PASSED] PAL
[10:11:23] [PASSED] NTSC
[10:11:23] [PASSED] Both, NTSC Default
[10:11:23] [PASSED] Both, PAL Default
[10:11:23] [PASSED] Both, NTSC Default, with PAL on command-line
[10:11:23] [PASSED] Both, PAL Default, with NTSC on command-line
[10:11:23] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:11:23] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:11:23] ================== drm_rect (9 subtests) ===================
[10:11:23] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:11:23] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:11:23] [PASSED] drm_test_rect_clip_scaled_clipped
[10:11:23] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:11:23] ================= drm_test_rect_intersect  =================
[10:11:23] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:11:23] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:11:23] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:11:23] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:11:23] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:11:23] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:11:23] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:11:23] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:11:23] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:11:23] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:11:23] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:11:23] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:11:23] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:11:23] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:11:23] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:11:23] ============= [PASSED] drm_test_rect_intersect =============
[10:11:23] ================ drm_test_rect_calc_hscale  ================
[10:11:23] [PASSED] normal use
[10:11:23] [PASSED] out of max range
[10:11:23] [PASSED] out of min range
[10:11:23] [PASSED] zero dst
[10:11:23] [PASSED] negative src
[10:11:23] [PASSED] negative dst
[10:11:23] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:11:23] ================ drm_test_rect_calc_vscale  ================
[10:11:23] [PASSED] normal use
[10:11:23] [PASSED] out of max range
[10:11:23] [PASSED] out of min range
[10:11:23] [PASSED] zero dst
[10:11:23] [PASSED] negative src
[10:11:23] [PASSED] negative dst
[10:11:23] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:11:23] ================== drm_test_rect_rotate  ===================
[10:11:23] [PASSED] reflect-x
[10:11:23] [PASSED] reflect-y
[10:11:23] [PASSED] rotate-0
[10:11:23] [PASSED] rotate-90
[10:11:23] [PASSED] rotate-180
[10:11:23] [PASSED] rotate-270
[10:11:23] ============== [PASSED] drm_test_rect_rotate ===============
[10:11:23] ================ drm_test_rect_rotate_inv  =================
[10:11:23] [PASSED] reflect-x
[10:11:23] [PASSED] reflect-y
[10:11:23] [PASSED] rotate-0
[10:11:23] [PASSED] rotate-90
[10:11:23] [PASSED] rotate-180
[10:11:23] [PASSED] rotate-270
[10:11:23] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:11:23] ==================== [PASSED] drm_rect =====================
[10:11:23] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:11:23] ============ drm_test_sysfb_build_fourcc_list  =============
[10:11:23] [PASSED] no native formats
[10:11:23] [PASSED] XRGB8888 as native format
[10:11:23] [PASSED] remove duplicates
[10:11:23] [PASSED] convert alpha formats
[10:11:23] [PASSED] random formats
[10:11:23] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:11:23] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:11:23] ================== drm_fixp (2 subtests) ===================
[10:11:23] [PASSED] drm_test_int2fixp
[10:11:23] [PASSED] drm_test_sm2fixp
[10:11:23] ==================== [PASSED] drm_fixp =====================
[10:11:23] ============================================================
[10:11:23] Testing complete. Ran 667 tests: passed: 667
[10:11:23] Elapsed time: 27.280s total, 1.874s configuring, 24.937s building, 0.415s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:11:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:11:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:11:35] Starting KUnit Kernel (1/1)...
[10:11:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:11:35] ================= ttm_device (5 subtests) ==================
[10:11:35] [PASSED] ttm_device_init_basic
[10:11:35] [PASSED] ttm_device_init_multiple
[10:11:35] [PASSED] ttm_device_fini_basic
[10:11:35] [PASSED] ttm_device_init_no_vma_man
[10:11:35] ================== ttm_device_init_pools  ==================
[10:11:35] [PASSED] No DMA allocations, no DMA32 required
[10:11:35] [PASSED] DMA allocations, DMA32 required
[10:11:35] [PASSED] No DMA allocations, DMA32 required
[10:11:35] [PASSED] DMA allocations, no DMA32 required
[10:11:35] ============== [PASSED] ttm_device_init_pools ==============
[10:11:35] =================== [PASSED] ttm_device ====================
[10:11:35] ================== ttm_pool (8 subtests) ===================
[10:11:35] ================== ttm_pool_alloc_basic  ===================
[10:11:35] [PASSED] One page
[10:11:35] [PASSED] More than one page
[10:11:35] [PASSED] Above the allocation limit
[10:11:35] [PASSED] One page, with coherent DMA mappings enabled
[10:11:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:11:35] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:11:35] ============== ttm_pool_alloc_basic_dma_addr  ==============
[10:11:35] [PASSED] One page
[10:11:35] [PASSED] More than one page
[10:11:35] [PASSED] Above the allocation limit
[10:11:35] [PASSED] One page, with coherent DMA mappings enabled
[10:11:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:11:35] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:11:35] [PASSED] ttm_pool_alloc_order_caching_match
[10:11:35] [PASSED] ttm_pool_alloc_caching_mismatch
[10:11:35] [PASSED] ttm_pool_alloc_order_mismatch
[10:11:35] [PASSED] ttm_pool_free_dma_alloc
[10:11:35] [PASSED] ttm_pool_free_no_dma_alloc
[10:11:35] [PASSED] ttm_pool_fini_basic
[10:11:35] ==================== [PASSED] ttm_pool =====================
[10:11:35] ================ ttm_resource (8 subtests) =================
[10:11:35] ================= ttm_resource_init_basic  =================
[10:11:35] [PASSED] Init resource in TTM_PL_SYSTEM
[10:11:35] [PASSED] Init resource in TTM_PL_VRAM
[10:11:35] [PASSED] Init resource in a private placement
[10:11:35] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:11:35] ============= [PASSED] ttm_resource_init_basic =============
[10:11:35] [PASSED] ttm_resource_init_pinned
[10:11:35] [PASSED] ttm_resource_fini_basic
[10:11:35] [PASSED] ttm_resource_manager_init_basic
[10:11:35] [PASSED] ttm_resource_manager_usage_basic
[10:11:35] [PASSED] ttm_resource_manager_set_used_basic
[10:11:35] [PASSED] ttm_sys_man_alloc_basic
[10:11:35] [PASSED] ttm_sys_man_free_basic
[10:11:35] ================== [PASSED] ttm_resource ===================
[10:11:35] =================== ttm_tt (15 subtests) ===================
[10:11:35] ==================== ttm_tt_init_basic  ====================
[10:11:35] [PASSED] Page-aligned size
[10:11:35] [PASSED] Extra pages requested
[10:11:35] ================ [PASSED] ttm_tt_init_basic ================
[10:11:35] [PASSED] ttm_tt_init_misaligned
[10:11:35] [PASSED] ttm_tt_fini_basic
[10:11:35] [PASSED] ttm_tt_fini_sg
[10:11:35] [PASSED] ttm_tt_fini_shmem
[10:11:35] [PASSED] ttm_tt_create_basic
[10:11:35] [PASSED] ttm_tt_create_invalid_bo_type
[10:11:35] [PASSED] ttm_tt_create_ttm_exists
[10:11:35] [PASSED] ttm_tt_create_failed
[10:11:35] [PASSED] ttm_tt_destroy_basic
[10:11:35] [PASSED] ttm_tt_populate_null_ttm
[10:11:35] [PASSED] ttm_tt_populate_populated_ttm
[10:11:35] [PASSED] ttm_tt_unpopulate_basic
[10:11:35] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:11:35] [PASSED] ttm_tt_swapin_basic
[10:11:35] ===================== [PASSED] ttm_tt ======================
[10:11:35] =================== ttm_bo (14 subtests) ===================
[10:11:35] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[10:11:35] [PASSED] Cannot be interrupted and sleeps
[10:11:35] [PASSED] Cannot be interrupted, locks straight away
[10:11:35] [PASSED] Can be interrupted, sleeps
[10:11:35] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:11:35] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:11:35] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:11:35] [PASSED] ttm_bo_reserve_double_resv
[10:11:35] [PASSED] ttm_bo_reserve_interrupted
[10:11:35] [PASSED] ttm_bo_reserve_deadlock
[10:11:35] [PASSED] ttm_bo_unreserve_basic
[10:11:35] [PASSED] ttm_bo_unreserve_pinned
[10:11:35] [PASSED] ttm_bo_unreserve_bulk
[10:11:35] [PASSED] ttm_bo_fini_basic
[10:11:35] [PASSED] ttm_bo_fini_shared_resv
[10:11:35] [PASSED] ttm_bo_pin_basic
[10:11:35] [PASSED] ttm_bo_pin_unpin_resource
[10:11:35] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:11:35] ===================== [PASSED] ttm_bo ======================
[10:11:35] ============== ttm_bo_validate (22 subtests) ===============
[10:11:35] ============== ttm_bo_init_reserved_sys_man  ===============
[10:11:35] [PASSED] Buffer object for userspace
[10:11:35] [PASSED] Kernel buffer object
[10:11:35] [PASSED] Shared buffer object
[10:11:35] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:11:35] ============== ttm_bo_init_reserved_mock_man  ==============
[10:11:35] [PASSED] Buffer object for userspace
[10:11:35] [PASSED] Kernel buffer object
[10:11:35] [PASSED] Shared buffer object
[10:11:35] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:11:35] [PASSED] ttm_bo_init_reserved_resv
[10:11:35] ================== ttm_bo_validate_basic  ==================
[10:11:35] [PASSED] Buffer object for userspace
[10:11:35] [PASSED] Kernel buffer object
[10:11:35] [PASSED] Shared buffer object
[10:11:35] ============== [PASSED] ttm_bo_validate_basic ==============
[10:11:35] [PASSED] ttm_bo_validate_invalid_placement
[10:11:35] ============= ttm_bo_validate_same_placement  ==============
[10:11:35] [PASSED] System manager
[10:11:35] [PASSED] VRAM manager
[10:11:35] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:11:35] [PASSED] ttm_bo_validate_failed_alloc
[10:11:35] [PASSED] ttm_bo_validate_pinned
[10:11:35] [PASSED] ttm_bo_validate_busy_placement
[10:11:35] ================ ttm_bo_validate_multihop  =================
[10:11:35] [PASSED] Buffer object for userspace
[10:11:35] [PASSED] Kernel buffer object
[10:11:35] [PASSED] Shared buffer object
[10:11:35] ============ [PASSED] ttm_bo_validate_multihop =============
[10:11:35] ========== ttm_bo_validate_no_placement_signaled  ==========
[10:11:35] [PASSED] Buffer object in system domain, no page vector
[10:11:35] [PASSED] Buffer object in system domain with an existing page vector
[10:11:35] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:11:35] ======== ttm_bo_validate_no_placement_not_signaled  ========
[10:11:35] [PASSED] Buffer object for userspace
[10:11:35] [PASSED] Kernel buffer object
[10:11:35] [PASSED] Shared buffer object
[10:11:35] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:11:35] [PASSED] ttm_bo_validate_move_fence_signaled
[10:11:35] ========= ttm_bo_validate_move_fence_not_signaled  =========
[10:11:35] [PASSED] Waits for GPU
[10:11:35] [PASSED] Tries to lock straight away
[10:11:35] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:11:35] [PASSED] ttm_bo_validate_swapout
[10:11:35] [PASSED] ttm_bo_validate_happy_evict
[10:11:35] [PASSED] ttm_bo_validate_all_pinned_evict
[10:11:35] [PASSED] ttm_bo_validate_allowed_only_evict
[10:11:35] [PASSED] ttm_bo_validate_deleted_evict
[10:11:35] [PASSED] ttm_bo_validate_busy_domain_evict
[10:11:35] [PASSED] ttm_bo_validate_evict_gutting
[10:11:35] [PASSED] ttm_bo_validate_recrusive_evict
[10:11:35] ================= [PASSED] ttm_bo_validate =================
[10:11:35] ============================================================
[10:11:35] Testing complete. Ran 102 tests: passed: 102
[10:11:35] Elapsed time: 12.111s total, 1.713s configuring, 10.133s building, 0.230s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[10:11:36] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:11:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:11:46] Starting KUnit Kernel (1/1)...
[10:11:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:11:46] =============== dma-buf-fence (12 subtests) ================
[10:11:46] [PASSED] test_sanitycheck
[10:11:46] [PASSED] test_signaling
[10:11:46] [PASSED] test_add_callback
[10:11:46] [PASSED] test_late_add_callback
[10:11:46] [PASSED] test_rm_callback
[10:11:46] [PASSED] test_late_rm_callback
[10:11:46] [PASSED] test_status
[10:11:46] [PASSED] test_error
[10:11:46] [PASSED] test_wait
[10:11:46] [PASSED] test_wait_timeout
[10:11:46] [PASSED] test_stub
[10:11:46] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[10:11:46] ================== [PASSED] dma-buf-fence ==================
[10:11:46] ============ dma-buf-fence-chain (11 subtests) =============
[10:11:46] [PASSED] test_sanitycheck
[10:11:46] [PASSED] test_find_seqno
[10:11:46] [PASSED] test_find_signaled
[10:11:46] [PASSED] test_find_out_of_order
[10:11:51] [PASSED] test_find_gap
[10:11:51] [PASSED] test_find_race
[10:11:51] [PASSED] test_signal_forward
[10:11:51] [PASSED] test_signal_backward
[10:11:51] [PASSED] test_wait_forward
[10:11:51] [PASSED] test_wait_backward
[10:11:51] [PASSED] test_wait_random
[10:11:51] =============== [PASSED] dma-buf-fence-chain ===============
[10:11:51] ============ dma-buf-fence-unwrap (11 subtests) ============
[10:11:51] [PASSED] test_sanitycheck
[10:11:51] [PASSED] test_unwrap_array
[10:11:51] [PASSED] test_unwrap_chain
[10:11:51] [PASSED] test_unwrap_chain_array
[10:11:51] [PASSED] test_unwrap_merge
[10:11:51] [PASSED] test_unwrap_merge_duplicate
[10:11:51] [PASSED] test_unwrap_merge_seqno
[10:11:51] [PASSED] test_unwrap_merge_order
[10:11:51] [PASSED] test_unwrap_merge_complex
[10:11:51] [PASSED] test_unwrap_merge_complex_seqno
[10:11:51] [PASSED] test_dedup_empty
[10:11:51] ============== [PASSED] dma-buf-fence-unwrap ===============
[10:11:51] ================ dma-buf-resv (5 subtests) =================
[10:11:51] [PASSED] test_sanitycheck
[10:11:51] ===================== test_signaling  ======================
[10:11:51] [PASSED] kernel
[10:11:51] [PASSED] write
[10:11:51] [PASSED] read
[10:11:51] [PASSED] bookkeep
[10:11:51] ================= [PASSED] test_signaling ==================
[10:11:51] ====================== test_for_each  ======================
[10:11:51] [PASSED] kernel
[10:11:51] [PASSED] write
[10:11:51] [PASSED] read
[10:11:51] [PASSED] bookkeep
[10:11:51] ================== [PASSED] test_for_each ==================
[10:11:51] ================= test_for_each_unlocked  ==================
[10:11:51] [PASSED] kernel
[10:11:51] [PASSED] write
[10:11:51] [PASSED] read
[10:11:51] [PASSED] bookkeep
[10:11:51] ============= [PASSED] test_for_each_unlocked ==============
[10:11:51] ===================== test_get_fences  =====================
[10:11:51] [PASSED] kernel
[10:11:51] [PASSED] write
[10:11:51] [PASSED] read
[10:11:51] [PASSED] bookkeep
[10:11:51] ================= [PASSED] test_get_fences =================
[10:11:51] ================== [PASSED] dma-buf-resv ===================
[10:11:51] ============================================================
[10:11:51] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[10:11:51] Elapsed time: 15.894s total, 1.809s configuring, 8.814s building, 5.265s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915/psr: PSR2 and Panel Replay with the joiner

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 921 bytes --]

== Series Details ==

Series: drm/i915/psr: PSR2 and Panel Replay with the joiner
URL   : https://patchwork.freedesktop.org/series/176714/
State : success

== Summary ==

CI Bug Log - changes from xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5_BAT -> xe-pw-176714v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_9160 -> IGT_9161
  * Linux: xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5 -> xe-pw-176714v1

  IGT_9160: 9160
  IGT_9161: 9161
  xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5: 2b2e3642e6d2095bbaae7b552da1c5ad164047a5
  xe-pw-176714v1: 176714v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/index.html

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✗ Xe.CI.FULL: failure for drm/i915/psr: PSR2 and Panel Replay with the joiner

[Patchwork]

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== Series Details ==

Series: drm/i915/psr: PSR2 and Panel Replay with the joiner
URL   : https://patchwork.freedesktop.org/series/176714/
State : failure

== Summary ==

CI Bug Log - changes from xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5_FULL -> xe-pw-176714v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-176714v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-176714v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-176714v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-lnl:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-ptl:          [PASS][3] -> [DMESG-WARN][4] +1 other test dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-ptl-4/igt@kms_joiner@basic-force-big-joiner.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@basic-force-big-joiner@single:
    - shard-lnl:          NOTRUN -> [DMESG-WARN][5]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-4/igt@kms_joiner@basic-force-big-joiner@single.html

  
#### Warnings ####

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-lnl:          [SKIP][6] ([Intel XE#7086] / [Intel XE#7390]) -> [DMESG-WARN][7]
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-5/igt@kms_joiner@basic-force-big-joiner.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-4/igt@kms_joiner@basic-force-big-joiner.html

  
New tests
---------

  New tests have been introduced between xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5_FULL and xe-pw-176714v1_FULL:

### New IGT tests (2) ###

  * igt@xe_oa@tail-address-wrap@oam-2-4m:
    - Statuses : 1 pass(s)
    - Exec time: [0.35] s

  * igt@xe_oa@tail-address-wrap@sag-1-4m:
    - Statuses : 1 pass(s)
    - Exec time: [0.35] s

  

Known issues
------------

  Here are the changes found in xe-pw-176714v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#1466])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#3157])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-2/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-ptl:          NOTRUN -> [SKIP][10] ([Intel XE#5901])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2327]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#1407]) +2 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#1124]) +5 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-2/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#1124]) +4 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-ptl:          NOTRUN -> [SKIP][15] ([Intel XE#5808]) +9 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#7679]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-7/igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-3840x2160p:
    - shard-ptl:          NOTRUN -> [SKIP][17] ([Intel XE#7679]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_bw@connected-linear-tiling-3-displays-target-3840x2160p.html

  * igt@kms_bw@linear-tiling-2-displays-target-2560x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][18] ([Intel XE#367])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_bw@linear-tiling-2-displays-target-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-target-1920x1080p:
    - shard-ptl:          NOTRUN -> [SKIP][19] ([Intel XE#367]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@kms_bw@linear-tiling-4-displays-target-1920x1080p.html
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#367])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@kms_bw@linear-tiling-4-displays-target-1920x1080p.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc:
    - shard-ptl:          NOTRUN -> [SKIP][21] ([Intel XE#5822]) +6 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#2669] / [Intel XE#7389]) +3 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs@pipe-b-edp-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][23] ([Intel XE#2887]) +6 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-1:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2652]) +7 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-1.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2887]) +4 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-7/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][26] ([Intel XE#5823] / [Intel XE#6918]) +4 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-edp-1.html

  * igt@kms_cdclk@mode-transition:
    - shard-ptl:          NOTRUN -> [SKIP][27] ([Intel XE#9205]) +4 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@kms_cdclk@mode-transition.html
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2724] / [Intel XE#7449])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_color@ctm-limited-range:
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#306] / [Intel XE#7358])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@kms_chamelium_color@ctm-limited-range.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-ptl:          NOTRUN -> [SKIP][30] ([Intel XE#5824]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-7/igt@kms_chamelium_color@ctm-max.html
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2325] / [Intel XE#7358]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-3/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#7358]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_chamelium_color_pipeline@plane-lut1d.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d:
    - shard-ptl:          NOTRUN -> [SKIP][33] ([Intel XE#8391]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-post-ctm3x4:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#7358])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-3/igt@kms_chamelium_color_pipeline@plane-lut1d-post-ctm3x4.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#2252]) +4 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
    - shard-ptl:          NOTRUN -> [SKIP][36] ([Intel XE#2252]) +2 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#373]) +3 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-1/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html

  * igt@kms_chamelium_sharpness_filter@filter-basic:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#6507] / [Intel XE#7358])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@kms_chamelium_sharpness_filter@filter-basic.html

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-4:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#6969]) +15 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-1/igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-4.html

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-3:
    - shard-ptl:          NOTRUN -> [SKIP][40] ([Intel XE#6969]) +7 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-4/igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-3.html

  * igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-3:
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#6969]) +5 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-3.html

  * igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][42] ([Intel XE#3304] / [Intel XE#7374])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-9/igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2.html

  * igt@kms_content_protection@atomic-hdcp14:
    - shard-ptl:          NOTRUN -> [SKIP][43] ([Intel XE#7642])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_content_protection@atomic-hdcp14.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-ptl:          NOTRUN -> [SKIP][44] ([Intel XE#5832] / [Intel XE#6974])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_content_protection@dp-mst-lic-type-0.html
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#2390] / [Intel XE#6974])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-type-0-hdcp14:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#6974])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_content_protection@dp-mst-type-0-hdcp14.html

  * igt@kms_content_protection@suspend-resume:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#7642]) +1 other test skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@kms_content_protection@suspend-resume.html

  * igt@kms_content_protection@uevent@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][48] ([Intel XE#6707] / [Intel XE#7439])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-7/igt@kms_content_protection@uevent@pipe-a-dp-1.html

  * igt@kms_cursor_crc@cursor-offscreen-32x32:
    - shard-ptl:          NOTRUN -> [SKIP][49] ([Intel XE#5900]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@kms_cursor_crc@cursor-offscreen-32x32.html

  * igt@kms_cursor_crc@cursor-offscreen-64x21:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#1424]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@kms_cursor_crc@cursor-offscreen-64x21.html

  * igt@kms_cursor_crc@cursor-onscreen-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2320]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@kms_cursor_crc@cursor-onscreen-256x85.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-ptl:          NOTRUN -> [SKIP][52] ([Intel XE#5846]) +2 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#2321] / [Intel XE#7355])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2321] / [Intel XE#7355]) +2 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-8/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#309] / [Intel XE#7343]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#4210] / [Intel XE#7467])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-8/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html

  * igt@kms_dp_link_training@non-uhbr-mst-tbtalt-train:
    - shard-ptl:          NOTRUN -> [SKIP][57] ([Intel XE#9528])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_dp_link_training@non-uhbr-mst-tbtalt-train.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#9535])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#9009])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback.html

  * igt@kms_dsc@dsc-basic-ultrajoiner:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#8265]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-8/igt@kms_dsc@dsc-basic-ultrajoiner.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner:
    - shard-lnl:          NOTRUN -> [SKIP][61] ([Intel XE#8265])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-ptl:          NOTRUN -> [SKIP][62] ([Intel XE#5907]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_feature_discovery@display-2x:
    - shard-ptl:          NOTRUN -> [SKIP][63] ([Intel XE#7344])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-4/igt@kms_feature_discovery@display-2x.html

  * igt@kms_flip@2x-flip-vs-absolute-wf_vblank:
    - shard-ptl:          NOTRUN -> [SKIP][64] ([Intel XE#2316]) +2 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html

  * igt@kms_flip@2x-plain-flip-fb-recreate:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#1421]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@kms_flip@2x-plain-flip-fb-recreate.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [PASS][66] -> [FAIL][67] ([Intel XE#301]) +1 other test fail
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling:
    - shard-ptl:          NOTRUN -> [SKIP][68] ([Intel XE#5828]) +3 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][69] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
    - shard-ptl:          NOTRUN -> [SKIP][71] ([Intel XE#7178])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-4/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#352])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][73] ([Intel XE#7061] / [Intel XE#7356]) +4 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-slowdraw:
    - shard-ptl:          NOTRUN -> [SKIP][74] ([Intel XE#5800] / [Intel XE#6312]) +7 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_frontbuffer_tracking@drrs-slowdraw.html

  * igt@kms_frontbuffer_tracking@drrs-suspend:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#6312] / [Intel XE#651]) +4 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_frontbuffer_tracking@drrs-suspend.html

  * igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-ptl:          NOTRUN -> [SKIP][76] ([Intel XE#6312]) +8 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#7061]) +3 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#4141]) +4 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-ptl:          NOTRUN -> [SKIP][79] ([Intel XE#5865] / [Intel XE#7399])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#2311]) +26 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][81] ([Intel XE#6312]) +10 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-spr-indfb-move:
    - shard-ptl:          NOTRUN -> [SKIP][82] ([Intel XE#5812]) +32 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][83] ([Intel XE#7905]) +20 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][84] ([Intel XE#2313]) +31 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][85] ([Intel XE#656] / [Intel XE#7905]) +22 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#7061] / [Intel XE#7356]) +4 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render:
    - shard-ptl:          NOTRUN -> [SKIP][87] ([Intel XE#7061] / [Intel XE#7356])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-6/igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][88] ([Intel XE#7061]) +2 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-modesetfrombusy:
    - shard-ptl:          NOTRUN -> [SKIP][89] ([Intel XE#7865]) +15 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-modesetfrombusy.html

  * igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-mmap-wc:
    - shard-ptl:          NOTRUN -> [SKIP][90] ([Intel XE#7061]) +3 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psrhdr-rgb101010-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][91] ([Intel XE#7865]) +12 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_frontbuffer_tracking@psrhdr-rgb101010-draw-render.html

  * igt@kms_hdmi_audio_bw@audio-bw-hblank160:
    - shard-bmg:          [PASS][92] -> [FAIL][93] ([Intel XE#9313])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-5/igt@kms_hdmi_audio_bw@audio-bw-hblank160.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-1/igt@kms_hdmi_audio_bw@audio-bw-hblank160.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#7308])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-3/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-ptl:          NOTRUN -> [SKIP][95] ([Intel XE#5873])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-6/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#6900] / [Intel XE#7362])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][97] ([Intel XE#6911] / [Intel XE#7466])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
    - shard-ptl:          NOTRUN -> [SKIP][98] ([Intel XE#6900])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#7283]) +1 other test skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5:
    - shard-lnl:          NOTRUN -> [SKIP][100] ([Intel XE#8303]) +1 other test skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-2/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-x-tiled-modifier-source-clamping:
    - shard-ptl:          NOTRUN -> [SKIP][101] ([Intel XE#7283]) +3 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@kms_plane@pixel-format-x-tiled-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping:
    - shard-lnl:          NOTRUN -> [SKIP][102] ([Intel XE#7283])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping.html

  * igt@kms_plane_lowres@tiling-none@pipe-b-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][103] ([Intel XE#5844]) +4 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#4596] / [Intel XE#5854]) +1 other test skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-1/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a:
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-10/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-d:
    - shard-ptl:          NOTRUN -> [SKIP][106] ([Intel XE#6886]) +9 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-d.html

  * igt@kms_pm_dc@dc3co-framedrop-check@psr2-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#8396]) +3 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-9/igt@kms_pm_dc@dc3co-framedrop-check@psr2-xrgb8888.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-bmg:          NOTRUN -> [SKIP][108] ([Intel XE#8395] / [Intel XE#8396]) +3 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-6/igt@kms_pm_dc@dc3co-vpb-simulation.html
    - shard-ptl:          NOTRUN -> [SKIP][109] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-7/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420:
    - shard-ptl:          NOTRUN -> [SKIP][110] ([Intel XE#8396]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-7/igt@kms_pm_dc@dc3co-vpb-simulation@psr2-yuv420.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-ptl:          NOTRUN -> [SKIP][111] ([Intel XE#5810])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-ptl:          NOTRUN -> [SKIP][112] ([Intel XE#7304]) +2 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-4/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-lnl:          NOTRUN -> [SKIP][113] ([Intel XE#2893] / [Intel XE#7304]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-4/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][114] ([Intel XE#4608]) +2 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-a-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][115] ([Intel XE#5858])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-b-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][116] ([Intel XE#5858] / [Intel XE#7304]) +1 other test skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][117] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) +2 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][118] ([Intel XE#4608] / [Intel XE#7304]) +2 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][119] ([Intel XE#1489]) +3 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-ptl:          NOTRUN -> [SKIP][120] ([Intel XE#7413])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html
    - shard-bmg:          NOTRUN -> [SKIP][121] ([Intel XE#2387] / [Intel XE#7429])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-pr-cursor-plane-move:
    - shard-ptl:          NOTRUN -> [SKIP][122] ([Intel XE#1406]) +2 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-6/igt@kms_psr@fbc-pr-cursor-plane-move.html

  * igt@kms_psr@fbc-psr2-sprite-blt@edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][123] ([Intel XE#1406] / [Intel XE#5835]) +1 other test skip
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@kms_psr@fbc-psr2-sprite-blt@edp-1.html

  * igt@kms_psr@fbc-psr2-sprite-plane-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][124] ([Intel XE#1406] / [Intel XE#7345]) +1 other test skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr2-sprite-plane-onoff@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][125] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345]) +1 other test skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_psr@fbc-psr2-sprite-plane-onoff@edp-1.html

  * igt@kms_psr@psr-basic:
    - shard-bmg:          NOTRUN -> [SKIP][126] ([Intel XE#2234] / [Intel XE#2850]) +8 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-9/igt@kms_psr@psr-basic.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-bmg:          NOTRUN -> [SKIP][127] ([Intel XE#3904] / [Intel XE#7342])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-1/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_setmode@basic-no-cpu-idle@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [FAIL][128] ([Intel XE#8618]) +1 other test fail
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@kms_setmode@basic-no-cpu-idle@pipe-a-edp-1.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-ptl:          NOTRUN -> [SKIP][129] ([Intel XE#5910])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-ptl:          NOTRUN -> [SKIP][130] ([Intel XE#5848])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-7/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][131] ([Intel XE#2426] / [Intel XE#5848])
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
    - shard-lnl:          NOTRUN -> [SKIP][132] ([Intel XE#362] / [Intel XE#5848])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@cmrr-video-mode@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][133] ([Intel XE#9271]) +1 other test skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@kms_vrr@cmrr-video-mode@pipe-a-edp-1.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-ptl:          [PASS][134] -> [FAIL][135] ([Intel XE#4227] / [Intel XE#7397])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-ptl-7/igt@kms_vrr@flip-basic-fastset.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1:
    - shard-ptl:          [PASS][136] -> [FAIL][137] ([Intel XE#6293] / [Intel XE#7397])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-ptl-7/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html

  * igt@kms_vrr@negative-basic:
    - shard-lnl:          NOTRUN -> [SKIP][138] ([Intel XE#1499] / [Intel XE#9271])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_vrr@negative-basic.html

  * igt@xe_compute@ccs-mode-basic:
    - shard-bmg:          NOTRUN -> [SKIP][139] ([Intel XE#6599])
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-3/igt@xe_compute@ccs-mode-basic.html

  * igt@xe_compute@ccs-mode-compute-kernel:
    - shard-lnl:          NOTRUN -> [SKIP][140] ([Intel XE#1447] / [Intel XE#7469])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@xe_compute@ccs-mode-compute-kernel.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-lnl:          NOTRUN -> [SKIP][141] ([Intel XE#7319] / [Intel XE#7350] / [Intel XE#944])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-2/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-ptl:          NOTRUN -> [SKIP][142] ([Intel XE#5764]) +6 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-8/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-mixed-threads-large-multi-vm:
    - shard-lnl:          NOTRUN -> [SKIP][143] ([Intel XE#6540] / [Intel XE#688]) +5 other tests skip
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@xe_evict@evict-mixed-threads-large-multi-vm.html

  * igt@xe_evict@evict-threads-small-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][144] ([Intel XE#8370]) +1 other test skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-6/igt@xe_evict@evict-threads-small-multi-queue.html

  * igt@xe_exec_balancer@no-exec-cm-parallel-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][145] ([Intel XE#7482]) +10 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@xe_exec_balancer@no-exec-cm-parallel-userptr-invalidate-race.html

  * igt@xe_exec_balancer@twice-virtual-basic:
    - shard-ptl:          NOTRUN -> [SKIP][146] ([Intel XE#7482]) +3 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-7/igt@xe_exec_balancer@twice-virtual-basic.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind:
    - shard-bmg:          NOTRUN -> [SKIP][147] ([Intel XE#2322] / [Intel XE#7372]) +4 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr:
    - shard-ptl:          NOTRUN -> [SKIP][148] ([Intel XE#5575] / [Intel XE#7484]) +6 other tests skip
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-4/igt@xe_exec_basic@multigpu-no-exec-userptr.html

  * igt@xe_exec_basic@multigpu-once-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][149] ([Intel XE#1392]) +4 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@xe_exec_basic@multigpu-once-userptr.html

  * igt@xe_exec_fault_mode@atomic-many:
    - shard-bmg:          [PASS][150] -> [FAIL][151] ([Intel XE#8578])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-7/igt@xe_exec_fault_mode@atomic-many.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-6/igt@xe_exec_fault_mode@atomic-many.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-imm:
    - shard-ptl:          NOTRUN -> [SKIP][152] ([Intel XE#8374]) +6 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-imm.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm:
    - shard-bmg:          NOTRUN -> [SKIP][153] ([Intel XE#8374]) +4 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm.html

  * igt@xe_exec_fault_mode@twice-multi-queue-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][154] ([Intel XE#8374]) +8 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@xe_exec_fault_mode@twice-multi-queue-prefetch.html

  * igt@xe_exec_multi_queue@exec-sanity:
    - shard-lnl:          NOTRUN -> [SKIP][155] ([Intel XE#8364]) +17 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@xe_exec_multi_queue@exec-sanity.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-priority:
    - shard-bmg:          NOTRUN -> [SKIP][156] ([Intel XE#8364]) +16 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-8/igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-priority.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-userptr-invalidate:
    - shard-ptl:          NOTRUN -> [SKIP][157] ([Intel XE#8364]) +11 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@xe_exec_multi_queue@two-queues-preempt-mode-userptr-invalidate.html

  * igt@xe_exec_reset@cm-multi-queue-cat-error:
    - shard-ptl:          NOTRUN -> [SKIP][158] ([Intel XE#8369]) +1 other test skip
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-4/igt@xe_exec_reset@cm-multi-queue-cat-error.html

  * igt@xe_exec_reset@gt-stress-reset-bo-invalidation:
    - shard-lnl:          [PASS][159] -> [DMESG-WARN][160] ([Intel XE#8652])
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-6/igt@xe_exec_reset@gt-stress-reset-bo-invalidation.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@xe_exec_reset@gt-stress-reset-bo-invalidation.html

  * igt@xe_exec_reset@multi-queue-cat-error:
    - shard-bmg:          NOTRUN -> [SKIP][161] ([Intel XE#8369])
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-3/igt@xe_exec_reset@multi-queue-cat-error.html

  * igt@xe_exec_threads@threads-multi-queue-cm-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][162] ([Intel XE#8378]) +4 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@xe_exec_threads@threads-multi-queue-cm-userptr.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][163] ([Intel XE#8378]) +4 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind.html

  * igt@xe_exec_threads@threads-multi-queue-userptr-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][164] ([Intel XE#8378]) +5 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-5/igt@xe_exec_threads@threads-multi-queue-userptr-rebind.html

  * igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
    - shard-lnl:          NOTRUN -> [SKIP][165] ([Intel XE#2229])
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html

  * igt@xe_mempage_offline@inject-single-page:
    - shard-bmg:          NOTRUN -> [SKIP][166] ([Intel XE#9203])
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-10/igt@xe_mempage_offline@inject-single-page.html

  * igt@xe_multigpu_svm@mgpu-latency-basic:
    - shard-bmg:          NOTRUN -> [SKIP][167] ([Intel XE#6964]) +2 other tests skip
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-6/igt@xe_multigpu_svm@mgpu-latency-basic.html
    - shard-ptl:          NOTRUN -> [SKIP][168] ([Intel XE#6964])
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-7/igt@xe_multigpu_svm@mgpu-latency-basic.html

  * igt@xe_multigpu_svm@mgpu-latency-copy-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][169] ([Intel XE#6964]) +1 other test skip
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@xe_multigpu_svm@mgpu-latency-copy-prefetch.html

  * igt@xe_page_reclaim@boundary-split:
    - shard-ptl:          NOTRUN -> [SKIP][170] ([Intel XE#7793])
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-2/igt@xe_page_reclaim@boundary-split.html

  * igt@xe_page_reclaim@pde-vs-pd:
    - shard-bmg:          NOTRUN -> [SKIP][171] ([Intel XE#7793]) +1 other test skip
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-5/igt@xe_page_reclaim@pde-vs-pd.html
    - shard-lnl:          NOTRUN -> [SKIP][172] ([Intel XE#7793])
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-2/igt@xe_page_reclaim@pde-vs-pd.html

  * igt@xe_peer2peer@write:
    - shard-lnl:          NOTRUN -> [SKIP][173] ([Intel XE#1061] / [Intel XE#7326] / [Intel XE#7353])
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-4/igt@xe_peer2peer@write.html

  * igt@xe_pm@d3cold-i2c:
    - shard-lnl:          NOTRUN -> [SKIP][174] ([Intel XE#5694] / [Intel XE#7370])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pm@d3cold-mmap-system:
    - shard-lnl:          NOTRUN -> [SKIP][175] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@xe_pm@d3cold-mmap-system.html

  * igt@xe_pm@s3-mocs:
    - shard-lnl:          NOTRUN -> [SKIP][176] ([Intel XE#584] / [Intel XE#7369]) +1 other test skip
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-3/igt@xe_pm@s3-mocs.html

  * igt@xe_pm@s4-basic:
    - shard-ptl:          [PASS][177] -> [ABORT][178] ([Intel XE#9362])
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-ptl-7/igt@xe_pm@s4-basic.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-7/igt@xe_pm@s4-basic.html

  * igt@xe_pm@s4-vm-bind-unbind-all:
    - shard-lnl:          [PASS][179] -> [ABORT][180] ([Intel XE#9362]) +1 other test abort
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-5/igt@xe_pm@s4-vm-bind-unbind-all.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@xe_pm@s4-vm-bind-unbind-all.html

  * igt@xe_pm_residency@gt-c6-freeze@gt0:
    - shard-bmg:          [PASS][181] -> [FAIL][182] ([Intel XE#9254])
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-1/igt@xe_pm_residency@gt-c6-freeze@gt0.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@xe_pm_residency@gt-c6-freeze@gt0.html

  * igt@xe_prefetch_fault@l2-prefetch-fault-svm:
    - shard-ptl:          NOTRUN -> [SKIP][183] ([Intel XE#8815])
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-8/igt@xe_prefetch_fault@l2-prefetch-fault-svm.html

  * igt@xe_pxp@pxp-stale-queue-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][184] ([Intel XE#4733] / [Intel XE#7417])
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-5/igt@xe_pxp@pxp-stale-queue-post-termination-irq.html

  * igt@xe_query@multigpu-query-invalid-size:
    - shard-lnl:          NOTRUN -> [SKIP][185] ([Intel XE#944]) +1 other test skip
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@xe_query@multigpu-query-invalid-size.html

  * igt@xe_query@multigpu-query-topology-l3-bank-mask:
    - shard-bmg:          NOTRUN -> [SKIP][186] ([Intel XE#944])
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-7/igt@xe_query@multigpu-query-topology-l3-bank-mask.html

  * igt@xe_query@multigpu-query-uc-fw-version-huc:
    - shard-ptl:          NOTRUN -> [SKIP][187] ([Intel XE#6019]) +1 other test skip
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-7/igt@xe_query@multigpu-query-uc-fw-version-huc.html

  * igt@xe_sriov_auto_provisioning@fair-allocation:
    - shard-lnl:          NOTRUN -> [SKIP][188] ([Intel XE#4130] / [Intel XE#7366])
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@xe_sriov_auto_provisioning@fair-allocation.html

  * igt@xe_sriov_flr@flr-each-isolation:
    - shard-bmg:          [PASS][189] -> [FAIL][190] ([Intel XE#6569])
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-1/igt@xe_sriov_flr@flr-each-isolation.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-4/igt@xe_sriov_flr@flr-each-isolation.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority:
    - shard-lnl:          NOTRUN -> [SKIP][191] ([Intel XE#8339])
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority.html

  * igt@xe_sriov_vram@vf-access-provisioned:
    - shard-lnl:          NOTRUN -> [SKIP][192] ([Intel XE#6376] / [Intel XE#7330] / [Intel XE#7422])
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-6/igt@xe_sriov_vram@vf-access-provisioned.html

  * igt@xe_vm@overcommit-nonfault-vram-lr-defer:
    - shard-ptl:          NOTRUN -> [SKIP][193] ([Intel XE#9597])
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-8/igt@xe_vm@overcommit-nonfault-vram-lr-defer.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][194] ([Intel XE#8963])
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-1/igt@xe_wedged@wedged-at-any-timeout.html

  
#### Possible fixes ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [FAIL][195] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][196]
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_flip@plain-flip-ts-check:
    - shard-bmg:          [FAIL][197] ([Intel XE#5408] / [Intel XE#6266]) -> [PASS][198] +1 other test pass
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-10/igt@kms_flip@plain-flip-ts-check.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-8/igt@kms_flip@plain-flip-ts-check.html

  * igt@kms_hdmi_audio_bw@audio-bw-hblank80:
    - shard-bmg:          [FAIL][199] ([Intel XE#9313]) -> [PASS][200]
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-8/igt@kms_hdmi_audio_bw@audio-bw-hblank80.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@kms_hdmi_audio_bw@audio-bw-hblank80.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-lnl:          [SKIP][201] ([Intel XE#7086] / [Intel XE#7390]) -> [PASS][202]
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-8/igt@kms_joiner@invalid-modeset-force-big-joiner.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-4/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_pm_dc@dc5-psr-suspend-resume:
    - shard-lnl:          [FAIL][203] ([Intel XE#8399]) -> [PASS][204]
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-2/igt@kms_pm_dc@dc5-psr-suspend-resume.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-5/igt@kms_pm_dc@dc5-psr-suspend-resume.html

  * igt@kms_vrr@flipline@pipe-a-edp-1:
    - shard-ptl:          [FAIL][205] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][206] +1 other test pass
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-ptl-4/igt@kms_vrr@flipline@pipe-a-edp-1.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-8/igt@kms_vrr@flipline@pipe-a-edp-1.html

  * igt@xe_compute_preempt@compute-preempt-many-all-ram:
    - shard-bmg:          [ABORT][207] ([Intel XE#9481]) -> [PASS][208] +1 other test pass
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-6/igt@xe_compute_preempt@compute-preempt-many-all-ram.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-5/igt@xe_compute_preempt@compute-preempt-many-all-ram.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][209] ([Intel XE#6321] / [Intel XE#8355]) -> [PASS][210]
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race:
    - shard-bmg:          [FAIL][211] ([Intel XE#9096]) -> [PASS][212]
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-2/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-5/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race.html

  * igt@xe_pm@s4-basic-exec:
    - shard-ptl:          [ABORT][213] ([Intel XE#9362]) -> [PASS][214] +1 other test pass
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-ptl-4/igt@xe_pm@s4-basic-exec.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-ptl-1/igt@xe_pm@s4-basic-exec.html

  * igt@xe_pm@s4-vm-bind-userptr:
    - shard-lnl:          [ABORT][215] ([Intel XE#9362]) -> [PASS][216] +1 other test pass
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-5/igt@xe_pm@s4-vm-bind-userptr.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@xe_pm@s4-vm-bind-userptr.html

  * igt@xe_pm_residency@gt-c6-freeze@gt1:
    - shard-bmg:          [FAIL][217] ([Intel XE#9254]) -> [PASS][218]
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-1/igt@xe_pm_residency@gt-c6-freeze@gt1.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@xe_pm_residency@gt-c6-freeze@gt1.html

  * igt@xe_sriov_flr@flr-vfs-parallel:
    - shard-bmg:          [FAIL][219] ([Intel XE#6569]) -> [PASS][220]
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-3/igt@xe_sriov_flr@flr-vfs-parallel.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@xe_sriov_flr@flr-vfs-parallel.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority@numvfs-random-gt1-vcs0:
    - shard-bmg:          [TIMEOUT][221] -> [PASS][222] +1 other test pass
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-8/igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority@numvfs-random-gt1-vcs0.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-7/igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority@numvfs-random-gt1-vcs0.html

  * igt@xe_survivability@runtime-survivability:
    - shard-bmg:          [DMESG-WARN][223] ([Intel XE#9365]) -> [PASS][224]
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-2/igt@xe_survivability@runtime-survivability.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@xe_survivability@runtime-survivability.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-lnl:          [SKIP][225] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][226] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_hdmi_audio_bw@suspend-disk-audio-recovery:
    - shard-bmg:          [FAIL][227] ([Intel XE#9346]) -> [FAIL][228] ([Intel XE#9319] / [Intel XE#9346])
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-9/igt@kms_hdmi_audio_bw@suspend-disk-audio-recovery.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-2/igt@kms_hdmi_audio_bw@suspend-disk-audio-recovery.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][229] ([Intel XE#3544]) -> [SKIP][230] ([Intel XE#3374] / [Intel XE#3544])
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-lnl:          [SKIP][231] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) -> [SKIP][232] ([Intel XE#3904] / [Intel XE#7342]) +12 other tests skip
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5/shard-lnl-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/shard-lnl-8/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  
  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
  [Intel XE#1466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1466
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3157]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3157
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4210
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
  [Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
  [Intel XE#5810]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5810
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5823]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5823
  [Intel XE#5824]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5824
  [Intel XE#5828]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5828
  [Intel XE#5832]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5832
  [Intel XE#5835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5835
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5844]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5844
  [Intel XE#5846]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5846
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#5858]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5858
  [Intel XE#5865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5865
  [Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
  [Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
  [Intel XE#5901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5901
  [Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
  [Intel XE#5910]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5910
  [Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6293
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6900
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6918]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6918
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7086]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7086
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7319]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7319
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7330
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7344]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7344
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7350
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7362
  [Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7389]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7389
  [Intel XE#7390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7390
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7422
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7466
  [Intel XE#7467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7467
  [Intel XE#7469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7469
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8339
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8391
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
  [Intel XE#8578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8578
  [Intel XE#8618]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8618
  [Intel XE#8652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8652
  [Intel XE#8815]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8815
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#9009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9009
  [Intel XE#9096]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9096
  [Intel XE#9203]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9203
  [Intel XE#9205]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9205
  [Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
  [Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
  [Intel XE#9313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9313
  [Intel XE#9319]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9319
  [Intel XE#9346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9346
  [Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
  [Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#9481]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9481
  [Intel XE#9528]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9528
  [Intel XE#9535]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9535
  [Intel XE#9597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9597


Build changes
-------------

  * IGT: IGT_9160 -> IGT_9161
  * Linux: xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5 -> xe-pw-176714v1

  IGT_9160: 9160
  IGT_9161: 9161
  xe-6002-2b2e3642e6d2095bbaae7b552da1c5ad164047a5: 2b2e3642e6d2095bbaae7b552da1c5ad164047a5
  xe-pw-176714v1: 176714v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176714v1/index.html

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RE: [PATCH v3 0/9] drm/i915/psr: PSR2 and Panel Replay with the joiner

[Kahola, Mika]

Thank you Jouni for reviewing the series.

The series is now merged.

> -----Original Message-----
> From: Kahola, Mika <mika.kahola@intel.com>
> Sent: Friday, 23 October 2026 13.01
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Hogander, Jouni <jouni.hogander@intel.com>; Kahola, Mika <mika.kahola@intel.com>
> Subject: [PATCH v3 0/9] drm/i915/psr: PSR2 and Panel Replay with the joiner
> 
> This is v3 of [1], with the following changes
> 
> - All pipe planes are in the state before the selective fetch check runs,
>   so the local drm_atomic_add_affected_planes() and the plane support
>   recheck are gone. The plane loop now runs on full update as well,
>   plane states come out of the duplicate with a zero sized area.
> - New patch resolving the PSR encoders through the joiner primary. The
>   secondary has a zero uapi.encoder_mask, so intel_psr_lock(),
>   intel_psr_wait_for_idle_locked() and the PSR2_MAN_TRK_CTL
>   programming were all silently doing nothing for it (Jouni)
> - Apply the SU area WAs on the merged area instead of per pipe.
>   Wa 14019834836 was skipped altogether when only a secondary pipe had
>   damage, as it looks at uapi.encoder_mask (Jouni)
> - Back to pipe_src for the selective fetch area (Jouni)
> - Split the merge patch up, the helper extraction and the alignment
>   loop condition are now separate patches, leaving the merge patch
>   with only the joiner handling
> 
> [1] https://lore.kernel.org/intel-xe/20261012124145.1960050-1-mika.kahola@intel.com/
> 
> Mika Kahola (9):
>   drm/i915/psr: Track all joined pipes for frontbuffer tracking
>   drm/i915/psr: Exclude the joiner secondary from active_non_psr_pipes
>   drm/i915/psr: Take the selective fetch area from pipe_src
>   drm/i915/psr: Split the selective fetch calculation into helpers
>   drm/i915/psr: Derive the alignment loop condition from the SU area
>   drm/i915/psr: Merge the selective fetch area across joined pipes
>   drm/i915/psr: Resolve the PSR encoders through the joiner primary
>   drm/i915/psr: Allow Panel Replay and PSR2 with joiner
>   drm/i915/display: Allow forcing the joiner on eDP
> 
>  .../drm/i915/display/intel_display_debugfs.c  |   5 +-
>  .../drm/i915/display/intel_display_types.h    |   1 +
>  drivers/gpu/drm/i915/display/intel_dp.c       |  12 +-
>  drivers/gpu/drm/i915/display/intel_psr.c      | 364 +++++++++++++-----
>  4 files changed, 274 insertions(+), 108 deletions(-)
> 
> --
> 2.43.0