From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
<intel-gfx@lists.freedesktop.org>,
<intel-gvt-dev@lists.freedesktop.org>,
<intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH 4/7] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro
Date: Thu, 18 Dec 2025 17:36:53 +0530 [thread overview]
Message-ID: <4bafc33c-dae3-4861-acf4-86aa38ee9e80@intel.com> (raw)
In-Reply-To: <db0cedb60c1b9a32f0412efb97ca34e7870e1f71@intel.com>
On 12/18/2025 3:55 PM, Jani Nikula wrote:
> On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> TRANSCONF() expands via _MMIO_PIPE2, i.e., it uses pipe-based addressing.
>> In GVT, some call sites pass an enum transcoder to TRANSCONF(), which now
>> routes through INTEL_DISPLAY_DEVICE_PIPE_OFFSET() and ultimately calls
>> intel_display_device_pipe_offset(), whose parameter type is enum pipe.
>>
>> This results in -Werror=enum-conversion.
> And that's really why this should be squashed to the previous patch,
> with explanation in the commit message, as otherwise the previous one
> fails to build.
>
> I don't know, maybe could also add a FIXME comment about the cast?
> *shrug*
Alright, will add a fix me and merge this with the previous patch.
Regards,
Ankit
>
> BR,
> Jani.
>
>> To address this, cast the index to enum pipe in the GVT-side macro
>> override.
>>
>> This works for all cases as TRANSCODER_{A,B,C,D} all have 1:1 mapping to
>> PIPE_{A,B,C,D} except for TRANSCODER_EDP.
>>
>> There is one place which uses TRANSCONF() with TRANSCODER_EDP, which
>> appears to be incorrect. In any case, the cast preserves the previous
>> behaviour.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/gvt/display_helpers.h | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> index 97ebc92768fc..3af878e3d78e 100644
>> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
>> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> @@ -17,8 +17,8 @@
>> #ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>> #undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>> #endif
>> -#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
>> - intel_display_device_pipe_offset((display), (pipe))
>> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, idx) \
>> + intel_display_device_pipe_offset((display), (enum pipe)(idx))
>>
>> #ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
>> #undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
next prev parent reply other threads:[~2025-12-18 12:07 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-18 8:22 [PATCH 0/7] Prepare GVT for display modularization Ankit Nautiyal
2025-12-18 8:22 ` [PATCH 1/7] drm/i915/display: Abstract pipe/trans/cursor offset calculation Ankit Nautiyal
2025-12-18 8:22 ` [PATCH 2/7] drm/i915/display: Add APIs to be used by gvt to get the register offsets Ankit Nautiyal
2025-12-18 10:32 ` Jani Nikula
2025-12-18 12:09 ` Nautiyal, Ankit K
2025-12-18 8:22 ` [PATCH 3/7] drm/i915/gvt: Add header to use display offset functions in macros Ankit Nautiyal
2025-12-18 10:26 ` Jani Nikula
2025-12-18 8:22 ` [PATCH 4/7] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro Ankit Nautiyal
2025-12-18 10:25 ` Jani Nikula
2025-12-18 12:06 ` Nautiyal, Ankit K [this message]
2025-12-18 8:22 ` [PATCH 5/7] drm/i915/gvt: Change for_each_pipe to use pipe_valid API Ankit Nautiyal
2025-12-18 10:36 ` Jani Nikula
2025-12-18 11:57 ` Nautiyal, Ankit K
2025-12-18 8:22 ` [PATCH 6/7] drm/i915/gvt: Use the appropriate header for the DPLL macro Ankit Nautiyal
2025-12-18 10:36 ` Jani Nikula
2025-12-18 8:23 ` [PATCH 7/7] drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs Ankit Nautiyal
2025-12-18 10:37 ` Jani Nikula
2025-12-18 8:43 ` ✗ CI.checkpatch: warning for Prepare GVT for display modularization (rev2) Patchwork
2025-12-18 8:44 ` ✓ CI.KUnit: success " Patchwork
2025-12-18 9:00 ` ✗ CI.checksparse: warning " Patchwork
2025-12-18 9:38 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-18 10:57 ` [PATCH 0/7] Prepare GVT for display modularization Jani Nikula
2025-12-18 12:05 ` Nautiyal, Ankit K
2025-12-19 4:17 ` ✗ Xe.CI.Full: failure for Prepare GVT for display modularization (rev2) Patchwork
2025-12-29 12:47 ` [PATCH 0/7] Prepare GVT for display modularization Nautiyal, Ankit K
2025-12-31 10:35 ` Jani Nikula
2026-01-02 6:15 ` Nautiyal, Ankit K
2026-01-02 11:24 ` Jani Nikula
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4bafc33c-dae3-4861-acf4-86aa38ee9e80@intel.com \
--to=ankit.k.nautiyal@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-gvt-dev@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=jani.nikula@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox