Re: [PATCH 2/7] drm/i915/display: Add APIs to be used by gvt to get the register offsets

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

On 12/18/2025 4:02 PM, Jani Nikula wrote:
> On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> GVT code uses macros for register offsets that require display internal
>> structures. This makes clean separation of display code and
>> modularization difficult.
>>
>> Introduce APIs to abstract offset calculations:
>> - intel_display_device_pipe_offset()
>> - intel_display_device_trans_offset()
>> - intel_display_device_cursor_offset()
>> - intel_display_device_mmio_base()
>>
>> These APIs return absolute base offsets for the respective register
>> groups, allowing GVT to compute MMIO addresses without using internal
>> macros or struct fields. This prepares the path to separate
>> display-dependent code from i915/gvt/*.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>   drivers/gpu/drm/i915/Makefile                 |  1 +
>>   .../drm/i915/display/intel_display_limits.c   |  0
>>   drivers/gpu/drm/i915/display/intel_gvt_api.c  | 34 +++++++++++++++++++
>>   drivers/gpu/drm/i915/display/intel_gvt_api.h  | 20 +++++++++++
>>   4 files changed, 55 insertions(+)
>>   create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
>>   create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
>>   create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
>>
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index f01b5d8a07c7..7974f017f263 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -360,6 +360,7 @@ i915-y += \
>>   	display/intel_dvo.o \
>>   	display/intel_encoder.o \
>>   	display/intel_gmbus.o \
>> +	display/intel_gvt_api.o \
> Actually, this should be:
>
> i915-$(CONFIG_DRM_I915_GVT) += \
> 	display/intel_gvt_api.o
>
> i.e. let's not add this stuff unless GVT is actually enabled.


Got it. Will fix this.


>
>>   	display/intel_hdmi.o \
>>   	display/intel_lspcon.o \
>>   	display/intel_lt_phy.o \
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.c b/drivers/gpu/drm/i915/display/intel_display_limits.c
>> new file mode 100644
>> index 000000000000..e69de29bb2d1
>> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> new file mode 100644
>> index 000000000000..8abea318fbc2
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> @@ -0,0 +1,34 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +#include <linux/types.h>
>> +
>> +#include "intel_display_core.h"
>> +#include "intel_display_regs.h"
>> +#include "intel_gvt_api.h"
>> +
>> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe)
>> +{
>> +	return INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe);
>> +}
>> +EXPORT_SYMBOL_GPL(intel_display_device_pipe_offset);
> And the exports should be
>
> EXPORT_SYMBOL_NS_GPL(..., "I915_GVT");
>
> to limit the exposure.

Will take care of this in next version.


Thanks & Regards,

Ankit

>
> Sorry for not catching this earlier.
>
> BR,
> Jani.
>
>> +
>> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans)
>> +{
>> +	return INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans);
>> +}
>> +EXPORT_SYMBOL_GPL(intel_display_device_trans_offset);
>> +
>> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe)
>> +{
>> +	return INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe);
>> +}
>> +EXPORT_SYMBOL_GPL(intel_display_device_cursor_offset);
>> +
>> +u32 intel_display_device_mmio_base(struct intel_display *display)
>> +{
>> +	return DISPLAY_MMIO_BASE(display);
>> +}
>> +EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
>> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> new file mode 100644
>> index 000000000000..e9a1122a988d
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> @@ -0,0 +1,20 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +#ifndef __INTEL_GVT_API_H__
>> +#define __INTEL_GVT_API_H__
>> +
>> +#include <linux/types.h>
>> +
>> +enum pipe;
>> +enum transcoder;
>> +struct intel_display;
>> +
>> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe);
>> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
>> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
>> +u32 intel_display_device_mmio_base(struct intel_display *display);
>> +
>> +#endif /* __INTEL_GVT_API_H__ */