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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
	intel-gfx@lists.freedesktop.org,
	intel-gvt-dev@lists.freedesktop.org,
	intel-xe@lists.freedesktop.org
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: Re: [PATCH 2/7] drm/i915/display: Add APIs to be used by gvt to get the register offsets
Date: Thu, 18 Dec 2025 12:32:34 +0200	[thread overview]
Message-ID: <d3d285c5180e950b8189d7d96d06d21f1d88cf6f@intel.com> (raw)
In-Reply-To: <20251218082302.2327243-3-ankit.k.nautiyal@intel.com>

On Thu, 18 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> GVT code uses macros for register offsets that require display internal
> structures. This makes clean separation of display code and
> modularization difficult.
>
> Introduce APIs to abstract offset calculations:
> - intel_display_device_pipe_offset()
> - intel_display_device_trans_offset()
> - intel_display_device_cursor_offset()
> - intel_display_device_mmio_base()
>
> These APIs return absolute base offsets for the respective register
> groups, allowing GVT to compute MMIO addresses without using internal
> macros or struct fields. This prepares the path to separate
> display-dependent code from i915/gvt/*.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile                 |  1 +
>  .../drm/i915/display/intel_display_limits.c   |  0
>  drivers/gpu/drm/i915/display/intel_gvt_api.c  | 34 +++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_gvt_api.h  | 20 +++++++++++
>  4 files changed, 55 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index f01b5d8a07c7..7974f017f263 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -360,6 +360,7 @@ i915-y += \
>  	display/intel_dvo.o \
>  	display/intel_encoder.o \
>  	display/intel_gmbus.o \
> +	display/intel_gvt_api.o \

Actually, this should be:

i915-$(CONFIG_DRM_I915_GVT) += \
	display/intel_gvt_api.o

i.e. let's not add this stuff unless GVT is actually enabled.

>  	display/intel_hdmi.o \
>  	display/intel_lspcon.o \
>  	display/intel_lt_phy.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.c b/drivers/gpu/drm/i915/display/intel_display_limits.c
> new file mode 100644
> index 000000000000..e69de29bb2d1
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> new file mode 100644
> index 000000000000..8abea318fbc2
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> @@ -0,0 +1,34 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#include <linux/types.h>
> +
> +#include "intel_display_core.h"
> +#include "intel_display_regs.h"
> +#include "intel_gvt_api.h"
> +
> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe)
> +{
> +	return INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_pipe_offset);

And the exports should be

EXPORT_SYMBOL_NS_GPL(..., "I915_GVT");

to limit the exposure.

Sorry for not catching this earlier.

BR,
Jani.

> +
> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans)
> +{
> +	return INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_trans_offset);
> +
> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe)
> +{
> +	return INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_cursor_offset);
> +
> +u32 intel_display_device_mmio_base(struct intel_display *display)
> +{
> +	return DISPLAY_MMIO_BASE(display);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> new file mode 100644
> index 000000000000..e9a1122a988d
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> @@ -0,0 +1,20 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef __INTEL_GVT_API_H__
> +#define __INTEL_GVT_API_H__
> +
> +#include <linux/types.h>
> +
> +enum pipe;
> +enum transcoder;
> +struct intel_display;
> +
> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe);
> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
> +u32 intel_display_device_mmio_base(struct intel_display *display);
> +
> +#endif /* __INTEL_GVT_API_H__ */

-- 
Jani Nikula, Intel

  reply	other threads:[~2025-12-18 10:32 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-18  8:22 [PATCH 0/7] Prepare GVT for display modularization Ankit Nautiyal
2025-12-18  8:22 ` [PATCH 1/7] drm/i915/display: Abstract pipe/trans/cursor offset calculation Ankit Nautiyal
2025-12-18  8:22 ` [PATCH 2/7] drm/i915/display: Add APIs to be used by gvt to get the register offsets Ankit Nautiyal
2025-12-18 10:32   ` Jani Nikula [this message]
2025-12-18 12:09     ` Nautiyal, Ankit K
2025-12-18  8:22 ` [PATCH 3/7] drm/i915/gvt: Add header to use display offset functions in macros Ankit Nautiyal
2025-12-18 10:26   ` Jani Nikula
2025-12-18  8:22 ` [PATCH 4/7] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro Ankit Nautiyal
2025-12-18 10:25   ` Jani Nikula
2025-12-18 12:06     ` Nautiyal, Ankit K
2025-12-18  8:22 ` [PATCH 5/7] drm/i915/gvt: Change for_each_pipe to use pipe_valid API Ankit Nautiyal
2025-12-18 10:36   ` Jani Nikula
2025-12-18 11:57     ` Nautiyal, Ankit K
2025-12-18  8:22 ` [PATCH 6/7] drm/i915/gvt: Use the appropriate header for the DPLL macro Ankit Nautiyal
2025-12-18 10:36   ` Jani Nikula
2025-12-18  8:23 ` [PATCH 7/7] drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs Ankit Nautiyal
2025-12-18 10:37   ` Jani Nikula
2025-12-18  8:43 ` ✗ CI.checkpatch: warning for Prepare GVT for display modularization (rev2) Patchwork
2025-12-18  8:44 ` ✓ CI.KUnit: success " Patchwork
2025-12-18  9:00 ` ✗ CI.checksparse: warning " Patchwork
2025-12-18  9:38 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-18 10:57 ` [PATCH 0/7] Prepare GVT for display modularization Jani Nikula
2025-12-18 12:05   ` Nautiyal, Ankit K
2025-12-19  4:17 ` ✗ Xe.CI.Full: failure for Prepare GVT for display modularization (rev2) Patchwork
2025-12-29 12:47 ` [PATCH 0/7] Prepare GVT for display modularization Nautiyal, Ankit K
2025-12-31 10:35   ` Jani Nikula
2026-01-02  6:15     ` Nautiyal, Ankit K
2026-01-02 11:24       ` Jani Nikula

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