* [PATCH 0/2] drm/xe: Add more info to powergate_info debugfs
@ 2026-01-15 22:40 Vinay Belgaumkar
2026-01-15 22:40 ` [PATCH 1/2] drm/xe: Add GSC to powergate_info Vinay Belgaumkar
` (5 more replies)
0 siblings, 6 replies; 14+ messages in thread
From: Vinay Belgaumkar @ 2026-01-15 22:40 UTC (permalink / raw)
To: intel-xe; +Cc: Vinay Belgaumkar
Add GSC status and dump forcewake registers with ref counts for all
domains.
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Vinay Belgaumkar (2):
drm/xe: Add GSC to powergate_info
drm/xe: Add forcewake status to powergate_info
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
drivers/gpu/drm/xe/xe_force_wake.c | 46 ++++++++++++++++++++++++----
drivers/gpu/drm/xe/xe_force_wake.h | 11 +++++++
drivers/gpu/drm/xe/xe_gt_idle.c | 25 +++++++++++++++
4 files changed, 77 insertions(+), 6 deletions(-)
--
2.38.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 1/2] drm/xe: Add GSC to powergate_info
2026-01-15 22:40 [PATCH 0/2] drm/xe: Add more info to powergate_info debugfs Vinay Belgaumkar
@ 2026-01-15 22:40 ` Vinay Belgaumkar
2026-01-30 15:23 ` Nilawar, Badal
2026-01-15 22:40 ` [PATCH 2/2] drm/xe: Add forcewake status " Vinay Belgaumkar
` (4 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Vinay Belgaumkar @ 2026-01-15 22:40 UTC (permalink / raw)
To: intel-xe; +Cc: Vinay Belgaumkar
Add GSC powergate status to the existing debugfs.
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
drivers/gpu/drm/xe/xe_gt_idle.c | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 24fc64fc832e..7d3ec1fe4f7f 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -367,6 +367,7 @@
#define FORCEWAKE_RENDER XE_REG(0xa278)
#define POWERGATE_DOMAIN_STATUS XE_REG(0xa2a0)
+#define GSC_AWAKE_STATUS REG_BIT(8)
#define MEDIA_SLICE3_AWAKE_STATUS REG_BIT(4)
#define MEDIA_SLICE2_AWAKE_STATUS REG_BIT(3)
#define MEDIA_SLICE1_AWAKE_STATUS REG_BIT(2)
diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c b/drivers/gpu/drm/xe/xe_gt_idle.c
index c1c9bec3c487..52436dcb6381 100644
--- a/drivers/gpu/drm/xe/xe_gt_idle.c
+++ b/drivers/gpu/drm/xe/xe_gt_idle.c
@@ -255,6 +255,11 @@ int xe_gt_idle_pg_print(struct xe_gt *gt, struct drm_printer *p)
drm_printf(p, "Media Samplers Power Gating Enabled: %s\n",
str_yes_no(pg_enabled & MEDIA_SAMPLERS_POWERGATE_ENABLE));
+ if (gt->info.engine_mask & BIT(XE_HW_ENGINE_GSCCS0)) {
+ drm_printf(p, "GSC Power Gate Status: %s\n",
+ str_up_down(pg_status & GSC_AWAKE_STATUS));
+ }
+
return 0;
}
--
2.38.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/2] drm/xe: Add forcewake status to powergate_info
2026-01-15 22:40 [PATCH 0/2] drm/xe: Add more info to powergate_info debugfs Vinay Belgaumkar
2026-01-15 22:40 ` [PATCH 1/2] drm/xe: Add GSC to powergate_info Vinay Belgaumkar
@ 2026-01-15 22:40 ` Vinay Belgaumkar
2026-01-30 15:20 ` Nilawar, Badal
2026-01-15 22:48 ` ✗ CI.checkpatch: warning for drm/xe: Add more info to powergate_info debugfs Patchwork
` (3 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Vinay Belgaumkar @ 2026-01-15 22:40 UTC (permalink / raw)
To: intel-xe; +Cc: Vinay Belgaumkar
Dump forcewake status and ref counts for all domains as part
of this debugfs. This is the sample output from gt1-
$ cat /sys/kernel/debug/dri//0/gt1/powergate_info
Media Power Gating Enabled: yes
Media Slice0 Power Gate Status: down
GSC Power Gate Status: down
GT.ref_count=0, GT.forcewake=0x10000
VDBox0.ref_count=0, VDBox0.forcewake=0x10000
VEBox0.ref_count=0, VEBox0.forcewake=0x10000
GSC.ref_count=0, GSC.forcewake=0x10000
Signed-off-by: Vinay Belgaumkar<vinay.belgaumkar@intel.com>
---
drivers/gpu/drm/xe/xe_force_wake.c | 46 ++++++++++++++++++++++++++----
drivers/gpu/drm/xe/xe_force_wake.h | 11 +++++++
drivers/gpu/drm/xe/xe_gt_idle.c | 20 +++++++++++++
3 files changed, 71 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 76e054f314ee..197e2197bd0a 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -148,12 +148,6 @@ static int domain_sleep_wait(struct xe_gt *gt,
return __domain_wait(gt, domain, false);
}
-#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
- for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
- for_each_if((domain__ = ((fw__)->domains + \
- (ffs(tmp__) - 1))) && \
- domain__->reg_ctl.addr)
-
/**
* xe_force_wake_get() : Increase the domain refcount
* @fw: struct xe_force_wake
@@ -266,3 +260,43 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
str_plural(hweight_long(ack_fail)), ack_fail);
}
+
+const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
+{
+ switch (id) {
+ case XE_FW_DOMAIN_ID_GT:
+ return "GT";
+ case XE_FW_DOMAIN_ID_RENDER:
+ return "Render";
+ case XE_FW_DOMAIN_ID_MEDIA:
+ return "Media";
+ case XE_FW_DOMAIN_ID_MEDIA_VDBOX0:
+ return "VDBox0";
+ case XE_FW_DOMAIN_ID_MEDIA_VDBOX1:
+ return "VDBox1";
+ case XE_FW_DOMAIN_ID_MEDIA_VDBOX2:
+ return "VDBox2";
+ case XE_FW_DOMAIN_ID_MEDIA_VDBOX3:
+ return "VDBox3";
+ case XE_FW_DOMAIN_ID_MEDIA_VDBOX4:
+ return "VDBox4";
+ case XE_FW_DOMAIN_ID_MEDIA_VDBOX5:
+ return "VDBox5";
+ case XE_FW_DOMAIN_ID_MEDIA_VDBOX6:
+ return "VDBox6";
+ case XE_FW_DOMAIN_ID_MEDIA_VDBOX7:
+ return "VDBox7";
+ case XE_FW_DOMAIN_ID_MEDIA_VEBOX0:
+ return "VEBox0";
+ case XE_FW_DOMAIN_ID_MEDIA_VEBOX1:
+ return "VEBox1";
+ case XE_FW_DOMAIN_ID_MEDIA_VEBOX2:
+ return "VEBox2";
+ case XE_FW_DOMAIN_ID_MEDIA_VEBOX3:
+ return "VEBox3";
+ case XE_FW_DOMAIN_ID_GSC:
+ return "GSC";
+ default:
+ return "Unknown";
+ }
+}
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index 1e2198f6a007..f7690cb34ef7 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -19,6 +19,17 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
+const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
+
+#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
+ for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
+ for_each_if((domain__ = ((fw__)->domains + \
+ (ffs(tmp__) - 1))) && \
+ domain__->reg_ctl.addr)
+
+#define for_each_fw_domain(domain__, fw__, tmp__) \
+ for_each_fw_domain_masked(domain__, fw__->initialized_domains, fw__, tmp__)
+
static inline int
xe_force_wake_ref(struct xe_force_wake *fw,
enum xe_force_wake_domains domain)
diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c b/drivers/gpu/drm/xe/xe_gt_idle.c
index 52436dcb6381..8e36202f1a4f 100644
--- a/drivers/gpu/drm/xe/xe_gt_idle.c
+++ b/drivers/gpu/drm/xe/xe_gt_idle.c
@@ -169,6 +169,24 @@ void xe_gt_idle_disable_pg(struct xe_gt *gt)
xe_mmio_write32(>->mmio, POWERGATE_ENABLE, gtidle->powergate_enable);
}
+static void force_wake_domains_show(struct xe_gt *gt, struct drm_printer *p)
+{
+ struct xe_force_wake_domain *domain;
+ struct xe_force_wake *fw = gt_to_fw(gt);
+ unsigned int tmp;
+ unsigned long flags;
+
+ spin_lock_irqsave(&fw->lock, flags);
+ for_each_fw_domain(domain, fw, tmp) {
+ drm_printf(p, "%s.ref_count=%u, %s.fwake=0x%x\n",
+ xe_force_wake_domain_to_str(domain->id),
+ READ_ONCE(domain->ref),
+ xe_force_wake_domain_to_str(domain->id),
+ xe_mmio_read32(>->mmio, domain->reg_ctl));
+ }
+ spin_unlock_irqrestore(&fw->lock, flags);
+}
+
/**
* xe_gt_idle_pg_print - Xe powergating info
* @gt: GT object
@@ -260,6 +278,8 @@ int xe_gt_idle_pg_print(struct xe_gt *gt, struct drm_printer *p)
str_up_down(pg_status & GSC_AWAKE_STATUS));
}
+ force_wake_domains_show(gt, p);
+
return 0;
}
--
2.38.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: Add more info to powergate_info debugfs
2026-01-15 22:40 [PATCH 0/2] drm/xe: Add more info to powergate_info debugfs Vinay Belgaumkar
2026-01-15 22:40 ` [PATCH 1/2] drm/xe: Add GSC to powergate_info Vinay Belgaumkar
2026-01-15 22:40 ` [PATCH 2/2] drm/xe: Add forcewake status " Vinay Belgaumkar
@ 2026-01-15 22:48 ` Patchwork
2026-01-15 22:50 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-01-15 22:48 UTC (permalink / raw)
To: Vinay Belgaumkar; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Add more info to powergate_info debugfs
URL : https://patchwork.freedesktop.org/series/160164/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
ee83616c430ce70bd254bd2774d143a5733c8666
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit fc5e0236ae9126fa6fa670538cfc54b9fd5c2e49
Author: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Date: Thu Jan 15 14:40:40 2026 -0800
drm/xe: Add forcewake status to powergate_info
Dump forcewake status and ref counts for all domains as part
of this debugfs. This is the sample output from gt1-
$ cat /sys/kernel/debug/dri//0/gt1/powergate_info
Media Power Gating Enabled: yes
Media Slice0 Power Gate Status: down
GSC Power Gate Status: down
GT.ref_count=0, GT.forcewake=0x10000
VDBox0.ref_count=0, VDBox0.forcewake=0x10000
VEBox0.ref_count=0, VEBox0.forcewake=0x10000
GSC.ref_count=0, GSC.forcewake=0x10000
Signed-off-by: Vinay Belgaumkar<vinay.belgaumkar@intel.com>
+ /mt/dim checkpatch 7488f4d19288e0919c24ffc8b2c375e8b7c8a823 drm-intel
535ce2a4aae5 drm/xe: Add GSC to powergate_info
fc5e0236ae91 drm/xe: Add forcewake status to powergate_info
-:91: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'domain__' - possible side-effects?
#91: FILE: drivers/gpu/drm/xe/xe_force_wake.h:24:
+#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
+ for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
+ for_each_if((domain__ = ((fw__)->domains + \
+ (ffs(tmp__) - 1))) && \
+ domain__->reg_ctl.addr)
-:91: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'tmp__' - possible side-effects?
#91: FILE: drivers/gpu/drm/xe/xe_force_wake.h:24:
+#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
+ for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
+ for_each_if((domain__ = ((fw__)->domains + \
+ (ffs(tmp__) - 1))) && \
+ domain__->reg_ctl.addr)
-:97: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'fw__' - possible side-effects?
#97: FILE: drivers/gpu/drm/xe/xe_force_wake.h:30:
+#define for_each_fw_domain(domain__, fw__, tmp__) \
+ for_each_fw_domain_masked(domain__, fw__->initialized_domains, fw__, tmp__)
-:97: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'fw__' may be better as '(fw__)' to avoid precedence issues
#97: FILE: drivers/gpu/drm/xe/xe_force_wake.h:30:
+#define for_each_fw_domain(domain__, fw__, tmp__) \
+ for_each_fw_domain_masked(domain__, fw__->initialized_domains, fw__, tmp__)
-:121: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#121: FILE: drivers/gpu/drm/xe/xe_gt_idle.c:181:
+ drm_printf(p, "%s.ref_count=%u, %s.fwake=0x%x\n",
+ xe_force_wake_domain_to_str(domain->id),
total: 0 errors, 0 warnings, 5 checks, 104 lines checked
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Add more info to powergate_info debugfs
2026-01-15 22:40 [PATCH 0/2] drm/xe: Add more info to powergate_info debugfs Vinay Belgaumkar
` (2 preceding siblings ...)
2026-01-15 22:48 ` ✗ CI.checkpatch: warning for drm/xe: Add more info to powergate_info debugfs Patchwork
@ 2026-01-15 22:50 ` Patchwork
2026-01-15 23:36 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-01-16 4:34 ` ✗ Xe.CI.Full: " Patchwork
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-01-15 22:50 UTC (permalink / raw)
To: Vinay Belgaumkar; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Add more info to powergate_info debugfs
URL : https://patchwork.freedesktop.org/series/160164/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:48:51] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:48:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:49:27] Starting KUnit Kernel (1/1)...
[22:49:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:49:27] ================== guc_buf (11 subtests) ===================
[22:49:27] [PASSED] test_smallest
[22:49:27] [PASSED] test_largest
[22:49:27] [PASSED] test_granular
[22:49:27] [PASSED] test_unique
[22:49:27] [PASSED] test_overlap
[22:49:27] [PASSED] test_reusable
[22:49:27] [PASSED] test_too_big
[22:49:27] [PASSED] test_flush
[22:49:27] [PASSED] test_lookup
[22:49:27] [PASSED] test_data
[22:49:27] [PASSED] test_class
[22:49:27] ===================== [PASSED] guc_buf =====================
[22:49:27] =================== guc_dbm (7 subtests) ===================
[22:49:27] [PASSED] test_empty
[22:49:27] [PASSED] test_default
[22:49:27] ======================== test_size ========================
[22:49:27] [PASSED] 4
[22:49:27] [PASSED] 8
[22:49:27] [PASSED] 32
[22:49:27] [PASSED] 256
[22:49:27] ==================== [PASSED] test_size ====================
[22:49:27] ======================= test_reuse ========================
[22:49:27] [PASSED] 4
[22:49:27] [PASSED] 8
[22:49:27] [PASSED] 32
[22:49:27] [PASSED] 256
[22:49:27] =================== [PASSED] test_reuse ====================
[22:49:27] =================== test_range_overlap ====================
[22:49:27] [PASSED] 4
[22:49:27] [PASSED] 8
[22:49:27] [PASSED] 32
[22:49:27] [PASSED] 256
[22:49:27] =============== [PASSED] test_range_overlap ================
[22:49:27] =================== test_range_compact ====================
[22:49:27] [PASSED] 4
[22:49:27] [PASSED] 8
[22:49:27] [PASSED] 32
[22:49:27] [PASSED] 256
[22:49:27] =============== [PASSED] test_range_compact ================
[22:49:27] ==================== test_range_spare =====================
[22:49:27] [PASSED] 4
[22:49:27] [PASSED] 8
[22:49:27] [PASSED] 32
[22:49:27] [PASSED] 256
[22:49:27] ================ [PASSED] test_range_spare =================
[22:49:27] ===================== [PASSED] guc_dbm =====================
[22:49:27] =================== guc_idm (6 subtests) ===================
[22:49:27] [PASSED] bad_init
[22:49:27] [PASSED] no_init
[22:49:27] [PASSED] init_fini
[22:49:27] [PASSED] check_used
[22:49:27] [PASSED] check_quota
[22:49:27] [PASSED] check_all
[22:49:27] ===================== [PASSED] guc_idm =====================
[22:49:27] ================== no_relay (3 subtests) ===================
[22:49:27] [PASSED] xe_drops_guc2pf_if_not_ready
[22:49:27] [PASSED] xe_drops_guc2vf_if_not_ready
[22:49:27] [PASSED] xe_rejects_send_if_not_ready
[22:49:27] ==================== [PASSED] no_relay =====================
[22:49:27] ================== pf_relay (14 subtests) ==================
[22:49:27] [PASSED] pf_rejects_guc2pf_too_short
[22:49:27] [PASSED] pf_rejects_guc2pf_too_long
[22:49:27] [PASSED] pf_rejects_guc2pf_no_payload
[22:49:27] [PASSED] pf_fails_no_payload
[22:49:27] [PASSED] pf_fails_bad_origin
[22:49:27] [PASSED] pf_fails_bad_type
[22:49:27] [PASSED] pf_txn_reports_error
[22:49:27] [PASSED] pf_txn_sends_pf2guc
[22:49:27] [PASSED] pf_sends_pf2guc
[22:49:27] [SKIPPED] pf_loopback_nop
[22:49:27] [SKIPPED] pf_loopback_echo
[22:49:27] [SKIPPED] pf_loopback_fail
[22:49:27] [SKIPPED] pf_loopback_busy
[22:49:27] [SKIPPED] pf_loopback_retry
[22:49:27] ==================== [PASSED] pf_relay =====================
[22:49:27] ================== vf_relay (3 subtests) ===================
[22:49:27] [PASSED] vf_rejects_guc2vf_too_short
[22:49:27] [PASSED] vf_rejects_guc2vf_too_long
[22:49:27] [PASSED] vf_rejects_guc2vf_no_payload
[22:49:27] ==================== [PASSED] vf_relay =====================
[22:49:27] ================ pf_gt_config (6 subtests) =================
[22:49:27] [PASSED] fair_contexts_1vf
[22:49:27] [PASSED] fair_doorbells_1vf
[22:49:27] [PASSED] fair_ggtt_1vf
[22:49:27] ====================== fair_contexts ======================
[22:49:27] [PASSED] 1 VF
[22:49:27] [PASSED] 2 VFs
[22:49:27] [PASSED] 3 VFs
[22:49:27] [PASSED] 4 VFs
[22:49:27] [PASSED] 5 VFs
[22:49:27] [PASSED] 6 VFs
[22:49:27] [PASSED] 7 VFs
[22:49:27] [PASSED] 8 VFs
[22:49:27] [PASSED] 9 VFs
[22:49:27] [PASSED] 10 VFs
[22:49:27] [PASSED] 11 VFs
[22:49:27] [PASSED] 12 VFs
[22:49:27] [PASSED] 13 VFs
[22:49:27] [PASSED] 14 VFs
[22:49:27] [PASSED] 15 VFs
[22:49:27] [PASSED] 16 VFs
[22:49:27] [PASSED] 17 VFs
[22:49:27] [PASSED] 18 VFs
[22:49:27] [PASSED] 19 VFs
[22:49:27] [PASSED] 20 VFs
[22:49:27] [PASSED] 21 VFs
[22:49:27] [PASSED] 22 VFs
[22:49:27] [PASSED] 23 VFs
[22:49:27] [PASSED] 24 VFs
[22:49:27] [PASSED] 25 VFs
[22:49:27] [PASSED] 26 VFs
[22:49:27] [PASSED] 27 VFs
[22:49:27] [PASSED] 28 VFs
[22:49:27] [PASSED] 29 VFs
[22:49:27] [PASSED] 30 VFs
[22:49:27] [PASSED] 31 VFs
[22:49:27] [PASSED] 32 VFs
[22:49:27] [PASSED] 33 VFs
[22:49:27] [PASSED] 34 VFs
[22:49:27] [PASSED] 35 VFs
[22:49:27] [PASSED] 36 VFs
[22:49:27] [PASSED] 37 VFs
[22:49:27] [PASSED] 38 VFs
[22:49:27] [PASSED] 39 VFs
[22:49:27] [PASSED] 40 VFs
[22:49:27] [PASSED] 41 VFs
[22:49:27] [PASSED] 42 VFs
[22:49:27] [PASSED] 43 VFs
[22:49:27] [PASSED] 44 VFs
[22:49:27] [PASSED] 45 VFs
[22:49:27] [PASSED] 46 VFs
[22:49:27] [PASSED] 47 VFs
[22:49:27] [PASSED] 48 VFs
[22:49:27] [PASSED] 49 VFs
[22:49:27] [PASSED] 50 VFs
[22:49:27] [PASSED] 51 VFs
[22:49:27] [PASSED] 52 VFs
[22:49:27] [PASSED] 53 VFs
[22:49:27] [PASSED] 54 VFs
[22:49:27] [PASSED] 55 VFs
[22:49:27] [PASSED] 56 VFs
[22:49:27] [PASSED] 57 VFs
[22:49:27] [PASSED] 58 VFs
[22:49:27] [PASSED] 59 VFs
[22:49:27] [PASSED] 60 VFs
[22:49:27] [PASSED] 61 VFs
[22:49:27] [PASSED] 62 VFs
[22:49:27] [PASSED] 63 VFs
[22:49:27] ================== [PASSED] fair_contexts ==================
[22:49:27] ===================== fair_doorbells ======================
[22:49:27] [PASSED] 1 VF
[22:49:27] [PASSED] 2 VFs
[22:49:27] [PASSED] 3 VFs
[22:49:27] [PASSED] 4 VFs
[22:49:27] [PASSED] 5 VFs
[22:49:27] [PASSED] 6 VFs
[22:49:27] [PASSED] 7 VFs
[22:49:27] [PASSED] 8 VFs
[22:49:27] [PASSED] 9 VFs
[22:49:27] [PASSED] 10 VFs
[22:49:27] [PASSED] 11 VFs
[22:49:27] [PASSED] 12 VFs
[22:49:27] [PASSED] 13 VFs
[22:49:27] [PASSED] 14 VFs
[22:49:27] [PASSED] 15 VFs
[22:49:27] [PASSED] 16 VFs
[22:49:27] [PASSED] 17 VFs
[22:49:27] [PASSED] 18 VFs
[22:49:27] [PASSED] 19 VFs
[22:49:27] [PASSED] 20 VFs
[22:49:27] [PASSED] 21 VFs
[22:49:27] [PASSED] 22 VFs
[22:49:27] [PASSED] 23 VFs
[22:49:27] [PASSED] 24 VFs
[22:49:27] [PASSED] 25 VFs
[22:49:27] [PASSED] 26 VFs
[22:49:27] [PASSED] 27 VFs
[22:49:27] [PASSED] 28 VFs
[22:49:27] [PASSED] 29 VFs
[22:49:27] [PASSED] 30 VFs
[22:49:27] [PASSED] 31 VFs
[22:49:27] [PASSED] 32 VFs
[22:49:27] [PASSED] 33 VFs
[22:49:27] [PASSED] 34 VFs
[22:49:27] [PASSED] 35 VFs
[22:49:27] [PASSED] 36 VFs
[22:49:27] [PASSED] 37 VFs
[22:49:27] [PASSED] 38 VFs
[22:49:27] [PASSED] 39 VFs
[22:49:27] [PASSED] 40 VFs
[22:49:27] [PASSED] 41 VFs
[22:49:27] [PASSED] 42 VFs
[22:49:27] [PASSED] 43 VFs
[22:49:27] [PASSED] 44 VFs
[22:49:27] [PASSED] 45 VFs
[22:49:27] [PASSED] 46 VFs
[22:49:27] [PASSED] 47 VFs
[22:49:27] [PASSED] 48 VFs
[22:49:27] [PASSED] 49 VFs
[22:49:27] [PASSED] 50 VFs
[22:49:27] [PASSED] 51 VFs
[22:49:27] [PASSED] 52 VFs
[22:49:27] [PASSED] 53 VFs
[22:49:27] [PASSED] 54 VFs
[22:49:27] [PASSED] 55 VFs
[22:49:27] [PASSED] 56 VFs
[22:49:27] [PASSED] 57 VFs
[22:49:27] [PASSED] 58 VFs
[22:49:27] [PASSED] 59 VFs
[22:49:27] [PASSED] 60 VFs
[22:49:27] [PASSED] 61 VFs
[22:49:27] [PASSED] 62 VFs
[22:49:27] [PASSED] 63 VFs
[22:49:27] ================= [PASSED] fair_doorbells ==================
[22:49:27] ======================== fair_ggtt ========================
[22:49:27] [PASSED] 1 VF
[22:49:27] [PASSED] 2 VFs
[22:49:27] [PASSED] 3 VFs
[22:49:27] [PASSED] 4 VFs
[22:49:27] [PASSED] 5 VFs
[22:49:27] [PASSED] 6 VFs
[22:49:27] [PASSED] 7 VFs
[22:49:27] [PASSED] 8 VFs
[22:49:27] [PASSED] 9 VFs
[22:49:27] [PASSED] 10 VFs
[22:49:27] [PASSED] 11 VFs
[22:49:27] [PASSED] 12 VFs
[22:49:27] [PASSED] 13 VFs
[22:49:27] [PASSED] 14 VFs
[22:49:27] [PASSED] 15 VFs
[22:49:27] [PASSED] 16 VFs
[22:49:27] [PASSED] 17 VFs
[22:49:27] [PASSED] 18 VFs
[22:49:27] [PASSED] 19 VFs
[22:49:27] [PASSED] 20 VFs
[22:49:27] [PASSED] 21 VFs
[22:49:27] [PASSED] 22 VFs
[22:49:27] [PASSED] 23 VFs
[22:49:27] [PASSED] 24 VFs
[22:49:27] [PASSED] 25 VFs
[22:49:27] [PASSED] 26 VFs
[22:49:27] [PASSED] 27 VFs
[22:49:27] [PASSED] 28 VFs
[22:49:27] [PASSED] 29 VFs
[22:49:27] [PASSED] 30 VFs
[22:49:27] [PASSED] 31 VFs
[22:49:27] [PASSED] 32 VFs
[22:49:27] [PASSED] 33 VFs
[22:49:27] [PASSED] 34 VFs
[22:49:27] [PASSED] 35 VFs
[22:49:27] [PASSED] 36 VFs
[22:49:27] [PASSED] 37 VFs
[22:49:27] [PASSED] 38 VFs
[22:49:27] [PASSED] 39 VFs
[22:49:27] [PASSED] 40 VFs
[22:49:27] [PASSED] 41 VFs
[22:49:27] [PASSED] 42 VFs
[22:49:27] [PASSED] 43 VFs
[22:49:27] [PASSED] 44 VFs
[22:49:27] [PASSED] 45 VFs
[22:49:27] [PASSED] 46 VFs
[22:49:27] [PASSED] 47 VFs
[22:49:27] [PASSED] 48 VFs
[22:49:27] [PASSED] 49 VFs
[22:49:27] [PASSED] 50 VFs
[22:49:27] [PASSED] 51 VFs
[22:49:27] [PASSED] 52 VFs
[22:49:27] [PASSED] 53 VFs
[22:49:27] [PASSED] 54 VFs
[22:49:27] [PASSED] 55 VFs
[22:49:27] [PASSED] 56 VFs
[22:49:27] [PASSED] 57 VFs
[22:49:27] [PASSED] 58 VFs
[22:49:27] [PASSED] 59 VFs
[22:49:27] [PASSED] 60 VFs
[22:49:27] [PASSED] 61 VFs
[22:49:27] [PASSED] 62 VFs
[22:49:27] [PASSED] 63 VFs
[22:49:27] ==================== [PASSED] fair_ggtt ====================
[22:49:27] ================== [PASSED] pf_gt_config ===================
[22:49:27] ===================== lmtt (1 subtest) =====================
[22:49:27] ======================== test_ops =========================
[22:49:27] [PASSED] 2-level
[22:49:27] [PASSED] multi-level
[22:49:27] ==================== [PASSED] test_ops =====================
[22:49:27] ====================== [PASSED] lmtt =======================
[22:49:27] ================= pf_service (11 subtests) =================
[22:49:27] [PASSED] pf_negotiate_any
[22:49:27] [PASSED] pf_negotiate_base_match
[22:49:27] [PASSED] pf_negotiate_base_newer
[22:49:27] [PASSED] pf_negotiate_base_next
[22:49:27] [SKIPPED] pf_negotiate_base_older
[22:49:27] [PASSED] pf_negotiate_base_prev
[22:49:27] [PASSED] pf_negotiate_latest_match
[22:49:27] [PASSED] pf_negotiate_latest_newer
[22:49:27] [PASSED] pf_negotiate_latest_next
[22:49:27] [SKIPPED] pf_negotiate_latest_older
[22:49:27] [SKIPPED] pf_negotiate_latest_prev
[22:49:27] =================== [PASSED] pf_service ====================
[22:49:27] ================= xe_guc_g2g (2 subtests) ==================
[22:49:27] ============== xe_live_guc_g2g_kunit_default ==============
[22:49:27] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:49:27] ============== xe_live_guc_g2g_kunit_allmem ===============
[22:49:27] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:49:27] =================== [SKIPPED] xe_guc_g2g ===================
[22:49:27] =================== xe_mocs (2 subtests) ===================
[22:49:27] ================ xe_live_mocs_kernel_kunit ================
[22:49:27] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:49:27] ================ xe_live_mocs_reset_kunit =================
[22:49:27] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:49:27] ==================== [SKIPPED] xe_mocs =====================
[22:49:27] ================= xe_migrate (2 subtests) ==================
[22:49:27] ================= xe_migrate_sanity_kunit =================
[22:49:27] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:49:27] ================== xe_validate_ccs_kunit ==================
[22:49:27] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:49:27] =================== [SKIPPED] xe_migrate ===================
[22:49:27] ================== xe_dma_buf (1 subtest) ==================
[22:49:27] ==================== xe_dma_buf_kunit =====================
[22:49:27] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:49:27] =================== [SKIPPED] xe_dma_buf ===================
[22:49:27] ================= xe_bo_shrink (1 subtest) =================
[22:49:27] =================== xe_bo_shrink_kunit ====================
[22:49:27] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:49:27] ================== [SKIPPED] xe_bo_shrink ==================
[22:49:27] ==================== xe_bo (2 subtests) ====================
[22:49:27] ================== xe_ccs_migrate_kunit ===================
[22:49:27] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:49:27] ==================== xe_bo_evict_kunit ====================
[22:49:27] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:49:27] ===================== [SKIPPED] xe_bo ======================
[22:49:27] ==================== args (13 subtests) ====================
[22:49:27] [PASSED] count_args_test
[22:49:27] [PASSED] call_args_example
[22:49:27] [PASSED] call_args_test
[22:49:27] [PASSED] drop_first_arg_example
[22:49:27] [PASSED] drop_first_arg_test
[22:49:27] [PASSED] first_arg_example
[22:49:27] [PASSED] first_arg_test
[22:49:27] [PASSED] last_arg_example
[22:49:27] [PASSED] last_arg_test
[22:49:27] [PASSED] pick_arg_example
[22:49:27] [PASSED] if_args_example
[22:49:27] [PASSED] if_args_test
[22:49:27] [PASSED] sep_comma_example
[22:49:27] ====================== [PASSED] args =======================
[22:49:27] =================== xe_pci (3 subtests) ====================
[22:49:27] ==================== check_graphics_ip ====================
[22:49:27] [PASSED] 12.00 Xe_LP
[22:49:27] [PASSED] 12.10 Xe_LP+
[22:49:27] [PASSED] 12.55 Xe_HPG
[22:49:27] [PASSED] 12.60 Xe_HPC
[22:49:27] [PASSED] 12.70 Xe_LPG
[22:49:27] [PASSED] 12.71 Xe_LPG
[22:49:27] [PASSED] 12.74 Xe_LPG+
[22:49:27] [PASSED] 20.01 Xe2_HPG
[22:49:27] [PASSED] 20.02 Xe2_HPG
[22:49:27] [PASSED] 20.04 Xe2_LPG
[22:49:27] [PASSED] 30.00 Xe3_LPG
[22:49:27] [PASSED] 30.01 Xe3_LPG
[22:49:27] [PASSED] 30.03 Xe3_LPG
[22:49:27] [PASSED] 30.04 Xe3_LPG
[22:49:27] [PASSED] 30.05 Xe3_LPG
[22:49:27] [PASSED] 35.11 Xe3p_XPC
[22:49:27] ================ [PASSED] check_graphics_ip ================
[22:49:27] ===================== check_media_ip ======================
[22:49:27] [PASSED] 12.00 Xe_M
[22:49:27] [PASSED] 12.55 Xe_HPM
[22:49:27] [PASSED] 13.00 Xe_LPM+
[22:49:27] [PASSED] 13.01 Xe2_HPM
[22:49:27] [PASSED] 20.00 Xe2_LPM
[22:49:27] [PASSED] 30.00 Xe3_LPM
[22:49:27] [PASSED] 30.02 Xe3_LPM
[22:49:27] [PASSED] 35.00 Xe3p_LPM
[22:49:27] [PASSED] 35.03 Xe3p_HPM
[22:49:27] ================= [PASSED] check_media_ip ==================
[22:49:27] =================== check_platform_desc ===================
[22:49:27] [PASSED] 0x9A60 (TIGERLAKE)
[22:49:27] [PASSED] 0x9A68 (TIGERLAKE)
[22:49:27] [PASSED] 0x9A70 (TIGERLAKE)
[22:49:27] [PASSED] 0x9A40 (TIGERLAKE)
[22:49:27] [PASSED] 0x9A49 (TIGERLAKE)
[22:49:27] [PASSED] 0x9A59 (TIGERLAKE)
[22:49:27] [PASSED] 0x9A78 (TIGERLAKE)
[22:49:27] [PASSED] 0x9AC0 (TIGERLAKE)
[22:49:27] [PASSED] 0x9AC9 (TIGERLAKE)
[22:49:27] [PASSED] 0x9AD9 (TIGERLAKE)
[22:49:27] [PASSED] 0x9AF8 (TIGERLAKE)
[22:49:27] [PASSED] 0x4C80 (ROCKETLAKE)
[22:49:27] [PASSED] 0x4C8A (ROCKETLAKE)
[22:49:27] [PASSED] 0x4C8B (ROCKETLAKE)
[22:49:27] [PASSED] 0x4C8C (ROCKETLAKE)
[22:49:27] [PASSED] 0x4C90 (ROCKETLAKE)
[22:49:27] [PASSED] 0x4C9A (ROCKETLAKE)
[22:49:27] [PASSED] 0x4680 (ALDERLAKE_S)
[22:49:27] [PASSED] 0x4682 (ALDERLAKE_S)
[22:49:27] [PASSED] 0x4688 (ALDERLAKE_S)
[22:49:27] [PASSED] 0x468A (ALDERLAKE_S)
[22:49:27] [PASSED] 0x468B (ALDERLAKE_S)
[22:49:27] [PASSED] 0x4690 (ALDERLAKE_S)
[22:49:27] [PASSED] 0x4692 (ALDERLAKE_S)
[22:49:27] [PASSED] 0x4693 (ALDERLAKE_S)
[22:49:27] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46AA (ALDERLAKE_P)
[22:49:27] [PASSED] 0x462A (ALDERLAKE_P)
[22:49:27] [PASSED] 0x4626 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[22:49:27] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:49:27] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:49:27] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:49:27] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:49:27] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:49:27] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:49:27] [PASSED] 0xA721 (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA720 (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:49:27] [PASSED] 0xA780 (ALDERLAKE_S)
[22:49:27] [PASSED] 0xA781 (ALDERLAKE_S)
[22:49:27] [PASSED] 0xA782 (ALDERLAKE_S)
[22:49:27] [PASSED] 0xA783 (ALDERLAKE_S)
[22:49:27] [PASSED] 0xA788 (ALDERLAKE_S)
[22:49:27] [PASSED] 0xA789 (ALDERLAKE_S)
[22:49:27] [PASSED] 0xA78A (ALDERLAKE_S)
[22:49:27] [PASSED] 0xA78B (ALDERLAKE_S)
[22:49:27] [PASSED] 0x4905 (DG1)
[22:49:27] [PASSED] 0x4906 (DG1)
[22:49:27] [PASSED] 0x4907 (DG1)
[22:49:27] [PASSED] 0x4908 (DG1)
[22:49:27] [PASSED] 0x4909 (DG1)
[22:49:27] [PASSED] 0x56C0 (DG2)
[22:49:27] [PASSED] 0x56C2 (DG2)
[22:49:27] [PASSED] 0x56C1 (DG2)
[22:49:27] [PASSED] 0x7D51 (METEORLAKE)
[22:49:27] [PASSED] 0x7DD1 (METEORLAKE)
[22:49:27] [PASSED] 0x7D41 (METEORLAKE)
[22:49:27] [PASSED] 0x7D67 (METEORLAKE)
[22:49:27] [PASSED] 0xB640 (METEORLAKE)
[22:49:27] [PASSED] 0x56A0 (DG2)
[22:49:27] [PASSED] 0x56A1 (DG2)
[22:49:27] [PASSED] 0x56A2 (DG2)
[22:49:27] [PASSED] 0x56BE (DG2)
[22:49:27] [PASSED] 0x56BF (DG2)
[22:49:27] [PASSED] 0x5690 (DG2)
[22:49:27] [PASSED] 0x5691 (DG2)
[22:49:27] [PASSED] 0x5692 (DG2)
[22:49:27] [PASSED] 0x56A5 (DG2)
[22:49:27] [PASSED] 0x56A6 (DG2)
[22:49:27] [PASSED] 0x56B0 (DG2)
[22:49:27] [PASSED] 0x56B1 (DG2)
[22:49:27] [PASSED] 0x56BA (DG2)
[22:49:27] [PASSED] 0x56BB (DG2)
[22:49:27] [PASSED] 0x56BC (DG2)
[22:49:27] [PASSED] 0x56BD (DG2)
[22:49:27] [PASSED] 0x5693 (DG2)
[22:49:27] [PASSED] 0x5694 (DG2)
[22:49:27] [PASSED] 0x5695 (DG2)
[22:49:27] [PASSED] 0x56A3 (DG2)
[22:49:27] [PASSED] 0x56A4 (DG2)
[22:49:27] [PASSED] 0x56B2 (DG2)
[22:49:27] [PASSED] 0x56B3 (DG2)
[22:49:27] [PASSED] 0x5696 (DG2)
[22:49:27] [PASSED] 0x5697 (DG2)
[22:49:27] [PASSED] 0xB69 (PVC)
[22:49:27] [PASSED] 0xB6E (PVC)
[22:49:27] [PASSED] 0xBD4 (PVC)
[22:49:27] [PASSED] 0xBD5 (PVC)
[22:49:27] [PASSED] 0xBD6 (PVC)
[22:49:27] [PASSED] 0xBD7 (PVC)
[22:49:27] [PASSED] 0xBD8 (PVC)
[22:49:27] [PASSED] 0xBD9 (PVC)
[22:49:27] [PASSED] 0xBDA (PVC)
[22:49:27] [PASSED] 0xBDB (PVC)
[22:49:27] [PASSED] 0xBE0 (PVC)
[22:49:27] [PASSED] 0xBE1 (PVC)
[22:49:27] [PASSED] 0xBE5 (PVC)
[22:49:27] [PASSED] 0x7D40 (METEORLAKE)
[22:49:27] [PASSED] 0x7D45 (METEORLAKE)
[22:49:27] [PASSED] 0x7D55 (METEORLAKE)
[22:49:27] [PASSED] 0x7D60 (METEORLAKE)
[22:49:27] [PASSED] 0x7DD5 (METEORLAKE)
[22:49:27] [PASSED] 0x6420 (LUNARLAKE)
[22:49:27] [PASSED] 0x64A0 (LUNARLAKE)
[22:49:27] [PASSED] 0x64B0 (LUNARLAKE)
[22:49:27] [PASSED] 0xE202 (BATTLEMAGE)
[22:49:27] [PASSED] 0xE209 (BATTLEMAGE)
[22:49:27] [PASSED] 0xE20B (BATTLEMAGE)
[22:49:27] [PASSED] 0xE20C (BATTLEMAGE)
[22:49:27] [PASSED] 0xE20D (BATTLEMAGE)
[22:49:27] [PASSED] 0xE210 (BATTLEMAGE)
[22:49:27] [PASSED] 0xE211 (BATTLEMAGE)
[22:49:27] [PASSED] 0xE212 (BATTLEMAGE)
[22:49:27] [PASSED] 0xE216 (BATTLEMAGE)
[22:49:27] [PASSED] 0xE220 (BATTLEMAGE)
[22:49:27] [PASSED] 0xE221 (BATTLEMAGE)
[22:49:27] [PASSED] 0xE222 (BATTLEMAGE)
[22:49:27] [PASSED] 0xE223 (BATTLEMAGE)
[22:49:27] [PASSED] 0xB080 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB081 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB082 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB083 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB084 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB085 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB086 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB087 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB08F (PANTHERLAKE)
[22:49:27] [PASSED] 0xB090 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:49:27] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:49:27] [PASSED] 0xFD80 (PANTHERLAKE)
[22:49:27] [PASSED] 0xFD81 (PANTHERLAKE)
[22:49:27] [PASSED] 0xD740 (NOVALAKE_S)
[22:49:27] [PASSED] 0xD741 (NOVALAKE_S)
[22:49:27] [PASSED] 0xD742 (NOVALAKE_S)
[22:49:27] [PASSED] 0xD743 (NOVALAKE_S)
[22:49:27] [PASSED] 0xD744 (NOVALAKE_S)
[22:49:27] [PASSED] 0xD745 (NOVALAKE_S)
[22:49:27] [PASSED] 0x674C (CRESCENTISLAND)
[22:49:27] =============== [PASSED] check_platform_desc ===============
[22:49:27] ===================== [PASSED] xe_pci ======================
[22:49:27] =================== xe_rtp (2 subtests) ====================
[22:49:27] =============== xe_rtp_process_to_sr_tests ================
[22:49:27] [PASSED] coalesce-same-reg
[22:49:27] [PASSED] no-match-no-add
[22:49:27] [PASSED] match-or
[22:49:27] [PASSED] match-or-xfail
[22:49:27] [PASSED] no-match-no-add-multiple-rules
[22:49:27] [PASSED] two-regs-two-entries
[22:49:27] [PASSED] clr-one-set-other
[22:49:27] [PASSED] set-field
[22:49:27] [PASSED] conflict-duplicate
[22:49:27] [PASSED] conflict-not-disjoint
[22:49:27] [PASSED] conflict-reg-type
[22:49:27] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:49:27] ================== xe_rtp_process_tests ===================
[22:49:27] [PASSED] active1
[22:49:27] [PASSED] active2
[22:49:27] [PASSED] active-inactive
[22:49:27] [PASSED] inactive-active
[22:49:27] [PASSED] inactive-1st_or_active-inactive
[22:49:27] [PASSED] inactive-2nd_or_active-inactive
[22:49:27] [PASSED] inactive-last_or_active-inactive
[22:49:27] [PASSED] inactive-no_or_active-inactive
[22:49:27] ============== [PASSED] xe_rtp_process_tests ===============
[22:49:27] ===================== [PASSED] xe_rtp ======================
[22:49:27] ==================== xe_wa (1 subtest) =====================
[22:49:27] ======================== xe_wa_gt =========================
[22:49:27] [PASSED] TIGERLAKE B0
[22:49:27] [PASSED] DG1 A0
[22:49:27] [PASSED] DG1 B0
[22:49:27] [PASSED] ALDERLAKE_S A0
[22:49:27] [PASSED] ALDERLAKE_S B0
[22:49:27] [PASSED] ALDERLAKE_S C0
[22:49:27] [PASSED] ALDERLAKE_S D0
[22:49:27] [PASSED] ALDERLAKE_P A0
[22:49:27] [PASSED] ALDERLAKE_P B0
[22:49:27] [PASSED] ALDERLAKE_P C0
[22:49:27] [PASSED] ALDERLAKE_S RPLS D0
[22:49:27] [PASSED] ALDERLAKE_P RPLU E0
[22:49:27] [PASSED] DG2 G10 C0
[22:49:27] [PASSED] DG2 G11 B1
[22:49:27] [PASSED] DG2 G12 A1
[22:49:27] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:49:27] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:49:27] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:49:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:49:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:49:27] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:49:27] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:49:27] ==================== [PASSED] xe_wa_gt =====================
[22:49:27] ====================== [PASSED] xe_wa ======================
[22:49:27] ============================================================
[22:49:27] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[22:49:27] Elapsed time: 36.329s total, 4.240s configuring, 31.572s building, 0.461s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:49:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:49:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:49:54] Starting KUnit Kernel (1/1)...
[22:49:54] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:49:54] ============ drm_test_pick_cmdline (2 subtests) ============
[22:49:54] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:49:54] =============== drm_test_pick_cmdline_named ===============
[22:49:54] [PASSED] NTSC
[22:49:54] [PASSED] NTSC-J
[22:49:54] [PASSED] PAL
[22:49:54] [PASSED] PAL-M
[22:49:54] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:49:54] ============== [PASSED] drm_test_pick_cmdline ==============
[22:49:54] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:49:54] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:49:54] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:49:54] =========== drm_validate_clone_mode (2 subtests) ===========
[22:49:54] ============== drm_test_check_in_clone_mode ===============
[22:49:54] [PASSED] in_clone_mode
[22:49:54] [PASSED] not_in_clone_mode
[22:49:54] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:49:54] =============== drm_test_check_valid_clones ===============
[22:49:54] [PASSED] not_in_clone_mode
[22:49:54] [PASSED] valid_clone
[22:49:54] [PASSED] invalid_clone
[22:49:54] =========== [PASSED] drm_test_check_valid_clones ===========
[22:49:54] ============= [PASSED] drm_validate_clone_mode =============
[22:49:54] ============= drm_validate_modeset (1 subtest) =============
[22:49:54] [PASSED] drm_test_check_connector_changed_modeset
[22:49:54] ============== [PASSED] drm_validate_modeset ===============
[22:49:54] ====== drm_test_bridge_get_current_state (2 subtests) ======
[22:49:54] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:49:54] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[22:49:54] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:49:54] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:49:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:49:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:49:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[22:49:54] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:49:54] ============== drm_bridge_alloc (2 subtests) ===============
[22:49:54] [PASSED] drm_test_drm_bridge_alloc_basic
[22:49:54] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:49:54] ================ [PASSED] drm_bridge_alloc =================
[22:49:54] ================== drm_buddy (8 subtests) ==================
[22:49:54] [PASSED] drm_test_buddy_alloc_limit
[22:49:54] [PASSED] drm_test_buddy_alloc_optimistic
[22:49:54] [PASSED] drm_test_buddy_alloc_pessimistic
[22:49:54] [PASSED] drm_test_buddy_alloc_pathological
[22:49:54] [PASSED] drm_test_buddy_alloc_contiguous
[22:49:54] [PASSED] drm_test_buddy_alloc_clear
[22:49:55] [PASSED] drm_test_buddy_alloc_range_bias
[22:49:55] [PASSED] drm_test_buddy_fragmentation_performance
[22:49:55] ==================== [PASSED] drm_buddy ====================
[22:49:55] ============= drm_cmdline_parser (40 subtests) =============
[22:49:55] [PASSED] drm_test_cmdline_force_d_only
[22:49:55] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:49:55] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:49:55] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:49:55] [PASSED] drm_test_cmdline_force_e_only
[22:49:55] [PASSED] drm_test_cmdline_res
[22:49:55] [PASSED] drm_test_cmdline_res_vesa
[22:49:55] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:49:55] [PASSED] drm_test_cmdline_res_rblank
[22:49:55] [PASSED] drm_test_cmdline_res_bpp
[22:49:55] [PASSED] drm_test_cmdline_res_refresh
[22:49:55] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:49:55] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:49:55] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:49:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:49:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:49:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:49:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:49:55] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:49:55] [PASSED] drm_test_cmdline_res_margins_force_on
[22:49:55] [PASSED] drm_test_cmdline_res_vesa_margins
[22:49:55] [PASSED] drm_test_cmdline_name
[22:49:55] [PASSED] drm_test_cmdline_name_bpp
[22:49:55] [PASSED] drm_test_cmdline_name_option
[22:49:55] [PASSED] drm_test_cmdline_name_bpp_option
[22:49:55] [PASSED] drm_test_cmdline_rotate_0
[22:49:55] [PASSED] drm_test_cmdline_rotate_90
[22:49:55] [PASSED] drm_test_cmdline_rotate_180
[22:49:55] [PASSED] drm_test_cmdline_rotate_270
[22:49:55] [PASSED] drm_test_cmdline_hmirror
[22:49:55] [PASSED] drm_test_cmdline_vmirror
[22:49:55] [PASSED] drm_test_cmdline_margin_options
[22:49:55] [PASSED] drm_test_cmdline_multiple_options
[22:49:55] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:49:55] [PASSED] drm_test_cmdline_extra_and_option
[22:49:55] [PASSED] drm_test_cmdline_freestanding_options
[22:49:55] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:49:55] [PASSED] drm_test_cmdline_panel_orientation
[22:49:55] ================ drm_test_cmdline_invalid =================
[22:49:55] [PASSED] margin_only
[22:49:55] [PASSED] interlace_only
[22:49:55] [PASSED] res_missing_x
[22:49:55] [PASSED] res_missing_y
[22:49:55] [PASSED] res_bad_y
[22:49:55] [PASSED] res_missing_y_bpp
[22:49:55] [PASSED] res_bad_bpp
[22:49:55] [PASSED] res_bad_refresh
[22:49:55] [PASSED] res_bpp_refresh_force_on_off
[22:49:55] [PASSED] res_invalid_mode
[22:49:55] [PASSED] res_bpp_wrong_place_mode
[22:49:55] [PASSED] name_bpp_refresh
[22:49:55] [PASSED] name_refresh
[22:49:55] [PASSED] name_refresh_wrong_mode
[22:49:55] [PASSED] name_refresh_invalid_mode
[22:49:55] [PASSED] rotate_multiple
[22:49:55] [PASSED] rotate_invalid_val
[22:49:55] [PASSED] rotate_truncated
[22:49:55] [PASSED] invalid_option
[22:49:55] [PASSED] invalid_tv_option
[22:49:55] [PASSED] truncated_tv_option
[22:49:55] ============ [PASSED] drm_test_cmdline_invalid =============
[22:49:55] =============== drm_test_cmdline_tv_options ===============
[22:49:55] [PASSED] NTSC
[22:49:55] [PASSED] NTSC_443
[22:49:55] [PASSED] NTSC_J
[22:49:55] [PASSED] PAL
[22:49:55] [PASSED] PAL_M
[22:49:55] [PASSED] PAL_N
[22:49:55] [PASSED] SECAM
[22:49:55] [PASSED] MONO_525
[22:49:55] [PASSED] MONO_625
[22:49:55] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:49:55] =============== [PASSED] drm_cmdline_parser ================
[22:49:55] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:49:55] [PASSED] drm_test_connector_hdmi_init_valid
[22:49:55] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:49:55] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:49:55] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:49:55] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:49:55] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:49:55] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:49:55] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:49:55] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:49:55] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:49:55] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:49:55] [PASSED] supported_formats=0x3 yuv420_allowed=1
[22:49:55] [PASSED] supported_formats=0x3 yuv420_allowed=0
[22:49:55] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:49:55] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:49:55] [PASSED] drm_test_connector_hdmi_init_null_product
[22:49:55] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:49:55] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:49:55] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:49:55] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:49:55] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:49:55] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:49:55] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:49:55] ========= drm_test_connector_hdmi_init_type_valid =========
[22:49:55] [PASSED] HDMI-A
[22:49:55] [PASSED] HDMI-B
[22:49:55] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:49:55] ======== drm_test_connector_hdmi_init_type_invalid ========
[22:49:55] [PASSED] Unknown
[22:49:55] [PASSED] VGA
[22:49:55] [PASSED] DVI-I
[22:49:55] [PASSED] DVI-D
[22:49:55] [PASSED] DVI-A
[22:49:55] [PASSED] Composite
[22:49:55] [PASSED] SVIDEO
[22:49:55] [PASSED] LVDS
[22:49:55] [PASSED] Component
[22:49:55] [PASSED] DIN
[22:49:55] [PASSED] DP
[22:49:55] [PASSED] TV
[22:49:55] [PASSED] eDP
[22:49:55] [PASSED] Virtual
[22:49:55] [PASSED] DSI
[22:49:55] [PASSED] DPI
[22:49:55] [PASSED] Writeback
[22:49:55] [PASSED] SPI
[22:49:55] [PASSED] USB
[22:49:55] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:49:55] ============ [PASSED] drmm_connector_hdmi_init =============
[22:49:55] ============= drmm_connector_init (3 subtests) =============
[22:49:55] [PASSED] drm_test_drmm_connector_init
[22:49:55] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:49:55] ========= drm_test_drmm_connector_init_type_valid =========
[22:49:55] [PASSED] Unknown
[22:49:55] [PASSED] VGA
[22:49:55] [PASSED] DVI-I
[22:49:55] [PASSED] DVI-D
[22:49:55] [PASSED] DVI-A
[22:49:55] [PASSED] Composite
[22:49:55] [PASSED] SVIDEO
[22:49:55] [PASSED] LVDS
[22:49:55] [PASSED] Component
[22:49:55] [PASSED] DIN
[22:49:55] [PASSED] DP
[22:49:55] [PASSED] HDMI-A
[22:49:55] [PASSED] HDMI-B
[22:49:55] [PASSED] TV
[22:49:55] [PASSED] eDP
[22:49:55] [PASSED] Virtual
[22:49:55] [PASSED] DSI
[22:49:55] [PASSED] DPI
[22:49:55] [PASSED] Writeback
[22:49:55] [PASSED] SPI
[22:49:55] [PASSED] USB
[22:49:55] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:49:55] =============== [PASSED] drmm_connector_init ===============
[22:49:55] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_init
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:49:55] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[22:49:55] [PASSED] Unknown
[22:49:55] [PASSED] VGA
[22:49:55] [PASSED] DVI-I
[22:49:55] [PASSED] DVI-D
[22:49:55] [PASSED] DVI-A
[22:49:55] [PASSED] Composite
[22:49:55] [PASSED] SVIDEO
[22:49:55] [PASSED] LVDS
[22:49:55] [PASSED] Component
[22:49:55] [PASSED] DIN
[22:49:55] [PASSED] DP
[22:49:55] [PASSED] HDMI-A
[22:49:55] [PASSED] HDMI-B
[22:49:55] [PASSED] TV
[22:49:55] [PASSED] eDP
[22:49:55] [PASSED] Virtual
[22:49:55] [PASSED] DSI
[22:49:55] [PASSED] DPI
[22:49:55] [PASSED] Writeback
[22:49:55] [PASSED] SPI
[22:49:55] [PASSED] USB
[22:49:55] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:49:55] ======== drm_test_drm_connector_dynamic_init_name =========
[22:49:55] [PASSED] Unknown
[22:49:55] [PASSED] VGA
[22:49:55] [PASSED] DVI-I
[22:49:55] [PASSED] DVI-D
[22:49:55] [PASSED] DVI-A
[22:49:55] [PASSED] Composite
[22:49:55] [PASSED] SVIDEO
[22:49:55] [PASSED] LVDS
[22:49:55] [PASSED] Component
[22:49:55] [PASSED] DIN
[22:49:55] [PASSED] DP
[22:49:55] [PASSED] HDMI-A
[22:49:55] [PASSED] HDMI-B
[22:49:55] [PASSED] TV
[22:49:55] [PASSED] eDP
[22:49:55] [PASSED] Virtual
[22:49:55] [PASSED] DSI
[22:49:55] [PASSED] DPI
[22:49:55] [PASSED] Writeback
[22:49:55] [PASSED] SPI
[22:49:55] [PASSED] USB
[22:49:55] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:49:55] =========== [PASSED] drm_connector_dynamic_init ============
[22:49:55] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:49:55] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:49:55] ======= drm_connector_dynamic_register (7 subtests) ========
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:49:55] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:49:55] ========= [PASSED] drm_connector_dynamic_register ==========
[22:49:55] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:49:55] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:49:55] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:49:55] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:49:55] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:49:55] ========== drm_test_get_tv_mode_from_name_valid ===========
[22:49:55] [PASSED] NTSC
[22:49:55] [PASSED] NTSC-443
[22:49:55] [PASSED] NTSC-J
[22:49:55] [PASSED] PAL
[22:49:55] [PASSED] PAL-M
[22:49:55] [PASSED] PAL-N
[22:49:55] [PASSED] SECAM
[22:49:55] [PASSED] Mono
[22:49:55] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:49:55] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:49:55] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:49:55] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:49:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:49:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:49:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:49:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:49:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:49:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:49:55] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[22:49:55] [PASSED] VIC 96
[22:49:55] [PASSED] VIC 97
[22:49:55] [PASSED] VIC 101
[22:49:55] [PASSED] VIC 102
[22:49:55] [PASSED] VIC 106
[22:49:55] [PASSED] VIC 107
[22:49:55] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:49:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:49:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:49:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:49:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:49:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:49:55] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:49:55] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:49:55] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[22:49:55] [PASSED] Automatic
[22:49:55] [PASSED] Full
[22:49:55] [PASSED] Limited 16:235
[22:49:55] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:49:55] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:49:55] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:49:55] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:49:55] === drm_test_drm_hdmi_connector_get_output_format_name ====
[22:49:55] [PASSED] RGB
[22:49:55] [PASSED] YUV 4:2:0
[22:49:55] [PASSED] YUV 4:2:2
[22:49:55] [PASSED] YUV 4:4:4
[22:49:55] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:49:55] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:49:55] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:49:55] ============= drm_damage_helper (21 subtests) ==============
[22:49:55] [PASSED] drm_test_damage_iter_no_damage
[22:49:55] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:49:55] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:49:55] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:49:55] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:49:55] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:49:55] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:49:55] [PASSED] drm_test_damage_iter_simple_damage
[22:49:55] [PASSED] drm_test_damage_iter_single_damage
[22:49:55] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:49:55] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:49:55] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:49:55] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:49:55] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:49:55] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:49:55] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:49:55] [PASSED] drm_test_damage_iter_damage
[22:49:55] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:49:55] [PASSED] drm_test_damage_iter_damage_one_outside
[22:49:55] [PASSED] drm_test_damage_iter_damage_src_moved
[22:49:55] [PASSED] drm_test_damage_iter_damage_not_visible
[22:49:55] ================ [PASSED] drm_damage_helper ================
[22:49:55] ============== drm_dp_mst_helper (3 subtests) ==============
[22:49:55] ============== drm_test_dp_mst_calc_pbn_mode ==============
[22:49:55] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:49:55] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:49:55] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:49:55] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:49:55] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:49:55] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:49:55] ============== drm_test_dp_mst_calc_pbn_div ===============
[22:49:55] [PASSED] Link rate 2000000 lane count 4
[22:49:55] [PASSED] Link rate 2000000 lane count 2
[22:49:55] [PASSED] Link rate 2000000 lane count 1
[22:49:55] [PASSED] Link rate 1350000 lane count 4
[22:49:55] [PASSED] Link rate 1350000 lane count 2
[22:49:55] [PASSED] Link rate 1350000 lane count 1
[22:49:55] [PASSED] Link rate 1000000 lane count 4
[22:49:55] [PASSED] Link rate 1000000 lane count 2
[22:49:55] [PASSED] Link rate 1000000 lane count 1
[22:49:55] [PASSED] Link rate 810000 lane count 4
[22:49:55] [PASSED] Link rate 810000 lane count 2
[22:49:55] [PASSED] Link rate 810000 lane count 1
[22:49:55] [PASSED] Link rate 540000 lane count 4
[22:49:55] [PASSED] Link rate 540000 lane count 2
[22:49:55] [PASSED] Link rate 540000 lane count 1
[22:49:55] [PASSED] Link rate 270000 lane count 4
[22:49:55] [PASSED] Link rate 270000 lane count 2
[22:49:55] [PASSED] Link rate 270000 lane count 1
[22:49:55] [PASSED] Link rate 162000 lane count 4
[22:49:55] [PASSED] Link rate 162000 lane count 2
[22:49:55] [PASSED] Link rate 162000 lane count 1
[22:49:55] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:49:55] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[22:49:55] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:49:55] [PASSED] DP_POWER_UP_PHY with port number
[22:49:55] [PASSED] DP_POWER_DOWN_PHY with port number
[22:49:55] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:49:55] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:49:55] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:49:55] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:49:55] [PASSED] DP_QUERY_PAYLOAD with port number
[22:49:55] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:49:55] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:49:55] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:49:55] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:49:55] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:49:55] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:49:55] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:49:55] [PASSED] DP_REMOTE_I2C_READ with port number
[22:49:55] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:49:55] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:49:55] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:49:55] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:49:55] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:49:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:49:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:49:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:49:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:49:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:49:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:49:55] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:49:55] ================ [PASSED] drm_dp_mst_helper ================
[22:49:55] ================== drm_exec (7 subtests) ===================
[22:49:55] [PASSED] sanitycheck
[22:49:55] [PASSED] test_lock
[22:49:55] [PASSED] test_lock_unlock
[22:49:55] [PASSED] test_duplicates
[22:49:55] [PASSED] test_prepare
[22:49:55] [PASSED] test_prepare_array
[22:49:55] [PASSED] test_multiple_loops
[22:49:55] ==================== [PASSED] drm_exec =====================
[22:49:55] =========== drm_format_helper_test (17 subtests) ===========
[22:49:55] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:49:55] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:49:55] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:49:55] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:49:55] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:49:55] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:49:55] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:49:55] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:49:55] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:49:55] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:49:55] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:49:55] ============== drm_test_fb_xrgb8888_to_mono ===============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:49:55] ==================== drm_test_fb_swab =====================
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ================ [PASSED] drm_test_fb_swab =================
[22:49:55] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:49:55] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[22:49:55] [PASSED] single_pixel_source_buffer
[22:49:55] [PASSED] single_pixel_clip_rectangle
[22:49:55] [PASSED] well_known_colors
[22:49:55] [PASSED] destination_pitch
[22:49:55] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:49:55] ================= drm_test_fb_clip_offset =================
[22:49:55] [PASSED] pass through
[22:49:55] [PASSED] horizontal offset
[22:49:55] [PASSED] vertical offset
[22:49:55] [PASSED] horizontal and vertical offset
[22:49:55] [PASSED] horizontal offset (custom pitch)
[22:49:55] [PASSED] vertical offset (custom pitch)
[22:49:55] [PASSED] horizontal and vertical offset (custom pitch)
[22:49:55] ============= [PASSED] drm_test_fb_clip_offset =============
[22:49:55] =================== drm_test_fb_memcpy ====================
[22:49:55] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:49:55] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:49:55] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:49:55] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:49:55] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:49:55] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:49:55] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:49:55] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:49:55] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:49:55] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:49:55] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:49:55] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:49:55] =============== [PASSED] drm_test_fb_memcpy ================
[22:49:55] ============= [PASSED] drm_format_helper_test ==============
[22:49:55] ================= drm_format (18 subtests) =================
[22:49:55] [PASSED] drm_test_format_block_width_invalid
[22:49:55] [PASSED] drm_test_format_block_width_one_plane
[22:49:55] [PASSED] drm_test_format_block_width_two_plane
[22:49:55] [PASSED] drm_test_format_block_width_three_plane
[22:49:55] [PASSED] drm_test_format_block_width_tiled
[22:49:55] [PASSED] drm_test_format_block_height_invalid
[22:49:55] [PASSED] drm_test_format_block_height_one_plane
[22:49:55] [PASSED] drm_test_format_block_height_two_plane
[22:49:55] [PASSED] drm_test_format_block_height_three_plane
[22:49:55] [PASSED] drm_test_format_block_height_tiled
[22:49:55] [PASSED] drm_test_format_min_pitch_invalid
[22:49:55] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:49:55] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:49:55] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:49:55] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:49:55] [PASSED] drm_test_format_min_pitch_two_plane
[22:49:55] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:49:55] [PASSED] drm_test_format_min_pitch_tiled
[22:49:55] =================== [PASSED] drm_format ====================
[22:49:55] ============== drm_framebuffer (10 subtests) ===============
[22:49:55] ========== drm_test_framebuffer_check_src_coords ==========
[22:49:55] [PASSED] Success: source fits into fb
[22:49:55] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:49:55] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:49:55] [PASSED] Fail: overflowing fb with source width
[22:49:55] [PASSED] Fail: overflowing fb with source height
[22:49:55] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:49:55] [PASSED] drm_test_framebuffer_cleanup
[22:49:55] =============== drm_test_framebuffer_create ===============
[22:49:55] [PASSED] ABGR8888 normal sizes
[22:49:55] [PASSED] ABGR8888 max sizes
[22:49:55] [PASSED] ABGR8888 pitch greater than min required
[22:49:55] [PASSED] ABGR8888 pitch less than min required
[22:49:55] [PASSED] ABGR8888 Invalid width
[22:49:55] [PASSED] ABGR8888 Invalid buffer handle
[22:49:55] [PASSED] No pixel format
[22:49:55] [PASSED] ABGR8888 Width 0
[22:49:55] [PASSED] ABGR8888 Height 0
[22:49:55] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:49:55] [PASSED] ABGR8888 Large buffer offset
[22:49:55] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:49:55] [PASSED] ABGR8888 Invalid flag
[22:49:55] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:49:55] [PASSED] ABGR8888 Valid buffer modifier
[22:49:55] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:49:55] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:49:55] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:49:55] [PASSED] NV12 Normal sizes
[22:49:55] [PASSED] NV12 Max sizes
[22:49:55] [PASSED] NV12 Invalid pitch
[22:49:55] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:49:55] [PASSED] NV12 different modifier per-plane
[22:49:55] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:49:55] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:49:55] [PASSED] NV12 Modifier for inexistent plane
[22:49:55] [PASSED] NV12 Handle for inexistent plane
[22:49:55] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:49:55] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:49:55] [PASSED] YVU420 Normal sizes
[22:49:55] [PASSED] YVU420 Max sizes
[22:49:55] [PASSED] YVU420 Invalid pitch
[22:49:55] [PASSED] YVU420 Different pitches
[22:49:55] [PASSED] YVU420 Different buffer offsets/pitches
[22:49:55] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:49:55] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:49:55] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:49:55] [PASSED] YVU420 Valid modifier
[22:49:55] [PASSED] YVU420 Different modifiers per plane
[22:49:55] [PASSED] YVU420 Modifier for inexistent plane
[22:49:55] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:49:55] [PASSED] X0L2 Normal sizes
[22:49:55] [PASSED] X0L2 Max sizes
[22:49:55] [PASSED] X0L2 Invalid pitch
[22:49:55] [PASSED] X0L2 Pitch greater than minimum required
[22:49:55] [PASSED] X0L2 Handle for inexistent plane
[22:49:55] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:49:55] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:49:55] [PASSED] X0L2 Valid modifier
[22:49:55] [PASSED] X0L2 Modifier for inexistent plane
[22:49:55] =========== [PASSED] drm_test_framebuffer_create ===========
[22:49:55] [PASSED] drm_test_framebuffer_free
[22:49:55] [PASSED] drm_test_framebuffer_init
[22:49:55] [PASSED] drm_test_framebuffer_init_bad_format
[22:49:55] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:49:55] [PASSED] drm_test_framebuffer_lookup
[22:49:55] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:49:55] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:49:55] ================= [PASSED] drm_framebuffer =================
[22:49:55] ================ drm_gem_shmem (8 subtests) ================
[22:49:55] [PASSED] drm_gem_shmem_test_obj_create
[22:49:55] [PASSED] drm_gem_shmem_test_obj_create_private
[22:49:55] [PASSED] drm_gem_shmem_test_pin_pages
[22:49:55] [PASSED] drm_gem_shmem_test_vmap
[22:49:55] [PASSED] drm_gem_shmem_test_get_sg_table
[22:49:55] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:49:55] [PASSED] drm_gem_shmem_test_madvise
[22:49:55] [PASSED] drm_gem_shmem_test_purge
[22:49:55] ================== [PASSED] drm_gem_shmem ==================
[22:49:55] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[22:49:55] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:49:55] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:49:55] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:49:55] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:49:55] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:49:55] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:49:55] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[22:49:55] [PASSED] Automatic
[22:49:55] [PASSED] Full
[22:49:55] [PASSED] Limited 16:235
[22:49:55] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:49:55] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:49:55] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:49:55] [PASSED] drm_test_check_disable_connector
[22:49:55] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:49:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:49:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:49:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:49:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:49:55] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:49:55] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:49:55] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:49:55] [PASSED] drm_test_check_output_bpc_dvi
[22:49:55] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:49:55] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:49:55] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:49:55] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:49:55] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:49:55] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:49:55] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:49:55] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:49:55] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:49:55] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:49:55] [PASSED] drm_test_check_broadcast_rgb_value
[22:49:55] [PASSED] drm_test_check_bpc_8_value
[22:49:55] [PASSED] drm_test_check_bpc_10_value
[22:49:55] [PASSED] drm_test_check_bpc_12_value
[22:49:55] [PASSED] drm_test_check_format_value
[22:49:55] [PASSED] drm_test_check_tmds_char_value
[22:49:55] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:49:55] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[22:49:55] [PASSED] drm_test_check_mode_valid
[22:49:55] [PASSED] drm_test_check_mode_valid_reject
[22:49:55] [PASSED] drm_test_check_mode_valid_reject_rate
[22:49:55] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:49:55] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:49:55] ================= drm_managed (2 subtests) =================
[22:49:55] [PASSED] drm_test_managed_release_action
[22:49:55] [PASSED] drm_test_managed_run_action
[22:49:55] =================== [PASSED] drm_managed ===================
[22:49:55] =================== drm_mm (6 subtests) ====================
[22:49:55] [PASSED] drm_test_mm_init
[22:49:55] [PASSED] drm_test_mm_debug
[22:49:55] [PASSED] drm_test_mm_align32
[22:49:55] [PASSED] drm_test_mm_align64
[22:49:55] [PASSED] drm_test_mm_lowest
[22:49:55] [PASSED] drm_test_mm_highest
[22:49:55] ===================== [PASSED] drm_mm ======================
[22:49:55] ============= drm_modes_analog_tv (5 subtests) =============
[22:49:55] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:49:55] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:49:55] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:49:55] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:49:55] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:49:55] =============== [PASSED] drm_modes_analog_tv ===============
[22:49:55] ============== drm_plane_helper (2 subtests) ===============
[22:49:55] =============== drm_test_check_plane_state ================
[22:49:55] [PASSED] clipping_simple
[22:49:55] [PASSED] clipping_rotate_reflect
[22:49:55] [PASSED] positioning_simple
[22:49:55] [PASSED] upscaling
[22:49:55] [PASSED] downscaling
[22:49:55] [PASSED] rounding1
[22:49:55] [PASSED] rounding2
[22:49:55] [PASSED] rounding3
[22:49:55] [PASSED] rounding4
[22:49:55] =========== [PASSED] drm_test_check_plane_state ============
[22:49:55] =========== drm_test_check_invalid_plane_state ============
[22:49:55] [PASSED] positioning_invalid
[22:49:55] [PASSED] upscaling_invalid
[22:49:55] [PASSED] downscaling_invalid
[22:49:55] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:49:55] ================ [PASSED] drm_plane_helper =================
[22:49:55] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:49:55] ====== drm_test_connector_helper_tv_get_modes_check =======
[22:49:55] [PASSED] None
[22:49:55] [PASSED] PAL
[22:49:55] [PASSED] NTSC
[22:49:55] [PASSED] Both, NTSC Default
[22:49:55] [PASSED] Both, PAL Default
[22:49:55] [PASSED] Both, NTSC Default, with PAL on command-line
[22:49:55] [PASSED] Both, PAL Default, with NTSC on command-line
[22:49:55] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:49:55] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:49:55] ================== drm_rect (9 subtests) ===================
[22:49:55] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:49:55] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:49:55] [PASSED] drm_test_rect_clip_scaled_clipped
[22:49:55] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:49:55] ================= drm_test_rect_intersect =================
[22:49:55] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:49:55] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:49:55] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:49:55] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:49:55] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:49:55] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:49:55] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:49:55] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:49:55] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:49:55] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:49:55] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:49:55] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:49:55] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:49:55] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:49:55] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:49:55] ============= [PASSED] drm_test_rect_intersect =============
[22:49:55] ================ drm_test_rect_calc_hscale ================
[22:49:55] [PASSED] normal use
[22:49:55] [PASSED] out of max range
[22:49:55] [PASSED] out of min range
[22:49:55] [PASSED] zero dst
[22:49:55] [PASSED] negative src
[22:49:55] [PASSED] negative dst
[22:49:55] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:49:55] ================ drm_test_rect_calc_vscale ================
[22:49:55] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[22:49:55] [PASSED] out of max range
[22:49:55] [PASSED] out of min range
[22:49:55] [PASSED] zero dst
[22:49:55] [PASSED] negative src
[22:49:55] [PASSED] negative dst
[22:49:55] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:49:55] ================== drm_test_rect_rotate ===================
[22:49:55] [PASSED] reflect-x
[22:49:55] [PASSED] reflect-y
[22:49:55] [PASSED] rotate-0
[22:49:55] [PASSED] rotate-90
[22:49:55] [PASSED] rotate-180
[22:49:55] [PASSED] rotate-270
[22:49:55] ============== [PASSED] drm_test_rect_rotate ===============
[22:49:55] ================ drm_test_rect_rotate_inv =================
[22:49:55] [PASSED] reflect-x
[22:49:55] [PASSED] reflect-y
[22:49:55] [PASSED] rotate-0
[22:49:55] [PASSED] rotate-90
[22:49:55] [PASSED] rotate-180
[22:49:55] [PASSED] rotate-270
[22:49:55] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:49:55] ==================== [PASSED] drm_rect =====================
[22:49:55] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:49:55] ============ drm_test_sysfb_build_fourcc_list =============
[22:49:55] [PASSED] no native formats
[22:49:55] [PASSED] XRGB8888 as native format
[22:49:55] [PASSED] remove duplicates
[22:49:55] [PASSED] convert alpha formats
[22:49:55] [PASSED] random formats
[22:49:55] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:49:55] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:49:55] ================== drm_fixp (2 subtests) ===================
[22:49:55] [PASSED] drm_test_int2fixp
[22:49:55] [PASSED] drm_test_sm2fixp
[22:49:55] ==================== [PASSED] drm_fixp =====================
[22:49:55] ============================================================
[22:49:55] Testing complete. Ran 624 tests: passed: 624
[22:49:55] Elapsed time: 27.418s total, 1.697s configuring, 25.301s building, 0.381s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:49:55] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:49:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:50:06] Starting KUnit Kernel (1/1)...
[22:50:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:50:06] ================= ttm_device (5 subtests) ==================
[22:50:06] [PASSED] ttm_device_init_basic
[22:50:06] [PASSED] ttm_device_init_multiple
[22:50:06] [PASSED] ttm_device_fini_basic
[22:50:06] [PASSED] ttm_device_init_no_vma_man
[22:50:06] ================== ttm_device_init_pools ==================
[22:50:06] [PASSED] No DMA allocations, no DMA32 required
[22:50:06] [PASSED] DMA allocations, DMA32 required
[22:50:06] [PASSED] No DMA allocations, DMA32 required
[22:50:06] [PASSED] DMA allocations, no DMA32 required
[22:50:06] ============== [PASSED] ttm_device_init_pools ==============
[22:50:06] =================== [PASSED] ttm_device ====================
[22:50:06] ================== ttm_pool (8 subtests) ===================
[22:50:06] ================== ttm_pool_alloc_basic ===================
[22:50:06] [PASSED] One page
[22:50:06] [PASSED] More than one page
[22:50:06] [PASSED] Above the allocation limit
[22:50:06] [PASSED] One page, with coherent DMA mappings enabled
[22:50:06] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:50:06] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:50:06] ============== ttm_pool_alloc_basic_dma_addr ==============
[22:50:06] [PASSED] One page
[22:50:06] [PASSED] More than one page
[22:50:06] [PASSED] Above the allocation limit
[22:50:06] [PASSED] One page, with coherent DMA mappings enabled
[22:50:06] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:50:06] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:50:06] [PASSED] ttm_pool_alloc_order_caching_match
[22:50:06] [PASSED] ttm_pool_alloc_caching_mismatch
[22:50:06] [PASSED] ttm_pool_alloc_order_mismatch
[22:50:06] [PASSED] ttm_pool_free_dma_alloc
[22:50:06] [PASSED] ttm_pool_free_no_dma_alloc
[22:50:06] [PASSED] ttm_pool_fini_basic
[22:50:06] ==================== [PASSED] ttm_pool =====================
[22:50:06] ================ ttm_resource (8 subtests) =================
[22:50:06] ================= ttm_resource_init_basic =================
[22:50:06] [PASSED] Init resource in TTM_PL_SYSTEM
[22:50:06] [PASSED] Init resource in TTM_PL_VRAM
[22:50:06] [PASSED] Init resource in a private placement
[22:50:06] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:50:06] ============= [PASSED] ttm_resource_init_basic =============
[22:50:06] [PASSED] ttm_resource_init_pinned
[22:50:06] [PASSED] ttm_resource_fini_basic
[22:50:06] [PASSED] ttm_resource_manager_init_basic
[22:50:06] [PASSED] ttm_resource_manager_usage_basic
[22:50:06] [PASSED] ttm_resource_manager_set_used_basic
[22:50:06] [PASSED] ttm_sys_man_alloc_basic
[22:50:06] [PASSED] ttm_sys_man_free_basic
[22:50:06] ================== [PASSED] ttm_resource ===================
[22:50:06] =================== ttm_tt (15 subtests) ===================
[22:50:06] ==================== ttm_tt_init_basic ====================
[22:50:06] [PASSED] Page-aligned size
[22:50:06] [PASSED] Extra pages requested
[22:50:06] ================ [PASSED] ttm_tt_init_basic ================
[22:50:06] [PASSED] ttm_tt_init_misaligned
[22:50:06] [PASSED] ttm_tt_fini_basic
[22:50:06] [PASSED] ttm_tt_fini_sg
[22:50:06] [PASSED] ttm_tt_fini_shmem
[22:50:06] [PASSED] ttm_tt_create_basic
[22:50:06] [PASSED] ttm_tt_create_invalid_bo_type
[22:50:06] [PASSED] ttm_tt_create_ttm_exists
[22:50:06] [PASSED] ttm_tt_create_failed
[22:50:06] [PASSED] ttm_tt_destroy_basic
[22:50:06] [PASSED] ttm_tt_populate_null_ttm
[22:50:06] [PASSED] ttm_tt_populate_populated_ttm
[22:50:06] [PASSED] ttm_tt_unpopulate_basic
[22:50:06] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:50:06] [PASSED] ttm_tt_swapin_basic
[22:50:06] ===================== [PASSED] ttm_tt ======================
[22:50:06] =================== ttm_bo (14 subtests) ===================
[22:50:06] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[22:50:06] [PASSED] Cannot be interrupted and sleeps
[22:50:06] [PASSED] Cannot be interrupted, locks straight away
[22:50:06] [PASSED] Can be interrupted, sleeps
[22:50:06] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:50:06] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:50:06] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:50:06] [PASSED] ttm_bo_reserve_double_resv
[22:50:06] [PASSED] ttm_bo_reserve_interrupted
[22:50:06] [PASSED] ttm_bo_reserve_deadlock
[22:50:06] [PASSED] ttm_bo_unreserve_basic
[22:50:06] [PASSED] ttm_bo_unreserve_pinned
[22:50:06] [PASSED] ttm_bo_unreserve_bulk
[22:50:06] [PASSED] ttm_bo_fini_basic
[22:50:06] [PASSED] ttm_bo_fini_shared_resv
[22:50:06] [PASSED] ttm_bo_pin_basic
[22:50:06] [PASSED] ttm_bo_pin_unpin_resource
[22:50:06] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:50:06] ===================== [PASSED] ttm_bo ======================
[22:50:06] ============== ttm_bo_validate (21 subtests) ===============
[22:50:06] ============== ttm_bo_init_reserved_sys_man ===============
[22:50:06] [PASSED] Buffer object for userspace
[22:50:06] [PASSED] Kernel buffer object
[22:50:06] [PASSED] Shared buffer object
[22:50:06] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:50:06] ============== ttm_bo_init_reserved_mock_man ==============
[22:50:06] [PASSED] Buffer object for userspace
[22:50:06] [PASSED] Kernel buffer object
[22:50:06] [PASSED] Shared buffer object
[22:50:06] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:50:06] [PASSED] ttm_bo_init_reserved_resv
[22:50:06] ================== ttm_bo_validate_basic ==================
[22:50:06] [PASSED] Buffer object for userspace
[22:50:06] [PASSED] Kernel buffer object
[22:50:06] [PASSED] Shared buffer object
[22:50:06] ============== [PASSED] ttm_bo_validate_basic ==============
[22:50:06] [PASSED] ttm_bo_validate_invalid_placement
[22:50:06] ============= ttm_bo_validate_same_placement ==============
[22:50:06] [PASSED] System manager
[22:50:06] [PASSED] VRAM manager
[22:50:06] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:50:06] [PASSED] ttm_bo_validate_failed_alloc
[22:50:06] [PASSED] ttm_bo_validate_pinned
[22:50:06] [PASSED] ttm_bo_validate_busy_placement
[22:50:06] ================ ttm_bo_validate_multihop =================
[22:50:06] [PASSED] Buffer object for userspace
[22:50:06] [PASSED] Kernel buffer object
[22:50:06] [PASSED] Shared buffer object
[22:50:06] ============ [PASSED] ttm_bo_validate_multihop =============
[22:50:06] ========== ttm_bo_validate_no_placement_signaled ==========
[22:50:06] [PASSED] Buffer object in system domain, no page vector
[22:50:06] [PASSED] Buffer object in system domain with an existing page vector
[22:50:06] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:50:06] ======== ttm_bo_validate_no_placement_not_signaled ========
[22:50:06] [PASSED] Buffer object for userspace
[22:50:06] [PASSED] Kernel buffer object
[22:50:06] [PASSED] Shared buffer object
[22:50:06] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:50:06] [PASSED] ttm_bo_validate_move_fence_signaled
[22:50:06] ========= ttm_bo_validate_move_fence_not_signaled =========
[22:50:06] [PASSED] Waits for GPU
[22:50:06] [PASSED] Tries to lock straight away
[22:50:06] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:50:06] [PASSED] ttm_bo_validate_happy_evict
[22:50:06] [PASSED] ttm_bo_validate_all_pinned_evict
[22:50:06] [PASSED] ttm_bo_validate_allowed_only_evict
[22:50:06] [PASSED] ttm_bo_validate_deleted_evict
[22:50:06] [PASSED] ttm_bo_validate_busy_domain_evict
[22:50:06] [PASSED] ttm_bo_validate_evict_gutting
[22:50:06] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[22:50:06] ================= [PASSED] ttm_bo_validate =================
[22:50:06] ============================================================
[22:50:06] Testing complete. Ran 101 tests: passed: 101
[22:50:06] Elapsed time: 11.359s total, 1.662s configuring, 9.481s building, 0.176s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ Xe.CI.BAT: failure for drm/xe: Add more info to powergate_info debugfs
2026-01-15 22:40 [PATCH 0/2] drm/xe: Add more info to powergate_info debugfs Vinay Belgaumkar
` (3 preceding siblings ...)
2026-01-15 22:50 ` ✓ CI.KUnit: success " Patchwork
@ 2026-01-15 23:36 ` Patchwork
2026-01-16 4:34 ` ✗ Xe.CI.Full: " Patchwork
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-01-15 23:36 UTC (permalink / raw)
To: Vinay Belgaumkar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1681 bytes --]
== Series Details ==
Series: drm/xe: Add more info to powergate_info debugfs
URL : https://patchwork.freedesktop.org/series/160164/
State : failure
== Summary ==
CI Bug Log - changes from xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823_BAT -> xe-pw-160164v1_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-160164v1_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-160164v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-160164v1_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_waitfence@engine:
- bat-bmg-2: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/bat-bmg-2/igt@xe_waitfence@engine.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/bat-bmg-2/igt@xe_waitfence@engine.html
Build changes
-------------
* Linux: xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823 -> xe-pw-160164v1
IGT_8704: 8704
xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823: 7488f4d19288e0919c24ffc8b2c375e8b7c8a823
xe-pw-160164v1: 160164v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/index.html
[-- Attachment #2: Type: text/html, Size: 2266 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ Xe.CI.Full: failure for drm/xe: Add more info to powergate_info debugfs
2026-01-15 22:40 [PATCH 0/2] drm/xe: Add more info to powergate_info debugfs Vinay Belgaumkar
` (4 preceding siblings ...)
2026-01-15 23:36 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-01-16 4:34 ` Patchwork
5 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-01-16 4:34 UTC (permalink / raw)
To: Vinay Belgaumkar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 31089 bytes --]
== Series Details ==
Series: drm/xe: Add more info to powergate_info debugfs
URL : https://patchwork.freedesktop.org/series/160164/
State : failure
== Summary ==
CI Bug Log - changes from xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823_FULL -> xe-pw-160164v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-160164v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-160164v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-160164v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ad-dp2-hdmi-a3:
- shard-bmg: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ad-dp2-hdmi-a3.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ad-dp2-hdmi-a3.html
* igt@xe_exec_store@basic-all@engine-drm_xe_engine_class_render-instance-0-tile-0:
- shard-lnl: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-lnl-5/igt@xe_exec_store@basic-all@engine-drm_xe_engine_class_render-instance-0-tile-0.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-lnl-2/igt@xe_exec_store@basic-all@engine-drm_xe_engine_class_render-instance-0-tile-0.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@xe_exec_basic@no-exec-bindexecqueue-userptr-invalidate@rcs0}:
- shard-lnl: [PASS][5] -> [DMESG-WARN][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-lnl-5/igt@xe_exec_basic@no-exec-bindexecqueue-userptr-invalidate@rcs0.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-lnl-2/igt@xe_exec_basic@no-exec-bindexecqueue-userptr-invalidate@rcs0.html
Known issues
------------
Here are the changes found in xe-pw-160164v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2327]) +3 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-3/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#1124]) +5 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#610])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_bw@linear-tiling-1-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#367]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2887]) +11 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2724])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2252]) +3 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][14] ([Intel XE#1178] / [Intel XE#3304]) +1 other test fail
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2390] / [Intel XE#6974])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@dp-mst-type-0-hdcp14:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#6974])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
* igt@kms_cursor_crc@cursor-onscreen-256x85:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2320]) +3 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_cursor_crc@cursor-onscreen-256x85.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2321])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#1508]) +1 other test skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-3/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_feature_discovery@display-3x:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2373])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_feature_discovery@display-3x.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-bmg: [PASS][21] -> [FAIL][22] ([Intel XE#7030])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2293] / [Intel XE#2380])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2293])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2311]) +19 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#4141]) +10 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#7061]) +5 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2313]) +14 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_hdr@bpc-switch@pipe-a-dp-2:
- shard-bmg: [PASS][29] -> [ABORT][30] ([Intel XE#6740]) +3 other tests abort
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-2/igt@kms_hdr@bpc-switch@pipe-a-dp-2.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@kms_hdr@bpc-switch@pipe-a-dp-2.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#6911])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#2501])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#6886]) +4 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a.html
* igt@kms_pm_rpm@i2c:
- shard-bmg: NOTRUN -> [FAIL][34] ([Intel XE#5099])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_pm_rpm@i2c.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html
* igt@kms_psr@psr2-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +7 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_psr@psr2-primary-page-flip.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#3414] / [Intel XE#3904])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
* igt@kms_scaling_modes@scaling-mode-full:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2413])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_scaling_modes@scaling-mode-full.html
* igt@kms_sharpness_filter@invalid-filter-with-scaling-mode:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#6503]) +2 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: NOTRUN -> [FAIL][40] ([Intel XE#1729])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
* igt@xe_create@multigpu-create-massive-size:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2504])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@xe_create@multigpu-create-massive-size.html
* igt@xe_eudebug@connect-user:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#4837]) +5 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_eudebug@connect-user.html
* igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-sram:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#4837] / [Intel XE#6665]) +2 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-sram.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2322]) +3 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_multi_queue@max-queues-preempt-mode-basic:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#6874]) +16 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@xe_exec_multi_queue@max-queues-preempt-mode-basic.html
* igt@xe_exec_system_allocator@process-many-large-mmap-free-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#4943]) +10 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_exec_system_allocator@process-many-large-mmap-free-huge-nomemset.html
* igt@xe_mmap@small-bar:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#586])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_mmap@small-bar.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72]) -> ([PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [SKIP][98]) ([Intel XE#2457])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-9/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-3/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-10/igt@xe_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-1/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-9/igt@xe_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-1/igt@xe_module_load@load.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-2/igt@xe_module_load@load.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-8/igt@xe_module_load@load.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-10/igt@xe_module_load@load.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-9/igt@xe_module_load@load.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-9/igt@xe_module_load@load.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-2/igt@xe_module_load@load.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-2/igt@xe_module_load@load.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-7/igt@xe_module_load@load.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-7/igt@xe_module_load@load.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-9/igt@xe_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-8/igt@xe_module_load@load.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-7/igt@xe_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-10/igt@xe_module_load@load.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-7/igt@xe_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-8/igt@xe_module_load@load.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-1/igt@xe_module_load@load.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-3/igt@xe_module_load@load.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-3/igt@xe_module_load@load.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-3/igt@xe_module_load@load.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-10/igt@xe_module_load@load.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-10/igt@xe_module_load@load.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@xe_module_load@load.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@xe_module_load@load.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-10/igt@xe_module_load@load.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-1/igt@xe_module_load@load.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@xe_module_load@load.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@xe_module_load@load.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-8/igt@xe_module_load@load.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-3/igt@xe_module_load@load.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-3/igt@xe_module_load@load.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-3/igt@xe_module_load@load.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@xe_module_load@load.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@xe_module_load@load.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_module_load@load.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-8/igt@xe_module_load@load.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-8/igt@xe_module_load@load.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-8/igt@xe_module_load@load.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-1/igt@xe_module_load@load.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-1/igt@xe_module_load@load.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@xe_module_load@load.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@xe_module_load@load.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_module_load@load.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_module_load@load.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-1/igt@xe_module_load@load.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_module_load@load.html
* igt@xe_multigpu_svm@mgpu-pagefault-conflict:
- shard-bmg: NOTRUN -> [SKIP][99] ([Intel XE#6964]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_multigpu_svm@mgpu-pagefault-conflict.html
* igt@xe_peer2peer@read:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#2427] / [Intel XE#6953])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-7/igt@xe_peer2peer@read.html
* igt@xe_pm@d3cold-basic:
- shard-bmg: NOTRUN -> [SKIP][101] ([Intel XE#2284])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_pm@d3cold-basic.html
* igt@xe_pxp@pxp-stale-bo-bind-post-rpm:
- shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#4733]) +1 other test skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_pxp@pxp-stale-bo-bind-post-rpm.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#944])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_query@multigpu-query-pxp-status.html
#### Possible fixes ####
* igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-a-hdmi-a-3:
- shard-bmg: [ABORT][104] ([Intel XE#3970]) -> [PASS][105] +1 other test pass
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-a-hdmi-a-3.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-3/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-a-hdmi-a-3.html
* igt@kms_cursor_crc@cursor-sliding-256x256:
- shard-bmg: [FAIL][106] ([Intel XE#6747]) -> [PASS][107] +1 other test pass
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-2/igt@kms_cursor_crc@cursor-sliding-256x256.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@kms_cursor_crc@cursor-sliding-256x256.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2:
- shard-bmg: [FAIL][108] ([Intel XE#7030]) -> [PASS][109] +1 other test pass
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-10/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2.html
* igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2:
- shard-bmg: [ABORT][110] ([Intel XE#6740]) -> [PASS][111] +3 other tests pass
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-9/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html
* {igt@xe_exec_basic@no-exec-bindexecqueue-userptr-invalidate@vcs0}:
- shard-lnl: [DMESG-WARN][112] -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-lnl-5/igt@xe_exec_basic@no-exec-bindexecqueue-userptr-invalidate@vcs0.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-lnl-2/igt@xe_exec_basic@no-exec-bindexecqueue-userptr-invalidate@vcs0.html
* igt@xe_exec_system_allocator@partial-remap-no-cpu-fault:
- shard-bmg: [ABORT][114] -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-2/igt@xe_exec_system_allocator@partial-remap-no-cpu-fault.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-2/igt@xe_exec_system_allocator@partial-remap-no-cpu-fault.html
#### Warnings ####
* igt@kms_big_fb@x-tiled-8bpp-rotate-270:
- shard-lnl: [SKIP][116] ([Intel XE#1407]) -> [ABORT][117] ([Intel XE#4760])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-lnl-5/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-lnl-5/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][118] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][119] ([Intel XE#3544])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][120] ([Intel XE#2426]) -> [SKIP][121] ([Intel XE#2509])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_pat@pat-sanity:
- shard-lnl: [DMESG-WARN][122] -> [DMESG-WARN][123] ([Intel XE#4537])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823/shard-lnl-5/igt@xe_pat@pat-sanity.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/shard-lnl-2/igt@xe_pat@pat-sanity.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
[Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4537]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4537
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5099]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5099
[Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
[Intel XE#6747]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6747
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7030]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7030
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823 -> xe-pw-160164v1
IGT_8704: 8704
xe-4388-7488f4d19288e0919c24ffc8b2c375e8b7c8a823: 7488f4d19288e0919c24ffc8b2c375e8b7c8a823
xe-pw-160164v1: 160164v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160164v1/index.html
[-- Attachment #2: Type: text/html, Size: 33761 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add forcewake status to powergate_info
2026-01-15 22:40 ` [PATCH 2/2] drm/xe: Add forcewake status " Vinay Belgaumkar
@ 2026-01-30 15:20 ` Nilawar, Badal
2026-01-30 17:34 ` Belgaumkar, Vinay
0 siblings, 1 reply; 14+ messages in thread
From: Nilawar, Badal @ 2026-01-30 15:20 UTC (permalink / raw)
To: Vinay Belgaumkar, intel-xe
On 16-01-2026 04:10, Vinay Belgaumkar wrote:
> Dump forcewake status and ref counts for all domains as part
> of this debugfs. This is the sample output from gt1-
>
> $ cat /sys/kernel/debug/dri//0/gt1/powergate_info
> Media Power Gating Enabled: yes
> Media Slice0 Power Gate Status: down
> GSC Power Gate Status: down
> GT.ref_count=0, GT.forcewake=0x10000
> VDBox0.ref_count=0, VDBox0.forcewake=0x10000
> VEBox0.ref_count=0, VEBox0.forcewake=0x10000
> GSC.ref_count=0, GSC.forcewake=0x10000
>
> Signed-off-by: Vinay Belgaumkar<vinay.belgaumkar@intel.com>
> ---
> drivers/gpu/drm/xe/xe_force_wake.c | 46 ++++++++++++++++++++++++++----
> drivers/gpu/drm/xe/xe_force_wake.h | 11 +++++++
> drivers/gpu/drm/xe/xe_gt_idle.c | 20 +++++++++++++
> 3 files changed, 71 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index 76e054f314ee..197e2197bd0a 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
> @@ -148,12 +148,6 @@ static int domain_sleep_wait(struct xe_gt *gt,
> return __domain_wait(gt, domain, false);
> }
>
> -#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
> - for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
> - for_each_if((domain__ = ((fw__)->domains + \
> - (ffs(tmp__) - 1))) && \
> - domain__->reg_ctl.addr)
> -
> /**
> * xe_force_wake_get() : Increase the domain refcount
> * @fw: struct xe_force_wake
> @@ -266,3 +260,43 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
> str_plural(hweight_long(ack_fail)), ack_fail);
> }
> +
> +const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
> +{
> + switch (id) {
> + case XE_FW_DOMAIN_ID_GT:
> + return "GT";
> + case XE_FW_DOMAIN_ID_RENDER:
> + return "Render";
> + case XE_FW_DOMAIN_ID_MEDIA:
> + return "Media";
> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX0:
> + return "VDBox0";
> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX1:
> + return "VDBox1";
> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX2:
> + return "VDBox2";
> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX3:
> + return "VDBox3";
> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX4:
> + return "VDBox4";
> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX5:
> + return "VDBox5";
> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX6:
> + return "VDBox6";
> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX7:
> + return "VDBox7";
> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX0:
> + return "VEBox0";
> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX1:
> + return "VEBox1";
> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX2:
> + return "VEBox2";
> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX3:
> + return "VEBox3";
> + case XE_FW_DOMAIN_ID_GSC:
> + return "GSC";
How about creating static look up table.
static const char * const domain_names[] = {
[XE_FW_DOMAIN_ID_GT] = "GT",
[XE_FW_DOMAIN_ID_RENDER] = "Render",
[XE_FW_DOMAIN_ID_MEDIA] = "Media",
[XE_FW_DOMAIN_ID_MEDIA_VDBOX0] = "VDBox0",
[XE_FW_DOMAIN_ID_MEDIA_VDBOX1] = "VDBox1",
[XE_FW_DOMAIN_ID_MEDIA_VDBOX2] = "VDBox2",
[XE_FW_DOMAIN_ID_MEDIA_VDBOX3] = "VDBox3",
[XE_FW_DOMAIN_ID_MEDIA_VDBOX4] = "VDBox4",
[XE_FW_DOMAIN_ID_MEDIA_VDBOX5] = "VDBox5",
[XE_FW_DOMAIN_ID_MEDIA_VDBOX6] = "VDBox6",
[XE_FW_DOMAIN_ID_MEDIA_VDBOX7] = "VDBox7",
[XE_FW_DOMAIN_ID_MEDIA_VEBOX0] = "VEBox0",
[XE_FW_DOMAIN_ID_MEDIA_VEBOX1] = "VEBox1",
[XE_FW_DOMAIN_ID_MEDIA_VEBOX2] = "VEBox2",
[XE_FW_DOMAIN_ID_MEDIA_VEBOX3] = "VEBox3",
[XE_FW_DOMAIN_ID_GSC] = "GSC",
};
if (id < ARRAY_SIZE(domain_names) && domain_names[id])
return domain_names[id];
Thanks,
Badal
> + default:
> + return "Unknown";
> + }
> +}
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
> index 1e2198f6a007..f7690cb34ef7 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.h
> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
> @@ -19,6 +19,17 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> enum xe_force_wake_domains domains);
> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
>
> +const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
> +
> +#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
> + for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
> + for_each_if((domain__ = ((fw__)->domains + \
> + (ffs(tmp__) - 1))) && \
> + domain__->reg_ctl.addr)
> +
> +#define for_each_fw_domain(domain__, fw__, tmp__) \
> + for_each_fw_domain_masked(domain__, fw__->initialized_domains, fw__, tmp__)
> +
> static inline int
> xe_force_wake_ref(struct xe_force_wake *fw,
> enum xe_force_wake_domains domain)
> diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c b/drivers/gpu/drm/xe/xe_gt_idle.c
> index 52436dcb6381..8e36202f1a4f 100644
> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
> @@ -169,6 +169,24 @@ void xe_gt_idle_disable_pg(struct xe_gt *gt)
> xe_mmio_write32(>->mmio, POWERGATE_ENABLE, gtidle->powergate_enable);
> }
>
> +static void force_wake_domains_show(struct xe_gt *gt, struct drm_printer *p)
> +{
> + struct xe_force_wake_domain *domain;
> + struct xe_force_wake *fw = gt_to_fw(gt);
> + unsigned int tmp;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&fw->lock, flags);
> + for_each_fw_domain(domain, fw, tmp) {
> + drm_printf(p, "%s.ref_count=%u, %s.fwake=0x%x\n",
> + xe_force_wake_domain_to_str(domain->id),
> + READ_ONCE(domain->ref),
> + xe_force_wake_domain_to_str(domain->id),
> + xe_mmio_read32(>->mmio, domain->reg_ctl));
> + }
> + spin_unlock_irqrestore(&fw->lock, flags);
> +}
> +
> /**
> * xe_gt_idle_pg_print - Xe powergating info
> * @gt: GT object
> @@ -260,6 +278,8 @@ int xe_gt_idle_pg_print(struct xe_gt *gt, struct drm_printer *p)
> str_up_down(pg_status & GSC_AWAKE_STATUS));
> }
>
> + force_wake_domains_show(gt, p);
> +
> return 0;
> }
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/xe: Add GSC to powergate_info
2026-01-15 22:40 ` [PATCH 1/2] drm/xe: Add GSC to powergate_info Vinay Belgaumkar
@ 2026-01-30 15:23 ` Nilawar, Badal
0 siblings, 0 replies; 14+ messages in thread
From: Nilawar, Badal @ 2026-01-30 15:23 UTC (permalink / raw)
To: Vinay Belgaumkar, intel-xe
On 16-01-2026 04:10, Vinay Belgaumkar wrote:
> Add GSC powergate status to the existing debugfs.
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
> drivers/gpu/drm/xe/xe_gt_idle.c | 5 +++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 24fc64fc832e..7d3ec1fe4f7f 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -367,6 +367,7 @@
> #define FORCEWAKE_RENDER XE_REG(0xa278)
>
> #define POWERGATE_DOMAIN_STATUS XE_REG(0xa2a0)
> +#define GSC_AWAKE_STATUS REG_BIT(8)
> #define MEDIA_SLICE3_AWAKE_STATUS REG_BIT(4)
> #define MEDIA_SLICE2_AWAKE_STATUS REG_BIT(3)
> #define MEDIA_SLICE1_AWAKE_STATUS REG_BIT(2)
> diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c b/drivers/gpu/drm/xe/xe_gt_idle.c
> index c1c9bec3c487..52436dcb6381 100644
> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
> @@ -255,6 +255,11 @@ int xe_gt_idle_pg_print(struct xe_gt *gt, struct drm_printer *p)
> drm_printf(p, "Media Samplers Power Gating Enabled: %s\n",
> str_yes_no(pg_enabled & MEDIA_SAMPLERS_POWERGATE_ENABLE));
>
> + if (gt->info.engine_mask & BIT(XE_HW_ENGINE_GSCCS0)) {
> + drm_printf(p, "GSC Power Gate Status: %s\n",
> + str_up_down(pg_status & GSC_AWAKE_STATUS));
> + }
> +
Looks good to me.
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>
Thanks,
Badal
> return 0;
> }
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add forcewake status to powergate_info
2026-01-30 15:20 ` Nilawar, Badal
@ 2026-01-30 17:34 ` Belgaumkar, Vinay
2026-02-02 6:38 ` Nilawar, Badal
0 siblings, 1 reply; 14+ messages in thread
From: Belgaumkar, Vinay @ 2026-01-30 17:34 UTC (permalink / raw)
To: Nilawar, Badal, intel-xe
On 1/30/2026 7:20 AM, Nilawar, Badal wrote:
>
> On 16-01-2026 04:10, Vinay Belgaumkar wrote:
>> Dump forcewake status and ref counts for all domains as part
>> of this debugfs. This is the sample output from gt1-
>>
>> $ cat /sys/kernel/debug/dri//0/gt1/powergate_info
>> Media Power Gating Enabled: yes
>> Media Slice0 Power Gate Status: down
>> GSC Power Gate Status: down
>> GT.ref_count=0, GT.forcewake=0x10000
>> VDBox0.ref_count=0, VDBox0.forcewake=0x10000
>> VEBox0.ref_count=0, VEBox0.forcewake=0x10000
>> GSC.ref_count=0, GSC.forcewake=0x10000
>>
>> Signed-off-by: Vinay Belgaumkar<vinay.belgaumkar@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_force_wake.c | 46 ++++++++++++++++++++++++++----
>> drivers/gpu/drm/xe/xe_force_wake.h | 11 +++++++
>> drivers/gpu/drm/xe/xe_gt_idle.c | 20 +++++++++++++
>> 3 files changed, 71 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c
>> b/drivers/gpu/drm/xe/xe_force_wake.c
>> index 76e054f314ee..197e2197bd0a 100644
>> --- a/drivers/gpu/drm/xe/xe_force_wake.c
>> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
>> @@ -148,12 +148,6 @@ static int domain_sleep_wait(struct xe_gt *gt,
>> return __domain_wait(gt, domain, false);
>> }
>> -#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
>> - for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>> - for_each_if((domain__ = ((fw__)->domains + \
>> - (ffs(tmp__) - 1))) && \
>> - domain__->reg_ctl.addr)
>> -
>> /**
>> * xe_force_wake_get() : Increase the domain refcount
>> * @fw: struct xe_force_wake
>> @@ -266,3 +260,43 @@ void xe_force_wake_put(struct xe_force_wake *fw,
>> unsigned int fw_ref)
>> xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to
>> acknowledge sleep request\n",
>> str_plural(hweight_long(ack_fail)), ack_fail);
>> }
>> +
>> +const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id
>> id)
>> +{
>> + switch (id) {
>> + case XE_FW_DOMAIN_ID_GT:
>> + return "GT";
>> + case XE_FW_DOMAIN_ID_RENDER:
>> + return "Render";
>> + case XE_FW_DOMAIN_ID_MEDIA:
>> + return "Media";
>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX0:
>> + return "VDBox0";
>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX1:
>> + return "VDBox1";
>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX2:
>> + return "VDBox2";
>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX3:
>> + return "VDBox3";
>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX4:
>> + return "VDBox4";
>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX5:
>> + return "VDBox5";
>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX6:
>> + return "VDBox6";
>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX7:
>> + return "VDBox7";
>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX0:
>> + return "VEBox0";
>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX1:
>> + return "VEBox1";
>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX2:
>> + return "VEBox2";
>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX3:
>> + return "VEBox3";
>> + case XE_FW_DOMAIN_ID_GSC:
>> + return "GSC";
>
> How about creating static look up table.
>
> static const char * const domain_names[] = {
> [XE_FW_DOMAIN_ID_GT] = "GT",
> [XE_FW_DOMAIN_ID_RENDER] = "Render",
> [XE_FW_DOMAIN_ID_MEDIA] = "Media",
> [XE_FW_DOMAIN_ID_MEDIA_VDBOX0] = "VDBox0",
> [XE_FW_DOMAIN_ID_MEDIA_VDBOX1] = "VDBox1",
> [XE_FW_DOMAIN_ID_MEDIA_VDBOX2] = "VDBox2",
> [XE_FW_DOMAIN_ID_MEDIA_VDBOX3] = "VDBox3",
> [XE_FW_DOMAIN_ID_MEDIA_VDBOX4] = "VDBox4",
> [XE_FW_DOMAIN_ID_MEDIA_VDBOX5] = "VDBox5",
> [XE_FW_DOMAIN_ID_MEDIA_VDBOX6] = "VDBox6",
> [XE_FW_DOMAIN_ID_MEDIA_VDBOX7] = "VDBox7",
> [XE_FW_DOMAIN_ID_MEDIA_VEBOX0] = "VEBox0",
> [XE_FW_DOMAIN_ID_MEDIA_VEBOX1] = "VEBox1",
> [XE_FW_DOMAIN_ID_MEDIA_VEBOX2] = "VEBox2",
> [XE_FW_DOMAIN_ID_MEDIA_VEBOX3] = "VEBox3",
> [XE_FW_DOMAIN_ID_GSC] = "GSC",
> };
>
> if (id < ARRAY_SIZE(domain_names) && domain_names[id])
> return domain_names[id];
I was trying to make it a little more dynamic where, if something
changes in the FW table, we don't need to update 2 locations.
Thanks,
Vinay.
>
> Thanks,
> Badal
>
>> + default:
>> + return "Unknown";
>> + }
>> +}
>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h
>> b/drivers/gpu/drm/xe/xe_force_wake.h
>> index 1e2198f6a007..f7690cb34ef7 100644
>> --- a/drivers/gpu/drm/xe/xe_force_wake.h
>> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
>> @@ -19,6 +19,17 @@ unsigned int __must_check xe_force_wake_get(struct
>> xe_force_wake *fw,
>> enum xe_force_wake_domains domains);
>> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
>> +const char *xe_force_wake_domain_to_str(enum
>> xe_force_wake_domain_id id);
>> +
>> +#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
>> + for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>> + for_each_if((domain__ = ((fw__)->domains + \
>> + (ffs(tmp__) - 1))) && \
>> + domain__->reg_ctl.addr)
>> +
>> +#define for_each_fw_domain(domain__, fw__, tmp__) \
>> + for_each_fw_domain_masked(domain__, fw__->initialized_domains,
>> fw__, tmp__)
>> +
>> static inline int
>> xe_force_wake_ref(struct xe_force_wake *fw,
>> enum xe_force_wake_domains domain)
>> diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c
>> b/drivers/gpu/drm/xe/xe_gt_idle.c
>> index 52436dcb6381..8e36202f1a4f 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
>> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
>> @@ -169,6 +169,24 @@ void xe_gt_idle_disable_pg(struct xe_gt *gt)
>> xe_mmio_write32(>->mmio, POWERGATE_ENABLE,
>> gtidle->powergate_enable);
>> }
>> +static void force_wake_domains_show(struct xe_gt *gt, struct
>> drm_printer *p)
>> +{
>> + struct xe_force_wake_domain *domain;
>> + struct xe_force_wake *fw = gt_to_fw(gt);
>> + unsigned int tmp;
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&fw->lock, flags);
>> + for_each_fw_domain(domain, fw, tmp) {
>> + drm_printf(p, "%s.ref_count=%u, %s.fwake=0x%x\n",
>> + xe_force_wake_domain_to_str(domain->id),
>> + READ_ONCE(domain->ref),
>> + xe_force_wake_domain_to_str(domain->id),
>> + xe_mmio_read32(>->mmio, domain->reg_ctl));
>> + }
>> + spin_unlock_irqrestore(&fw->lock, flags);
>> +}
>> +
>> /**
>> * xe_gt_idle_pg_print - Xe powergating info
>> * @gt: GT object
>> @@ -260,6 +278,8 @@ int xe_gt_idle_pg_print(struct xe_gt *gt, struct
>> drm_printer *p)
>> str_up_down(pg_status & GSC_AWAKE_STATUS));
>> }
>> + force_wake_domains_show(gt, p);
>> +
>> return 0;
>> }
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add forcewake status to powergate_info
2026-01-30 17:34 ` Belgaumkar, Vinay
@ 2026-02-02 6:38 ` Nilawar, Badal
2026-02-02 17:12 ` Belgaumkar, Vinay
0 siblings, 1 reply; 14+ messages in thread
From: Nilawar, Badal @ 2026-02-02 6:38 UTC (permalink / raw)
To: Belgaumkar, Vinay, intel-xe
On 30-01-2026 23:04, Belgaumkar, Vinay wrote:
>
> On 1/30/2026 7:20 AM, Nilawar, Badal wrote:
>>
>> On 16-01-2026 04:10, Vinay Belgaumkar wrote:
>>> Dump forcewake status and ref counts for all domains as part
>>> of this debugfs. This is the sample output from gt1-
>>>
>>> $ cat /sys/kernel/debug/dri//0/gt1/powergate_info
>>> Media Power Gating Enabled: yes
>>> Media Slice0 Power Gate Status: down
>>> GSC Power Gate Status: down
>>> GT.ref_count=0, GT.forcewake=0x10000
>>> VDBox0.ref_count=0, VDBox0.forcewake=0x10000
>>> VEBox0.ref_count=0, VEBox0.forcewake=0x10000
>>> GSC.ref_count=0, GSC.forcewake=0x10000
>>>
>>> Signed-off-by: Vinay Belgaumkar<vinay.belgaumkar@intel.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_force_wake.c | 46
>>> ++++++++++++++++++++++++++----
>>> drivers/gpu/drm/xe/xe_force_wake.h | 11 +++++++
>>> drivers/gpu/drm/xe/xe_gt_idle.c | 20 +++++++++++++
>>> 3 files changed, 71 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c
>>> b/drivers/gpu/drm/xe/xe_force_wake.c
>>> index 76e054f314ee..197e2197bd0a 100644
>>> --- a/drivers/gpu/drm/xe/xe_force_wake.c
>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
>>> @@ -148,12 +148,6 @@ static int domain_sleep_wait(struct xe_gt *gt,
>>> return __domain_wait(gt, domain, false);
>>> }
>>> -#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
>>> - for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>>> - for_each_if((domain__ = ((fw__)->domains + \
>>> - (ffs(tmp__) - 1))) && \
>>> - domain__->reg_ctl.addr)
>>> -
>>> /**
>>> * xe_force_wake_get() : Increase the domain refcount
>>> * @fw: struct xe_force_wake
>>> @@ -266,3 +260,43 @@ void xe_force_wake_put(struct xe_force_wake
>>> *fw, unsigned int fw_ref)
>>> xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to
>>> acknowledge sleep request\n",
>>> str_plural(hweight_long(ack_fail)), ack_fail);
>>> }
>>> +
>>> +const char *xe_force_wake_domain_to_str(enum
>>> xe_force_wake_domain_id id)
>>> +{
>>> + switch (id) {
>>> + case XE_FW_DOMAIN_ID_GT:
>>> + return "GT";
>>> + case XE_FW_DOMAIN_ID_RENDER:
>>> + return "Render";
>>> + case XE_FW_DOMAIN_ID_MEDIA:
>>> + return "Media";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX0:
>>> + return "VDBox0";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX1:
>>> + return "VDBox1";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX2:
>>> + return "VDBox2";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX3:
>>> + return "VDBox3";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX4:
>>> + return "VDBox4";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX5:
>>> + return "VDBox5";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX6:
>>> + return "VDBox6";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX7:
>>> + return "VDBox7";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX0:
>>> + return "VEBox0";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX1:
>>> + return "VEBox1";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX2:
>>> + return "VEBox2";
>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX3:
>>> + return "VEBox3";
>>> + case XE_FW_DOMAIN_ID_GSC:
>>> + return "GSC";
>>
>> How about creating static look up table.
>>
>> static const char * const domain_names[] = {
>> [XE_FW_DOMAIN_ID_GT] = "GT",
>> [XE_FW_DOMAIN_ID_RENDER] = "Render",
>> [XE_FW_DOMAIN_ID_MEDIA] = "Media",
>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX0] = "VDBox0",
>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX1] = "VDBox1",
>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX2] = "VDBox2",
>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX3] = "VDBox3",
>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX4] = "VDBox4",
>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX5] = "VDBox5",
>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX6] = "VDBox6",
>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX7] = "VDBox7",
>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX0] = "VEBox0",
>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX1] = "VEBox1",
>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX2] = "VEBox2",
>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX3] = "VEBox3",
>> [XE_FW_DOMAIN_ID_GSC] = "GSC",
>> };
>>
>> if (id < ARRAY_SIZE(domain_names) && domain_names[id])
>> return domain_names[id];
>
> I was trying to make it a little more dynamic where, if something
> changes in the FW table, we don't need to update 2 locations.
Ok, but even with a switch-case statement, you’d still need to update it
whenever a new enum value is added.
So, updates in two places can’t be completely avoided.
>
> Thanks,
>
> Vinay.
>
>>
>> Thanks,
>> Badal
>>
>>> + default:
>>> + return "Unknown";
>>> + }
>>> +}
>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h
>>> b/drivers/gpu/drm/xe/xe_force_wake.h
>>> index 1e2198f6a007..f7690cb34ef7 100644
>>> --- a/drivers/gpu/drm/xe/xe_force_wake.h
>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
>>> @@ -19,6 +19,17 @@ unsigned int __must_check
>>> xe_force_wake_get(struct xe_force_wake *fw,
>>> enum xe_force_wake_domains domains);
>>> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int
>>> fw_ref);
>>> +const char *xe_force_wake_domain_to_str(enum
>>> xe_force_wake_domain_id id);
>>> +
>>> +#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
>>> + for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>>> + for_each_if((domain__ = ((fw__)->domains + \
>>> + (ffs(tmp__) - 1))) && \
>>> + domain__->reg_ctl.addr)
>>> +
>>> +#define for_each_fw_domain(domain__, fw__, tmp__) \
>>> + for_each_fw_domain_masked(domain__, fw__->initialized_domains,
>>> fw__, tmp__)
>>> +
>>> static inline int
>>> xe_force_wake_ref(struct xe_force_wake *fw,
>>> enum xe_force_wake_domains domain)
>>> diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c
>>> b/drivers/gpu/drm/xe/xe_gt_idle.c
>>> index 52436dcb6381..8e36202f1a4f 100644
>>> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
>>> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
>>> @@ -169,6 +169,24 @@ void xe_gt_idle_disable_pg(struct xe_gt *gt)
>>> xe_mmio_write32(>->mmio, POWERGATE_ENABLE,
>>> gtidle->powergate_enable);
>>> }
>>> +static void force_wake_domains_show(struct xe_gt *gt, struct
>>> drm_printer *p)
>>> +{
>>> + struct xe_force_wake_domain *domain;
>>> + struct xe_force_wake *fw = gt_to_fw(gt);
>>> + unsigned int tmp;
>>> + unsigned long flags;
>>> +
>>> + spin_lock_irqsave(&fw->lock, flags);
>>> + for_each_fw_domain(domain, fw, tmp) {
>>> + drm_printf(p, "%s.ref_count=%u, %s.fwake=0x%x\n",
>>> + xe_force_wake_domain_to_str(domain->id),
>>> + READ_ONCE(domain->ref),
>>> + xe_force_wake_domain_to_str(domain->id),
>>> + xe_mmio_read32(>->mmio, domain->reg_ctl));
>>> + }
>>> + spin_unlock_irqrestore(&fw->lock, flags);
>>> +}
>>> +
>>> /**
>>> * xe_gt_idle_pg_print - Xe powergating info
>>> * @gt: GT object
>>> @@ -260,6 +278,8 @@ int xe_gt_idle_pg_print(struct xe_gt *gt, struct
>>> drm_printer *p)
>>> str_up_down(pg_status & GSC_AWAKE_STATUS));
>>> }
>>> + force_wake_domains_show(gt, p);
>>> +
>>> return 0;
>>> }
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add forcewake status to powergate_info
2026-02-02 6:38 ` Nilawar, Badal
@ 2026-02-02 17:12 ` Belgaumkar, Vinay
2026-02-02 17:20 ` Nilawar, Badal
0 siblings, 1 reply; 14+ messages in thread
From: Belgaumkar, Vinay @ 2026-02-02 17:12 UTC (permalink / raw)
To: Nilawar, Badal, intel-xe
On 2/1/2026 10:38 PM, Nilawar, Badal wrote:
>
> On 30-01-2026 23:04, Belgaumkar, Vinay wrote:
>>
>> On 1/30/2026 7:20 AM, Nilawar, Badal wrote:
>>>
>>> On 16-01-2026 04:10, Vinay Belgaumkar wrote:
>>>> Dump forcewake status and ref counts for all domains as part
>>>> of this debugfs. This is the sample output from gt1-
>>>>
>>>> $ cat /sys/kernel/debug/dri//0/gt1/powergate_info
>>>> Media Power Gating Enabled: yes
>>>> Media Slice0 Power Gate Status: down
>>>> GSC Power Gate Status: down
>>>> GT.ref_count=0, GT.forcewake=0x10000
>>>> VDBox0.ref_count=0, VDBox0.forcewake=0x10000
>>>> VEBox0.ref_count=0, VEBox0.forcewake=0x10000
>>>> GSC.ref_count=0, GSC.forcewake=0x10000
>>>>
>>>> Signed-off-by: Vinay Belgaumkar<vinay.belgaumkar@intel.com>
>>>> ---
>>>> drivers/gpu/drm/xe/xe_force_wake.c | 46
>>>> ++++++++++++++++++++++++++----
>>>> drivers/gpu/drm/xe/xe_force_wake.h | 11 +++++++
>>>> drivers/gpu/drm/xe/xe_gt_idle.c | 20 +++++++++++++
>>>> 3 files changed, 71 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c
>>>> b/drivers/gpu/drm/xe/xe_force_wake.c
>>>> index 76e054f314ee..197e2197bd0a 100644
>>>> --- a/drivers/gpu/drm/xe/xe_force_wake.c
>>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
>>>> @@ -148,12 +148,6 @@ static int domain_sleep_wait(struct xe_gt *gt,
>>>> return __domain_wait(gt, domain, false);
>>>> }
>>>> -#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
>>>> - for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>>>> - for_each_if((domain__ = ((fw__)->domains + \
>>>> - (ffs(tmp__) - 1))) && \
>>>> - domain__->reg_ctl.addr)
>>>> -
>>>> /**
>>>> * xe_force_wake_get() : Increase the domain refcount
>>>> * @fw: struct xe_force_wake
>>>> @@ -266,3 +260,43 @@ void xe_force_wake_put(struct xe_force_wake
>>>> *fw, unsigned int fw_ref)
>>>> xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to
>>>> acknowledge sleep request\n",
>>>> str_plural(hweight_long(ack_fail)), ack_fail);
>>>> }
>>>> +
>>>> +const char *xe_force_wake_domain_to_str(enum
>>>> xe_force_wake_domain_id id)
>>>> +{
>>>> + switch (id) {
>>>> + case XE_FW_DOMAIN_ID_GT:
>>>> + return "GT";
>>>> + case XE_FW_DOMAIN_ID_RENDER:
>>>> + return "Render";
>>>> + case XE_FW_DOMAIN_ID_MEDIA:
>>>> + return "Media";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX0:
>>>> + return "VDBox0";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX1:
>>>> + return "VDBox1";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX2:
>>>> + return "VDBox2";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX3:
>>>> + return "VDBox3";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX4:
>>>> + return "VDBox4";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX5:
>>>> + return "VDBox5";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX6:
>>>> + return "VDBox6";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX7:
>>>> + return "VDBox7";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX0:
>>>> + return "VEBox0";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX1:
>>>> + return "VEBox1";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX2:
>>>> + return "VEBox2";
>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX3:
>>>> + return "VEBox3";
>>>> + case XE_FW_DOMAIN_ID_GSC:
>>>> + return "GSC";
>>>
>>> How about creating static look up table.
>>>
>>> static const char * const domain_names[] = {
>>> [XE_FW_DOMAIN_ID_GT] = "GT",
>>> [XE_FW_DOMAIN_ID_RENDER] = "Render",
>>> [XE_FW_DOMAIN_ID_MEDIA] = "Media",
>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX0] = "VDBox0",
>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX1] = "VDBox1",
>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX2] = "VDBox2",
>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX3] = "VDBox3",
>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX4] = "VDBox4",
>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX5] = "VDBox5",
>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX6] = "VDBox6",
>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX7] = "VDBox7",
>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX0] = "VEBox0",
>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX1] = "VEBox1",
>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX2] = "VEBox2",
>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX3] = "VEBox3",
>>> [XE_FW_DOMAIN_ID_GSC] = "GSC",
>>> };
>>>
>>> if (id < ARRAY_SIZE(domain_names) && domain_names[id])
>>> return domain_names[id];
>>
>> I was trying to make it a little more dynamic where, if something
>> changes in the FW table, we don't need to update 2 locations.
>
> Ok, but even with a switch-case statement, you’d still need to update
> it whenever a new enum value is added.
> So, updates in two places can’t be completely avoided.
True. Similar thing was needed in sriov and guc code, and switch/case
was used there. So, just following the same method to keep it uniform
might be better? I believe i915 used the array definition method.
Thanks,
Vinay.
>
>>
>> Thanks,
>>
>> Vinay.
>>
>>>
>>> Thanks,
>>> Badal
>>>
>>>> + default:
>>>> + return "Unknown";
>>>> + }
>>>> +}
>>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h
>>>> b/drivers/gpu/drm/xe/xe_force_wake.h
>>>> index 1e2198f6a007..f7690cb34ef7 100644
>>>> --- a/drivers/gpu/drm/xe/xe_force_wake.h
>>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
>>>> @@ -19,6 +19,17 @@ unsigned int __must_check
>>>> xe_force_wake_get(struct xe_force_wake *fw,
>>>> enum xe_force_wake_domains domains);
>>>> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int
>>>> fw_ref);
>>>> +const char *xe_force_wake_domain_to_str(enum
>>>> xe_force_wake_domain_id id);
>>>> +
>>>> +#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
>>>> + for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>>>> + for_each_if((domain__ = ((fw__)->domains + \
>>>> + (ffs(tmp__) - 1))) && \
>>>> + domain__->reg_ctl.addr)
>>>> +
>>>> +#define for_each_fw_domain(domain__, fw__, tmp__) \
>>>> + for_each_fw_domain_masked(domain__, fw__->initialized_domains,
>>>> fw__, tmp__)
>>>> +
>>>> static inline int
>>>> xe_force_wake_ref(struct xe_force_wake *fw,
>>>> enum xe_force_wake_domains domain)
>>>> diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c
>>>> b/drivers/gpu/drm/xe/xe_gt_idle.c
>>>> index 52436dcb6381..8e36202f1a4f 100644
>>>> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
>>>> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
>>>> @@ -169,6 +169,24 @@ void xe_gt_idle_disable_pg(struct xe_gt *gt)
>>>> xe_mmio_write32(>->mmio, POWERGATE_ENABLE,
>>>> gtidle->powergate_enable);
>>>> }
>>>> +static void force_wake_domains_show(struct xe_gt *gt, struct
>>>> drm_printer *p)
>>>> +{
>>>> + struct xe_force_wake_domain *domain;
>>>> + struct xe_force_wake *fw = gt_to_fw(gt);
>>>> + unsigned int tmp;
>>>> + unsigned long flags;
>>>> +
>>>> + spin_lock_irqsave(&fw->lock, flags);
>>>> + for_each_fw_domain(domain, fw, tmp) {
>>>> + drm_printf(p, "%s.ref_count=%u, %s.fwake=0x%x\n",
>>>> + xe_force_wake_domain_to_str(domain->id),
>>>> + READ_ONCE(domain->ref),
>>>> + xe_force_wake_domain_to_str(domain->id),
>>>> + xe_mmio_read32(>->mmio, domain->reg_ctl));
>>>> + }
>>>> + spin_unlock_irqrestore(&fw->lock, flags);
>>>> +}
>>>> +
>>>> /**
>>>> * xe_gt_idle_pg_print - Xe powergating info
>>>> * @gt: GT object
>>>> @@ -260,6 +278,8 @@ int xe_gt_idle_pg_print(struct xe_gt *gt,
>>>> struct drm_printer *p)
>>>> str_up_down(pg_status & GSC_AWAKE_STATUS));
>>>> }
>>>> + force_wake_domains_show(gt, p);
>>>> +
>>>> return 0;
>>>> }
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add forcewake status to powergate_info
2026-02-02 17:12 ` Belgaumkar, Vinay
@ 2026-02-02 17:20 ` Nilawar, Badal
2026-02-03 6:07 ` Nilawar, Badal
0 siblings, 1 reply; 14+ messages in thread
From: Nilawar, Badal @ 2026-02-02 17:20 UTC (permalink / raw)
To: Belgaumkar, Vinay, intel-xe
On 02-02-2026 22:42, Belgaumkar, Vinay wrote:
>
> On 2/1/2026 10:38 PM, Nilawar, Badal wrote:
>>
>> On 30-01-2026 23:04, Belgaumkar, Vinay wrote:
>>>
>>> On 1/30/2026 7:20 AM, Nilawar, Badal wrote:
>>>>
>>>> On 16-01-2026 04:10, Vinay Belgaumkar wrote:
>>>>> Dump forcewake status and ref counts for all domains as part
>>>>> of this debugfs. This is the sample output from gt1-
>>>>>
>>>>> $ cat /sys/kernel/debug/dri//0/gt1/powergate_info
>>>>> Media Power Gating Enabled: yes
>>>>> Media Slice0 Power Gate Status: down
>>>>> GSC Power Gate Status: down
>>>>> GT.ref_count=0, GT.forcewake=0x10000
>>>>> VDBox0.ref_count=0, VDBox0.forcewake=0x10000
>>>>> VEBox0.ref_count=0, VEBox0.forcewake=0x10000
>>>>> GSC.ref_count=0, GSC.forcewake=0x10000
>>>>>
>>>>> Signed-off-by: Vinay Belgaumkar<vinay.belgaumkar@intel.com>
>>>>> ---
>>>>> drivers/gpu/drm/xe/xe_force_wake.c | 46
>>>>> ++++++++++++++++++++++++++----
>>>>> drivers/gpu/drm/xe/xe_force_wake.h | 11 +++++++
>>>>> drivers/gpu/drm/xe/xe_gt_idle.c | 20 +++++++++++++
>>>>> 3 files changed, 71 insertions(+), 6 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c
>>>>> b/drivers/gpu/drm/xe/xe_force_wake.c
>>>>> index 76e054f314ee..197e2197bd0a 100644
>>>>> --- a/drivers/gpu/drm/xe/xe_force_wake.c
>>>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
>>>>> @@ -148,12 +148,6 @@ static int domain_sleep_wait(struct xe_gt *gt,
>>>>> return __domain_wait(gt, domain, false);
>>>>> }
>>>>> -#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
>>>>> - for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>>>>> - for_each_if((domain__ = ((fw__)->domains + \
>>>>> - (ffs(tmp__) - 1))) && \
>>>>> - domain__->reg_ctl.addr)
>>>>> -
>>>>> /**
>>>>> * xe_force_wake_get() : Increase the domain refcount
>>>>> * @fw: struct xe_force_wake
>>>>> @@ -266,3 +260,43 @@ void xe_force_wake_put(struct xe_force_wake
>>>>> *fw, unsigned int fw_ref)
>>>>> xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to
>>>>> acknowledge sleep request\n",
>>>>> str_plural(hweight_long(ack_fail)), ack_fail);
>>>>> }
>>>>> +
>>>>> +const char *xe_force_wake_domain_to_str(enum
>>>>> xe_force_wake_domain_id id)
>>>>> +{
>>>>> + switch (id) {
>>>>> + case XE_FW_DOMAIN_ID_GT:
>>>>> + return "GT";
>>>>> + case XE_FW_DOMAIN_ID_RENDER:
>>>>> + return "Render";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA:
>>>>> + return "Media";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX0:
>>>>> + return "VDBox0";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX1:
>>>>> + return "VDBox1";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX2:
>>>>> + return "VDBox2";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX3:
>>>>> + return "VDBox3";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX4:
>>>>> + return "VDBox4";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX5:
>>>>> + return "VDBox5";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX6:
>>>>> + return "VDBox6";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX7:
>>>>> + return "VDBox7";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX0:
>>>>> + return "VEBox0";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX1:
>>>>> + return "VEBox1";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX2:
>>>>> + return "VEBox2";
>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX3:
>>>>> + return "VEBox3";
>>>>> + case XE_FW_DOMAIN_ID_GSC:
>>>>> + return "GSC";
>>>>
>>>> How about creating static look up table.
>>>>
>>>> static const char * const domain_names[] = {
>>>> [XE_FW_DOMAIN_ID_GT] = "GT",
>>>> [XE_FW_DOMAIN_ID_RENDER] = "Render",
>>>> [XE_FW_DOMAIN_ID_MEDIA] = "Media",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX0] = "VDBox0",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX1] = "VDBox1",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX2] = "VDBox2",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX3] = "VDBox3",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX4] = "VDBox4",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX5] = "VDBox5",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX6] = "VDBox6",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX7] = "VDBox7",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX0] = "VEBox0",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX1] = "VEBox1",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX2] = "VEBox2",
>>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX3] = "VEBox3",
>>>> [XE_FW_DOMAIN_ID_GSC] = "GSC",
>>>> };
>>>>
>>>> if (id < ARRAY_SIZE(domain_names) && domain_names[id])
>>>> return domain_names[id];
>>>
>>> I was trying to make it a little more dynamic where, if something
>>> changes in the FW table, we don't need to update 2 locations.
>>
>> Ok, but even with a switch-case statement, you’d still need to update
>> it whenever a new enum value is added.
>> So, updates in two places can’t be completely avoided.
>
> True. Similar thing was needed in sriov and guc code, and switch/case
> was used there. So, just following the same method to keep it uniform
> might be better? I believe i915 used the array definition method.
In xe also its used in boot survivability, late binding and sriov etc.
But fine lets keep the switch case method.
Thanks,
Badal
>
> Thanks,
>
> Vinay.
>
>>
>>>
>>> Thanks,
>>>
>>> Vinay.
>>>
>>>>
>>>> Thanks,
>>>> Badal
>>>>
>>>>> + default:
>>>>> + return "Unknown";
>>>>> + }
>>>>> +}
>>>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h
>>>>> b/drivers/gpu/drm/xe/xe_force_wake.h
>>>>> index 1e2198f6a007..f7690cb34ef7 100644
>>>>> --- a/drivers/gpu/drm/xe/xe_force_wake.h
>>>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
>>>>> @@ -19,6 +19,17 @@ unsigned int __must_check
>>>>> xe_force_wake_get(struct xe_force_wake *fw,
>>>>> enum xe_force_wake_domains domains);
>>>>> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int
>>>>> fw_ref);
>>>>> +const char *xe_force_wake_domain_to_str(enum
>>>>> xe_force_wake_domain_id id);
>>>>> +
>>>>> +#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
>>>>> + for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>>>>> + for_each_if((domain__ = ((fw__)->domains + \
>>>>> + (ffs(tmp__) - 1))) && \
>>>>> + domain__->reg_ctl.addr)
>>>>> +
>>>>> +#define for_each_fw_domain(domain__, fw__, tmp__) \
>>>>> + for_each_fw_domain_masked(domain__,
>>>>> fw__->initialized_domains, fw__, tmp__)
>>>>> +
>>>>> static inline int
>>>>> xe_force_wake_ref(struct xe_force_wake *fw,
>>>>> enum xe_force_wake_domains domain)
>>>>> diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c
>>>>> b/drivers/gpu/drm/xe/xe_gt_idle.c
>>>>> index 52436dcb6381..8e36202f1a4f 100644
>>>>> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
>>>>> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
>>>>> @@ -169,6 +169,24 @@ void xe_gt_idle_disable_pg(struct xe_gt *gt)
>>>>> xe_mmio_write32(>->mmio, POWERGATE_ENABLE,
>>>>> gtidle->powergate_enable);
>>>>> }
>>>>> +static void force_wake_domains_show(struct xe_gt *gt, struct
>>>>> drm_printer *p)
>>>>> +{
>>>>> + struct xe_force_wake_domain *domain;
>>>>> + struct xe_force_wake *fw = gt_to_fw(gt);
>>>>> + unsigned int tmp;
>>>>> + unsigned long flags;
>>>>> +
>>>>> + spin_lock_irqsave(&fw->lock, flags);
>>>>> + for_each_fw_domain(domain, fw, tmp) {
>>>>> + drm_printf(p, "%s.ref_count=%u, %s.fwake=0x%x\n",
>>>>> + xe_force_wake_domain_to_str(domain->id),
>>>>> + READ_ONCE(domain->ref),
>>>>> + xe_force_wake_domain_to_str(domain->id),
>>>>> + xe_mmio_read32(>->mmio, domain->reg_ctl));
>>>>> + }
>>>>> + spin_unlock_irqrestore(&fw->lock, flags);
>>>>> +}
>>>>> +
>>>>> /**
>>>>> * xe_gt_idle_pg_print - Xe powergating info
>>>>> * @gt: GT object
>>>>> @@ -260,6 +278,8 @@ int xe_gt_idle_pg_print(struct xe_gt *gt,
>>>>> struct drm_printer *p)
>>>>> str_up_down(pg_status & GSC_AWAKE_STATUS));
>>>>> }
>>>>> + force_wake_domains_show(gt, p);
>>>>> +
>>>>> return 0;
>>>>> }
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/xe: Add forcewake status to powergate_info
2026-02-02 17:20 ` Nilawar, Badal
@ 2026-02-03 6:07 ` Nilawar, Badal
0 siblings, 0 replies; 14+ messages in thread
From: Nilawar, Badal @ 2026-02-03 6:07 UTC (permalink / raw)
To: Belgaumkar, Vinay, intel-xe
On 02-02-2026 22:50, Nilawar, Badal wrote:
>
> On 02-02-2026 22:42, Belgaumkar, Vinay wrote:
>>
>> On 2/1/2026 10:38 PM, Nilawar, Badal wrote:
>>>
>>> On 30-01-2026 23:04, Belgaumkar, Vinay wrote:
>>>>
>>>> On 1/30/2026 7:20 AM, Nilawar, Badal wrote:
>>>>>
>>>>> On 16-01-2026 04:10, Vinay Belgaumkar wrote:
>>>>>> Dump forcewake status and ref counts for all domains as part
>>>>>> of this debugfs. This is the sample output from gt1-
>>>>>>
>>>>>> $ cat /sys/kernel/debug/dri//0/gt1/powergate_info
>>>>>> Media Power Gating Enabled: yes
>>>>>> Media Slice0 Power Gate Status: down
>>>>>> GSC Power Gate Status: down
>>>>>> GT.ref_count=0, GT.forcewake=0x10000
>>>>>> VDBox0.ref_count=0, VDBox0.forcewake=0x10000
>>>>>> VEBox0.ref_count=0, VEBox0.forcewake=0x10000
>>>>>> GSC.ref_count=0, GSC.forcewake=0x10000
>>>>>>
>>>>>> Signed-off-by: Vinay Belgaumkar<vinay.belgaumkar@intel.com>
>>>>>> ---
>>>>>> drivers/gpu/drm/xe/xe_force_wake.c | 46
>>>>>> ++++++++++++++++++++++++++----
>>>>>> drivers/gpu/drm/xe/xe_force_wake.h | 11 +++++++
>>>>>> drivers/gpu/drm/xe/xe_gt_idle.c | 20 +++++++++++++
>>>>>> 3 files changed, 71 insertions(+), 6 deletions(-)
>>>>>>
>>>>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c
>>>>>> b/drivers/gpu/drm/xe/xe_force_wake.c
>>>>>> index 76e054f314ee..197e2197bd0a 100644
>>>>>> --- a/drivers/gpu/drm/xe/xe_force_wake.c
>>>>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
>>>>>> @@ -148,12 +148,6 @@ static int domain_sleep_wait(struct xe_gt *gt,
>>>>>> return __domain_wait(gt, domain, false);
>>>>>> }
>>>>>> -#define for_each_fw_domain_masked(domain__, mask__, fw__,
>>>>>> tmp__) \
>>>>>> - for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>>>>>> - for_each_if((domain__ = ((fw__)->domains + \
>>>>>> - (ffs(tmp__) - 1))) && \
>>>>>> - domain__->reg_ctl.addr)
>>>>>> -
>>>>>> /**
>>>>>> * xe_force_wake_get() : Increase the domain refcount
>>>>>> * @fw: struct xe_force_wake
>>>>>> @@ -266,3 +260,43 @@ void xe_force_wake_put(struct xe_force_wake
>>>>>> *fw, unsigned int fw_ref)
>>>>>> xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to
>>>>>> acknowledge sleep request\n",
>>>>>> str_plural(hweight_long(ack_fail)), ack_fail);
>>>>>> }
>>>>>> +
>>>>>> +const char *xe_force_wake_domain_to_str(enum
>>>>>> xe_force_wake_domain_id id)
>>>>>> +{
>>>>>> + switch (id) {
>>>>>> + case XE_FW_DOMAIN_ID_GT:
>>>>>> + return "GT";
>>>>>> + case XE_FW_DOMAIN_ID_RENDER:
>>>>>> + return "Render";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA:
>>>>>> + return "Media";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX0:
>>>>>> + return "VDBox0";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX1:
>>>>>> + return "VDBox1";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX2:
>>>>>> + return "VDBox2";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX3:
>>>>>> + return "VDBox3";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX4:
>>>>>> + return "VDBox4";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX5:
>>>>>> + return "VDBox5";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX6:
>>>>>> + return "VDBox6";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VDBOX7:
>>>>>> + return "VDBox7";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX0:
>>>>>> + return "VEBox0";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX1:
>>>>>> + return "VEBox1";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX2:
>>>>>> + return "VEBox2";
>>>>>> + case XE_FW_DOMAIN_ID_MEDIA_VEBOX3:
>>>>>> + return "VEBox3";
>>>>>> + case XE_FW_DOMAIN_ID_GSC:
>>>>>> + return "GSC";
>>>>>
>>>>> How about creating static look up table.
>>>>>
>>>>> static const char * const domain_names[] = {
>>>>> [XE_FW_DOMAIN_ID_GT] = "GT",
>>>>> [XE_FW_DOMAIN_ID_RENDER] = "Render",
>>>>> [XE_FW_DOMAIN_ID_MEDIA] = "Media",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX0] = "VDBox0",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX1] = "VDBox1",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX2] = "VDBox2",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX3] = "VDBox3",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX4] = "VDBox4",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX5] = "VDBox5",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX6] = "VDBox6",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VDBOX7] = "VDBox7",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX0] = "VEBox0",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX1] = "VEBox1",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX2] = "VEBox2",
>>>>> [XE_FW_DOMAIN_ID_MEDIA_VEBOX3] = "VEBox3",
>>>>> [XE_FW_DOMAIN_ID_GSC] = "GSC",
>>>>> };
>>>>>
>>>>> if (id < ARRAY_SIZE(domain_names) && domain_names[id])
>>>>> return domain_names[id];
>>>>
>>>> I was trying to make it a little more dynamic where, if something
>>>> changes in the FW table, we don't need to update 2 locations.
>>>
>>> Ok, but even with a switch-case statement, you’d still need to
>>> update it whenever a new enum value is added.
>>> So, updates in two places can’t be completely avoided.
>>
>> True. Similar thing was needed in sriov and guc code, and switch/case
>> was used there. So, just following the same method to keep it uniform
>> might be better? I believe i915 used the array definition method.
>
> In xe also its used in boot survivability, late binding and sriov etc.
> But fine lets keep the switch case method.
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>
Thanks,
Badal
>
> Thanks,
> Badal
>
>>
>> Thanks,
>>
>> Vinay.
>>
>>>
>>>>
>>>> Thanks,
>>>>
>>>> Vinay.
>>>>
>>>>>
>>>>> Thanks,
>>>>> Badal
>>>>>
>>>>>> + default:
>>>>>> + return "Unknown";
>>>>>> + }
>>>>>> +}
>>>>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h
>>>>>> b/drivers/gpu/drm/xe/xe_force_wake.h
>>>>>> index 1e2198f6a007..f7690cb34ef7 100644
>>>>>> --- a/drivers/gpu/drm/xe/xe_force_wake.h
>>>>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
>>>>>> @@ -19,6 +19,17 @@ unsigned int __must_check
>>>>>> xe_force_wake_get(struct xe_force_wake *fw,
>>>>>> enum xe_force_wake_domains domains);
>>>>>> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int
>>>>>> fw_ref);
>>>>>> +const char *xe_force_wake_domain_to_str(enum
>>>>>> xe_force_wake_domain_id id);
>>>>>> +
>>>>>> +#define for_each_fw_domain_masked(domain__, mask__, fw__, tmp__) \
>>>>>> + for (tmp__ = (mask__); tmp__; tmp__ &= ~BIT(ffs(tmp__) - 1)) \
>>>>>> + for_each_if((domain__ = ((fw__)->domains + \
>>>>>> + (ffs(tmp__) - 1))) && \
>>>>>> + domain__->reg_ctl.addr)
>>>>>> +
>>>>>> +#define for_each_fw_domain(domain__, fw__, tmp__) \
>>>>>> + for_each_fw_domain_masked(domain__,
>>>>>> fw__->initialized_domains, fw__, tmp__)
>>>>>> +
>>>>>> static inline int
>>>>>> xe_force_wake_ref(struct xe_force_wake *fw,
>>>>>> enum xe_force_wake_domains domain)
>>>>>> diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c
>>>>>> b/drivers/gpu/drm/xe/xe_gt_idle.c
>>>>>> index 52436dcb6381..8e36202f1a4f 100644
>>>>>> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
>>>>>> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
>>>>>> @@ -169,6 +169,24 @@ void xe_gt_idle_disable_pg(struct xe_gt *gt)
>>>>>> xe_mmio_write32(>->mmio, POWERGATE_ENABLE,
>>>>>> gtidle->powergate_enable);
>>>>>> }
>>>>>> +static void force_wake_domains_show(struct xe_gt *gt, struct
>>>>>> drm_printer *p)
>>>>>> +{
>>>>>> + struct xe_force_wake_domain *domain;
>>>>>> + struct xe_force_wake *fw = gt_to_fw(gt);
>>>>>> + unsigned int tmp;
>>>>>> + unsigned long flags;
>>>>>> +
>>>>>> + spin_lock_irqsave(&fw->lock, flags);
>>>>>> + for_each_fw_domain(domain, fw, tmp) {
>>>>>> + drm_printf(p, "%s.ref_count=%u, %s.fwake=0x%x\n",
>>>>>> + xe_force_wake_domain_to_str(domain->id),
>>>>>> + READ_ONCE(domain->ref),
>>>>>> + xe_force_wake_domain_to_str(domain->id),
>>>>>> + xe_mmio_read32(>->mmio, domain->reg_ctl));
>>>>>> + }
>>>>>> + spin_unlock_irqrestore(&fw->lock, flags);
>>>>>> +}
>>>>>> +
>>>>>> /**
>>>>>> * xe_gt_idle_pg_print - Xe powergating info
>>>>>> * @gt: GT object
>>>>>> @@ -260,6 +278,8 @@ int xe_gt_idle_pg_print(struct xe_gt *gt,
>>>>>> struct drm_printer *p)
>>>>>> str_up_down(pg_status & GSC_AWAKE_STATUS));
>>>>>> }
>>>>>> + force_wake_domains_show(gt, p);
>>>>>> +
>>>>>> return 0;
>>>>>> }
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2026-02-03 6:07 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-01-15 22:40 [PATCH 0/2] drm/xe: Add more info to powergate_info debugfs Vinay Belgaumkar
2026-01-15 22:40 ` [PATCH 1/2] drm/xe: Add GSC to powergate_info Vinay Belgaumkar
2026-01-30 15:23 ` Nilawar, Badal
2026-01-15 22:40 ` [PATCH 2/2] drm/xe: Add forcewake status " Vinay Belgaumkar
2026-01-30 15:20 ` Nilawar, Badal
2026-01-30 17:34 ` Belgaumkar, Vinay
2026-02-02 6:38 ` Nilawar, Badal
2026-02-02 17:12 ` Belgaumkar, Vinay
2026-02-02 17:20 ` Nilawar, Badal
2026-02-03 6:07 ` Nilawar, Badal
2026-01-15 22:48 ` ✗ CI.checkpatch: warning for drm/xe: Add more info to powergate_info debugfs Patchwork
2026-01-15 22:50 ` ✓ CI.KUnit: success " Patchwork
2026-01-15 23:36 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-01-16 4:34 ` ✗ Xe.CI.Full: " Patchwork
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox