Re: [PATCH v3 2/3] drm/xe: Avoid unconditional VRAM reads in H2G path

["Summers, Stuart" <stuart.summers@intel.com>]

On Tue, 2026-02-17 at 20:33 -0800, Matthew Brost wrote:
> desc_read() issues an VRAM read which serializes the CPU and drains

Few spelling nits in the commit message

/s/an/a/

> posted writes on dGPU platforms. The H2G tracepoint evaluated its
> arguments unconditionally, so even with tracing disabled the
> submission
> path paid the full VRAM readf latency. Guard the tracepoint with
> trace_xe_guc_ctb_h2g_enabled().
> 
> Adso move the descriptor status verification under

/s/Adso/Also/

> CONFIG_DRM_XE_DEBUG.
> This removes another unnecessary VRAM read in non-debug builfds.

/s/builfds/builds/

> 
> This results in ~10× faster H2G submission and significantly reduces
> lock contention across the driver.
> 
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_guc_ct.c | 25 ++++++++++++++++---------
>  1 file changed, 16 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c
> b/drivers/gpu/drm/xe/xe_guc_ct.c
> index ea07a27757d5..37842c93e0ee 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> @@ -939,22 +939,22 @@ static int h2g_write(struct xe_guc_ct *ct,
> const u32 *action, u32 len,
>         u32 full_len;
>         struct iosys_map map = IOSYS_MAP_INIT_OFFSET(&h2g->cmds,
>                                                          tail *
> sizeof(u32));
> -       u32 desc_status;
>  
>         full_len = len + GUC_CTB_HDR_LEN;
>  
>         lockdep_assert_held(&ct->lock);
>         xe_gt_assert(gt, full_len <= GUC_CTB_MSG_MAX_LEN);
>  
> -       desc_status = desc_read(xe, h2g, status);
> -       if (desc_status) {
> -               xe_gt_err(gt, "CT write: non-zero status: %u\n",
> desc_status);
> -               goto corrupted;
> -       }
> -
>         if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) {

Somehow in the previous rev I had read this as
CONFIG_DRM_XE_DEBUG_GUC... yeah no issue here. Mainly I want to be able
to see this in CI runs which should mostly have XE_DEBUG set.

So apart from the spelling fixes in the commit:
Reviewed-by: Stuart Summers <stuart.summers@intel.com>

Thanks,
Stuart

>                 u32 desc_tail = desc_read(xe, h2g, tail);
>                 u32 desc_head = desc_read(xe, h2g, head);
> +               u32 desc_status;
> +
> +               desc_status = desc_read(xe, h2g, status);
> +               if (desc_status) {
> +                       xe_gt_err(gt, "CT write: non-zero status:
> %u\n", desc_status);
> +                       goto corrupted;
> +               }
>  
>                 if (tail != desc_tail) {
>                         desc_write(xe, h2g, status, desc_status |
> GUC_CTB_STATUS_MISMATCH);
> @@ -1023,8 +1023,15 @@ static int h2g_write(struct xe_guc_ct *ct,
> const u32 *action, u32 len,
>         /* Update descriptor */
>         desc_write(xe, h2g, tail, h2g->info.tail);
>  
> -       trace_xe_guc_ctb_h2g(xe, gt->info.id, *(action - 1),
> full_len,
> -                            desc_read(xe, h2g, head), h2g-
> >info.tail);
> +       /*
> +        * desc_read() performs an VRAM read which serializes the CPU
> and drains
> +        * posted writes on dGPU platforms. Tracepoints evaluate
> arguments even
> +        * when disabled, so guard the event to avoid adding µs-scale
> latency to
> +        * the fast H2G submission path when tracing is not active.
> +        */
> +       if (trace_xe_guc_ctb_h2g_enabled())
> +               trace_xe_guc_ctb_h2g(xe, gt->info.id, *(action - 1),
> full_len,
> +                                    desc_read(xe, h2g, head), h2g-
> >info.tail);
>  
>         return 0;
>