[PATCH 0/5] Crescent Island PMT support

[PATCH 0/5] Crescent Island PMT support

[Michael J. Ruhl]

The Crescent Island (CRI) GPU supports PMT from the via
Xe driver registration.

The CRI PMT MMIO mapping is shared for each PMT feature and it
is necessary to set an index register value to access the correct
memory space.

The PMT driver has a callback infrastructure to access data areas
with driver specific access. It is does not support the PMT
control access.

CRI discovery/control spaces are part of the access window so a
driver callback is necessary to allow for the correct window to
be exposed.

Add control path callback support to the PMT driver.

Add CRI PMT discovery information.

Update the Xe driver to support the CRI PMT access.

The crashlog access needs to be done with power enabled (telem is
only available when the device is powered).
Determine which access is requested, and do the appropriate power
request.


Michael J. Ruhl (5):
  pmt: Add register access callbacks
  drm/xe/vsec: Use correct pm state get
  drm/xe/vsec: Support Crescent Island PMT
  drm/xe/vsec: Crescent Island PMT decode
  drm/xe/vsec: Crescent Island PMT callbacks

 drivers/gpu/drm/xe/regs/xe_pmt.h          |   5 +
 drivers/gpu/drm/xe/xe_vsec.c              | 257 +++++++++++++++++++---
 drivers/platform/x86/intel/pmt/crashlog.c |  39 +++-
 include/linux/intel_vsec.h                |  26 ++-
 4 files changed, 291 insertions(+), 36 deletions(-)

-- 
2.52.0

[PATCH 1/5] pmt: Add register access callbacks

[Michael J. Ruhl]

Some HW does not have the explicit access via MMIO.  Allow
for parent drivers to control access to the status/control
path.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 39 +++++++++++++++++++++--
 include/linux/intel_vsec.h                | 26 +++++++++++----
 2 files changed, 55 insertions(+), 10 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index b0393c9c5b4b..978b35d56888 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -129,7 +129,19 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
 {
 	const struct crashlog_control *control = &crashlog->info->control;
 	struct intel_pmt_entry *entry = &crashlog->entry;
-	u32 reg = readl(entry->disc_table + control->offset);
+	u32 guid = entry->header.guid;
+	u32 reg;
+	int err;
+
+	if (entry->cb->read_reg) {
+		err = entry->cb->read_reg(entry->pcidev, guid, &reg, control->offset);
+		if (err) {
+			pr_err("%s: failed to read reg: %d\n", __func__, err);
+			return;
+		}
+	} else {
+		reg = readl(entry->disc_table + control->offset);
+	}
 
 	reg &= ~control->trigger_mask;
 
@@ -138,14 +150,35 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
 	else
 		reg &= ~bit;
 
-	writel(reg, entry->disc_table + control->offset);
+	if (entry->cb->write_reg) {
+		err = entry->cb->write_reg(entry->pcidev, guid, reg, control->offset);
+		if (err) {
+			pr_err("%s: failed to write reg: %d\n", __func__, err);
+			return;
+		}
+	} else {
+		writel(reg, entry->disc_table + control->offset);
+	}
 }
 
 /* Read the status register and see if the specified @bit is set */
 static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
 {
 	const struct crashlog_status *status = &crashlog->info->status;
-	u32 reg = readl(crashlog->entry.disc_table + status->offset);
+	struct intel_pmt_entry *entry = &crashlog->entry;
+	u32 guid = entry->header.guid;
+	u32 reg;
+	int err;
+
+	if (entry->cb->read_reg) {
+		err = entry->cb->read_reg(entry->pcidev, guid, &reg, status->offset);
+		if (err) {
+			pr_err("%s: failed to read reg: %d\n", __func__, err);
+			return false;
+		}
+	} else {
+		reg = readl(crashlog->entry.disc_table + status->offset);
+	}
 
 	return !!(reg & bit);
 }
diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h
index 1a0f357c2427..5416f84aca40 100644
--- a/include/linux/intel_vsec.h
+++ b/include/linux/intel_vsec.h
@@ -80,16 +80,28 @@ enum intel_vsec_quirks {
 
 /**
  * struct pmt_callbacks - Callback infrastructure for PMT devices
- * @read_telem: when specified, called by client driver to access PMT
- * data (instead of direct copy).
- * * pdev:  PCI device reference for the callback's use
- * * guid:  ID of data to acccss
- * * data:  buffer for the data to be copied
- * * off:   offset into the requested buffer
- * * count: size of buffer
+ * ->read_telem() when specified, called by client driver to access PMT data (instead
+ * of direct copy).
+ * @pdev:  PCI device reference for the callback's use
+ * @guid:  ID of data to access
+ * @data:  buffer for the data to be copied
+ * @off:   offset into the requested buffer
+ * @count: size of buffer
+ * ->read_reg() when specified called by client driver to read PMT state
+ * @pdev: PCI device reference for the callback's use
+ * @guid: ID of data to access
+ * @data: buffer for the register data to be read
+ * @offset: offset of control register to access
+ * ->write_reg() when specified called by client driver to write PMT state
+ * @pdev: PCI device reference for the callback's use
+ * @guid: ID of data to access
+ * @data: buffer data to be written to the register
+ * @offset: offset of control register to access
  */
 struct pmt_callbacks {
 	int (*read_telem)(struct pci_dev *pdev, u32 guid, u64 *data, loff_t off, u32 count);
+	int (*read_reg)(struct pci_dev *pdev, u32 guid, u32 *data, u32 offset);
+	int (*write_reg)(struct pci_dev *pdev, u32 guid, u32 data, u32 offset);
 };
 
 struct vsec_feature_dependency {
-- 
2.52.0

Re: [PATCH 1/5] pmt: Add register access callbacks

[Ilpo Järvinen]

On Tue, 27 Jan 2026, Michael J. Ruhl wrote:

> Some HW does not have the explicit access via MMIO.  Allow

One space is enough after a stop.

Please reflow to 72 chars.

> for parent drivers to control access to the status/control
> path.

This sounds quite vague compared with what you're doing (adding ability to 
provide custom read/write accessors).

> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/crashlog.c | 39 +++++++++++++++++++++--
>  include/linux/intel_vsec.h                | 26 +++++++++++----
>  2 files changed, 55 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
> index b0393c9c5b4b..978b35d56888 100644
> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> @@ -129,7 +129,19 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
>  {
>  	const struct crashlog_control *control = &crashlog->info->control;
>  	struct intel_pmt_entry *entry = &crashlog->entry;
> -	u32 reg = readl(entry->disc_table + control->offset);
> +	u32 guid = entry->header.guid;
> +	u32 reg;
> +	int err;
> +
> +	if (entry->cb->read_reg) {
> +		err = entry->cb->read_reg(entry->pcidev, guid, &reg, control->offset);
> +		if (err) {
> +			pr_err("%s: failed to read reg: %d\n", __func__, err);

Please don't ever use __func__ in prints intended to be visible for normal 
users.

> +			return;
> +		}
> +	} else {
> +		reg = readl(entry->disc_table + control->offset);
> +	}
>  
>  	reg &= ~control->trigger_mask;
>  
> @@ -138,14 +150,35 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
>  	else
>  		reg &= ~bit;
>  
> -	writel(reg, entry->disc_table + control->offset);
> +	if (entry->cb->write_reg) {
> +		err = entry->cb->write_reg(entry->pcidev, guid, reg, control->offset);
> +		if (err) {
> +			pr_err("%s: failed to write reg: %d\n", __func__, err);
> +			return;
> +		}
> +	} else {
> +		writel(reg, entry->disc_table + control->offset);
> +	}
>  }
>  
>  /* Read the status register and see if the specified @bit is set */
>  static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
>  {
>  	const struct crashlog_status *status = &crashlog->info->status;
> -	u32 reg = readl(crashlog->entry.disc_table + status->offset);
> +	struct intel_pmt_entry *entry = &crashlog->entry;
> +	u32 guid = entry->header.guid;
> +	u32 reg;
> +	int err;
> +
> +	if (entry->cb->read_reg) {
> +		err = entry->cb->read_reg(entry->pcidev, guid, &reg, status->offset);
> +		if (err) {
> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
> +			return false;
> +		}
> +	} else {
> +		reg = readl(crashlog->entry.disc_table + status->offset);
> +	}
>  
>  	return !!(reg & bit);
>  }
> diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h
> index 1a0f357c2427..5416f84aca40 100644
> --- a/include/linux/intel_vsec.h
> +++ b/include/linux/intel_vsec.h
> @@ -80,16 +80,28 @@ enum intel_vsec_quirks {
>  
>  /**
>   * struct pmt_callbacks - Callback infrastructure for PMT devices
> - * @read_telem: when specified, called by client driver to access PMT
> - * data (instead of direct copy).
> - * * pdev:  PCI device reference for the callback's use
> - * * guid:  ID of data to acccss
> - * * data:  buffer for the data to be copied
> - * * off:   offset into the requested buffer
> - * * count: size of buffer
> + * ->read_telem() when specified, called by client driver to access PMT data (instead
> + * of direct copy).
> + * @pdev:  PCI device reference for the callback's use
> + * @guid:  ID of data to access
> + * @data:  buffer for the data to be copied
> + * @off:   offset into the requested buffer
> + * @count: size of buffer
> + * ->read_reg() when specified called by client driver to read PMT state
> + * @pdev: PCI device reference for the callback's use
> + * @guid: ID of data to access
> + * @data: buffer for the register data to be read
> + * @offset: offset of control register to access
> + * ->write_reg() when specified called by client driver to write PMT state
> + * @pdev: PCI device reference for the callback's use
> + * @guid: ID of data to access
> + * @data: buffer data to be written to the register
> + * @offset: offset of control register to access

Have you checked that these don't generate warnings and how they look 
visually?

>   */
>  struct pmt_callbacks {
>  	int (*read_telem)(struct pci_dev *pdev, u32 guid, u64 *data, loff_t off, u32 count);
> +	int (*read_reg)(struct pci_dev *pdev, u32 guid, u32 *data, u32 offset);
> +	int (*write_reg)(struct pci_dev *pdev, u32 guid, u32 data, u32 offset);
>  };
>  
>  struct vsec_feature_dependency {
> 

-- 
 i.

RE: [PATCH 1/5] pmt: Add register access callbacks

[Ruhl, Michael J]

>-----Original Message-----
>From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>Sent: Wednesday, January 28, 2026 7:27 AM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org; Hans
>de Goede <hansg@kernel.org>; Brost, Matthew <matthew.brost@intel.com>;
>Vivi, Rodrigo <rodrigo.vivi@intel.com>; thomas.hellstrom@linux.intel.com;
>airlied@gmail.com; simona@ffwll.ch; david.e.box@linux.intel.com
>Subject: Re: [PATCH 1/5] pmt: Add register access callbacks
>
>On Tue, 27 Jan 2026, Michael J. Ruhl wrote:
>
>> Some HW does not have the explicit access via MMIO.  Allow
>
>One space is enough after a stop.
>
>Please reflow to 72 chars.

Will fix.

>> for parent drivers to control access to the status/control
>> path.
>
>This sounds quite vague compared with what you're doing (adding ability to
>provide custom read/write accessors).

I will reword.

>> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
>> ---
>>  drivers/platform/x86/intel/pmt/crashlog.c | 39 +++++++++++++++++++++-
>-
>>  include/linux/intel_vsec.h                | 26 +++++++++++----
>>  2 files changed, 55 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c
>b/drivers/platform/x86/intel/pmt/crashlog.c
>> index b0393c9c5b4b..978b35d56888 100644
>> --- a/drivers/platform/x86/intel/pmt/crashlog.c
>> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
>> @@ -129,7 +129,19 @@ static void pmt_crashlog_rmw(struct
>crashlog_entry *crashlog, u32 bit, bool set)
>>  {
>>  	const struct crashlog_control *control = &crashlog->info->control;
>>  	struct intel_pmt_entry *entry = &crashlog->entry;
>> -	u32 reg = readl(entry->disc_table + control->offset);
>> +	u32 guid = entry->header.guid;
>> +	u32 reg;
>> +	int err;
>> +
>> +	if (entry->cb->read_reg) {
>> +		err = entry->cb->read_reg(entry->pcidev, guid, &reg, control-
>>offset);
>> +		if (err) {
>> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
>
>Please don't ever use __func__ in prints intended to be visible for normal
>users.

Missed that on my clean up path.  I have removed the __func__ usage.

>> +			return;
>> +		}
>> +	} else {
>> +		reg = readl(entry->disc_table + control->offset);
>> +	}
>>
>>  	reg &= ~control->trigger_mask;
>>
>> @@ -138,14 +150,35 @@ static void pmt_crashlog_rmw(struct
>crashlog_entry *crashlog, u32 bit, bool set)
>>  	else
>>  		reg &= ~bit;
>>
>> -	writel(reg, entry->disc_table + control->offset);
>> +	if (entry->cb->write_reg) {
>> +		err = entry->cb->write_reg(entry->pcidev, guid, reg, control-
>>offset);
>> +		if (err) {
>> +			pr_err("%s: failed to write reg: %d\n", __func__, err);
>> +			return;
>> +		}
>> +	} else {
>> +		writel(reg, entry->disc_table + control->offset);
>> +	}
>>  }
>>
>>  /* Read the status register and see if the specified @bit is set */
>>  static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
>>  {
>>  	const struct crashlog_status *status = &crashlog->info->status;
>> -	u32 reg = readl(crashlog->entry.disc_table + status->offset);
>> +	struct intel_pmt_entry *entry = &crashlog->entry;
>> +	u32 guid = entry->header.guid;
>> +	u32 reg;
>> +	int err;
>> +
>> +	if (entry->cb->read_reg) {
>> +		err = entry->cb->read_reg(entry->pcidev, guid, &reg, status-
>>offset);
>> +		if (err) {
>> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
>> +			return false;
>> +		}
>> +	} else {
>> +		reg = readl(crashlog->entry.disc_table + status->offset);
>> +	}
>>
>>  	return !!(reg & bit);
>>  }
>> diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h
>> index 1a0f357c2427..5416f84aca40 100644
>> --- a/include/linux/intel_vsec.h
>> +++ b/include/linux/intel_vsec.h
>> @@ -80,16 +80,28 @@ enum intel_vsec_quirks {
>>
>>  /**
>>   * struct pmt_callbacks - Callback infrastructure for PMT devices
>> - * @read_telem: when specified, called by client driver to access PMT
>> - * data (instead of direct copy).
>> - * * pdev:  PCI device reference for the callback's use
>> - * * guid:  ID of data to acccss
>> - * * data:  buffer for the data to be copied
>> - * * off:   offset into the requested buffer
>> - * * count: size of buffer
>> + * ->read_telem() when specified, called by client driver to access PMT data
>(instead
>> + * of direct copy).
>> + * @pdev:  PCI device reference for the callback's use
>> + * @guid:  ID of data to access
>> + * @data:  buffer for the data to be copied
>> + * @off:   offset into the requested buffer
>> + * @count: size of buffer
>> + * ->read_reg() when specified called by client driver to read PMT state
>> + * @pdev: PCI device reference for the callback's use
>> + * @guid: ID of data to access
>> + * @data: buffer for the register data to be read
>> + * @offset: offset of control register to access
>> + * ->write_reg() when specified called by client driver to write PMT state
>> + * @pdev: PCI device reference for the callback's use
>> + * @guid: ID of data to access
>> + * @data: buffer data to be written to the register
>> + * @offset: offset of control register to access
>
>Have you checked that these don't generate warnings and how they look
>visually?

Are you referring to the kernel-doc usage?

The read_telem(), read_reg() and write_reg() do give an error with .  I have cleaned them up so there
is no more kernel-doc errors...  Is there something else to look at?

I used:

./scripts/kernel-doc -v --none include/linux/intel_vsec.h

And cleaned up the reported errors.

Thanks!

Mike

>>   */
>>  struct pmt_callbacks {
>>  	int (*read_telem)(struct pci_dev *pdev, u32 guid, u64 *data, loff_t off,
>u32 count);
>> +	int (*read_reg)(struct pci_dev *pdev, u32 guid, u32 *data, u32 offset);
>> +	int (*write_reg)(struct pci_dev *pdev, u32 guid, u32 data, u32 offset);
>>  };
>>
>>  struct vsec_feature_dependency {
>>
>
>--
> i.

Re: [PATCH 1/5] pmt: Add register access callbacks

[Jani Nikula]

On Tue, 27 Jan 2026, "Michael J. Ruhl" <michael.j.ruhl@intel.com> wrote:
> Some HW does not have the explicit access via MMIO.  Allow
> for parent drivers to control access to the status/control
> path.

I think this is quite vague, and could use some copy-paste from the
cover letter, for posterity.

BR,
Jani.

>
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/crashlog.c | 39 +++++++++++++++++++++--
>  include/linux/intel_vsec.h                | 26 +++++++++++----
>  2 files changed, 55 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
> index b0393c9c5b4b..978b35d56888 100644
> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> @@ -129,7 +129,19 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
>  {
>  	const struct crashlog_control *control = &crashlog->info->control;
>  	struct intel_pmt_entry *entry = &crashlog->entry;
> -	u32 reg = readl(entry->disc_table + control->offset);
> +	u32 guid = entry->header.guid;
> +	u32 reg;
> +	int err;
> +
> +	if (entry->cb->read_reg) {
> +		err = entry->cb->read_reg(entry->pcidev, guid, &reg, control->offset);
> +		if (err) {
> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
> +			return;
> +		}
> +	} else {
> +		reg = readl(entry->disc_table + control->offset);
> +	}
>  
>  	reg &= ~control->trigger_mask;
>  
> @@ -138,14 +150,35 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
>  	else
>  		reg &= ~bit;
>  
> -	writel(reg, entry->disc_table + control->offset);
> +	if (entry->cb->write_reg) {
> +		err = entry->cb->write_reg(entry->pcidev, guid, reg, control->offset);
> +		if (err) {
> +			pr_err("%s: failed to write reg: %d\n", __func__, err);
> +			return;
> +		}
> +	} else {
> +		writel(reg, entry->disc_table + control->offset);
> +	}
>  }
>  
>  /* Read the status register and see if the specified @bit is set */
>  static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
>  {
>  	const struct crashlog_status *status = &crashlog->info->status;
> -	u32 reg = readl(crashlog->entry.disc_table + status->offset);
> +	struct intel_pmt_entry *entry = &crashlog->entry;
> +	u32 guid = entry->header.guid;
> +	u32 reg;
> +	int err;
> +
> +	if (entry->cb->read_reg) {
> +		err = entry->cb->read_reg(entry->pcidev, guid, &reg, status->offset);
> +		if (err) {
> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
> +			return false;
> +		}
> +	} else {
> +		reg = readl(crashlog->entry.disc_table + status->offset);
> +	}
>  
>  	return !!(reg & bit);
>  }
> diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h
> index 1a0f357c2427..5416f84aca40 100644
> --- a/include/linux/intel_vsec.h
> +++ b/include/linux/intel_vsec.h
> @@ -80,16 +80,28 @@ enum intel_vsec_quirks {
>  
>  /**
>   * struct pmt_callbacks - Callback infrastructure for PMT devices
> - * @read_telem: when specified, called by client driver to access PMT
> - * data (instead of direct copy).
> - * * pdev:  PCI device reference for the callback's use
> - * * guid:  ID of data to acccss
> - * * data:  buffer for the data to be copied
> - * * off:   offset into the requested buffer
> - * * count: size of buffer
> + * ->read_telem() when specified, called by client driver to access PMT data (instead
> + * of direct copy).
> + * @pdev:  PCI device reference for the callback's use
> + * @guid:  ID of data to access
> + * @data:  buffer for the data to be copied
> + * @off:   offset into the requested buffer
> + * @count: size of buffer
> + * ->read_reg() when specified called by client driver to read PMT state
> + * @pdev: PCI device reference for the callback's use
> + * @guid: ID of data to access
> + * @data: buffer for the register data to be read
> + * @offset: offset of control register to access
> + * ->write_reg() when specified called by client driver to write PMT state
> + * @pdev: PCI device reference for the callback's use
> + * @guid: ID of data to access
> + * @data: buffer data to be written to the register
> + * @offset: offset of control register to access
>   */
>  struct pmt_callbacks {
>  	int (*read_telem)(struct pci_dev *pdev, u32 guid, u64 *data, loff_t off, u32 count);
> +	int (*read_reg)(struct pci_dev *pdev, u32 guid, u32 *data, u32 offset);
> +	int (*write_reg)(struct pci_dev *pdev, u32 guid, u32 data, u32 offset);
>  };
>  
>  struct vsec_feature_dependency {

-- 
Jani Nikula, Intel

[PATCH 2/5] drm/xe/vsec: Use correct pm state get

[Michael J. Ruhl]

Crashlog needs to be collected at all times.  The current pm
check assumes telemetry only.

Update read path to enable device for crashlog instances.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_vsec.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 4ebb4dbe1c9b..44607f1eaa88 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -145,6 +145,7 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
 {
 	struct xe_device *xe = pdev_to_xe_device(pdev);
 	void __iomem *telem_addr = xe->mmio.regs + BMG_TELEMETRY_OFFSET;
+	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
 	u32 mem_region;
 	u32 offset;
 	int ret;
@@ -160,9 +161,18 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
 	if (!xe->soc_remapper.set_telem_region)
 		return -ENODEV;
 
-	/* indicate that we are not at an appropriate power level */
-	if (!xe_pm_runtime_get_if_active(xe))
-		return -ENODATA;
+	/* make sure that we are not at an inappropriate power level */
+	switch (cap_type) {
+	case CRASHLOG:
+		xe_pm_runtime_get(xe);
+		break;
+	case TELEMETRY:
+		if (!xe_pm_runtime_get_if_active(xe))
+			return -ENODATA;
+		break;
+	case WATCHER:
+		return -EINVAL;
+	}
 
 	/* set SoC re-mapper index register based on GUID memory region */
 	xe->soc_remapper.set_telem_region(xe, mem_region);
-- 
2.52.0

Re: [PATCH 2/5] drm/xe/vsec: Use correct pm state get

[Ilpo Järvinen]

On Tue, 27 Jan 2026, Michael J. Ruhl wrote:

> Crashlog needs to be collected at all times.  The current pm
> check assumes telemetry only.
> 
> Update read path to enable device for crashlog instances.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_vsec.c | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 4ebb4dbe1c9b..44607f1eaa88 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -145,6 +145,7 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
>  {
>  	struct xe_device *xe = pdev_to_xe_device(pdev);
>  	void __iomem *telem_addr = xe->mmio.regs + BMG_TELEMETRY_OFFSET;
> +	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
>  	u32 mem_region;
>  	u32 offset;
>  	int ret;
> @@ -160,9 +161,18 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
>  	if (!xe->soc_remapper.set_telem_region)
>  		return -ENODEV;
>  
> -	/* indicate that we are not at an appropriate power level */
> -	if (!xe_pm_runtime_get_if_active(xe))
> -		return -ENODATA;
> +	/* make sure that we are not at an inappropriate power level */
> +	switch (cap_type) {
> +	case CRASHLOG:
> +		xe_pm_runtime_get(xe);

While this is xe code so I don't know much about it, it feels odd to me to 
just add a get without put or explanation in the changelog why this change 
doesn't result in imbalance.

-- 
 i.


> +		break;
> +	case TELEMETRY:
> +		if (!xe_pm_runtime_get_if_active(xe))
> +			return -ENODATA;
> +		break;
> +	case WATCHER:
> +		return -EINVAL;
> +	}
>  
>  	/* set SoC re-mapper index register based on GUID memory region */
>  	xe->soc_remapper.set_telem_region(xe, mem_region);
> 

RE: [PATCH 2/5] drm/xe/vsec: Use correct pm state get

[Ruhl, Michael J]

>-----Original Message-----
>From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>Sent: Wednesday, January 28, 2026 7:42 AM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org; Hans
>de Goede <hansg@kernel.org>; Brost, Matthew <matthew.brost@intel.com>;
>Vivi, Rodrigo <rodrigo.vivi@intel.com>; thomas.hellstrom@linux.intel.com;
>airlied@gmail.com; simona@ffwll.ch; david.e.box@linux.intel.com
>Subject: Re: [PATCH 2/5] drm/xe/vsec: Use correct pm state get
>
>On Tue, 27 Jan 2026, Michael J. Ruhl wrote:
>
>> Crashlog needs to be collected at all times.  The current pm
>> check assumes telemetry only.
>>
>> Update read path to enable device for crashlog instances.
>>
>> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_vsec.c | 16 +++++++++++++---
>>  1 file changed, 13 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
>> index 4ebb4dbe1c9b..44607f1eaa88 100644
>> --- a/drivers/gpu/drm/xe/xe_vsec.c
>> +++ b/drivers/gpu/drm/xe/xe_vsec.c
>> @@ -145,6 +145,7 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32
>guid, u64 *data, loff_t user_off
>>  {
>>  	struct xe_device *xe = pdev_to_xe_device(pdev);
>>  	void __iomem *telem_addr = xe->mmio.regs +
>BMG_TELEMETRY_OFFSET;
>> +	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
>>  	u32 mem_region;
>>  	u32 offset;
>>  	int ret;
>> @@ -160,9 +161,18 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32
>guid, u64 *data, loff_t user_off
>>  	if (!xe->soc_remapper.set_telem_region)
>>  		return -ENODEV;
>>
>> -	/* indicate that we are not at an appropriate power level */
>> -	if (!xe_pm_runtime_get_if_active(xe))
>> -		return -ENODATA;
>> +	/* make sure that we are not at an inappropriate power level */
>> +	switch (cap_type) {
>> +	case CRASHLOG:
>> +		xe_pm_runtime_get(xe);
>
>While this is xe code so I don't know much about it, it feels odd to me to
>just add a get without put or explanation in the changelog why this change
>doesn't result in imbalance.

There is an existing xe_pm_runtime_put() before this function exits.  (original
line ~170, new line ~181).  Is this what you are looking for?

The TELEM entry will not take the reference if the device is not powered,
so a put is unnecessary (exit on not enabled).

CRASLOG requires power, so the _get() will power the device and take
reference.

Thanks,

Mike
>--
> i.
>
>
>> +		break;
>> +	case TELEMETRY:
>> +		if (!xe_pm_runtime_get_if_active(xe))
>> +			return -ENODATA;
>> +		break;
>> +	case WATCHER:
>> +		return -EINVAL;
>> +	}
>>
>>  	/* set SoC re-mapper index register based on GUID memory region */
>>  	xe->soc_remapper.set_telem_region(xe, mem_region);
>>

RE: [PATCH 2/5] drm/xe/vsec: Use correct pm state get

[Ilpo Järvinen]

[-- Attachment #1: Type: text/plain, Size: 2783 bytes --]

On Wed, 28 Jan 2026, Ruhl, Michael J wrote:

> >-----Original Message-----
> >From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> >Sent: Wednesday, January 28, 2026 7:42 AM
> >To: Ruhl, Michael J <michael.j.ruhl@intel.com>
> >Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org; Hans
> >de Goede <hansg@kernel.org>; Brost, Matthew <matthew.brost@intel.com>;
> >Vivi, Rodrigo <rodrigo.vivi@intel.com>; thomas.hellstrom@linux.intel.com;
> >airlied@gmail.com; simona@ffwll.ch; david.e.box@linux.intel.com
> >Subject: Re: [PATCH 2/5] drm/xe/vsec: Use correct pm state get
> >
> >On Tue, 27 Jan 2026, Michael J. Ruhl wrote:
> >
> >> Crashlog needs to be collected at all times.  The current pm
> >> check assumes telemetry only.
> >>
> >> Update read path to enable device for crashlog instances.
> >>
> >> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> >> ---
> >>  drivers/gpu/drm/xe/xe_vsec.c | 16 +++++++++++++---
> >>  1 file changed, 13 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> >> index 4ebb4dbe1c9b..44607f1eaa88 100644
> >> --- a/drivers/gpu/drm/xe/xe_vsec.c
> >> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> >> @@ -145,6 +145,7 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32
> >guid, u64 *data, loff_t user_off
> >>  {
> >>  	struct xe_device *xe = pdev_to_xe_device(pdev);
> >>  	void __iomem *telem_addr = xe->mmio.regs +
> >BMG_TELEMETRY_OFFSET;
> >> +	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
> >>  	u32 mem_region;
> >>  	u32 offset;
> >>  	int ret;
> >> @@ -160,9 +161,18 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32
> >guid, u64 *data, loff_t user_off
> >>  	if (!xe->soc_remapper.set_telem_region)
> >>  		return -ENODEV;
> >>
> >> -	/* indicate that we are not at an appropriate power level */
> >> -	if (!xe_pm_runtime_get_if_active(xe))
> >> -		return -ENODATA;
> >> +	/* make sure that we are not at an inappropriate power level */
> >> +	switch (cap_type) {
> >> +	case CRASHLOG:
> >> +		xe_pm_runtime_get(xe);
> >
> >While this is xe code so I don't know much about it, it feels odd to me to
> >just add a get without put or explanation in the changelog why this change
> >doesn't result in imbalance.
> 
> There is an existing xe_pm_runtime_put() before this function exits.  (original
> line ~170, new line ~181).  Is this what you are looking for?
> 
> The TELEM entry will not take the reference if the device is not powered,
> so a put is unnecessary (exit on not enabled).
> 
> CRASLOG requires power, so the _get() will power the device and take
> reference.

I see, I didn't look up the function but just read the patch and found it 
odd. I guess it's fine as is.

-- 
 i.

[PATCH 3/5] drm/xe/vsec: Support Crescent Island PMT

[Michael J. Ruhl]

Crescent Island (CRI) supports PMT telemetry and crashlog.

Add Crescent Island (CRI) discovery structure (DVSEC)
information to allow for Xe registration.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_pmt.h |  5 ++++
 drivers/gpu/drm/xe/xe_vsec.c     | 43 ++++++++++++++++++++++++++++++--
 2 files changed, 46 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
index 240d57993ea6..874f44b79780 100644
--- a/drivers/gpu/drm/xe/regs/xe_pmt.h
+++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
@@ -18,6 +18,11 @@
 #define BMG_TELEMETRY_BASE_OFFSET	0xE0000
 #define BMG_TELEMETRY_OFFSET		(SOC_BASE + BMG_TELEMETRY_BASE_OFFSET)
 
+#define CRI_TELEMETRY_BASE_OFFSET	0xE0000
+/* for CRI discovery and telemetry are in an indexed window */
+#define CRI_DISCOVERY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
+#define CRI_TELEMETRY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
+
 #define BMG_MODS_RESIDENCY_OFFSET		(0x4D0)
 #define BMG_G2_RESIDENCY_OFFSET		(0x530)
 #define BMG_G6_RESIDENCY_OFFSET		(0x538)
diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 44607f1eaa88..254f7ebca6eb 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -19,8 +19,16 @@
 
 #include "regs/xe_pmt.h"
 
-/* PMT GUID value for BMG devices.  NOTE: this is NOT a PCI id */
+/* PMT GUID value for BMG and CRI devices.  NOTE: this is NOT a PCI id */
 #define BMG_DEVICE_ID 0xE2F8
+#define CRI_DEVICE_ID 0xE2F9
+
+/*
+ * sizeof(Crashlog Type1 Version2) = 0x18 (24) bytes
+ * For BMG and CRI crashlogs are consecutive and start at 0x60.
+ */
+#define PUNIT_DISC_OFFSET 0x60
+#define OOBMSM_DISC_OFFSET (PUNIT_DISC_OFFSET + 0x18)
 
 static struct intel_vsec_header bmg_telemetry = {
 	.rev = 1,
@@ -39,7 +47,7 @@ static struct intel_vsec_header bmg_crashlog = {
 	.num_entries = 2,
 	.entry_size = 6,
 	.tbir = 0,
-	.offset = BMG_DISCOVERY_OFFSET + 0x60,
+	.offset = BMG_DISCOVERY_OFFSET + PUNIT_DISC_OFFSET,
 };
 
 static struct intel_vsec_header *bmg_capabilities[] = {
@@ -48,9 +56,36 @@ static struct intel_vsec_header *bmg_capabilities[] = {
 	NULL
 };
 
+static struct intel_vsec_header cri_telemetry = {
+	.rev = 1,
+	.length = 0x10,
+	.id = VSEC_ID_TELEMETRY,
+	.num_entries = 3,
+	.entry_size = 4,
+	.tbir = 0,
+	.offset = CRI_DISCOVERY_OFFSET,
+};
+
+static struct intel_vsec_header cri_crashlog = {
+	.rev = 1,
+	.length = 0x10,
+	.id = VSEC_ID_CRASHLOG,
+	.num_entries = 2,
+	.entry_size = 6,
+	.tbir = 0,
+	.offset = CRI_DISCOVERY_OFFSET + PUNIT_DISC_OFFSET,
+};
+
+static struct intel_vsec_header *cri_capabilities[] = {
+	&cri_telemetry,
+	&cri_crashlog,
+	NULL
+};
+
 enum xe_vsec {
 	XE_VSEC_UNKNOWN = 0,
 	XE_VSEC_BMG,
+	XE_VSEC_CRI,
 };
 
 static struct intel_vsec_platform_info xe_vsec_info[] = {
@@ -58,6 +93,10 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
 		.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
 		.headers = bmg_capabilities,
 	},
+	[XE_VSEC_CRI] = {
+		.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
+		.headers = cri_capabilities,
+	},
 	{ }
 };
 
-- 
2.52.0

[PATCH 4/5] drm/xe/vsec: Crescent Island PMT decode

[Michael J. Ruhl]

Crescent Island (CRI) has different index and offset values for
accessing the PMT data area.

Update the decode path to support the CRI device.

Update the data read callback so to support the CRI usage.

Define several magic numbers.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_vsec.c | 114 +++++++++++++++++++++++++++++------
 1 file changed, 96 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 254f7ebca6eb..4bddc22d86c7 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -116,10 +116,27 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
 #define GUID_CAP_TYPE		GENMASK(29, 28)
 #define GUID_RECORD_ID		GENMASK(31, 30)
 
-#define PUNIT_TELEMETRY_OFFSET		0x0200
-#define PUNIT_WATCHER_OFFSET		0x14A0
-#define OOBMSM_0_WATCHER_OFFSET		0x18D8
-#define OOBMSM_1_TELEMETRY_OFFSET	0x1000
+#define BMG_IDX_TELEM_PUNIT		0x00
+#define BMG_IDX_TELEM_OOBMSM		0x01
+#define BMG_IDX_CRASHLOG_PUNIT		0x02
+#define BMG_IDX_CRASHLOG_OOBMSM		0x04
+
+#define BMG_PUNIT_TELEMETRY_OFFSET	0x0200
+#define BMG_PUNIT_WATCHER_OFFSET	0x14A0
+#define BMG_OOBMSM_0_WATCHER_OFFSET	0x18D8
+#define BMG_OOBMSM_1_TELEMETRY_OFFSET	0x1000
+
+#define CRI_IDX_TELEM_DISCOVERY		0x00
+#define CRI_IDX_TELEM_PUNIT		0x01
+#define CRI_IDX_TELEM_OOBMSM		0x02
+#define CRI_IDX_CRASHLOG_PUNIT		0x03
+#define CRI_IDX_CRASHLOG_OOBMSM		0x04
+
+#define CRI_PUNIT_TELEMETRY_OFFSET	0x0200
+#define CRI_PUNIT_WATCHER_OFFSET	0x00A0
+#define CRI_OOBMSM_0_WATCHER_OFFSET	0x04F8
+#define CRI_OOBMSM_1_TELEMETRY_OFFSET	0x1800
+#define CRI_PUNIT_CRASHLOG_OFFSET	0x0660
 
 enum record_id {
 	PUNIT,
@@ -133,44 +150,81 @@ enum capability {
 	WATCHER,
 };
 
-static int xe_guid_decode(u32 guid, int *index, u32 *offset)
+static int bmg_guid_decode(u32 guid, int *index, u32 *offset)
 {
 	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
 	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
-	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
 
-	if (device_id != BMG_DEVICE_ID)
-		return -ENODEV;
+	*offset = 0;
 
-	if (cap_type > WATCHER)
+	if (cap_type == CRASHLOG) {
+		*index = record_id == PUNIT ? BMG_IDX_CRASHLOG_PUNIT : BMG_IDX_CRASHLOG_OOBMSM;
+		return 0;
+	}
+
+	switch (record_id) {
+	case PUNIT:
+		*index = BMG_IDX_TELEM_PUNIT;
+		if (cap_type == TELEMETRY)
+			*offset = BMG_PUNIT_TELEMETRY_OFFSET;
+		else
+			*offset = BMG_PUNIT_WATCHER_OFFSET;
+		break;
+
+	case OOBMSM_0:
+		*index = BMG_IDX_TELEM_OOBMSM;
+		if (cap_type == WATCHER)
+			*offset = BMG_OOBMSM_0_WATCHER_OFFSET;
+		break;
+
+	case OOBMSM_1:
+		*index = BMG_IDX_TELEM_OOBMSM;
+		if (cap_type == TELEMETRY)
+			*offset = BMG_OOBMSM_1_TELEMETRY_OFFSET;
+		break;
+	default:
 		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int cri_guid_decode(u32 guid, int *index, u32 *offset)
+{
+	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
+	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
 
 	*offset = 0;
 
 	if (cap_type == CRASHLOG) {
-		*index = record_id == PUNIT ? 2 : 4;
+		if (record_id == PUNIT) {
+			*index = CRI_IDX_CRASHLOG_PUNIT;
+			*offset = CRI_PUNIT_CRASHLOG_OFFSET;
+		} else {
+			*index = CRI_IDX_CRASHLOG_OOBMSM;
+		}
 		return 0;
 	}
 
 	switch (record_id) {
 	case PUNIT:
-		*index = 0;
+		*index = CRI_IDX_TELEM_PUNIT;
 		if (cap_type == TELEMETRY)
-			*offset = PUNIT_TELEMETRY_OFFSET;
+			*offset = CRI_PUNIT_TELEMETRY_OFFSET;
 		else
-			*offset = PUNIT_WATCHER_OFFSET;
+			*offset = CRI_PUNIT_WATCHER_OFFSET;
 		break;
 
 	case OOBMSM_0:
-		*index = 1;
+		*index = CRI_IDX_TELEM_OOBMSM;
 		if (cap_type == WATCHER)
-			*offset = OOBMSM_0_WATCHER_OFFSET;
+			*offset = CRI_OOBMSM_0_WATCHER_OFFSET;
 		break;
 
 	case OOBMSM_1:
-		*index = 1;
+		*index = CRI_IDX_TELEM_OOBMSM;
 		if (cap_type == TELEMETRY)
-			*offset = OOBMSM_1_TELEMETRY_OFFSET;
+			*offset = CRI_OOBMSM_1_TELEMETRY_OFFSET;
 		break;
 	default:
 		return -EINVAL;
@@ -179,12 +233,30 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
 	return 0;
 }
 
+static int xe_guid_decode(u32 guid, int *index, u32 *offset)
+{
+	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
+	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
+
+	if (cap_type > WATCHER)
+		return -EINVAL;
+
+	if (device_id == BMG_DEVICE_ID)
+		return bmg_guid_decode(guid, index, offset);
+
+	if (device_id == CRI_DEVICE_ID)
+		return cri_guid_decode(guid, index, offset);
+
+	return -ENODEV;
+}
+
 int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_offset,
 		      u32 count)
 {
 	struct xe_device *xe = pdev_to_xe_device(pdev);
-	void __iomem *telem_addr = xe->mmio.regs + BMG_TELEMETRY_OFFSET;
 	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
+	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
+	void __iomem *telem_addr = xe->mmio.regs;
 	u32 mem_region;
 	u32 offset;
 	int ret;
@@ -193,6 +265,11 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
 	if (ret)
 		return ret;
 
+	if (device_id == BMG_DEVICE_ID)
+		telem_addr += BMG_TELEMETRY_OFFSET;
+	else
+		telem_addr += CRI_TELEMETRY_OFFSET;
+
 	telem_addr += offset + user_offset;
 
 	guard(mutex)(&xe->pmt.lock);
@@ -217,6 +294,7 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
 	xe->soc_remapper.set_telem_region(xe, mem_region);
 
 	memcpy_fromio(data, telem_addr, count);
+
 	xe_pm_runtime_put(xe);
 
 	return count;
-- 
2.52.0

Re: [PATCH 4/5] drm/xe/vsec: Crescent Island PMT decode

[Ilpo Järvinen]

On Tue, 27 Jan 2026, Michael J. Ruhl wrote:

> Crescent Island (CRI) has different index and offset values for
> accessing the PMT data area.
> 
> Update the decode path to support the CRI device.
> 
> Update the data read callback so to support the CRI usage.
> 
> Define several magic numbers.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_vsec.c | 114 +++++++++++++++++++++++++++++------
>  1 file changed, 96 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 254f7ebca6eb..4bddc22d86c7 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -116,10 +116,27 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
>  #define GUID_CAP_TYPE		GENMASK(29, 28)
>  #define GUID_RECORD_ID		GENMASK(31, 30)
>  
> -#define PUNIT_TELEMETRY_OFFSET		0x0200
> -#define PUNIT_WATCHER_OFFSET		0x14A0
> -#define OOBMSM_0_WATCHER_OFFSET		0x18D8
> -#define OOBMSM_1_TELEMETRY_OFFSET	0x1000
> +#define BMG_IDX_TELEM_PUNIT		0x00
> +#define BMG_IDX_TELEM_OOBMSM		0x01
> +#define BMG_IDX_CRASHLOG_PUNIT		0x02
> +#define BMG_IDX_CRASHLOG_OOBMSM		0x04
> +
> +#define BMG_PUNIT_TELEMETRY_OFFSET	0x0200
> +#define BMG_PUNIT_WATCHER_OFFSET	0x14A0
> +#define BMG_OOBMSM_0_WATCHER_OFFSET	0x18D8
> +#define BMG_OOBMSM_1_TELEMETRY_OFFSET	0x1000
> +
> +#define CRI_IDX_TELEM_DISCOVERY		0x00
> +#define CRI_IDX_TELEM_PUNIT		0x01
> +#define CRI_IDX_TELEM_OOBMSM		0x02
> +#define CRI_IDX_CRASHLOG_PUNIT		0x03
> +#define CRI_IDX_CRASHLOG_OOBMSM		0x04
> +
> +#define CRI_PUNIT_TELEMETRY_OFFSET	0x0200
> +#define CRI_PUNIT_WATCHER_OFFSET	0x00A0
> +#define CRI_OOBMSM_0_WATCHER_OFFSET	0x04F8
> +#define CRI_OOBMSM_1_TELEMETRY_OFFSET	0x1800
> +#define CRI_PUNIT_CRASHLOG_OFFSET	0x0660
>  
>  enum record_id {
>  	PUNIT,
> @@ -133,44 +150,81 @@ enum capability {
>  	WATCHER,
>  };
>  
> -static int xe_guid_decode(u32 guid, int *index, u32 *offset)
> +static int bmg_guid_decode(u32 guid, int *index, u32 *offset)
>  {
>  	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
>  	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
> -	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
>  
> -	if (device_id != BMG_DEVICE_ID)
> -		return -ENODEV;
> +	*offset = 0;
>  
> -	if (cap_type > WATCHER)
> +	if (cap_type == CRASHLOG) {
> +		*index = record_id == PUNIT ? BMG_IDX_CRASHLOG_PUNIT : BMG_IDX_CRASHLOG_OOBMSM;
> +		return 0;
> +	}
> +
> +	switch (record_id) {
> +	case PUNIT:
> +		*index = BMG_IDX_TELEM_PUNIT;
> +		if (cap_type == TELEMETRY)
> +			*offset = BMG_PUNIT_TELEMETRY_OFFSET;
> +		else
> +			*offset = BMG_PUNIT_WATCHER_OFFSET;
> +		break;
> +
> +	case OOBMSM_0:
> +		*index = BMG_IDX_TELEM_OOBMSM;
> +		if (cap_type == WATCHER)
> +			*offset = BMG_OOBMSM_0_WATCHER_OFFSET;
> +		break;
> +
> +	case OOBMSM_1:
> +		*index = BMG_IDX_TELEM_OOBMSM;
> +		if (cap_type == TELEMETRY)
> +			*offset = BMG_OOBMSM_1_TELEMETRY_OFFSET;
> +		break;
> +	default:
>  		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +
> +static int cri_guid_decode(u32 guid, int *index, u32 *offset)
> +{
> +	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
> +	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
>  
>  	*offset = 0;
>  
>  	if (cap_type == CRASHLOG) {
> -		*index = record_id == PUNIT ? 2 : 4;
> +		if (record_id == PUNIT) {
> +			*index = CRI_IDX_CRASHLOG_PUNIT;
> +			*offset = CRI_PUNIT_CRASHLOG_OFFSET;
> +		} else {
> +			*index = CRI_IDX_CRASHLOG_OOBMSM;
> +		}
>  		return 0;
>  	}
>  
>  	switch (record_id) {
>  	case PUNIT:
> -		*index = 0;
> +		*index = CRI_IDX_TELEM_PUNIT;
>  		if (cap_type == TELEMETRY)
> -			*offset = PUNIT_TELEMETRY_OFFSET;
> +			*offset = CRI_PUNIT_TELEMETRY_OFFSET;
>  		else
> -			*offset = PUNIT_WATCHER_OFFSET;
> +			*offset = CRI_PUNIT_WATCHER_OFFSET;
>  		break;
>  
>  	case OOBMSM_0:
> -		*index = 1;
> +		*index = CRI_IDX_TELEM_OOBMSM;
>  		if (cap_type == WATCHER)
> -			*offset = OOBMSM_0_WATCHER_OFFSET;
> +			*offset = CRI_OOBMSM_0_WATCHER_OFFSET;
>  		break;
>  
>  	case OOBMSM_1:
> -		*index = 1;
> +		*index = CRI_IDX_TELEM_OOBMSM;
>  		if (cap_type == TELEMETRY)
> -			*offset = OOBMSM_1_TELEMETRY_OFFSET;
> +			*offset = CRI_OOBMSM_1_TELEMETRY_OFFSET;
>  		break;
>  	default:
>  		return -EINVAL;
> @@ -179,12 +233,30 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
>  	return 0;
>  }
>  
> +static int xe_guid_decode(u32 guid, int *index, u32 *offset)
> +{
> +	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
> +	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
> +
> +	if (cap_type > WATCHER)
> +		return -EINVAL;
> +
> +	if (device_id == BMG_DEVICE_ID)
> +		return bmg_guid_decode(guid, index, offset);
> +
> +	if (device_id == CRI_DEVICE_ID)
> +		return cri_guid_decode(guid, index, offset);
> +
> +	return -ENODEV;
> +}
> +
>  int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_offset,
>  		      u32 count)
>  {
>  	struct xe_device *xe = pdev_to_xe_device(pdev);
> -	void __iomem *telem_addr = xe->mmio.regs + BMG_TELEMETRY_OFFSET;
>  	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
> +	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
> +	void __iomem *telem_addr = xe->mmio.regs;
>  	u32 mem_region;
>  	u32 offset;
>  	int ret;
> @@ -193,6 +265,11 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
>  	if (ret)
>  		return ret;
>  
> +	if (device_id == BMG_DEVICE_ID)
> +		telem_addr += BMG_TELEMETRY_OFFSET;
> +	else
> +		telem_addr += CRI_TELEMETRY_OFFSET;
> +
>  	telem_addr += offset + user_offset;
>  
>  	guard(mutex)(&xe->pmt.lock);
> @@ -217,6 +294,7 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
>  	xe->soc_remapper.set_telem_region(xe, mem_region);
>  
>  	memcpy_fromio(data, telem_addr, count);
> +

A stray change.

>  	xe_pm_runtime_put(xe);
>  
>  	return count;
> 

-- 
 i.

[PATCH 5/5] drm/xe/vsec: Crescent Island PMT callbacks

[Michael J. Ruhl]

CRI PMT support requires callbacks to access the discovery status
and control areas.  Access is a common MMIO area that requires an
index to be set before access is allowed.

Introduce the necessary callbacks to get the status and control
information for CRI PMT usage.

Add the glue logic to register the CRI PMT functionality.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_vsec.c | 84 ++++++++++++++++++++++++++++++++++--
 1 file changed, 81 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 4bddc22d86c7..c5b0c16f23be 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -300,17 +300,89 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
 	return count;
 }
 
-static struct pmt_callbacks xe_pmt_cb = {
+/**
+ * xe_pmt_read_reg() - read a crashlog register
+ * @pdev: the pcie device that register the callback
+ * @guid: PMT guid of the crashlog instance
+ * @reg: data read from the PMT data structure
+ * @offset: which data to read from the PMT data structure
+ *
+ * Read the requested PMT register based on the pcie device and guid.  The
+ * supported struct is the Crashlog Type1 Version2.
+ *
+ * Currently this is for CRI only.
+ *
+ */
+static int xe_pmt_read_reg(struct pci_dev *pdev, u32 guid, u32 *reg, u32 offset)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	void __iomem *disc_addr = xe->mmio.regs;
+	u32 inst;
+
+	if (FIELD_GET(GUID_DEVICE_ID, guid) != CRI_DEVICE_ID ||
+	    FIELD_GET(GUID_CAP_TYPE, guid) != CRASHLOG)
+		return -EINVAL;
+
+	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ? PUNIT_DISC_OFFSET : OOBMSM_DISC_OFFSET;
+	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
+
+	guard(mutex)(&xe->pmt.lock);
+
+	xe_pm_runtime_get(xe);
+
+	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
+
+	memcpy_fromio(reg, disc_addr, sizeof(*reg));
+
+	xe_pm_runtime_put(xe);
+
+	return 0;
+}
+
+static int xe_pmt_write_reg(struct pci_dev *pdev, u32 guid, u32 reg, u32 offset)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	void __iomem *disc_addr = xe->mmio.regs;
+	u32 inst;
+
+	if (FIELD_GET(GUID_DEVICE_ID, guid) != CRI_DEVICE_ID ||
+	    FIELD_GET(GUID_CAP_TYPE, guid) != CRASHLOG)
+		return -EINVAL;
+
+	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ? PUNIT_DISC_OFFSET : OOBMSM_DISC_OFFSET;
+	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
+
+	guard(mutex)(&xe->pmt.lock);
+
+	xe_pm_runtime_get(xe);
+
+	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
+
+	memcpy_toio(disc_addr, &reg, sizeof(reg));
+
+	xe_pm_runtime_put(xe);
+
+	return 0;
+}
+
+static struct pmt_callbacks xe_bmg_pmt_cb = {
+	.read_telem = xe_pmt_telem_read,
+};
+
+static struct pmt_callbacks xe_cri_pmt_cb = {
 	.read_telem = xe_pmt_telem_read,
+	.read_reg = xe_pmt_read_reg,
+	.write_reg = xe_pmt_write_reg,
 };
 
 static const int vsec_platforms[] = {
 	[XE_BATTLEMAGE] = XE_VSEC_BMG,
+	[XE_CRESCENTISLAND] = XE_VSEC_CRI,
 };
 
 static enum xe_vsec get_platform_info(struct xe_device *xe)
 {
-	if (xe->info.platform > XE_BATTLEMAGE)
+	if (xe->info.platform > XE_CRESCENTISLAND)
 		return XE_VSEC_UNKNOWN;
 
 	return vsec_platforms[xe->info.platform];
@@ -338,8 +410,14 @@ void xe_vsec_init(struct xe_device *xe)
 
 	switch (platform) {
 	case XE_VSEC_BMG:
-		info->priv_data = &xe_pmt_cb;
+		info->priv_data = &xe_bmg_pmt_cb;
 		break;
+
+	case XE_VSEC_CRI:
+		info->priv_data = &xe_cri_pmt_cb;
+		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
+		break;
+
 	default:
 		break;
 	}
-- 
2.52.0

Re: [PATCH 5/5] drm/xe/vsec: Crescent Island PMT callbacks

[Ilpo Järvinen]

On Tue, 27 Jan 2026, Michael J. Ruhl wrote:

> CRI PMT support requires callbacks to access the discovery status
> and control areas.  Access is a common MMIO area that requires an
> index to be set before access is allowed.
> 
> Introduce the necessary callbacks to get the status and control
> information for CRI PMT usage.
> 
> Add the glue logic to register the CRI PMT functionality.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_vsec.c | 84 ++++++++++++++++++++++++++++++++++--
>  1 file changed, 81 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 4bddc22d86c7..c5b0c16f23be 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -300,17 +300,89 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
>  	return count;
>  }
>  
> -static struct pmt_callbacks xe_pmt_cb = {
> +/**
> + * xe_pmt_read_reg() - read a crashlog register
> + * @pdev: the pcie device that register the callback
> + * @guid: PMT guid of the crashlog instance
> + * @reg: data read from the PMT data structure
> + * @offset: which data to read from the PMT data structure
> + *
> + * Read the requested PMT register based on the pcie device and guid.  The
> + * supported struct is the Crashlog Type1 Version2.
> + *
> + * Currently this is for CRI only.
> + *

An extra empty line.

-- 
 i.

> + */
> +static int xe_pmt_read_reg(struct pci_dev *pdev, u32 guid, u32 *reg, u32 offset)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +	void __iomem *disc_addr = xe->mmio.regs;
> +	u32 inst;
> +
> +	if (FIELD_GET(GUID_DEVICE_ID, guid) != CRI_DEVICE_ID ||
> +	    FIELD_GET(GUID_CAP_TYPE, guid) != CRASHLOG)
> +		return -EINVAL;
> +
> +	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ? PUNIT_DISC_OFFSET : OOBMSM_DISC_OFFSET;
> +	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
> +
> +	guard(mutex)(&xe->pmt.lock);
> +
> +	xe_pm_runtime_get(xe);
> +
> +	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +
> +	memcpy_fromio(reg, disc_addr, sizeof(*reg));
> +
> +	xe_pm_runtime_put(xe);
> +
> +	return 0;
> +}
> +
> +static int xe_pmt_write_reg(struct pci_dev *pdev, u32 guid, u32 reg, u32 offset)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +	void __iomem *disc_addr = xe->mmio.regs;
> +	u32 inst;
> +
> +	if (FIELD_GET(GUID_DEVICE_ID, guid) != CRI_DEVICE_ID ||
> +	    FIELD_GET(GUID_CAP_TYPE, guid) != CRASHLOG)
> +		return -EINVAL;
> +
> +	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ? PUNIT_DISC_OFFSET : OOBMSM_DISC_OFFSET;
> +	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
> +
> +	guard(mutex)(&xe->pmt.lock);
> +
> +	xe_pm_runtime_get(xe);
> +
> +	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +
> +	memcpy_toio(disc_addr, &reg, sizeof(reg));
> +
> +	xe_pm_runtime_put(xe);
> +
> +	return 0;
> +}
> +
> +static struct pmt_callbacks xe_bmg_pmt_cb = {
> +	.read_telem = xe_pmt_telem_read,
> +};
> +
> +static struct pmt_callbacks xe_cri_pmt_cb = {
>  	.read_telem = xe_pmt_telem_read,
> +	.read_reg = xe_pmt_read_reg,
> +	.write_reg = xe_pmt_write_reg,
>  };
>  
>  static const int vsec_platforms[] = {
>  	[XE_BATTLEMAGE] = XE_VSEC_BMG,
> +	[XE_CRESCENTISLAND] = XE_VSEC_CRI,
>  };
>  
>  static enum xe_vsec get_platform_info(struct xe_device *xe)
>  {
> -	if (xe->info.platform > XE_BATTLEMAGE)
> +	if (xe->info.platform > XE_CRESCENTISLAND)
>  		return XE_VSEC_UNKNOWN;
>  
>  	return vsec_platforms[xe->info.platform];
> @@ -338,8 +410,14 @@ void xe_vsec_init(struct xe_device *xe)
>  
>  	switch (platform) {
>  	case XE_VSEC_BMG:
> -		info->priv_data = &xe_pmt_cb;
> +		info->priv_data = &xe_bmg_pmt_cb;
>  		break;
> +
> +	case XE_VSEC_CRI:
> +		info->priv_data = &xe_cri_pmt_cb;
> +		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +		break;
> +
>  	default:
>  		break;
>  	}
> 

✓ CI.KUnit: success for Crescent Island PMT support

[Patchwork]

== Series Details ==

Series: Crescent Island PMT support
URL   : https://patchwork.freedesktop.org/series/160717/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:58:09] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:58:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:58:45] Starting KUnit Kernel (1/1)...
[18:58:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:58:45] ================== guc_buf (11 subtests) ===================
[18:58:45] [PASSED] test_smallest
[18:58:45] [PASSED] test_largest
[18:58:45] [PASSED] test_granular
[18:58:45] [PASSED] test_unique
[18:58:45] [PASSED] test_overlap
[18:58:45] [PASSED] test_reusable
[18:58:45] [PASSED] test_too_big
[18:58:45] [PASSED] test_flush
[18:58:45] [PASSED] test_lookup
[18:58:45] [PASSED] test_data
[18:58:45] [PASSED] test_class
[18:58:45] ===================== [PASSED] guc_buf =====================
[18:58:45] =================== guc_dbm (7 subtests) ===================
[18:58:45] [PASSED] test_empty
[18:58:45] [PASSED] test_default
[18:58:45] ======================== test_size  ========================
[18:58:45] [PASSED] 4
[18:58:45] [PASSED] 8
[18:58:45] [PASSED] 32
[18:58:45] [PASSED] 256
[18:58:45] ==================== [PASSED] test_size ====================
[18:58:45] ======================= test_reuse  ========================
[18:58:45] [PASSED] 4
[18:58:45] [PASSED] 8
[18:58:45] [PASSED] 32
[18:58:45] [PASSED] 256
[18:58:45] =================== [PASSED] test_reuse ====================
[18:58:45] =================== test_range_overlap  ====================
[18:58:45] [PASSED] 4
[18:58:45] [PASSED] 8
[18:58:45] [PASSED] 32
[18:58:45] [PASSED] 256
[18:58:45] =============== [PASSED] test_range_overlap ================
[18:58:45] =================== test_range_compact  ====================
[18:58:45] [PASSED] 4
[18:58:45] [PASSED] 8
[18:58:45] [PASSED] 32
[18:58:45] [PASSED] 256
[18:58:45] =============== [PASSED] test_range_compact ================
[18:58:45] ==================== test_range_spare  =====================
[18:58:45] [PASSED] 4
[18:58:45] [PASSED] 8
[18:58:45] [PASSED] 32
[18:58:45] [PASSED] 256
[18:58:45] ================ [PASSED] test_range_spare =================
[18:58:45] ===================== [PASSED] guc_dbm =====================
[18:58:45] =================== guc_idm (6 subtests) ===================
[18:58:45] [PASSED] bad_init
[18:58:45] [PASSED] no_init
[18:58:45] [PASSED] init_fini
[18:58:45] [PASSED] check_used
[18:58:45] [PASSED] check_quota
[18:58:45] [PASSED] check_all
[18:58:45] ===================== [PASSED] guc_idm =====================
[18:58:45] ================== no_relay (3 subtests) ===================
[18:58:45] [PASSED] xe_drops_guc2pf_if_not_ready
[18:58:45] [PASSED] xe_drops_guc2vf_if_not_ready
[18:58:45] [PASSED] xe_rejects_send_if_not_ready
[18:58:45] ==================== [PASSED] no_relay =====================
[18:58:45] ================== pf_relay (14 subtests) ==================
[18:58:45] [PASSED] pf_rejects_guc2pf_too_short
[18:58:45] [PASSED] pf_rejects_guc2pf_too_long
[18:58:45] [PASSED] pf_rejects_guc2pf_no_payload
[18:58:45] [PASSED] pf_fails_no_payload
[18:58:45] [PASSED] pf_fails_bad_origin
[18:58:45] [PASSED] pf_fails_bad_type
[18:58:45] [PASSED] pf_txn_reports_error
[18:58:45] [PASSED] pf_txn_sends_pf2guc
[18:58:45] [PASSED] pf_sends_pf2guc
[18:58:45] [SKIPPED] pf_loopback_nop
[18:58:45] [SKIPPED] pf_loopback_echo
[18:58:45] [SKIPPED] pf_loopback_fail
[18:58:45] [SKIPPED] pf_loopback_busy
[18:58:45] [SKIPPED] pf_loopback_retry
[18:58:45] ==================== [PASSED] pf_relay =====================
[18:58:45] ================== vf_relay (3 subtests) ===================
[18:58:45] [PASSED] vf_rejects_guc2vf_too_short
[18:58:45] [PASSED] vf_rejects_guc2vf_too_long
[18:58:45] [PASSED] vf_rejects_guc2vf_no_payload
[18:58:45] ==================== [PASSED] vf_relay =====================
[18:58:45] ================ pf_gt_config (6 subtests) =================
[18:58:45] [PASSED] fair_contexts_1vf
[18:58:45] [PASSED] fair_doorbells_1vf
[18:58:45] [PASSED] fair_ggtt_1vf
[18:58:45] ====================== fair_contexts  ======================
[18:58:45] [PASSED] 1 VF
[18:58:45] [PASSED] 2 VFs
[18:58:45] [PASSED] 3 VFs
[18:58:45] [PASSED] 4 VFs
[18:58:45] [PASSED] 5 VFs
[18:58:45] [PASSED] 6 VFs
[18:58:45] [PASSED] 7 VFs
[18:58:45] [PASSED] 8 VFs
[18:58:45] [PASSED] 9 VFs
[18:58:45] [PASSED] 10 VFs
[18:58:45] [PASSED] 11 VFs
[18:58:45] [PASSED] 12 VFs
[18:58:45] [PASSED] 13 VFs
[18:58:45] [PASSED] 14 VFs
[18:58:45] [PASSED] 15 VFs
[18:58:45] [PASSED] 16 VFs
[18:58:45] [PASSED] 17 VFs
[18:58:45] [PASSED] 18 VFs
[18:58:45] [PASSED] 19 VFs
[18:58:45] [PASSED] 20 VFs
[18:58:45] [PASSED] 21 VFs
[18:58:45] [PASSED] 22 VFs
[18:58:45] [PASSED] 23 VFs
[18:58:45] [PASSED] 24 VFs
[18:58:45] [PASSED] 25 VFs
[18:58:45] [PASSED] 26 VFs
[18:58:45] [PASSED] 27 VFs
[18:58:45] [PASSED] 28 VFs
[18:58:45] [PASSED] 29 VFs
[18:58:45] [PASSED] 30 VFs
[18:58:45] [PASSED] 31 VFs
[18:58:45] [PASSED] 32 VFs
[18:58:45] [PASSED] 33 VFs
[18:58:45] [PASSED] 34 VFs
[18:58:45] [PASSED] 35 VFs
[18:58:45] [PASSED] 36 VFs
[18:58:45] [PASSED] 37 VFs
[18:58:45] [PASSED] 38 VFs
[18:58:45] [PASSED] 39 VFs
[18:58:45] [PASSED] 40 VFs
[18:58:45] [PASSED] 41 VFs
[18:58:45] [PASSED] 42 VFs
[18:58:45] [PASSED] 43 VFs
[18:58:45] [PASSED] 44 VFs
[18:58:45] [PASSED] 45 VFs
[18:58:45] [PASSED] 46 VFs
[18:58:45] [PASSED] 47 VFs
[18:58:45] [PASSED] 48 VFs
[18:58:45] [PASSED] 49 VFs
[18:58:45] [PASSED] 50 VFs
[18:58:45] [PASSED] 51 VFs
[18:58:45] [PASSED] 52 VFs
[18:58:45] [PASSED] 53 VFs
[18:58:45] [PASSED] 54 VFs
[18:58:45] [PASSED] 55 VFs
[18:58:45] [PASSED] 56 VFs
[18:58:45] [PASSED] 57 VFs
[18:58:45] [PASSED] 58 VFs
[18:58:45] [PASSED] 59 VFs
[18:58:45] [PASSED] 60 VFs
[18:58:45] [PASSED] 61 VFs
[18:58:45] [PASSED] 62 VFs
[18:58:45] [PASSED] 63 VFs
[18:58:45] ================== [PASSED] fair_contexts ==================
[18:58:45] ===================== fair_doorbells  ======================
[18:58:45] [PASSED] 1 VF
[18:58:45] [PASSED] 2 VFs
[18:58:45] [PASSED] 3 VFs
[18:58:45] [PASSED] 4 VFs
[18:58:45] [PASSED] 5 VFs
[18:58:45] [PASSED] 6 VFs
[18:58:45] [PASSED] 7 VFs
[18:58:45] [PASSED] 8 VFs
[18:58:45] [PASSED] 9 VFs
[18:58:45] [PASSED] 10 VFs
[18:58:45] [PASSED] 11 VFs
[18:58:45] [PASSED] 12 VFs
[18:58:45] [PASSED] 13 VFs
[18:58:45] [PASSED] 14 VFs
[18:58:45] [PASSED] 15 VFs
[18:58:45] [PASSED] 16 VFs
[18:58:45] [PASSED] 17 VFs
[18:58:45] [PASSED] 18 VFs
[18:58:45] [PASSED] 19 VFs
[18:58:45] [PASSED] 20 VFs
[18:58:45] [PASSED] 21 VFs
[18:58:45] [PASSED] 22 VFs
[18:58:45] [PASSED] 23 VFs
[18:58:45] [PASSED] 24 VFs
[18:58:45] [PASSED] 25 VFs
[18:58:45] [PASSED] 26 VFs
[18:58:45] [PASSED] 27 VFs
[18:58:45] [PASSED] 28 VFs
[18:58:45] [PASSED] 29 VFs
[18:58:45] [PASSED] 30 VFs
[18:58:45] [PASSED] 31 VFs
[18:58:45] [PASSED] 32 VFs
[18:58:45] [PASSED] 33 VFs
[18:58:45] [PASSED] 34 VFs
[18:58:45] [PASSED] 35 VFs
[18:58:45] [PASSED] 36 VFs
[18:58:45] [PASSED] 37 VFs
[18:58:45] [PASSED] 38 VFs
[18:58:45] [PASSED] 39 VFs
[18:58:45] [PASSED] 40 VFs
[18:58:45] [PASSED] 41 VFs
[18:58:45] [PASSED] 42 VFs
[18:58:45] [PASSED] 43 VFs
[18:58:45] [PASSED] 44 VFs
[18:58:45] [PASSED] 45 VFs
[18:58:45] [PASSED] 46 VFs
[18:58:45] [PASSED] 47 VFs
[18:58:45] [PASSED] 48 VFs
[18:58:45] [PASSED] 49 VFs
[18:58:45] [PASSED] 50 VFs
[18:58:45] [PASSED] 51 VFs
[18:58:45] [PASSED] 52 VFs
[18:58:45] [PASSED] 53 VFs
[18:58:45] [PASSED] 54 VFs
[18:58:45] [PASSED] 55 VFs
[18:58:45] [PASSED] 56 VFs
[18:58:45] [PASSED] 57 VFs
[18:58:45] [PASSED] 58 VFs
[18:58:45] [PASSED] 59 VFs
[18:58:45] [PASSED] 60 VFs
[18:58:45] [PASSED] 61 VFs
[18:58:45] [PASSED] 62 VFs
[18:58:45] [PASSED] 63 VFs
[18:58:45] ================= [PASSED] fair_doorbells ==================
[18:58:45] ======================== fair_ggtt  ========================
[18:58:45] [PASSED] 1 VF
[18:58:45] [PASSED] 2 VFs
[18:58:45] [PASSED] 3 VFs
[18:58:45] [PASSED] 4 VFs
[18:58:45] [PASSED] 5 VFs
[18:58:45] [PASSED] 6 VFs
[18:58:45] [PASSED] 7 VFs
[18:58:45] [PASSED] 8 VFs
[18:58:45] [PASSED] 9 VFs
[18:58:45] [PASSED] 10 VFs
[18:58:45] [PASSED] 11 VFs
[18:58:45] [PASSED] 12 VFs
[18:58:45] [PASSED] 13 VFs
[18:58:45] [PASSED] 14 VFs
[18:58:45] [PASSED] 15 VFs
[18:58:45] [PASSED] 16 VFs
[18:58:45] [PASSED] 17 VFs
[18:58:45] [PASSED] 18 VFs
[18:58:45] [PASSED] 19 VFs
[18:58:45] [PASSED] 20 VFs
[18:58:45] [PASSED] 21 VFs
[18:58:45] [PASSED] 22 VFs
[18:58:45] [PASSED] 23 VFs
[18:58:45] [PASSED] 24 VFs
[18:58:45] [PASSED] 25 VFs
[18:58:45] [PASSED] 26 VFs
[18:58:45] [PASSED] 27 VFs
[18:58:45] [PASSED] 28 VFs
[18:58:45] [PASSED] 29 VFs
[18:58:45] [PASSED] 30 VFs
[18:58:45] [PASSED] 31 VFs
[18:58:45] [PASSED] 32 VFs
[18:58:45] [PASSED] 33 VFs
[18:58:45] [PASSED] 34 VFs
[18:58:45] [PASSED] 35 VFs
[18:58:45] [PASSED] 36 VFs
[18:58:45] [PASSED] 37 VFs
[18:58:45] [PASSED] 38 VFs
[18:58:45] [PASSED] 39 VFs
[18:58:45] [PASSED] 40 VFs
[18:58:45] [PASSED] 41 VFs
[18:58:45] [PASSED] 42 VFs
[18:58:45] [PASSED] 43 VFs
[18:58:45] [PASSED] 44 VFs
[18:58:45] [PASSED] 45 VFs
[18:58:45] [PASSED] 46 VFs
[18:58:45] [PASSED] 47 VFs
[18:58:45] [PASSED] 48 VFs
[18:58:45] [PASSED] 49 VFs
[18:58:45] [PASSED] 50 VFs
[18:58:45] [PASSED] 51 VFs
[18:58:45] [PASSED] 52 VFs
[18:58:45] [PASSED] 53 VFs
[18:58:45] [PASSED] 54 VFs
[18:58:45] [PASSED] 55 VFs
[18:58:45] [PASSED] 56 VFs
[18:58:45] [PASSED] 57 VFs
[18:58:45] [PASSED] 58 VFs
[18:58:45] [PASSED] 59 VFs
[18:58:45] [PASSED] 60 VFs
[18:58:45] [PASSED] 61 VFs
[18:58:45] [PASSED] 62 VFs
[18:58:45] [PASSED] 63 VFs
[18:58:45] ==================== [PASSED] fair_ggtt ====================
[18:58:45] ================== [PASSED] pf_gt_config ===================
[18:58:45] ===================== lmtt (1 subtest) =====================
[18:58:45] ======================== test_ops  =========================
[18:58:45] [PASSED] 2-level
[18:58:45] [PASSED] multi-level
[18:58:45] ==================== [PASSED] test_ops =====================
[18:58:45] ====================== [PASSED] lmtt =======================
[18:58:45] ================= pf_service (11 subtests) =================
[18:58:45] [PASSED] pf_negotiate_any
[18:58:45] [PASSED] pf_negotiate_base_match
[18:58:45] [PASSED] pf_negotiate_base_newer
[18:58:45] [PASSED] pf_negotiate_base_next
[18:58:45] [SKIPPED] pf_negotiate_base_older
[18:58:45] [PASSED] pf_negotiate_base_prev
[18:58:45] [PASSED] pf_negotiate_latest_match
[18:58:45] [PASSED] pf_negotiate_latest_newer
[18:58:45] [PASSED] pf_negotiate_latest_next
[18:58:45] [SKIPPED] pf_negotiate_latest_older
[18:58:45] [SKIPPED] pf_negotiate_latest_prev
[18:58:45] =================== [PASSED] pf_service ====================
[18:58:45] ================= xe_guc_g2g (2 subtests) ==================
[18:58:45] ============== xe_live_guc_g2g_kunit_default  ==============
[18:58:45] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:58:45] ============== xe_live_guc_g2g_kunit_allmem  ===============
[18:58:45] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:58:45] =================== [SKIPPED] xe_guc_g2g ===================
[18:58:45] =================== xe_mocs (2 subtests) ===================
[18:58:45] ================ xe_live_mocs_kernel_kunit  ================
[18:58:45] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:58:45] ================ xe_live_mocs_reset_kunit  =================
[18:58:45] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:58:45] ==================== [SKIPPED] xe_mocs =====================
[18:58:45] ================= xe_migrate (2 subtests) ==================
[18:58:45] ================= xe_migrate_sanity_kunit  =================
[18:58:45] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:58:45] ================== xe_validate_ccs_kunit  ==================
[18:58:45] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:58:45] =================== [SKIPPED] xe_migrate ===================
[18:58:45] ================== xe_dma_buf (1 subtest) ==================
[18:58:45] ==================== xe_dma_buf_kunit  =====================
[18:58:45] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:58:45] =================== [SKIPPED] xe_dma_buf ===================
[18:58:45] ================= xe_bo_shrink (1 subtest) =================
[18:58:45] =================== xe_bo_shrink_kunit  ====================
[18:58:45] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:58:45] ================== [SKIPPED] xe_bo_shrink ==================
[18:58:45] ==================== xe_bo (2 subtests) ====================
[18:58:45] ================== xe_ccs_migrate_kunit  ===================
[18:58:45] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:58:45] ==================== xe_bo_evict_kunit  ====================
[18:58:45] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:58:45] ===================== [SKIPPED] xe_bo ======================
[18:58:45] ==================== args (13 subtests) ====================
[18:58:45] [PASSED] count_args_test
[18:58:45] [PASSED] call_args_example
[18:58:45] [PASSED] call_args_test
[18:58:45] [PASSED] drop_first_arg_example
[18:58:45] [PASSED] drop_first_arg_test
[18:58:45] [PASSED] first_arg_example
[18:58:45] [PASSED] first_arg_test
[18:58:45] [PASSED] last_arg_example
[18:58:45] [PASSED] last_arg_test
[18:58:45] [PASSED] pick_arg_example
[18:58:45] [PASSED] if_args_example
[18:58:45] [PASSED] if_args_test
[18:58:45] [PASSED] sep_comma_example
[18:58:45] ====================== [PASSED] args =======================
[18:58:45] =================== xe_pci (3 subtests) ====================
[18:58:45] ==================== check_graphics_ip  ====================
[18:58:45] [PASSED] 12.00 Xe_LP
[18:58:45] [PASSED] 12.10 Xe_LP+
[18:58:45] [PASSED] 12.55 Xe_HPG
[18:58:45] [PASSED] 12.60 Xe_HPC
[18:58:45] [PASSED] 12.70 Xe_LPG
[18:58:45] [PASSED] 12.71 Xe_LPG
[18:58:45] [PASSED] 12.74 Xe_LPG+
[18:58:45] [PASSED] 20.01 Xe2_HPG
[18:58:45] [PASSED] 20.02 Xe2_HPG
[18:58:45] [PASSED] 20.04 Xe2_LPG
[18:58:45] [PASSED] 30.00 Xe3_LPG
[18:58:45] [PASSED] 30.01 Xe3_LPG
[18:58:45] [PASSED] 30.03 Xe3_LPG
[18:58:45] [PASSED] 30.04 Xe3_LPG
[18:58:45] [PASSED] 30.05 Xe3_LPG
[18:58:45] [PASSED] 35.11 Xe3p_XPC
[18:58:45] ================ [PASSED] check_graphics_ip ================
[18:58:45] ===================== check_media_ip  ======================
[18:58:45] [PASSED] 12.00 Xe_M
[18:58:45] [PASSED] 12.55 Xe_HPM
[18:58:45] [PASSED] 13.00 Xe_LPM+
[18:58:45] [PASSED] 13.01 Xe2_HPM
[18:58:45] [PASSED] 20.00 Xe2_LPM
[18:58:45] [PASSED] 30.00 Xe3_LPM
[18:58:45] [PASSED] 30.02 Xe3_LPM
[18:58:45] [PASSED] 35.00 Xe3p_LPM
[18:58:45] [PASSED] 35.03 Xe3p_HPM
[18:58:45] ================= [PASSED] check_media_ip ==================
[18:58:45] =================== check_platform_desc  ===================
[18:58:45] [PASSED] 0x9A60 (TIGERLAKE)
[18:58:45] [PASSED] 0x9A68 (TIGERLAKE)
[18:58:45] [PASSED] 0x9A70 (TIGERLAKE)
[18:58:45] [PASSED] 0x9A40 (TIGERLAKE)
[18:58:45] [PASSED] 0x9A49 (TIGERLAKE)
[18:58:45] [PASSED] 0x9A59 (TIGERLAKE)
[18:58:45] [PASSED] 0x9A78 (TIGERLAKE)
[18:58:45] [PASSED] 0x9AC0 (TIGERLAKE)
[18:58:45] [PASSED] 0x9AC9 (TIGERLAKE)
[18:58:45] [PASSED] 0x9AD9 (TIGERLAKE)
[18:58:45] [PASSED] 0x9AF8 (TIGERLAKE)
[18:58:45] [PASSED] 0x4C80 (ROCKETLAKE)
[18:58:45] [PASSED] 0x4C8A (ROCKETLAKE)
[18:58:45] [PASSED] 0x4C8B (ROCKETLAKE)
[18:58:45] [PASSED] 0x4C8C (ROCKETLAKE)
[18:58:45] [PASSED] 0x4C90 (ROCKETLAKE)
[18:58:45] [PASSED] 0x4C9A (ROCKETLAKE)
[18:58:45] [PASSED] 0x4680 (ALDERLAKE_S)
[18:58:45] [PASSED] 0x4682 (ALDERLAKE_S)
[18:58:45] [PASSED] 0x4688 (ALDERLAKE_S)
[18:58:45] [PASSED] 0x468A (ALDERLAKE_S)
[18:58:45] [PASSED] 0x468B (ALDERLAKE_S)
[18:58:45] [PASSED] 0x4690 (ALDERLAKE_S)
[18:58:45] [PASSED] 0x4692 (ALDERLAKE_S)
[18:58:45] [PASSED] 0x4693 (ALDERLAKE_S)
[18:58:45] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46AA (ALDERLAKE_P)
[18:58:45] [PASSED] 0x462A (ALDERLAKE_P)
[18:58:45] [PASSED] 0x4626 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[18:58:45] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:58:45] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:58:45] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:58:45] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:58:45] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:58:45] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:58:45] [PASSED] 0xA721 (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA720 (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:58:45] [PASSED] 0xA780 (ALDERLAKE_S)
[18:58:45] [PASSED] 0xA781 (ALDERLAKE_S)
[18:58:45] [PASSED] 0xA782 (ALDERLAKE_S)
[18:58:45] [PASSED] 0xA783 (ALDERLAKE_S)
[18:58:45] [PASSED] 0xA788 (ALDERLAKE_S)
[18:58:45] [PASSED] 0xA789 (ALDERLAKE_S)
[18:58:45] [PASSED] 0xA78A (ALDERLAKE_S)
[18:58:45] [PASSED] 0xA78B (ALDERLAKE_S)
[18:58:45] [PASSED] 0x4905 (DG1)
[18:58:45] [PASSED] 0x4906 (DG1)
[18:58:45] [PASSED] 0x4907 (DG1)
[18:58:45] [PASSED] 0x4908 (DG1)
[18:58:45] [PASSED] 0x4909 (DG1)
[18:58:45] [PASSED] 0x56C0 (DG2)
[18:58:45] [PASSED] 0x56C2 (DG2)
[18:58:45] [PASSED] 0x56C1 (DG2)
[18:58:45] [PASSED] 0x7D51 (METEORLAKE)
[18:58:45] [PASSED] 0x7DD1 (METEORLAKE)
[18:58:45] [PASSED] 0x7D41 (METEORLAKE)
[18:58:45] [PASSED] 0x7D67 (METEORLAKE)
[18:58:45] [PASSED] 0xB640 (METEORLAKE)
[18:58:45] [PASSED] 0x56A0 (DG2)
[18:58:45] [PASSED] 0x56A1 (DG2)
[18:58:45] [PASSED] 0x56A2 (DG2)
[18:58:45] [PASSED] 0x56BE (DG2)
[18:58:45] [PASSED] 0x56BF (DG2)
[18:58:45] [PASSED] 0x5690 (DG2)
[18:58:45] [PASSED] 0x5691 (DG2)
[18:58:45] [PASSED] 0x5692 (DG2)
[18:58:45] [PASSED] 0x56A5 (DG2)
[18:58:45] [PASSED] 0x56A6 (DG2)
[18:58:45] [PASSED] 0x56B0 (DG2)
[18:58:45] [PASSED] 0x56B1 (DG2)
[18:58:45] [PASSED] 0x56BA (DG2)
[18:58:45] [PASSED] 0x56BB (DG2)
[18:58:45] [PASSED] 0x56BC (DG2)
[18:58:45] [PASSED] 0x56BD (DG2)
[18:58:45] [PASSED] 0x5693 (DG2)
[18:58:45] [PASSED] 0x5694 (DG2)
[18:58:45] [PASSED] 0x5695 (DG2)
[18:58:45] [PASSED] 0x56A3 (DG2)
[18:58:45] [PASSED] 0x56A4 (DG2)
[18:58:45] [PASSED] 0x56B2 (DG2)
[18:58:45] [PASSED] 0x56B3 (DG2)
[18:58:45] [PASSED] 0x5696 (DG2)
[18:58:45] [PASSED] 0x5697 (DG2)
[18:58:45] [PASSED] 0xB69 (PVC)
[18:58:45] [PASSED] 0xB6E (PVC)
[18:58:45] [PASSED] 0xBD4 (PVC)
[18:58:45] [PASSED] 0xBD5 (PVC)
[18:58:45] [PASSED] 0xBD6 (PVC)
[18:58:45] [PASSED] 0xBD7 (PVC)
[18:58:45] [PASSED] 0xBD8 (PVC)
[18:58:45] [PASSED] 0xBD9 (PVC)
[18:58:45] [PASSED] 0xBDA (PVC)
[18:58:45] [PASSED] 0xBDB (PVC)
[18:58:45] [PASSED] 0xBE0 (PVC)
[18:58:45] [PASSED] 0xBE1 (PVC)
[18:58:45] [PASSED] 0xBE5 (PVC)
[18:58:45] [PASSED] 0x7D40 (METEORLAKE)
[18:58:45] [PASSED] 0x7D45 (METEORLAKE)
[18:58:45] [PASSED] 0x7D55 (METEORLAKE)
[18:58:45] [PASSED] 0x7D60 (METEORLAKE)
[18:58:45] [PASSED] 0x7DD5 (METEORLAKE)
[18:58:45] [PASSED] 0x6420 (LUNARLAKE)
[18:58:45] [PASSED] 0x64A0 (LUNARLAKE)
[18:58:45] [PASSED] 0x64B0 (LUNARLAKE)
[18:58:45] [PASSED] 0xE202 (BATTLEMAGE)
[18:58:45] [PASSED] 0xE209 (BATTLEMAGE)
[18:58:45] [PASSED] 0xE20B (BATTLEMAGE)
[18:58:45] [PASSED] 0xE20C (BATTLEMAGE)
[18:58:45] [PASSED] 0xE20D (BATTLEMAGE)
[18:58:45] [PASSED] 0xE210 (BATTLEMAGE)
[18:58:45] [PASSED] 0xE211 (BATTLEMAGE)
[18:58:45] [PASSED] 0xE212 (BATTLEMAGE)
[18:58:45] [PASSED] 0xE216 (BATTLEMAGE)
[18:58:45] [PASSED] 0xE220 (BATTLEMAGE)
[18:58:45] [PASSED] 0xE221 (BATTLEMAGE)
[18:58:45] [PASSED] 0xE222 (BATTLEMAGE)
[18:58:45] [PASSED] 0xE223 (BATTLEMAGE)
[18:58:45] [PASSED] 0xB080 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB081 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB082 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB083 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB084 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB085 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB086 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB087 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB08F (PANTHERLAKE)
[18:58:45] [PASSED] 0xB090 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:58:45] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:58:45] [PASSED] 0xFD80 (PANTHERLAKE)
[18:58:45] [PASSED] 0xFD81 (PANTHERLAKE)
[18:58:45] [PASSED] 0xD740 (NOVALAKE_S)
[18:58:45] [PASSED] 0xD741 (NOVALAKE_S)
[18:58:45] [PASSED] 0xD742 (NOVALAKE_S)
[18:58:45] [PASSED] 0xD743 (NOVALAKE_S)
[18:58:45] [PASSED] 0xD744 (NOVALAKE_S)
[18:58:45] [PASSED] 0xD745 (NOVALAKE_S)
[18:58:45] [PASSED] 0x674C (CRESCENTISLAND)
[18:58:45] =============== [PASSED] check_platform_desc ===============
[18:58:45] ===================== [PASSED] xe_pci ======================
[18:58:45] =================== xe_rtp (2 subtests) ====================
[18:58:45] =============== xe_rtp_process_to_sr_tests  ================
[18:58:45] [PASSED] coalesce-same-reg
[18:58:45] [PASSED] no-match-no-add
[18:58:45] [PASSED] match-or
[18:58:45] [PASSED] match-or-xfail
[18:58:45] [PASSED] no-match-no-add-multiple-rules
[18:58:45] [PASSED] two-regs-two-entries
[18:58:45] [PASSED] clr-one-set-other
[18:58:45] [PASSED] set-field
[18:58:45] [PASSED] conflict-duplicate
[18:58:45] [PASSED] conflict-not-disjoint
[18:58:45] [PASSED] conflict-reg-type
[18:58:45] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:58:45] ================== xe_rtp_process_tests  ===================
[18:58:45] [PASSED] active1
[18:58:45] [PASSED] active2
[18:58:45] [PASSED] active-inactive
[18:58:45] [PASSED] inactive-active
[18:58:45] [PASSED] inactive-1st_or_active-inactive
[18:58:45] [PASSED] inactive-2nd_or_active-inactive
[18:58:45] [PASSED] inactive-last_or_active-inactive
[18:58:45] [PASSED] inactive-no_or_active-inactive
[18:58:45] ============== [PASSED] xe_rtp_process_tests ===============
[18:58:45] ===================== [PASSED] xe_rtp ======================
[18:58:45] ==================== xe_wa (1 subtest) =====================
[18:58:45] ======================== xe_wa_gt  =========================
[18:58:45] [PASSED] TIGERLAKE B0
[18:58:45] [PASSED] DG1 A0
[18:58:45] [PASSED] DG1 B0
[18:58:45] [PASSED] ALDERLAKE_S A0
[18:58:45] [PASSED] ALDERLAKE_S B0
[18:58:45] [PASSED] ALDERLAKE_S C0
[18:58:45] [PASSED] ALDERLAKE_S D0
[18:58:45] [PASSED] ALDERLAKE_P A0
[18:58:45] [PASSED] ALDERLAKE_P B0
[18:58:45] [PASSED] ALDERLAKE_P C0
[18:58:45] [PASSED] ALDERLAKE_S RPLS D0
[18:58:45] [PASSED] ALDERLAKE_P RPLU E0
[18:58:45] [PASSED] DG2 G10 C0
[18:58:45] [PASSED] DG2 G11 B1
[18:58:45] [PASSED] DG2 G12 A1
[18:58:45] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:58:45] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:58:45] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:58:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:58:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:58:45] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:58:45] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:58:45] ==================== [PASSED] xe_wa_gt =====================
[18:58:45] ====================== [PASSED] xe_wa ======================
[18:58:45] ============================================================
[18:58:45] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[18:58:45] Elapsed time: 36.392s total, 4.213s configuring, 31.662s building, 0.476s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:58:45] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:58:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:59:12] Starting KUnit Kernel (1/1)...
[18:59:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:59:12] ============ drm_test_pick_cmdline (2 subtests) ============
[18:59:12] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[18:59:12] =============== drm_test_pick_cmdline_named  ===============
[18:59:12] [PASSED] NTSC
[18:59:12] [PASSED] NTSC-J
[18:59:12] [PASSED] PAL
[18:59:12] [PASSED] PAL-M
[18:59:12] =========== [PASSED] drm_test_pick_cmdline_named ===========
[18:59:12] ============== [PASSED] drm_test_pick_cmdline ==============
[18:59:12] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:59:12] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:59:12] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:59:12] =========== drm_validate_clone_mode (2 subtests) ===========
[18:59:12] ============== drm_test_check_in_clone_mode  ===============
[18:59:12] [PASSED] in_clone_mode
[18:59:12] [PASSED] not_in_clone_mode
[18:59:12] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:59:12] =============== drm_test_check_valid_clones  ===============
[18:59:12] [PASSED] not_in_clone_mode
[18:59:12] [PASSED] valid_clone
[18:59:12] [PASSED] invalid_clone
[18:59:12] =========== [PASSED] drm_test_check_valid_clones ===========
[18:59:12] ============= [PASSED] drm_validate_clone_mode =============
[18:59:12] ============= drm_validate_modeset (1 subtest) =============
[18:59:12] [PASSED] drm_test_check_connector_changed_modeset
[18:59:12] ============== [PASSED] drm_validate_modeset ===============
[18:59:12] ====== drm_test_bridge_get_current_state (2 subtests) ======
[18:59:12] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:59:12] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[18:59:12] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:59:12] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:59:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:59:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:59:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[18:59:12] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:59:12] ============== drm_bridge_alloc (2 subtests) ===============
[18:59:12] [PASSED] drm_test_drm_bridge_alloc_basic
[18:59:12] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:59:12] ================ [PASSED] drm_bridge_alloc =================
[18:59:12] ================== drm_buddy (9 subtests) ==================
[18:59:12] [PASSED] drm_test_buddy_alloc_limit
[18:59:12] [PASSED] drm_test_buddy_alloc_optimistic
[18:59:12] [PASSED] drm_test_buddy_alloc_pessimistic
[18:59:12] [PASSED] drm_test_buddy_alloc_pathological
[18:59:12] [PASSED] drm_test_buddy_alloc_contiguous
[18:59:12] [PASSED] drm_test_buddy_alloc_clear
[18:59:12] [PASSED] drm_test_buddy_alloc_range_bias
[18:59:12] [PASSED] drm_test_buddy_fragmentation_performance
[18:59:12] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[18:59:12] ==================== [PASSED] drm_buddy ====================
[18:59:12] ============= drm_cmdline_parser (40 subtests) =============
[18:59:12] [PASSED] drm_test_cmdline_force_d_only
[18:59:12] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:59:12] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:59:12] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:59:12] [PASSED] drm_test_cmdline_force_e_only
[18:59:12] [PASSED] drm_test_cmdline_res
[18:59:12] [PASSED] drm_test_cmdline_res_vesa
[18:59:12] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:59:12] [PASSED] drm_test_cmdline_res_rblank
[18:59:12] [PASSED] drm_test_cmdline_res_bpp
[18:59:12] [PASSED] drm_test_cmdline_res_refresh
[18:59:12] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:59:12] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:59:12] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:59:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:59:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:59:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:59:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:59:12] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:59:12] [PASSED] drm_test_cmdline_res_margins_force_on
[18:59:12] [PASSED] drm_test_cmdline_res_vesa_margins
[18:59:12] [PASSED] drm_test_cmdline_name
[18:59:12] [PASSED] drm_test_cmdline_name_bpp
[18:59:12] [PASSED] drm_test_cmdline_name_option
[18:59:12] [PASSED] drm_test_cmdline_name_bpp_option
[18:59:12] [PASSED] drm_test_cmdline_rotate_0
[18:59:12] [PASSED] drm_test_cmdline_rotate_90
[18:59:12] [PASSED] drm_test_cmdline_rotate_180
[18:59:12] [PASSED] drm_test_cmdline_rotate_270
[18:59:12] [PASSED] drm_test_cmdline_hmirror
[18:59:12] [PASSED] drm_test_cmdline_vmirror
[18:59:12] [PASSED] drm_test_cmdline_margin_options
[18:59:12] [PASSED] drm_test_cmdline_multiple_options
[18:59:12] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:59:12] [PASSED] drm_test_cmdline_extra_and_option
[18:59:12] [PASSED] drm_test_cmdline_freestanding_options
[18:59:12] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:59:12] [PASSED] drm_test_cmdline_panel_orientation
[18:59:12] ================ drm_test_cmdline_invalid  =================
[18:59:12] [PASSED] margin_only
[18:59:12] [PASSED] interlace_only
[18:59:12] [PASSED] res_missing_x
[18:59:12] [PASSED] res_missing_y
[18:59:12] [PASSED] res_bad_y
[18:59:12] [PASSED] res_missing_y_bpp
[18:59:12] [PASSED] res_bad_bpp
[18:59:12] [PASSED] res_bad_refresh
[18:59:12] [PASSED] res_bpp_refresh_force_on_off
[18:59:12] [PASSED] res_invalid_mode
[18:59:12] [PASSED] res_bpp_wrong_place_mode
[18:59:12] [PASSED] name_bpp_refresh
[18:59:12] [PASSED] name_refresh
[18:59:12] [PASSED] name_refresh_wrong_mode
[18:59:12] [PASSED] name_refresh_invalid_mode
[18:59:12] [PASSED] rotate_multiple
[18:59:12] [PASSED] rotate_invalid_val
[18:59:12] [PASSED] rotate_truncated
[18:59:12] [PASSED] invalid_option
[18:59:12] [PASSED] invalid_tv_option
[18:59:12] [PASSED] truncated_tv_option
[18:59:12] ============ [PASSED] drm_test_cmdline_invalid =============
[18:59:12] =============== drm_test_cmdline_tv_options  ===============
[18:59:12] [PASSED] NTSC
[18:59:12] [PASSED] NTSC_443
[18:59:12] [PASSED] NTSC_J
[18:59:12] [PASSED] PAL
[18:59:12] [PASSED] PAL_M
[18:59:12] [PASSED] PAL_N
[18:59:12] [PASSED] SECAM
[18:59:12] [PASSED] MONO_525
[18:59:12] [PASSED] MONO_625
[18:59:12] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:59:12] =============== [PASSED] drm_cmdline_parser ================
[18:59:12] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:59:12] [PASSED] drm_test_connector_hdmi_init_valid
[18:59:12] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:59:12] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:59:12] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:59:12] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:59:12] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:59:12] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:59:12] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:59:12] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[18:59:12] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:59:12] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:59:12] [PASSED] supported_formats=0x3 yuv420_allowed=1
[18:59:12] [PASSED] supported_formats=0x3 yuv420_allowed=0
[18:59:12] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:59:12] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:59:12] [PASSED] drm_test_connector_hdmi_init_null_product
[18:59:12] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:59:12] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:59:12] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:59:12] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:59:12] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:59:12] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:59:12] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:59:12] ========= drm_test_connector_hdmi_init_type_valid  =========
[18:59:12] [PASSED] HDMI-A
[18:59:12] [PASSED] HDMI-B
[18:59:12] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:59:12] ======== drm_test_connector_hdmi_init_type_invalid  ========
[18:59:12] [PASSED] Unknown
[18:59:12] [PASSED] VGA
[18:59:12] [PASSED] DVI-I
[18:59:12] [PASSED] DVI-D
[18:59:12] [PASSED] DVI-A
[18:59:12] [PASSED] Composite
[18:59:12] [PASSED] SVIDEO
[18:59:12] [PASSED] LVDS
[18:59:12] [PASSED] Component
[18:59:12] [PASSED] DIN
[18:59:12] [PASSED] DP
[18:59:12] [PASSED] TV
[18:59:12] [PASSED] eDP
[18:59:12] [PASSED] Virtual
[18:59:12] [PASSED] DSI
[18:59:12] [PASSED] DPI
[18:59:12] [PASSED] Writeback
[18:59:12] [PASSED] SPI
[18:59:12] [PASSED] USB
[18:59:12] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:59:12] ============ [PASSED] drmm_connector_hdmi_init =============
[18:59:12] ============= drmm_connector_init (3 subtests) =============
[18:59:12] [PASSED] drm_test_drmm_connector_init
[18:59:12] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:59:12] ========= drm_test_drmm_connector_init_type_valid  =========
[18:59:12] [PASSED] Unknown
[18:59:12] [PASSED] VGA
[18:59:12] [PASSED] DVI-I
[18:59:12] [PASSED] DVI-D
[18:59:12] [PASSED] DVI-A
[18:59:12] [PASSED] Composite
[18:59:12] [PASSED] SVIDEO
[18:59:12] [PASSED] LVDS
[18:59:12] [PASSED] Component
[18:59:12] [PASSED] DIN
[18:59:12] [PASSED] DP
[18:59:12] [PASSED] HDMI-A
[18:59:12] [PASSED] HDMI-B
[18:59:12] [PASSED] TV
[18:59:12] [PASSED] eDP
[18:59:12] [PASSED] Virtual
[18:59:12] [PASSED] DSI
[18:59:12] [PASSED] DPI
[18:59:12] [PASSED] Writeback
[18:59:12] [PASSED] SPI
[18:59:12] [PASSED] USB
[18:59:12] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:59:12] =============== [PASSED] drmm_connector_init ===============
[18:59:12] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_init
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:59:12] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[18:59:12] [PASSED] Unknown
[18:59:12] [PASSED] VGA
[18:59:12] [PASSED] DVI-I
[18:59:12] [PASSED] DVI-D
[18:59:12] [PASSED] DVI-A
[18:59:12] [PASSED] Composite
[18:59:12] [PASSED] SVIDEO
[18:59:12] [PASSED] LVDS
[18:59:12] [PASSED] Component
[18:59:12] [PASSED] DIN
[18:59:12] [PASSED] DP
[18:59:12] [PASSED] HDMI-A
[18:59:12] [PASSED] HDMI-B
[18:59:12] [PASSED] TV
[18:59:12] [PASSED] eDP
[18:59:12] [PASSED] Virtual
[18:59:12] [PASSED] DSI
[18:59:12] [PASSED] DPI
[18:59:12] [PASSED] Writeback
[18:59:12] [PASSED] SPI
[18:59:12] [PASSED] USB
[18:59:12] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:59:12] ======== drm_test_drm_connector_dynamic_init_name  =========
[18:59:12] [PASSED] Unknown
[18:59:12] [PASSED] VGA
[18:59:12] [PASSED] DVI-I
[18:59:12] [PASSED] DVI-D
[18:59:12] [PASSED] DVI-A
[18:59:12] [PASSED] Composite
[18:59:12] [PASSED] SVIDEO
[18:59:12] [PASSED] LVDS
[18:59:12] [PASSED] Component
[18:59:12] [PASSED] DIN
[18:59:12] [PASSED] DP
[18:59:12] [PASSED] HDMI-A
[18:59:12] [PASSED] HDMI-B
[18:59:12] [PASSED] TV
[18:59:12] [PASSED] eDP
[18:59:12] [PASSED] Virtual
[18:59:12] [PASSED] DSI
[18:59:12] [PASSED] DPI
[18:59:12] [PASSED] Writeback
[18:59:12] [PASSED] SPI
[18:59:12] [PASSED] USB
[18:59:12] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:59:12] =========== [PASSED] drm_connector_dynamic_init ============
[18:59:12] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:59:12] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:59:12] ======= drm_connector_dynamic_register (7 subtests) ========
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:59:12] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:59:12] ========= [PASSED] drm_connector_dynamic_register ==========
[18:59:12] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:59:12] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:59:12] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:59:12] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:59:12] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:59:12] ========== drm_test_get_tv_mode_from_name_valid  ===========
[18:59:12] [PASSED] NTSC
[18:59:12] [PASSED] NTSC-443
[18:59:12] [PASSED] NTSC-J
[18:59:12] [PASSED] PAL
[18:59:12] [PASSED] PAL-M
[18:59:12] [PASSED] PAL-N
[18:59:12] [PASSED] SECAM
[18:59:12] [PASSED] Mono
[18:59:12] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:59:12] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:59:12] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:59:12] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:59:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:59:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:59:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:59:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:59:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:59:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:59:12] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[18:59:12] [PASSED] VIC 96
[18:59:12] [PASSED] VIC 97
[18:59:12] [PASSED] VIC 101
[18:59:12] [PASSED] VIC 102
[18:59:12] [PASSED] VIC 106
[18:59:12] [PASSED] VIC 107
[18:59:12] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:59:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:59:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:59:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:59:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:59:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:59:12] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:59:12] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:59:12] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[18:59:12] [PASSED] Automatic
[18:59:12] [PASSED] Full
[18:59:12] [PASSED] Limited 16:235
[18:59:12] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:59:12] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:59:12] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:59:12] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:59:12] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[18:59:12] [PASSED] RGB
[18:59:12] [PASSED] YUV 4:2:0
[18:59:12] [PASSED] YUV 4:2:2
[18:59:12] [PASSED] YUV 4:4:4
[18:59:12] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:59:12] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:59:12] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:59:12] ============= drm_damage_helper (21 subtests) ==============
[18:59:12] [PASSED] drm_test_damage_iter_no_damage
[18:59:12] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:59:12] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:59:12] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:59:12] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:59:12] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:59:12] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:59:12] [PASSED] drm_test_damage_iter_simple_damage
[18:59:12] [PASSED] drm_test_damage_iter_single_damage
[18:59:12] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:59:12] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:59:12] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:59:12] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:59:12] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:59:12] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:59:12] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:59:12] [PASSED] drm_test_damage_iter_damage
[18:59:12] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:59:12] [PASSED] drm_test_damage_iter_damage_one_outside
[18:59:12] [PASSED] drm_test_damage_iter_damage_src_moved
[18:59:12] [PASSED] drm_test_damage_iter_damage_not_visible
[18:59:12] ================ [PASSED] drm_damage_helper ================
[18:59:12] ============== drm_dp_mst_helper (3 subtests) ==============
[18:59:12] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[18:59:12] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:59:12] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:59:12] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:59:12] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:59:12] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:59:12] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:59:12] ============== drm_test_dp_mst_calc_pbn_div  ===============
[18:59:12] [PASSED] Link rate 2000000 lane count 4
[18:59:12] [PASSED] Link rate 2000000 lane count 2
[18:59:12] [PASSED] Link rate 2000000 lane count 1
[18:59:12] [PASSED] Link rate 1350000 lane count 4
[18:59:12] [PASSED] Link rate 1350000 lane count 2
[18:59:12] [PASSED] Link rate 1350000 lane count 1
[18:59:12] [PASSED] Link rate 1000000 lane count 4
[18:59:12] [PASSED] Link rate 1000000 lane count 2
[18:59:12] [PASSED] Link rate 1000000 lane count 1
[18:59:12] [PASSED] Link rate 810000 lane count 4
[18:59:12] [PASSED] Link rate 810000 lane count 2
[18:59:12] [PASSED] Link rate 810000 lane count 1
[18:59:12] [PASSED] Link rate 540000 lane count 4
[18:59:12] [PASSED] Link rate 540000 lane count 2
[18:59:12] [PASSED] Link rate 540000 lane count 1
[18:59:12] [PASSED] Link rate 270000 lane count 4
[18:59:12] [PASSED] Link rate 270000 lane count 2
[18:59:12] [PASSED] Link rate 270000 lane count 1
[18:59:12] [PASSED] Link rate 162000 lane count 4
[18:59:12] [PASSED] Link rate 162000 lane count 2
[18:59:12] [PASSED] Link rate 162000 lane count 1
[18:59:12] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:59:12] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[18:59:12] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:59:12] [PASSED] DP_POWER_UP_PHY with port number
[18:59:12] [PASSED] DP_POWER_DOWN_PHY with port number
[18:59:12] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:59:12] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:59:12] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:59:12] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:59:12] [PASSED] DP_QUERY_PAYLOAD with port number
[18:59:12] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:59:12] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:59:12] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:59:12] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:59:12] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:59:12] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:59:12] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:59:12] [PASSED] DP_REMOTE_I2C_READ with port number
[18:59:12] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:59:12] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:59:12] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:59:12] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:59:12] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:59:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:59:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:59:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:59:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:59:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:59:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:59:12] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:59:12] ================ [PASSED] drm_dp_mst_helper ================
[18:59:12] ================== drm_exec (7 subtests) ===================
[18:59:12] [PASSED] sanitycheck
[18:59:12] [PASSED] test_lock
[18:59:12] [PASSED] test_lock_unlock
[18:59:12] [PASSED] test_duplicates
[18:59:12] [PASSED] test_prepare
[18:59:12] [PASSED] test_prepare_array
[18:59:12] [PASSED] test_multiple_loops
[18:59:12] ==================== [PASSED] drm_exec =====================
[18:59:12] =========== drm_format_helper_test (17 subtests) ===========
[18:59:12] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:59:12] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:59:12] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:59:12] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:59:12] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:59:12] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:59:12] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:59:12] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:59:12] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:59:12] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:59:12] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:59:12] ============== drm_test_fb_xrgb8888_to_mono  ===============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:59:12] ==================== drm_test_fb_swab  =====================
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ================ [PASSED] drm_test_fb_swab =================
[18:59:12] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:59:12] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[18:59:12] [PASSED] single_pixel_source_buffer
[18:59:12] [PASSED] single_pixel_clip_rectangle
[18:59:12] [PASSED] well_known_colors
[18:59:12] [PASSED] destination_pitch
[18:59:12] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:59:12] ================= drm_test_fb_clip_offset  =================
[18:59:12] [PASSED] pass through
[18:59:12] [PASSED] horizontal offset
[18:59:12] [PASSED] vertical offset
[18:59:12] [PASSED] horizontal and vertical offset
[18:59:12] [PASSED] horizontal offset (custom pitch)
[18:59:12] [PASSED] vertical offset (custom pitch)
[18:59:12] [PASSED] horizontal and vertical offset (custom pitch)
[18:59:12] ============= [PASSED] drm_test_fb_clip_offset =============
[18:59:12] =================== drm_test_fb_memcpy  ====================
[18:59:12] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:59:12] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:59:12] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:59:12] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:59:12] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:59:12] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:59:12] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:59:12] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:59:12] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:59:12] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:59:12] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:59:12] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:59:12] =============== [PASSED] drm_test_fb_memcpy ================
[18:59:12] ============= [PASSED] drm_format_helper_test ==============
[18:59:12] ================= drm_format (18 subtests) =================
[18:59:12] [PASSED] drm_test_format_block_width_invalid
[18:59:12] [PASSED] drm_test_format_block_width_one_plane
[18:59:12] [PASSED] drm_test_format_block_width_two_plane
[18:59:12] [PASSED] drm_test_format_block_width_three_plane
[18:59:12] [PASSED] drm_test_format_block_width_tiled
[18:59:12] [PASSED] drm_test_format_block_height_invalid
[18:59:12] [PASSED] drm_test_format_block_height_one_plane
[18:59:12] [PASSED] drm_test_format_block_height_two_plane
[18:59:12] [PASSED] drm_test_format_block_height_three_plane
[18:59:12] [PASSED] drm_test_format_block_height_tiled
[18:59:12] [PASSED] drm_test_format_min_pitch_invalid
[18:59:12] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:59:12] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:59:12] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:59:12] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:59:12] [PASSED] drm_test_format_min_pitch_two_plane
[18:59:12] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:59:12] [PASSED] drm_test_format_min_pitch_tiled
[18:59:12] =================== [PASSED] drm_format ====================
[18:59:12] ============== drm_framebuffer (10 subtests) ===============
[18:59:12] ========== drm_test_framebuffer_check_src_coords  ==========
[18:59:12] [PASSED] Success: source fits into fb
[18:59:12] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:59:12] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:59:12] [PASSED] Fail: overflowing fb with source width
[18:59:12] [PASSED] Fail: overflowing fb with source height
[18:59:12] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:59:12] [PASSED] drm_test_framebuffer_cleanup
[18:59:12] =============== drm_test_framebuffer_create  ===============
[18:59:12] [PASSED] ABGR8888 normal sizes
[18:59:12] [PASSED] ABGR8888 max sizes
[18:59:12] [PASSED] ABGR8888 pitch greater than min required
[18:59:12] [PASSED] ABGR8888 pitch less than min required
[18:59:12] [PASSED] ABGR8888 Invalid width
[18:59:12] [PASSED] ABGR8888 Invalid buffer handle
[18:59:12] [PASSED] No pixel format
[18:59:12] [PASSED] ABGR8888 Width 0
[18:59:12] [PASSED] ABGR8888 Height 0
[18:59:12] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:59:12] [PASSED] ABGR8888 Large buffer offset
[18:59:12] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:59:12] [PASSED] ABGR8888 Invalid flag
[18:59:12] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:59:12] [PASSED] ABGR8888 Valid buffer modifier
[18:59:12] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:59:12] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:59:12] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:59:12] [PASSED] NV12 Normal sizes
[18:59:12] [PASSED] NV12 Max sizes
[18:59:12] [PASSED] NV12 Invalid pitch
[18:59:12] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:59:12] [PASSED] NV12 different  modifier per-plane
[18:59:12] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:59:12] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:59:12] [PASSED] NV12 Modifier for inexistent plane
[18:59:12] [PASSED] NV12 Handle for inexistent plane
[18:59:12] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:59:12] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:59:12] [PASSED] YVU420 Normal sizes
[18:59:12] [PASSED] YVU420 Max sizes
[18:59:12] [PASSED] YVU420 Invalid pitch
[18:59:12] [PASSED] YVU420 Different pitches
[18:59:12] [PASSED] YVU420 Different buffer offsets/pitches
[18:59:12] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:59:12] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:59:12] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:59:12] [PASSED] YVU420 Valid modifier
[18:59:12] [PASSED] YVU420 Different modifiers per plane
[18:59:12] [PASSED] YVU420 Modifier for inexistent plane
[18:59:12] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:59:12] [PASSED] X0L2 Normal sizes
[18:59:12] [PASSED] X0L2 Max sizes
[18:59:12] [PASSED] X0L2 Invalid pitch
[18:59:12] [PASSED] X0L2 Pitch greater than minimum required
[18:59:12] [PASSED] X0L2 Handle for inexistent plane
[18:59:12] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:59:12] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:59:12] [PASSED] X0L2 Valid modifier
[18:59:12] [PASSED] X0L2 Modifier for inexistent plane
[18:59:12] =========== [PASSED] drm_test_framebuffer_create ===========
[18:59:12] [PASSED] drm_test_framebuffer_free
[18:59:12] [PASSED] drm_test_framebuffer_init
[18:59:12] [PASSED] drm_test_framebuffer_init_bad_format
[18:59:12] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:59:12] [PASSED] drm_test_framebuffer_lookup
[18:59:12] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:59:12] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:59:12] ================= [PASSED] drm_framebuffer =================
[18:59:12] ================ drm_gem_shmem (8 subtests) ================
[18:59:12] [PASSED] drm_gem_shmem_test_obj_create
[18:59:12] [PASSED] drm_gem_shmem_test_obj_create_private
[18:59:12] [PASSED] drm_gem_shmem_test_pin_pages
[18:59:12] [PASSED] drm_gem_shmem_test_vmap
[18:59:12] [PASSED] drm_gem_shmem_test_get_sg_table
[18:59:12] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:59:12] [PASSED] drm_gem_shmem_test_madvise
[18:59:12] [PASSED] drm_gem_shmem_test_purge
[18:59:12] ================== [PASSED] drm_gem_shmem ==================
[18:59:12] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[18:59:12] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:59:12] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:59:12] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:59:12] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:59:12] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:59:12] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:59:12] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[18:59:12] [PASSED] Automatic
[18:59:12] [PASSED] Full
[18:59:12] [PASSED] Limited 16:235
[18:59:12] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:59:12] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:59:12] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:59:12] [PASSED] drm_test_check_disable_connector
[18:59:12] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:59:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:59:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:59:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:59:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:59:12] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:59:12] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:59:12] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:59:12] [PASSED] drm_test_check_output_bpc_dvi
[18:59:12] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:59:12] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:59:12] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:59:12] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:59:12] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:59:12] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:59:12] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:59:12] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:59:12] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:59:12] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:59:12] [PASSED] drm_test_check_broadcast_rgb_value
[18:59:12] [PASSED] drm_test_check_bpc_8_value
[18:59:12] [PASSED] drm_test_check_bpc_10_value
[18:59:12] [PASSED] drm_test_check_bpc_12_value
[18:59:12] [PASSED] drm_test_check_format_value
[18:59:12] [PASSED] drm_test_check_tmds_char_value
[18:59:12] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:59:12] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[18:59:12] [PASSED] drm_test_check_mode_valid
[18:59:12] [PASSED] drm_test_check_mode_valid_reject
[18:59:12] [PASSED] drm_test_check_mode_valid_reject_rate
[18:59:12] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:59:12] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:59:12] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[18:59:12] [PASSED] drm_test_check_infoframes
[18:59:12] [PASSED] drm_test_check_reject_avi_infoframe
[18:59:12] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[18:59:12] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[18:59:12] [PASSED] drm_test_check_reject_audio_infoframe
[18:59:12] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[18:59:12] ================= drm_managed (2 subtests) =================
[18:59:12] [PASSED] drm_test_managed_release_action
[18:59:12] [PASSED] drm_test_managed_run_action
[18:59:12] =================== [PASSED] drm_managed ===================
[18:59:12] =================== drm_mm (6 subtests) ====================
[18:59:12] [PASSED] drm_test_mm_init
[18:59:12] [PASSED] drm_test_mm_debug
[18:59:12] [PASSED] drm_test_mm_align32
[18:59:12] [PASSED] drm_test_mm_align64
[18:59:12] [PASSED] drm_test_mm_lowest
[18:59:12] [PASSED] drm_test_mm_highest
[18:59:12] ===================== [PASSED] drm_mm ======================
[18:59:12] ============= drm_modes_analog_tv (5 subtests) =============
[18:59:12] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:59:12] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:59:12] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:59:12] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:59:12] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:59:12] =============== [PASSED] drm_modes_analog_tv ===============
[18:59:12] ============== drm_plane_helper (2 subtests) ===============
[18:59:12] =============== drm_test_check_plane_state  ================
[18:59:12] [PASSED] clipping_simple
[18:59:12] [PASSED] clipping_rotate_reflect
[18:59:12] [PASSED] positioning_simple
[18:59:12] [PASSED] upscaling
[18:59:12] [PASSED] downscaling
[18:59:12] [PASSED] rounding1
[18:59:12] [PASSED] rounding2
[18:59:12] [PASSED] rounding3
[18:59:12] [PASSED] rounding4
[18:59:12] =========== [PASSED] drm_test_check_plane_state ============
[18:59:12] =========== drm_test_check_invalid_plane_state  ============
[18:59:12] [PASSED] positioning_invalid
[18:59:12] [PASSED] upscaling_invalid
[18:59:12] [PASSED] downscaling_invalid
[18:59:12] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:59:12] ================ [PASSED] drm_plane_helper =================
[18:59:12] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:59:12] ====== drm_test_connector_helper_tv_get_modes_check  =======
[18:59:12] [PASSED] None
[18:59:12] [PASSED] PAL
[18:59:12] [PASSED] NTSC
[18:59:12] [PASSED] Both, NTSC Default
[18:59:12] [PASSED] Both, PAL Default
[18:59:12] [PASSED] Both, NTSC Default, with PAL on command-line
[18:59:12] [PASSED] Both, PAL Default, with NTSC on command-line
[18:59:12] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:59:12] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:59:12] ================== drm_rect (9 subtests) ===================
[18:59:12] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:59:12] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:59:12] [PASSED] drm_test_rect_clip_scaled_clipped
[18:59:12] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:59:12] ================= drm_test_rect_intersect  =================
[18:59:12] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:59:12] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:59:12] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:59:12] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:59:12] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:59:12] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:59:12] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:59:12] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:59:12] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:59:12] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:59:12] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:59:12] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:59:12] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:59:12] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:59:12] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[18:59:12] ============= [PASSED] drm_test_rect_intersect =============
[18:59:12] ================ drm_test_rect_calc_hscale  ================
[18:59:12] [PASSED] normal use
[18:59:12] [PASSED] out of max range
[18:59:12] [PASSED] out of min range
[18:59:12] [PASSED] zero dst
[18:59:12] [PASSED] negative src
[18:59:12] [PASSED] negative dst
[18:59:12] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:59:12] ================ drm_test_rect_calc_vscale  ================
[18:59:12] [PASSED] normal use
[18:59:12] [PASSED] out of max range
[18:59:12] [PASSED] out of min range
[18:59:12] [PASSED] zero dst
[18:59:12] [PASSED] negative src
[18:59:12] [PASSED] negative dst
[18:59:12] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:59:12] ================== drm_test_rect_rotate  ===================
[18:59:12] [PASSED] reflect-x
[18:59:12] [PASSED] reflect-y
[18:59:12] [PASSED] rotate-0
[18:59:12] [PASSED] rotate-90
[18:59:12] [PASSED] rotate-180
[18:59:12] [PASSED] rotate-270
[18:59:12] ============== [PASSED] drm_test_rect_rotate ===============
[18:59:12] ================ drm_test_rect_rotate_inv  =================
[18:59:12] [PASSED] reflect-x
[18:59:12] [PASSED] reflect-y
[18:59:12] [PASSED] rotate-0
[18:59:12] [PASSED] rotate-90
[18:59:12] [PASSED] rotate-180
[18:59:12] [PASSED] rotate-270
[18:59:12] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:59:12] ==================== [PASSED] drm_rect =====================
[18:59:12] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:59:12] ============ drm_test_sysfb_build_fourcc_list  =============
[18:59:12] [PASSED] no native formats
[18:59:12] [PASSED] XRGB8888 as native format
[18:59:12] [PASSED] remove duplicates
[18:59:12] [PASSED] convert alpha formats
[18:59:12] [PASSED] random formats
[18:59:12] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:59:12] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:59:12] ================== drm_fixp (2 subtests) ===================
[18:59:12] [PASSED] drm_test_int2fixp
[18:59:12] [PASSED] drm_test_sm2fixp
[18:59:12] ==================== [PASSED] drm_fixp =====================
[18:59:12] ============================================================
[18:59:12] Testing complete. Ran 630 tests: passed: 630
[18:59:13] Elapsed time: 27.252s total, 1.656s configuring, 25.178s building, 0.384s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:59:13] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:59:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:59:24] Starting KUnit Kernel (1/1)...
[18:59:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:59:24] ================= ttm_device (5 subtests) ==================
[18:59:24] [PASSED] ttm_device_init_basic
[18:59:24] [PASSED] ttm_device_init_multiple
[18:59:24] [PASSED] ttm_device_fini_basic
[18:59:24] [PASSED] ttm_device_init_no_vma_man
[18:59:24] ================== ttm_device_init_pools  ==================
[18:59:24] [PASSED] No DMA allocations, no DMA32 required
[18:59:24] [PASSED] DMA allocations, DMA32 required
[18:59:24] [PASSED] No DMA allocations, DMA32 required
[18:59:24] [PASSED] DMA allocations, no DMA32 required
[18:59:24] ============== [PASSED] ttm_device_init_pools ==============
[18:59:24] =================== [PASSED] ttm_device ====================
[18:59:24] ================== ttm_pool (8 subtests) ===================
[18:59:24] ================== ttm_pool_alloc_basic  ===================
[18:59:24] [PASSED] One page
[18:59:24] [PASSED] More than one page
[18:59:24] [PASSED] Above the allocation limit
[18:59:24] [PASSED] One page, with coherent DMA mappings enabled
[18:59:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:59:24] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:59:24] ============== ttm_pool_alloc_basic_dma_addr  ==============
[18:59:24] [PASSED] One page
[18:59:24] [PASSED] More than one page
[18:59:24] [PASSED] Above the allocation limit
[18:59:24] [PASSED] One page, with coherent DMA mappings enabled
[18:59:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:59:24] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:59:24] [PASSED] ttm_pool_alloc_order_caching_match
[18:59:24] [PASSED] ttm_pool_alloc_caching_mismatch
[18:59:24] [PASSED] ttm_pool_alloc_order_mismatch
[18:59:24] [PASSED] ttm_pool_free_dma_alloc
[18:59:24] [PASSED] ttm_pool_free_no_dma_alloc
[18:59:24] [PASSED] ttm_pool_fini_basic
[18:59:24] ==================== [PASSED] ttm_pool =====================
[18:59:24] ================ ttm_resource (8 subtests) =================
[18:59:24] ================= ttm_resource_init_basic  =================
[18:59:24] [PASSED] Init resource in TTM_PL_SYSTEM
[18:59:24] [PASSED] Init resource in TTM_PL_VRAM
[18:59:24] [PASSED] Init resource in a private placement
[18:59:24] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:59:24] ============= [PASSED] ttm_resource_init_basic =============
[18:59:24] [PASSED] ttm_resource_init_pinned
[18:59:24] [PASSED] ttm_resource_fini_basic
[18:59:24] [PASSED] ttm_resource_manager_init_basic
[18:59:24] [PASSED] ttm_resource_manager_usage_basic
[18:59:24] [PASSED] ttm_resource_manager_set_used_basic
[18:59:24] [PASSED] ttm_sys_man_alloc_basic
[18:59:24] [PASSED] ttm_sys_man_free_basic
[18:59:24] ================== [PASSED] ttm_resource ===================
[18:59:24] =================== ttm_tt (15 subtests) ===================
[18:59:24] ==================== ttm_tt_init_basic  ====================
[18:59:24] [PASSED] Page-aligned size
[18:59:24] [PASSED] Extra pages requested
[18:59:24] ================ [PASSED] ttm_tt_init_basic ================
[18:59:24] [PASSED] ttm_tt_init_misaligned
[18:59:24] [PASSED] ttm_tt_fini_basic
[18:59:24] [PASSED] ttm_tt_fini_sg
[18:59:24] [PASSED] ttm_tt_fini_shmem
[18:59:24] [PASSED] ttm_tt_create_basic
[18:59:24] [PASSED] ttm_tt_create_invalid_bo_type
[18:59:24] [PASSED] ttm_tt_create_ttm_exists
[18:59:24] [PASSED] ttm_tt_create_failed
[18:59:24] [PASSED] ttm_tt_destroy_basic
[18:59:24] [PASSED] ttm_tt_populate_null_ttm
[18:59:24] [PASSED] ttm_tt_populate_populated_ttm
[18:59:24] [PASSED] ttm_tt_unpopulate_basic
[18:59:24] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:59:24] [PASSED] ttm_tt_swapin_basic
[18:59:24] ===================== [PASSED] ttm_tt ======================
[18:59:24] =================== ttm_bo (14 subtests) ===================
[18:59:24] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[18:59:24] [PASSED] Cannot be interrupted and sleeps
[18:59:24] [PASSED] Cannot be interrupted, locks straight away
[18:59:24] [PASSED] Can be interrupted, sleeps
[18:59:24] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:59:24] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:59:24] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:59:24] [PASSED] ttm_bo_reserve_double_resv
[18:59:24] [PASSED] ttm_bo_reserve_interrupted
[18:59:24] [PASSED] ttm_bo_reserve_deadlock
[18:59:24] [PASSED] ttm_bo_unreserve_basic
[18:59:24] [PASSED] ttm_bo_unreserve_pinned
[18:59:24] [PASSED] ttm_bo_unreserve_bulk
[18:59:24] [PASSED] ttm_bo_fini_basic
[18:59:24] [PASSED] ttm_bo_fini_shared_resv
[18:59:24] [PASSED] ttm_bo_pin_basic
[18:59:24] [PASSED] ttm_bo_pin_unpin_resource
[18:59:24] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:59:24] ===================== [PASSED] ttm_bo ======================
[18:59:24] ============== ttm_bo_validate (21 subtests) ===============
[18:59:24] ============== ttm_bo_init_reserved_sys_man  ===============
[18:59:24] [PASSED] Buffer object for userspace
[18:59:24] [PASSED] Kernel buffer object
[18:59:24] [PASSED] Shared buffer object
[18:59:24] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:59:24] ============== ttm_bo_init_reserved_mock_man  ==============
[18:59:24] [PASSED] Buffer object for userspace
[18:59:24] [PASSED] Kernel buffer object
[18:59:24] [PASSED] Shared buffer object
[18:59:24] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:59:24] [PASSED] ttm_bo_init_reserved_resv
[18:59:24] ================== ttm_bo_validate_basic  ==================
[18:59:24] [PASSED] Buffer object for userspace
[18:59:24] [PASSED] Kernel buffer object
[18:59:24] [PASSED] Shared buffer object
[18:59:24] ============== [PASSED] ttm_bo_validate_basic ==============
[18:59:24] [PASSED] ttm_bo_validate_invalid_placement
[18:59:24] ============= ttm_bo_validate_same_placement  ==============
[18:59:24] [PASSED] System manager
[18:59:24] [PASSED] VRAM manager
[18:59:24] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:59:24] [PASSED] ttm_bo_validate_failed_alloc
[18:59:24] [PASSED] ttm_bo_validate_pinned
[18:59:24] [PASSED] ttm_bo_validate_busy_placement
[18:59:24] ================ ttm_bo_validate_multihop  =================
[18:59:24] [PASSED] Buffer object for userspace
[18:59:24] [PASSED] Kernel buffer object
[18:59:24] [PASSED] Shared buffer object
[18:59:24] ============ [PASSED] ttm_bo_validate_multihop =============
[18:59:24] ========== ttm_bo_validate_no_placement_signaled  ==========
[18:59:24] [PASSED] Buffer object in system domain, no page vector
[18:59:24] [PASSED] Buffer object in system domain with an existing page vector
[18:59:24] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:59:24] ======== ttm_bo_validate_no_placement_not_signaled  ========
[18:59:24] [PASSED] Buffer object for userspace
[18:59:24] [PASSED] Kernel buffer object
[18:59:24] [PASSED] Shared buffer object
[18:59:24] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:59:24] [PASSED] ttm_bo_validate_move_fence_signaled
[18:59:24] ========= ttm_bo_validate_move_fence_not_signaled  =========
[18:59:24] [PASSED] Waits for GPU
[18:59:24] [PASSED] Tries to lock straight away
[18:59:24] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:59:24] [PASSED] ttm_bo_validate_happy_evict
[18:59:24] [PASSED] ttm_bo_validate_all_pinned_evict
[18:59:24] [PASSED] ttm_bo_validate_allowed_only_evict
[18:59:24] [PASSED] ttm_bo_validate_deleted_evict
[18:59:24] [PASSED] ttm_bo_validate_busy_domain_evict
[18:59:24] [PASSED] ttm_bo_validate_evict_gutting
[18:59:24] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[18:59:24] ================= [PASSED] ttm_bo_validate =================
[18:59:24] ============================================================
[18:59:24] Testing complete. Ran 101 tests: passed: 101
[18:59:24] Elapsed time: 11.279s total, 1.629s configuring, 9.434s building, 0.180s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Crescent Island PMT support

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1482 bytes --]

== Series Details ==

Series: Crescent Island PMT support
URL   : https://patchwork.freedesktop.org/series/160717/
State : success

== Summary ==

CI Bug Log - changes from xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24_BAT -> xe-pw-160717v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-160717v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [PASS][1] -> [FAIL][2] ([Intel XE#6520])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520


Build changes
-------------

  * Linux: xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24 -> xe-pw-160717v1

  IGT_8720: b37a4d70080afd7426cb249787545df75f762dc0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24: 1d48b83aca95e25996b1a212f5d3035f38233a24
  xe-pw-160717v1: 160717v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/index.html

[-- Attachment #2: Type: text/html, Size: 2047 bytes --]

✓ Xe.CI.Full: success for Crescent Island PMT support

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 33287 bytes --]

== Series Details ==

Series: Crescent Island PMT support
URL   : https://patchwork.freedesktop.org/series/160717/
State : success

== Summary ==

CI Bug Log - changes from xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24_FULL -> xe-pw-160717v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

New tests
---------

  New tests have been introduced between xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24_FULL and xe-pw-160717v1_FULL:

### New IGT tests (7) ###

  * igt@xe_create@exec-queue-create-invalid-reserved:
    - Statuses : 2 pass(s)
    - Exec time: [0.0, 0.00] s

  * igt@xe_create@exec-queue-destroy-invalid-reserved:
    - Statuses : 2 pass(s)
    - Exec time: [0.0] s

  * igt@xe_create@invalid-exec-queue-id:
    - Statuses : 2 pass(s)
    - Exec time: [0.0] s

  * igt@xe_create@invalid-extensions:
    - Statuses : 1 pass(s)
    - Exec time: [0.0] s

  * igt@xe_create@invalid-flag:
    - Statuses : 2 pass(s)
    - Exec time: [0.0] s

  * igt@xe_create@invalid-len:
    - Statuses : 2 pass(s)
    - Exec time: [0.0] s

  * igt@xe_create@invalid-pad:
    - Statuses : 1 pass(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in xe-pw-160717v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@async-flip-hang@pipe-a-edp-1:
    - shard-lnl:          [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7063])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-lnl-3/igt@kms_async_flips@async-flip-hang@pipe-a-edp-1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-lnl-2/igt@kms_async_flips@async-flip-hang@pipe-a-edp-1.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2327])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#1124])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2887])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][6] -> [FAIL][7] ([Intel XE#6715])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_flip@blocking-wf_vblank@a-dp2:
    - shard-bmg:          [PASS][8] -> [FAIL][9] ([Intel XE#6266]) +1 other test fail
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-1/igt@kms_flip@blocking-wf_vblank@a-dp2.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-9/igt@kms_flip@blocking-wf_vblank@a-dp2.html

  * igt@kms_flip@plain-flip-ts-check:
    - shard-bmg:          [PASS][10] -> [DMESG-FAIL][11] ([Intel XE#5545]) +1 other test dmesg-fail
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_flip@plain-flip-ts-check.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_flip@plain-flip-ts-check.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2311])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2313]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#7131]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping@pipe-b-plane-5.html

  * igt@kms_psr@pr-sprite-blt:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@kms_psr@pr-sprite-blt.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#3414] / [Intel XE#3904])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#1499])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@kms_vrr@flip-basic-fastset.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [PASS][18] -> [INCOMPLETE][19] ([Intel XE#6321])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-3/igt@xe_evict@evict-mixed-many-threads-small.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#7136]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@xe_exec_fault_mode@many-execqueues-multi-queue.html

  * igt@xe_exec_multi_queue@many-queues-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#6874])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@xe_exec_multi_queue@many-queues-userptr-invalidate.html

  * igt@xe_exec_reset@gt-reset-stress:
    - shard-lnl:          [PASS][22] -> [DMESG-WARN][23] ([Intel XE#7023])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-lnl-8/igt@xe_exec_reset@gt-reset-stress.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-lnl-1/igt@xe_exec_reset@gt-reset-stress.html

  * igt@xe_exec_reset@long-spin-many-preempt-gt0-threads:
    - shard-bmg:          [PASS][24] -> [INCOMPLETE][25] ([Intel XE#2594])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-8/igt@xe_exec_reset@long-spin-many-preempt-gt0-threads.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-1/igt@xe_exec_reset@long-spin-many-preempt-gt0-threads.html

  * igt@xe_exec_system_allocator@process-many-large-mmap-new-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#4943])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@xe_exec_system_allocator@process-many-large-mmap-new-huge-nomemset.html

  * igt@xe_exec_system_allocator@process-many-stride-malloc-prefetch-race:
    - shard-bmg:          [PASS][27] -> [SKIP][28] ([Intel XE#6703]) +93 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_exec_system_allocator@process-many-stride-malloc-prefetch-race.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_exec_system_allocator@process-many-stride-malloc-prefetch-race.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-prefetch:
    - shard-bmg:          [PASS][29] -> [SKIP][30] ([Intel XE#6557] / [Intel XE#6703])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-prefetch.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-prefetch.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#944])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@xe_query@multigpu-query-pxp-status.html

  
#### Possible fixes ####

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-bmg:          [FAIL][32] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][33] +1 other test pass
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [FAIL][34] ([Intel XE#5299]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@2x-flip-vs-wf_vblank:
    - shard-bmg:          [FAIL][36] ([Intel XE#3098]) -> [PASS][37] +1 other test pass
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-3/igt@kms_flip@2x-flip-vs-wf_vblank.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-7/igt@kms_flip@2x-flip-vs-wf_vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [FAIL][38] ([Intel XE#301]) -> [PASS][39] +1 other test pass
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [SKIP][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65]) ([Intel XE#2457]) -> ([PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-10/igt@xe_module_load@load.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-1/igt@xe_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-10/igt@xe_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-10/igt@xe_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-2/igt@xe_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-1/igt@xe_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-3/igt@xe_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-3/igt@xe_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-9/igt@xe_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-1/igt@xe_module_load@load.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-2/igt@xe_module_load@load.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-8/igt@xe_module_load@load.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-2/igt@xe_module_load@load.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-2/igt@xe_module_load@load.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-4/igt@xe_module_load@load.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-4/igt@xe_module_load@load.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-3/igt@xe_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-8/igt@xe_module_load@load.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-3/igt@xe_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-8/igt@xe_module_load@load.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-9/igt@xe_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-9/igt@xe_module_load@load.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-4/igt@xe_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-9/igt@xe_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-9/igt@xe_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@xe_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-4/igt@xe_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-9/igt@xe_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@xe_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-1/igt@xe_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-10/igt@xe_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-1/igt@xe_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-1/igt@xe_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-4/igt@xe_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-7/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-7/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-8/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-3/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-7/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-8/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-4/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-8/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-3/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-7/igt@xe_module_load@load.html

  
#### Warnings ####

  * igt@kms_big_fb@linear-16bpp-rotate-270:
    - shard-bmg:          [SKIP][90] ([Intel XE#2327]) -> [SKIP][91] ([Intel XE#6703])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_big_fb@linear-16bpp-rotate-270.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_big_fb@linear-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-90:
    - shard-bmg:          [SKIP][92] ([Intel XE#1124]) -> [SKIP][93] ([Intel XE#6703])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs:
    - shard-bmg:          [SKIP][94] ([Intel XE#2887]) -> [SKIP][95] ([Intel XE#6703]) +2 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-bmg:          [SKIP][96] ([Intel XE#2325]) -> [SKIP][97] ([Intel XE#6703])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_chamelium_color@ctm-0-75.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - shard-bmg:          [SKIP][98] ([Intel XE#2252]) -> [SKIP][99] ([Intel XE#6703])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_chamelium_frames@hdmi-crc-fast.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_cursor_crc@cursor-rapid-movement-max-size:
    - shard-bmg:          [SKIP][100] ([Intel XE#2320]) -> [SKIP][101] ([Intel XE#6703])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-bmg:          [SKIP][102] ([Intel XE#2244]) -> [SKIP][103] ([Intel XE#6703])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_dsc@dsc-with-formats.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][104] ([Intel XE#4141]) -> [SKIP][105] ([Intel XE#6703]) +1 other test skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][106] ([Intel XE#2311]) -> [SKIP][107] ([Intel XE#6703]) +3 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][108] ([Intel XE#2313]) -> [SKIP][109] ([Intel XE#6703]) +2 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75:
    - shard-bmg:          [SKIP][110] ([Intel XE#6886]) -> [SKIP][111] ([Intel XE#6703])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html

  * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb:
    - shard-bmg:          [SKIP][112] ([Intel XE#1406] / [Intel XE#1489]) -> [SKIP][113] ([Intel XE#1406] / [Intel XE#6703])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb.html

  * igt@kms_psr@fbc-pr-cursor-plane-move:
    - shard-bmg:          [SKIP][114] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) -> [SKIP][115] ([Intel XE#1406] / [Intel XE#6703]) +1 other test skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_psr@fbc-pr-cursor-plane-move.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_psr@fbc-pr-cursor-plane-move.html

  * igt@kms_sharpness_filter@filter-toggle:
    - shard-bmg:          [SKIP][116] ([Intel XE#6503]) -> [SKIP][117] ([Intel XE#6703])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_sharpness_filter@filter-toggle.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_sharpness_filter@filter-toggle.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][118] ([Intel XE#1729]) -> [SKIP][119] ([Intel XE#2426])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-bmg:          [SKIP][120] ([Intel XE#1499]) -> [SKIP][121] ([Intel XE#6703])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@kms_vrr@seamless-rr-switch-vrr.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@xe_eudebug@basic-vms:
    - shard-bmg:          [SKIP][122] ([Intel XE#4837]) -> [SKIP][123] ([Intel XE#6703]) +2 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_eudebug@basic-vms.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_eudebug@basic-vms.html

  * igt@xe_eudebug_online@pagefault-write:
    - shard-bmg:          [SKIP][124] ([Intel XE#4837] / [Intel XE#6665]) -> [SKIP][125] ([Intel XE#6703])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_eudebug_online@pagefault-write.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_eudebug_online@pagefault-write.html

  * igt@xe_exec_balancer@no-exec-parallel-userptr-rebind:
    - shard-lnl:          [DMESG-WARN][126] ([Intel XE#4537] / [Intel XE#7063]) -> [DMESG-WARN][127] ([Intel XE#7063])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-lnl-5/igt@xe_exec_balancer@no-exec-parallel-userptr-rebind.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-lnl-7/igt@xe_exec_balancer@no-exec-parallel-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr:
    - shard-bmg:          [SKIP][128] ([Intel XE#2322]) -> [SKIP][129] ([Intel XE#6703])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_exec_basic@multigpu-no-exec-userptr.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-userptr.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-imm:
    - shard-bmg:          [SKIP][130] ([Intel XE#7136]) -> [SKIP][131] ([Intel XE#6703]) +2 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_exec_fault_mode@twice-multi-queue-userptr-imm.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_exec_fault_mode@twice-multi-queue-userptr-imm.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-close-fd-smem:
    - shard-bmg:          [SKIP][132] ([Intel XE#6874]) -> [SKIP][133] ([Intel XE#6703]) +4 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_exec_multi_queue@few-execs-preempt-mode-close-fd-smem.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_exec_multi_queue@few-execs-preempt-mode-close-fd-smem.html

  * igt@xe_exec_system_allocator@once-malloc-bo-unmap:
    - shard-lnl:          [DMESG-WARN][134] ([Intel XE#7063]) -> [DMESG-WARN][135] ([Intel XE#4537] / [Intel XE#7063])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-lnl-5/igt@xe_exec_system_allocator@once-malloc-bo-unmap.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-lnl-7/igt@xe_exec_system_allocator@once-malloc-bo-unmap.html

  * igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-huge:
    - shard-bmg:          [SKIP][136] ([Intel XE#4943]) -> [SKIP][137] ([Intel XE#6703])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-huge.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-huge.html

  * igt@xe_exec_threads@threads-multi-queue-fd-userptr-rebind:
    - shard-bmg:          [SKIP][138] ([Intel XE#7138]) -> [SKIP][139] ([Intel XE#6703])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-fd-userptr-rebind.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-fd-userptr-rebind.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
    - shard-bmg:          [SKIP][140] ([Intel XE#4733]) -> [SKIP][141] ([Intel XE#6703])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24/shard-bmg-7/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/shard-bmg-2/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4537]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4537
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6715
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#7023]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7023
  [Intel XE#7063]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7063
  [Intel XE#7131]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7131
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24 -> xe-pw-160717v1

  IGT_8720: b37a4d70080afd7426cb249787545df75f762dc0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4455-1d48b83aca95e25996b1a212f5d3035f38233a24: 1d48b83aca95e25996b1a212f5d3035f38233a24
  xe-pw-160717v1: 160717v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v1/index.html

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