Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Raag Jadav <raag.jadav@intel.com>
To: lucas.demarchi@intel.com, rodrigo.vivi@intel.com
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
	badal.nilawar@intel.com, riana.tauro@intel.com
Subject: Re: [PATCH v4 0/3] BMG PCIe Gen5 downgrade attributes and usage
Date: Mon, 28 Apr 2025 13:12:38 +0300	[thread overview]
Message-ID: <aA9UlvQfo5-6-CtB@black.fi.intel.com> (raw)
In-Reply-To: <20250425140626.3082588-1-raag.jadav@intel.com>

On Fri, Apr 25, 2025 at 07:36:23PM +0530, Raag Jadav wrote:
> This series exposes sysfs attributes for BMG PCIe Gen5 downgrade and
> documents their usage.

Anything I can do to move this forward?

Raag

> v1: https://patchwork.freedesktop.org/series/147023/
> 
> v2: Move from debugfs to sysfs (Lucas, Rodrigo, Badal)
>     Rework macros and their naming (Rodrigo)
> 
> v3: Move xe_device_sysfs_init() to xe_device_probe() (Riana)
>     Use sysfs_create_files() (Riana)
>     Fix checkpatch warning (Riana)
> 
> v4: s/gen4_downspeed/gen5_downgrade (Lucas, Rodrigo, Riana)
> 
> Raag Jadav (3):
>   drm/xe/pm: s/xe_device_sysfs_init/xe_pm_sysfs_init
>   drm/xe: Expose PCIe Gen5 downgrade attributes
>   drm/xe/doc: Wire up PCIe Gen5 limitations
> 
>  Documentation/gpu/xe/xe_firmware.rst |   6 ++
>  drivers/gpu/drm/xe/xe_device.c       |   5 ++
>  drivers/gpu/drm/xe/xe_device_sysfs.c | 107 ++++++++++++++++++++++++++-
>  drivers/gpu/drm/xe/xe_device_sysfs.h |   1 +
>  drivers/gpu/drm/xe/xe_pcode_api.h    |   5 ++
>  drivers/gpu/drm/xe/xe_pm.c           |   2 +-
>  6 files changed, 123 insertions(+), 3 deletions(-)
> 
> -- 
> 2.34.1
> 

  parent reply	other threads:[~2025-04-28 10:12 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-25 14:06 [PATCH v4 0/3] BMG PCIe Gen5 downgrade attributes and usage Raag Jadav
2025-04-25 14:06 ` [PATCH v4 1/3] drm/xe/pm: s/xe_device_sysfs_init/xe_pm_sysfs_init Raag Jadav
2025-04-25 14:06 ` [PATCH v4 2/3] drm/xe: Expose PCIe Gen5 downgrade attributes Raag Jadav
2025-04-25 14:06 ` [PATCH v4 3/3] drm/xe/doc: Wire up PCIe Gen5 limitations Raag Jadav
2025-04-25 16:03 ` ✓ CI.Patch_applied: success for BMG PCIe Gen5 downgrade attributes and usage Patchwork
2025-04-25 16:03 ` ✓ CI.checkpatch: " Patchwork
2025-04-25 16:04 ` ✓ CI.KUnit: " Patchwork
2025-04-25 16:13 ` ✓ CI.Build: " Patchwork
2025-04-25 16:15 ` ✓ CI.Hooks: " Patchwork
2025-04-25 16:16 ` ✓ CI.checksparse: " Patchwork
2025-04-25 17:10 ` ✓ Xe.CI.BAT: " Patchwork
2025-04-28 10:12 ` Raag Jadav [this message]
2025-04-28 20:00   ` [PATCH v4 0/3] " Rodrigo Vivi
2025-04-28 20:09     ` Rodrigo Vivi
2025-04-29  5:38       ` Raag Jadav
2025-04-30 19:40         ` Vivi, Rodrigo
2025-05-01  2:19           ` Raag Jadav
2025-05-02 16:16             ` Lucas De Marchi
2025-05-02 17:27               ` Raag Jadav

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=aA9UlvQfo5-6-CtB@black.fi.intel.com \
    --to=raag.jadav@intel.com \
    --cc=anshuman.gupta@intel.com \
    --cc=badal.nilawar@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=lucas.demarchi@intel.com \
    --cc=riana.tauro@intel.com \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox