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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Raag Jadav <raag.jadav@intel.com>
Cc: <lucas.demarchi@intel.com>, <intel-xe@lists.freedesktop.org>,
	<anshuman.gupta@intel.com>, <badal.nilawar@intel.com>,
	<riana.tauro@intel.com>
Subject: Re: [PATCH v4 0/3] BMG PCIe Gen5 downgrade attributes and usage
Date: Mon, 28 Apr 2025 16:00:44 -0400	[thread overview]
Message-ID: <aA_ebBh6mxsEJi1w@intel.com> (raw)
In-Reply-To: <aA9UlvQfo5-6-CtB@black.fi.intel.com>

On Mon, Apr 28, 2025 at 01:12:38PM +0300, Raag Jadav wrote:
> On Fri, Apr 25, 2025 at 07:36:23PM +0530, Raag Jadav wrote:
> > This series exposes sysfs attributes for BMG PCIe Gen5 downgrade and
> > documents their usage.
> 
> Anything I can do to move this forward?

I almost push it here, but then I noticed that it is gen5_downgrade.
Hadn't we agreed to follow what spec says so?

"to then automatically persist the Gen4 downgrade flag in Flash"
"Write Gen4 Downgrade bit to MRC Flash File"

== Applying  PCIe Gen4 Downgrade ==

Although I see that there are some mentions calling "Gen5 downgrade", "Gen4 downgrade" seems to be the most used term in the specs, specially when calling bits and
sections names...


> 
> Raag
> 
> > v1: https://patchwork.freedesktop.org/series/147023/
> > 
> > v2: Move from debugfs to sysfs (Lucas, Rodrigo, Badal)
> >     Rework macros and their naming (Rodrigo)
> > 
> > v3: Move xe_device_sysfs_init() to xe_device_probe() (Riana)
> >     Use sysfs_create_files() (Riana)
> >     Fix checkpatch warning (Riana)
> > 
> > v4: s/gen4_downspeed/gen5_downgrade (Lucas, Rodrigo, Riana)
> > 
> > Raag Jadav (3):
> >   drm/xe/pm: s/xe_device_sysfs_init/xe_pm_sysfs_init
> >   drm/xe: Expose PCIe Gen5 downgrade attributes
> >   drm/xe/doc: Wire up PCIe Gen5 limitations
> > 
> >  Documentation/gpu/xe/xe_firmware.rst |   6 ++
> >  drivers/gpu/drm/xe/xe_device.c       |   5 ++
> >  drivers/gpu/drm/xe/xe_device_sysfs.c | 107 ++++++++++++++++++++++++++-
> >  drivers/gpu/drm/xe/xe_device_sysfs.h |   1 +
> >  drivers/gpu/drm/xe/xe_pcode_api.h    |   5 ++
> >  drivers/gpu/drm/xe/xe_pm.c           |   2 +-
> >  6 files changed, 123 insertions(+), 3 deletions(-)
> > 
> > -- 
> > 2.34.1
> > 

  reply	other threads:[~2025-04-28 20:00 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-25 14:06 [PATCH v4 0/3] BMG PCIe Gen5 downgrade attributes and usage Raag Jadav
2025-04-25 14:06 ` [PATCH v4 1/3] drm/xe/pm: s/xe_device_sysfs_init/xe_pm_sysfs_init Raag Jadav
2025-04-25 14:06 ` [PATCH v4 2/3] drm/xe: Expose PCIe Gen5 downgrade attributes Raag Jadav
2025-04-25 14:06 ` [PATCH v4 3/3] drm/xe/doc: Wire up PCIe Gen5 limitations Raag Jadav
2025-04-25 16:03 ` ✓ CI.Patch_applied: success for BMG PCIe Gen5 downgrade attributes and usage Patchwork
2025-04-25 16:03 ` ✓ CI.checkpatch: " Patchwork
2025-04-25 16:04 ` ✓ CI.KUnit: " Patchwork
2025-04-25 16:13 ` ✓ CI.Build: " Patchwork
2025-04-25 16:15 ` ✓ CI.Hooks: " Patchwork
2025-04-25 16:16 ` ✓ CI.checksparse: " Patchwork
2025-04-25 17:10 ` ✓ Xe.CI.BAT: " Patchwork
2025-04-28 10:12 ` [PATCH v4 0/3] " Raag Jadav
2025-04-28 20:00   ` Rodrigo Vivi [this message]
2025-04-28 20:09     ` Rodrigo Vivi
2025-04-29  5:38       ` Raag Jadav
2025-04-30 19:40         ` Vivi, Rodrigo
2025-05-01  2:19           ` Raag Jadav
2025-05-02 16:16             ` Lucas De Marchi
2025-05-02 17:27               ` Raag Jadav

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