[PATCH v5 0/6] drm/xe: Make struct xe_ggtt private.

[PATCH v5 0/6] drm/xe: Make struct xe_ggtt private.

[Maarten Lankhorst]

SRIOV-VF node shifting code uses a complicated system with balloons
to limit allocation and size. Since size never changes after init,
shifting can simply be done by taking the the GGTT lock and then
moving each offset.

First introduce a function to shift an entire GGTT, this removes the
need for the balloons, then also perform the display code pinning
through a callback, and finally privatize the struct.

No other users outside of xe_ggtt remain, and we can make xe_ggtt private.

Rebased on top of recent SRIOV-VF changes, with Matthew Brosts help.

Maarten Lankhorst (5):
  drm/xe: Only have a single drmm release action.
  drm/xe: Start using ggtt->start in preparation of balloon removal
  drm/xe: Rewrite GGTT VF initialisation
  drm/xe: Convert xe_fb_pin to use a callback for insertion into GGTT
  drm/xe: Move struct xe_ggtt to xe_ggtt.c

Tomasz Lis (1):
  drm/mm: Introduce address space shifting

 drivers/gpu/drm/drm_mm.c                    |  24 ++
 drivers/gpu/drm/xe/display/xe_fb_pin.c      | 111 +++---
 drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c |   2 +-
 drivers/gpu/drm/xe/xe_device_types.h        |   2 -
 drivers/gpu/drm/xe/xe_ggtt.c                | 357 ++++++++++----------
 drivers/gpu/drm/xe/xe_ggtt.h                |  16 +-
 drivers/gpu/drm/xe/xe_ggtt_types.h          |  57 +---
 drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c  |   4 +-
 drivers/gpu/drm/xe/xe_gt_sriov_vf.c         |   5 +-
 drivers/gpu/drm/xe/xe_tile.c                |  18 +
 drivers/gpu/drm/xe/xe_tile_sriov_vf.c       | 197 +----------
 drivers/gpu/drm/xe/xe_tile_sriov_vf.h       |   4 +-
 drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h |   4 +
 include/drm/drm_mm.h                        |   1 +
 14 files changed, 315 insertions(+), 487 deletions(-)

-- 
2.51.0

[PATCH v5 1/6] drm/xe: Only have a single drmm release action.

[Maarten Lankhorst]

The broken action happened after ggtt_early_fini, so
it's safe to put the drain_workqueue in there instead of
creating a new place.

Fixes: 89d2835c3680 ("drm/xe: Process deferred GGTT node removals on device unwind")
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/xe_ggtt.c | 12 +-----------
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index aca7ae5489b91..33b09737ccba8 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -199,6 +199,7 @@ static void ggtt_fini_early(struct drm_device *drm, void *arg)
 {
 	struct xe_ggtt *ggtt = arg;
 
+	drain_workqueue(ggtt->wq);
 	destroy_workqueue(ggtt->wq);
 	drm_mm_takedown(&ggtt->mm);
 }
@@ -246,13 +247,6 @@ int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 reserved, u32 size)
 }
 EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
 
-static void dev_fini_ggtt(void *arg)
-{
-	struct xe_ggtt *ggtt = arg;
-
-	drain_workqueue(ggtt->wq);
-}
-
 /**
  * xe_ggtt_init_early - Early GGTT initialization
  * @ggtt: the &xe_ggtt to be initialized
@@ -305,10 +299,6 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 	if (err)
 		return err;
 
-	err = devm_add_action_or_reset(xe->drm.dev, dev_fini_ggtt, ggtt);
-	if (err)
-		return err;
-
 	if (IS_SRIOV_VF(xe)) {
 		err = xe_tile_sriov_vf_prepare_ggtt(ggtt->tile);
 		if (err)
-- 
2.51.0

Re: [PATCH v5 1/6] drm/xe: Only have a single drmm release action.

[Michal Wajdeczko]

On 10/10/2025 2:06 PM, Maarten Lankhorst wrote:
> The broken action happened after ggtt_early_fini, so
> it's safe to put the drain_workqueue in there instead of
> creating a new place.
> 
> Fixes: 89d2835c3680 ("drm/xe: Process deferred GGTT node removals on device unwind")
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
>  drivers/gpu/drm/xe/xe_ggtt.c | 12 +-----------
>  1 file changed, 1 insertion(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index aca7ae5489b91..33b09737ccba8 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -199,6 +199,7 @@ static void ggtt_fini_early(struct drm_device *drm, void *arg)
>  {
>  	struct xe_ggtt *ggtt = arg;
>  
> +	drain_workqueue(ggtt->wq);

as said earlier, drain() will be implicitly called by the below destroy() so moving it here is a nop 

and in some cases (at least in the past) the draining here, in "drmm" action, was just too late,
and that's why drain() was moved to separate "devm" action that was called while required devm data was still available

if this is broken now, please attach dmesg/crash log to better understand the case 

>  	destroy_workqueue(ggtt->wq);
>  	drm_mm_takedown(&ggtt->mm);
>  }
> @@ -246,13 +247,6 @@ int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 reserved, u32 size)
>  }
>  EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
>  
> -static void dev_fini_ggtt(void *arg)
> -{
> -	struct xe_ggtt *ggtt = arg;
> -
> -	drain_workqueue(ggtt->wq);
> -}
> -
>  /**
>   * xe_ggtt_init_early - Early GGTT initialization
>   * @ggtt: the &xe_ggtt to be initialized
> @@ -305,10 +299,6 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  	if (err)
>  		return err;
>  
> -	err = devm_add_action_or_reset(xe->drm.dev, dev_fini_ggtt, ggtt);
> -	if (err)
> -		return err;
> -
>  	if (IS_SRIOV_VF(xe)) {
>  		err = xe_tile_sriov_vf_prepare_ggtt(ggtt->tile);
>  		if (err)

Re: [PATCH v5 1/6] drm/xe: Only have a single drmm release action.

[Maarten Lankhorst]

Hey,

Den 2025-10-10 kl. 14:14, skrev Michal Wajdeczko:
> 
> 
> On 10/10/2025 2:06 PM, Maarten Lankhorst wrote:
>> The broken action happened after ggtt_early_fini, so
>> it's safe to put the drain_workqueue in there instead of
>> creating a new place.
>>
>> Fixes: 89d2835c3680 ("drm/xe: Process deferred GGTT node removals on device unwind")
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>> ---
>>  drivers/gpu/drm/xe/xe_ggtt.c | 12 +-----------
>>  1 file changed, 1 insertion(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
>> index aca7ae5489b91..33b09737ccba8 100644
>> --- a/drivers/gpu/drm/xe/xe_ggtt.c
>> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
>> @@ -199,6 +199,7 @@ static void ggtt_fini_early(struct drm_device *drm, void *arg)
>>  {
>>  	struct xe_ggtt *ggtt = arg;
>>  
>> +	drain_workqueue(ggtt->wq);
> 
> as said earlier, drain() will be implicitly called by the below destroy() so moving it here is a nop 
> 
> and in some cases (at least in the past) the draining here, in "drmm" action, was just too late,
> and that's why drain() was moved to separate "devm" action that was called while required devm data was still available
> 
> if this is broken now, please attach dmesg/crash log to better understand the case 

In that case, would it make more sense to put the the entire operation in devm instead?
If we cannot accurately handle this case after dev is finished, I don't see any reason to delay this otherwise.

Best regards,
~Maarten Lankhorst

[PATCH v5 2/6] drm/mm: Introduce address space shifting

[Maarten Lankhorst]

From: Tomasz Lis <tomasz.lis@intel.com>

Due to resource reprovisioning, sometimes a need arises to move
a living address space to a new area, preserving all the nodes
and holes stored within.

It is possible to do that by removing all nodes to a temporary list,
reiniting the drm_mm instance and re-adding everything while applying
a shift to each node. But that is a lot of extra work for a task
which could be done internally without any node shuffle operations.

This change introduces an interface which allows to shift the range
without pruning the whole drm_mm instance.

Having a drm_mm interface for such shift significantly simplifies
the code required to adjust a KMD for a change in base address
of a space managed by drm_mm instance.

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Link: https://lore.kernel.org/r/20250204224136.3183710-2-tomasz.lis@intel.com
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/drm_mm.c | 24 ++++++++++++++++++++++++
 include/drm/drm_mm.h     |  1 +
 2 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index ca254611b3823..ce3bd8b5e41f0 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -917,6 +917,30 @@ struct drm_mm_node *drm_mm_scan_color_evict(struct drm_mm_scan *scan)
 }
 EXPORT_SYMBOL(drm_mm_scan_color_evict);
 
+/**
+ * drm_mm_shift - move the range of addresses managed by this @mm
+ * @mm: the drm_mm structure instance to shift
+ * @shift: the shift value to be added to addresses of all nodes
+ *
+ * The function shifts all nodes by given offset, moving the address space
+ * range managed by this @mm.
+ */
+void drm_mm_shift(struct drm_mm *mm, s64 shift)
+{
+	struct drm_mm_node *node;
+
+	/*
+	 * Head node represents a hole, with negative size and start at the end
+	 * of addressable area. This means it is never present within nodes
+	 * list - needs to be shifted separately.
+	 */
+	mm->head_node.start += shift;
+
+	drm_mm_for_each_node(node, mm)
+		node->start += shift;
+}
+EXPORT_SYMBOL(drm_mm_shift);
+
 /**
  * drm_mm_init - initialize a drm-mm allocator
  * @mm: the drm_mm structure to initialize
diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
index f654874c4ce67..798e5a4f07add 100644
--- a/include/drm/drm_mm.h
+++ b/include/drm/drm_mm.h
@@ -465,6 +465,7 @@ static inline int drm_mm_insert_node(struct drm_mm *mm,
 void drm_mm_remove_node(struct drm_mm_node *node);
 void drm_mm_init(struct drm_mm *mm, u64 start, u64 size);
 void drm_mm_takedown(struct drm_mm *mm);
+void drm_mm_shift(struct drm_mm *mm, s64 shift);
 
 /**
  * drm_mm_clean - checks whether an allocator is clean
-- 
2.51.0

[PATCH v5 3/6] drm/xe: Start using ggtt->start in preparation of balloon removal

[Maarten Lankhorst]

Instead of having ggtt->size point to the end of ggtt, have ggtt->size
be the actual size of the GGTT, and introduce ggtt->start to point to
the beginning of GGTT.

This will allow a massive cleanup of GGTT in case of SRIOV-VF.

Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/xe_ggtt.c               | 70 ++++++++++++----------
 drivers/gpu/drm/xe/xe_ggtt.h               |  2 +
 drivers/gpu/drm/xe/xe_ggtt_types.h         |  4 +-
 drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c |  4 +-
 4 files changed, 47 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 33b09737ccba8..1fcb128e661b6 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -124,10 +124,20 @@ static void ggtt_update_access_counter(struct xe_ggtt *ggtt)
 	}
 }
 
+u64 xe_ggtt_start(struct xe_ggtt *ggtt)
+{
+	return ggtt->start;
+}
+
+u64 xe_ggtt_size(struct xe_ggtt *ggtt)
+{
+	return ggtt->size;
+}
+
 static void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte)
 {
 	xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK));
-	xe_tile_assert(ggtt->tile, addr < ggtt->size);
+	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->size);
 
 	writeq(pte, &ggtt->gsm[addr >> XE_PTE_SHIFT]);
 }
@@ -233,16 +243,16 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = {
 	.ggtt_set_pte = xe_ggtt_set_pte_and_flush,
 };
 
-static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u32 reserved)
+static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 size)
 {
-	drm_mm_init(&ggtt->mm, reserved,
-		    ggtt->size - reserved);
+	ggtt->start = start;
+	ggtt->size = size;
+	drm_mm_init(&ggtt->mm, start, size);
 }
 
-int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 reserved, u32 size)
+int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
 {
-	ggtt->size = size;
-	__xe_ggtt_init_early(ggtt, reserved);
+	__xe_ggtt_init_early(ggtt, start, size);
 	return 0;
 }
 EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
@@ -263,26 +273,32 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 	struct xe_device *xe = tile_to_xe(ggtt->tile);
 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
 	unsigned int gsm_size;
+	u64 ggtt_start, wopcm = xe_wopcm_size(xe), ggtt_size;
 	int err;
 
-	if (IS_SRIOV_VF(xe) || GRAPHICS_VERx100(xe) >= 1250)
-		gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
-	else
-		gsm_size = probe_gsm_size(pdev);
-
-	if (gsm_size == 0) {
-		xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
-		return -ENOMEM;
+	if (!IS_SRIOV_VF(xe)) {
+		if (GRAPHICS_VERx100(xe) >= 1250)
+			gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
+		else
+			gsm_size = probe_gsm_size(pdev);
+		if (gsm_size == 0) {
+			xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
+			return -ENOMEM;
+		}
+		ggtt_start = wopcm;
+		ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;
+	} else {
+		/* GGTT is expected to be 4GiB */
+		ggtt_start = wopcm;
+		ggtt_size = SZ_4G - ggtt_start;
 	}
 
 	ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
-	ggtt->size = (gsm_size / 8) * (u64) XE_PAGE_SIZE;
-
 	if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
 		ggtt->flags |= XE_GGTT_FLAGS_64K;
 
-	if (ggtt->size > GUC_GGTT_TOP)
-		ggtt->size = GUC_GGTT_TOP;
+	if (ggtt_size + ggtt_start > GUC_GGTT_TOP)
+		ggtt_size = GUC_GGTT_TOP - ggtt_start;
 
 	if (GRAPHICS_VERx100(xe) >= 1270)
 		ggtt->pt_ops = (ggtt->tile->media_gt &&
@@ -293,7 +309,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 		ggtt->pt_ops = &xelp_pt_ops;
 
 	ggtt->wq = alloc_workqueue("xe-ggtt-wq", 0, WQ_MEM_RECLAIM);
-	__xe_ggtt_init_early(ggtt, xe_wopcm_size(xe));
+	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size);
 
 	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
 	if (err)
@@ -527,11 +543,9 @@ void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node)
 static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
 {
 	struct xe_tile *tile = ggtt->tile;
-	struct xe_device *xe = tile_to_xe(tile);
-	u64 __maybe_unused wopcm = xe_wopcm_size(xe);
 
-	xe_tile_assert(tile, start >= wopcm);
-	xe_tile_assert(tile, start + size < ggtt->size - wopcm);
+	xe_tile_assert(tile, start >= ggtt->start);
+	xe_tile_assert(tile, start + size <= ggtt->start + ggtt->size);
 }
 
 /**
@@ -840,14 +854,12 @@ u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
 {
 	const struct drm_mm *mm = &ggtt->mm;
 	const struct drm_mm_node *entry;
-	u64 hole_min_start = xe_wopcm_size(tile_to_xe(ggtt->tile));
 	u64 hole_start, hole_end, hole_size;
 	u64 max_hole = 0;
 
 	mutex_lock(&ggtt->lock);
-
 	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
-		hole_start = max(hole_start, hole_min_start);
+		hole_start = max(hole_start, ggtt->start);
 		hole_start = ALIGN(hole_start, alignment);
 		hole_end = ALIGN_DOWN(hole_end, alignment);
 		if (hole_start >= hole_end)
@@ -940,15 +952,13 @@ u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer
 {
 	const struct drm_mm *mm = &ggtt->mm;
 	const struct drm_mm_node *entry;
-	u64 hole_min_start = xe_wopcm_size(tile_to_xe(ggtt->tile));
 	u64 hole_start, hole_end, hole_size;
 	u64 total = 0;
 	char buf[10];
 
 	mutex_lock(&ggtt->lock);
-
 	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
-		hole_start = max(hole_start, hole_min_start);
+		hole_start = max(hole_start, ggtt->start);
 		hole_start = ALIGN(hole_start, alignment);
 		hole_end = ALIGN_DOWN(hole_end, alignment);
 		if (hole_start >= hole_end)
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index 75fc7a1efea76..6482bddb2ef36 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -23,6 +23,8 @@ int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node,
 				       u64 start, u64 size);
 void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node);
 void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift);
+u64 xe_ggtt_start(struct xe_ggtt *ggtt);
+u64 xe_ggtt_size(struct xe_ggtt *ggtt);
 
 int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align);
 int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
index c5e999d58ff2a..a27919302d6b2 100644
--- a/drivers/gpu/drm/xe/xe_ggtt_types.h
+++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
@@ -22,7 +22,9 @@ struct xe_gt;
 struct xe_ggtt {
 	/** @tile: Back pointer to tile where this GGTT belongs */
 	struct xe_tile *tile;
-	/** @size: Total size of this GGTT */
+	/** @start: Start offset of GGTT */
+	u64 start;
+	/** @size: Total usable size of this GGTT */
 	u64 size;
 
 #define XE_GGTT_FLAGS_64K BIT(0)
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index b2e5c52978e6a..2289756761636 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -343,8 +343,8 @@ static int pf_push_full_vf_config(struct xe_gt *gt, unsigned int vfid)
 	xe_gt_assert(gt, num_dwords <= max_cfg_dwords);
 
 	if (vfid == PFID) {
-		u64 ggtt_start = xe_wopcm_size(gt_to_xe(gt));
-		u64 ggtt_size = gt_to_tile(gt)->mem.ggtt->size - ggtt_start;
+		u64 ggtt_start = xe_ggtt_start(gt_to_tile(gt)->mem.ggtt);
+		u64 ggtt_size = xe_ggtt_size(gt_to_tile(gt)->mem.ggtt);
 
 		/* plain PF config data will never include a real GGTT region */
 		xe_gt_assert(gt, !encode_config_ggtt(cfg + num_dwords, config, true));
-- 
2.51.0

Re: [PATCH v5 3/6] drm/xe: Start using ggtt->start in preparation of balloon removal

[Michal Wajdeczko]

On 10/10/2025 2:06 PM, Maarten Lankhorst wrote:
> Instead of having ggtt->size point to the end of ggtt, have ggtt->size
> be the actual size of the GGTT, and introduce ggtt->start to point to
> the beginning of GGTT.
> 
> This will allow a massive cleanup of GGTT in case of SRIOV-VF.
> 
> Reviewed-by: Stuart Summers <stuart.summers@intel.com>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
>  drivers/gpu/drm/xe/xe_ggtt.c               | 70 ++++++++++++----------
>  drivers/gpu/drm/xe/xe_ggtt.h               |  2 +
>  drivers/gpu/drm/xe/xe_ggtt_types.h         |  4 +-
>  drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c |  4 +-
>  4 files changed, 47 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 33b09737ccba8..1fcb128e661b6 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -124,10 +124,20 @@ static void ggtt_update_access_counter(struct xe_ggtt *ggtt)
>  	}
>  }
>  

don't forget to add kernel-doc for all new public functions

> +u64 xe_ggtt_start(struct xe_ggtt *ggtt)
> +{
> +	return ggtt->start;
> +}
> +
> +u64 xe_ggtt_size(struct xe_ggtt *ggtt)
> +{
> +	return ggtt->size;
> +}
> +
>  static void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte)
>  {
>  	xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK));
> -	xe_tile_assert(ggtt->tile, addr < ggtt->size);
> +	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->size);

shouldn't we also check for

	xe_tile_assert(ggtt->tile, addr >= ggtt->start);

>  
>  	writeq(pte, &ggtt->gsm[addr >> XE_PTE_SHIFT]);
>  }
> @@ -233,16 +243,16 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = {
>  	.ggtt_set_pte = xe_ggtt_set_pte_and_flush,
>  };
>  
> -static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u32 reserved)
> +static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 size)
>  {
> -	drm_mm_init(&ggtt->mm, reserved,
> -		    ggtt->size - reserved);
> +	ggtt->start = start;
> +	ggtt->size = size;
> +	drm_mm_init(&ggtt->mm, start, size);

since drm_mm is internal detail of the ggtt then maybe we should aim to just make this as:

	drm_mm_init(&ggtt->mm, 0, size);

and add "start" only in relevant ggtt_node functions (as ggtt_node is/will be also private) 

then we even will not require patch 2/6 since this "start" will be fully own by our ggtt

>  }
>  
> -int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 reserved, u32 size)
> +int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
>  {
> -	ggtt->size = size;
> -	__xe_ggtt_init_early(ggtt, reserved);
> +	__xe_ggtt_init_early(ggtt, start, size);
>  	return 0;
>  }
>  EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
> @@ -263,26 +273,32 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  	struct xe_device *xe = tile_to_xe(ggtt->tile);
>  	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>  	unsigned int gsm_size;
> +	u64 ggtt_start, wopcm = xe_wopcm_size(xe), ggtt_size;

maybe it's just me, but mixing plain var declarations with some assignments is not making the code any easier
what about:

	u64 wopcm = xe_wopcm_size(xe);
	u64 ggtt_start, ggtt_size;	

>  	int err;
>  
> -	if (IS_SRIOV_VF(xe) || GRAPHICS_VERx100(xe) >= 1250)
> -		gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
> -	else
> -		gsm_size = probe_gsm_size(pdev);
> -
> -	if (gsm_size == 0) {
> -		xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
> -		return -ENOMEM;
> +	if (!IS_SRIOV_VF(xe)) {
> +		if (GRAPHICS_VERx100(xe) >= 1250)
> +			gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
> +		else
> +			gsm_size = probe_gsm_size(pdev);
> +		if (gsm_size == 0) {
> +			xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
> +			return -ENOMEM;
> +		}
> +		ggtt_start = wopcm;
> +		ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;
> +	} else {
> +		/* GGTT is expected to be 4GiB */
> +		ggtt_start = wopcm;
> +		ggtt_size = SZ_4G - ggtt_start;
>  	}
>  
>  	ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
> -	ggtt->size = (gsm_size / 8) * (u64) XE_PAGE_SIZE;
> -
>  	if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
>  		ggtt->flags |= XE_GGTT_FLAGS_64K;
>  
> -	if (ggtt->size > GUC_GGTT_TOP)
> -		ggtt->size = GUC_GGTT_TOP;
> +	if (ggtt_size + ggtt_start > GUC_GGTT_TOP)
> +		ggtt_size = GUC_GGTT_TOP - ggtt_start;
>  
>  	if (GRAPHICS_VERx100(xe) >= 1270)
>  		ggtt->pt_ops = (ggtt->tile->media_gt &&
> @@ -293,7 +309,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  		ggtt->pt_ops = &xelp_pt_ops;
>  
>  	ggtt->wq = alloc_workqueue("xe-ggtt-wq", 0, WQ_MEM_RECLAIM);
> -	__xe_ggtt_init_early(ggtt, xe_wopcm_size(xe));
> +	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size);
>  
>  	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
>  	if (err)
> @@ -527,11 +543,9 @@ void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node)
>  static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
>  {
>  	struct xe_tile *tile = ggtt->tile;
> -	struct xe_device *xe = tile_to_xe(tile);
> -	u64 __maybe_unused wopcm = xe_wopcm_size(xe);
>  
> -	xe_tile_assert(tile, start >= wopcm);
> -	xe_tile_assert(tile, start + size < ggtt->size - wopcm);
> +	xe_tile_assert(tile, start >= ggtt->start);
> +	xe_tile_assert(tile, start + size <= ggtt->start + ggtt->size);
>  }
>  
>  /**
> @@ -840,14 +854,12 @@ u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
>  {
>  	const struct drm_mm *mm = &ggtt->mm;
>  	const struct drm_mm_node *entry;
> -	u64 hole_min_start = xe_wopcm_size(tile_to_xe(ggtt->tile));
>  	u64 hole_start, hole_end, hole_size;
>  	u64 max_hole = 0;
>  
>  	mutex_lock(&ggtt->lock);
> -
>  	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
> -		hole_start = max(hole_start, hole_min_start);
> +		hole_start = max(hole_start, ggtt->start);
>  		hole_start = ALIGN(hole_start, alignment);
>  		hole_end = ALIGN_DOWN(hole_end, alignment);
>  		if (hole_start >= hole_end)
> @@ -940,15 +952,13 @@ u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer
>  {
>  	const struct drm_mm *mm = &ggtt->mm;
>  	const struct drm_mm_node *entry;
> -	u64 hole_min_start = xe_wopcm_size(tile_to_xe(ggtt->tile));
>  	u64 hole_start, hole_end, hole_size;
>  	u64 total = 0;
>  	char buf[10];
>  
>  	mutex_lock(&ggtt->lock);
> -
>  	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
> -		hole_start = max(hole_start, hole_min_start);
> +		hole_start = max(hole_start, ggtt->start);
>  		hole_start = ALIGN(hole_start, alignment);
>  		hole_end = ALIGN_DOWN(hole_end, alignment);
>  		if (hole_start >= hole_end)
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
> index 75fc7a1efea76..6482bddb2ef36 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt.h
> @@ -23,6 +23,8 @@ int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node,
>  				       u64 start, u64 size);
>  void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node);
>  void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift);
> +u64 xe_ggtt_start(struct xe_ggtt *ggtt);
> +u64 xe_ggtt_size(struct xe_ggtt *ggtt);
>  
>  int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align);
>  int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
> diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
> index c5e999d58ff2a..a27919302d6b2 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt_types.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
> @@ -22,7 +22,9 @@ struct xe_gt;
>  struct xe_ggtt {
>  	/** @tile: Back pointer to tile where this GGTT belongs */
>  	struct xe_tile *tile;
> -	/** @size: Total size of this GGTT */
> +	/** @start: Start offset of GGTT */
> +	u64 start;
> +	/** @size: Total usable size of this GGTT */
>  	u64 size;
>  
>  #define XE_GGTT_FLAGS_64K BIT(0)
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index b2e5c52978e6a..2289756761636 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -343,8 +343,8 @@ static int pf_push_full_vf_config(struct xe_gt *gt, unsigned int vfid)
>  	xe_gt_assert(gt, num_dwords <= max_cfg_dwords);
>  
>  	if (vfid == PFID) {
> -		u64 ggtt_start = xe_wopcm_size(gt_to_xe(gt));
> -		u64 ggtt_size = gt_to_tile(gt)->mem.ggtt->size - ggtt_start;
> +		u64 ggtt_start = xe_ggtt_start(gt_to_tile(gt)->mem.ggtt);
> +		u64 ggtt_size = xe_ggtt_size(gt_to_tile(gt)->mem.ggtt);
>  
>  		/* plain PF config data will never include a real GGTT region */
>  		xe_gt_assert(gt, !encode_config_ggtt(cfg + num_dwords, config, true));

[PATCH v5 4/6] drm/xe: Rewrite GGTT VF initialisation

[Maarten Lankhorst]

The previous code was using a complicated system with 2 balloons to
set GGTT size and adjust GGTT offset. While it works, it's overly
complicated.

A better approach is to set the offset and size when initialising GGTT,
this removes the need for adding balloons. The resize function only
needs to re-initialise GGTT at the new offset.

We use the newly created drm_mm_shift to shift the nodes.

This removes the need to manipulate the internals of xe_ggtt outside
of xe_ggtt, and cleans up a lot of now unneeded code.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
This patch has been rebased by Matthew Brost,
with some final fixups by Maarten to remove
the use of ggtt->mutex, and all references to the balloons.

 drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c |   2 +-
 drivers/gpu/drm/xe/xe_device_types.h        |   2 -
 drivers/gpu/drm/xe/xe_ggtt.c                | 143 +++-----------
 drivers/gpu/drm/xe/xe_ggtt.h                |   5 +-
 drivers/gpu/drm/xe/xe_ggtt_types.h          |   4 +-
 drivers/gpu/drm/xe/xe_gt_sriov_vf.c         |   5 +-
 drivers/gpu/drm/xe/xe_tile.c                |  18 ++
 drivers/gpu/drm/xe/xe_tile_sriov_vf.c       | 197 ++------------------
 drivers/gpu/drm/xe/xe_tile_sriov_vf.h       |   4 +-
 drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h |   4 +
 10 files changed, 69 insertions(+), 315 deletions(-)

diff --git a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
index d266882adc0e0..acddbedcf17cb 100644
--- a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
+++ b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
@@ -67,7 +67,7 @@ static int guc_buf_test_init(struct kunit *test)
 
 	KUNIT_ASSERT_EQ(test, 0,
 			xe_ggtt_init_kunit(ggtt, DUT_GGTT_START,
-					   DUT_GGTT_START + DUT_GGTT_SIZE));
+					   DUT_GGTT_SIZE));
 
 	kunit_activate_static_stub(test, xe_managed_bo_create_pin_map,
 				   replacement_xe_managed_bo_create_pin_map);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 02c04ad7296e4..a05164cc669f9 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -192,8 +192,6 @@ struct xe_tile {
 			struct xe_lmtt lmtt;
 		} pf;
 		struct {
-			/** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
-			struct xe_ggtt_node *ggtt_balloon[2];
 			/** @sriov.vf.self_config: VF configuration data */
 			struct xe_tile_sriov_vf_selfconfig self_config;
 		} vf;
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 1fcb128e661b6..cd4b62303e0ec 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -274,7 +274,6 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
 	unsigned int gsm_size;
 	u64 ggtt_start, wopcm = xe_wopcm_size(xe), ggtt_size;
-	int err;
 
 	if (!IS_SRIOV_VF(xe)) {
 		if (GRAPHICS_VERx100(xe) >= 1250)
@@ -288,9 +287,15 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 		ggtt_start = wopcm;
 		ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;
 	} else {
-		/* GGTT is expected to be 4GiB */
-		ggtt_start = wopcm;
-		ggtt_size = SZ_4G - ggtt_start;
+		ggtt_start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
+		ggtt_size = xe_tile_sriov_vf_ggtt(ggtt->tile);
+
+		if (ggtt_start < wopcm || ggtt_start > GUC_GGTT_TOP ||
+		    ggtt_size > GUC_GGTT_TOP - ggtt_start) {
+			xe_tile_err(ggtt->tile, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
+				     ggtt->tile->id, ggtt_start, ggtt_start + ggtt_size - 1);
+			return -ERANGE;
+		}
 	}
 
 	ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
@@ -311,17 +316,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 	ggtt->wq = alloc_workqueue("xe-ggtt-wq", 0, WQ_MEM_RECLAIM);
 	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size);
 
-	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
-	if (err)
-		return err;
-
-	if (IS_SRIOV_VF(xe)) {
-		err = xe_tile_sriov_vf_prepare_ggtt(ggtt->tile);
-		if (err)
-			return err;
-	}
-
-	return 0;
+	return drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
 }
 ALLOW_ERROR_INJECTION(xe_ggtt_init_early, ERRNO); /* See xe_pci_probe() */
 
@@ -473,83 +468,8 @@ static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
 	ggtt_invalidate_gt_tlb(ggtt->tile->media_gt);
 }
 
-static void xe_ggtt_dump_node(struct xe_ggtt *ggtt,
-			      const struct drm_mm_node *node, const char *description)
-{
-	char buf[10];
-
-	if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) {
-		string_get_size(node->size, 1, STRING_UNITS_2, buf, sizeof(buf));
-		xe_tile_dbg(ggtt->tile, "GGTT %#llx-%#llx (%s) %s\n",
-			    node->start, node->start + node->size, buf, description);
-	}
-}
-
 /**
- * xe_ggtt_node_insert_balloon_locked - prevent allocation of specified GGTT addresses
- * @node: the &xe_ggtt_node to hold reserved GGTT node
- * @start: the starting GGTT address of the reserved region
- * @end: then end GGTT address of the reserved region
- *
- * To be used in cases where ggtt->lock is already taken.
- * Use xe_ggtt_node_remove_balloon_locked() to release a reserved GGTT node.
- *
- * Return: 0 on success or a negative error code on failure.
- */
-int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node, u64 start, u64 end)
-{
-	struct xe_ggtt *ggtt = node->ggtt;
-	int err;
-
-	xe_tile_assert(ggtt->tile, start < end);
-	xe_tile_assert(ggtt->tile, IS_ALIGNED(start, XE_PAGE_SIZE));
-	xe_tile_assert(ggtt->tile, IS_ALIGNED(end, XE_PAGE_SIZE));
-	xe_tile_assert(ggtt->tile, !drm_mm_node_allocated(&node->base));
-	lockdep_assert_held(&ggtt->lock);
-
-	node->base.color = 0;
-	node->base.start = start;
-	node->base.size = end - start;
-
-	err = drm_mm_reserve_node(&ggtt->mm, &node->base);
-
-	if (xe_tile_WARN(ggtt->tile, err, "Failed to balloon GGTT %#llx-%#llx (%pe)\n",
-			 node->base.start, node->base.start + node->base.size, ERR_PTR(err)))
-		return err;
-
-	xe_ggtt_dump_node(ggtt, &node->base, "balloon");
-	return 0;
-}
-
-/**
- * xe_ggtt_node_remove_balloon_locked - release a reserved GGTT region
- * @node: the &xe_ggtt_node with reserved GGTT region
- *
- * To be used in cases where ggtt->lock is already taken.
- * See xe_ggtt_node_insert_balloon_locked() for details.
- */
-void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node)
-{
-	if (!xe_ggtt_node_allocated(node))
-		return;
-
-	lockdep_assert_held(&node->ggtt->lock);
-
-	xe_ggtt_dump_node(node->ggtt, &node->base, "remove-balloon");
-
-	drm_mm_remove_node(&node->base);
-}
-
-static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
-{
-	struct xe_tile *tile = ggtt->tile;
-
-	xe_tile_assert(tile, start >= ggtt->start);
-	xe_tile_assert(tile, start + size <= ggtt->start + ggtt->size);
-}
-
-/**
- * xe_ggtt_shift_nodes_locked - Shift GGTT nodes to adjust for a change in usable address range.
+ * xe_ggtt_shift_nodes - Shift GGTT nodes to adjust for a change in usable address range.
  * @ggtt: the &xe_ggtt struct instance
  * @shift: change to the location of area provisioned for current VF
  *
@@ -563,29 +483,22 @@ static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
  * the list of nodes was either already damaged, or that the shift brings the address range
  * outside of valid bounds. Both cases justify an assert rather than error code.
  */
-void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift)
+void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift)
 {
-	struct xe_tile *tile __maybe_unused = ggtt->tile;
-	struct drm_mm_node *node, *tmpn;
-	LIST_HEAD(temp_list_head);
+	s64 new_start;
 
-	lockdep_assert_held(&ggtt->lock);
+	if (!ggtt->size) {
+		xe_tile_err(ggtt->tile, "Asked to resize before xe_ggtt_init_early()?\n");
+		return;
+	}
 
-	if (IS_ENABLED(CONFIG_DRM_XE_DEBUG))
-		drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm)
-			xe_ggtt_assert_fit(ggtt, node->start + shift, node->size);
+	guard(mutex)(&ggtt->lock);
 
-	drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm) {
-		drm_mm_remove_node(node);
-		list_add(&node->node_list, &temp_list_head);
-	}
+	new_start = ggtt->start + shift;
+	xe_tile_assert(ggtt->tile, new_start >= xe_wopcm_size(tile_to_xe(ggtt->tile)));
+	xe_tile_assert(ggtt->tile, new_start + ggtt->size <= GUC_GGTT_TOP);
 
-	list_for_each_entry_safe(node, tmpn, &temp_list_head, node_list) {
-		list_del(&node->node_list);
-		node->start += shift;
-		drm_mm_reserve_node(&ggtt->mm, node);
-		xe_tile_assert(tile, drm_mm_node_allocated(node));
-	}
+	drm_mm_shift(&ggtt->mm, shift);
 }
 
 /**
@@ -637,11 +550,9 @@ int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align)
  * @ggtt: the &xe_ggtt where the new node will later be inserted/reserved.
  *
  * This function will allocate the struct %xe_ggtt_node and return its pointer.
- * This struct will then be freed after the node removal upon xe_ggtt_node_remove()
- * or xe_ggtt_node_remove_balloon_locked().
+ * This struct will then be freed after the node removal upon xe_ggtt_node_remove().
  * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated
- * in GGTT. Only the xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(),
- * xe_ggtt_node_insert_balloon_locked() will ensure the node is inserted or reserved in GGTT.
+ * in GGTT. Only xe_ggtt_node_insert() will ensure the node is inserted or reserved in GGTT.
  *
  * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
  **/
@@ -662,9 +573,9 @@ struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt)
  * xe_ggtt_node_fini - Forcebly finalize %xe_ggtt_node struct
  * @node: the &xe_ggtt_node to be freed
  *
- * If anything went wrong with either xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(),
- * or xe_ggtt_node_insert_balloon_locked(); and this @node is not going to be reused, then,
- * this function needs to be called to free the %xe_ggtt_node struct
+ * If anything went wrong with either xe_ggtt_node_insert() and this @node is
+ * not going to be reused, then this function needs to be called to free the
+ * %xe_ggtt_node struct
  **/
 void xe_ggtt_node_fini(struct xe_ggtt_node *node)
 {
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index 6482bddb2ef36..eccef2d2b3cee 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -19,10 +19,7 @@ int xe_ggtt_init(struct xe_ggtt *ggtt);
 
 struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt);
 void xe_ggtt_node_fini(struct xe_ggtt_node *node);
-int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node,
-				       u64 start, u64 size);
-void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node);
-void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift);
+void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift);
 u64 xe_ggtt_start(struct xe_ggtt *ggtt);
 u64 xe_ggtt_size(struct xe_ggtt *ggtt);
 
diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
index a27919302d6b2..b659ffc612269 100644
--- a/drivers/gpu/drm/xe/xe_ggtt_types.h
+++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
@@ -57,8 +57,8 @@ struct xe_ggtt {
  * struct xe_ggtt_node - A node in GGTT.
  *
  * This struct needs to be initialized (only-once) with xe_ggtt_node_init() before any node
- * insertion, reservation, or 'ballooning'.
- * It will, then, be finalized by either xe_ggtt_node_remove() or xe_ggtt_node_deballoon().
+ * insertion or reservation.
+ * It will, then, be finalized by either xe_ggtt_node_remove().
  */
 struct xe_ggtt_node {
 	/** @ggtt: Back pointer to xe_ggtt where this region will be inserted at */
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
index 46518e629ba36..dd3cd7f140cd1 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
@@ -442,7 +442,6 @@ u32 xe_gt_sriov_vf_gmdid(struct xe_gt *gt)
 static int vf_get_ggtt_info(struct xe_gt *gt)
 {
 	struct xe_tile *tile = gt_to_tile(gt);
-	struct xe_ggtt *ggtt = tile->mem.ggtt;
 	struct xe_guc *guc = &gt->uc.guc;
 	u64 start, size, ggtt_size;
 	s64 shift;
@@ -450,7 +449,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
 
 	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
 
-	guard(mutex)(&ggtt->lock);
+	guard(mutex)(&tile->sriov.vf.self_config.ggtt_move_mutex);
 
 	err = guc_action_query_single_klv64(guc, GUC_KLV_VF_CFG_GGTT_START_KEY, &start);
 	if (unlikely(err))
@@ -480,7 +479,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
 	if (shift && shift != start) {
 		xe_gt_sriov_info(gt, "Shifting GGTT base by %lld to 0x%016llx\n",
 				 shift, start);
-		xe_tile_sriov_vf_fixup_ggtt_nodes_locked(gt_to_tile(gt), shift);
+		xe_ggtt_shift_nodes(tile->mem.ggtt, shift);
 	}
 
 	if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c
index 6edb5062c1da5..be3900681b6d8 100644
--- a/drivers/gpu/drm/xe/xe_tile.c
+++ b/drivers/gpu/drm/xe/xe_tile.c
@@ -17,6 +17,7 @@
 #include "xe_sa.h"
 #include "xe_svm.h"
 #include "xe_tile.h"
+#include "xe_tile_sriov_vf.h"
 #include "xe_tile_sysfs.h"
 #include "xe_ttm_vram_mgr.h"
 #include "xe_wa.h"
@@ -157,6 +158,12 @@ int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id)
 	if (err)
 		return err;
 
+	if (IS_SRIOV_VF(xe)) {
+		err = xe_tile_sriov_vf_init(tile);
+		if (err)
+			return err;
+	}
+
 	tile->primary_gt = xe_gt_alloc(tile);
 	if (IS_ERR(tile->primary_gt))
 		return PTR_ERR(tile->primary_gt);
@@ -201,6 +208,17 @@ int xe_tile_init_noalloc(struct xe_tile *tile)
 	return xe_tile_sysfs_init(tile);
 }
 
+/**
+ * xe_tile_init - Initialize the remainder of the tile.
+ * @tile: The tile to initialize.
+ *
+ * This function is used for all tile initialization calls that may allocate memory.
+ *
+ * Note that since this is tile initialization, it should not perform any
+ * GT-specific operations, and thus does not need to hold GT forcewake.
+ *
+ * Returns: 0 on success, negative error code on error.
+ */
 int xe_tile_init(struct xe_tile *tile)
 {
 	int err;
diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
index c9bac2cfdd044..d1fa46e268350 100644
--- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
@@ -14,173 +14,12 @@
 #include "xe_tile_sriov_vf.h"
 #include "xe_wopcm.h"
 
-static int vf_init_ggtt_balloons(struct xe_tile *tile)
-{
-	struct xe_ggtt *ggtt = tile->mem.ggtt;
-
-	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
-
-	tile->sriov.vf.ggtt_balloon[0] = xe_ggtt_node_init(ggtt);
-	if (IS_ERR(tile->sriov.vf.ggtt_balloon[0]))
-		return PTR_ERR(tile->sriov.vf.ggtt_balloon[0]);
-
-	tile->sriov.vf.ggtt_balloon[1] = xe_ggtt_node_init(ggtt);
-	if (IS_ERR(tile->sriov.vf.ggtt_balloon[1])) {
-		xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
-		return PTR_ERR(tile->sriov.vf.ggtt_balloon[1]);
-	}
-
-	return 0;
-}
-
-/**
- * xe_tile_sriov_vf_balloon_ggtt_locked - Insert balloon nodes to limit used GGTT address range.
- * @tile: the &xe_tile struct instance
- *
- * Return: 0 on success or a negative error code on failure.
- */
-static int xe_tile_sriov_vf_balloon_ggtt_locked(struct xe_tile *tile)
-{
-	u64 ggtt_base = tile->sriov.vf.self_config.ggtt_base;
-	u64 ggtt_size = tile->sriov.vf.self_config.ggtt_size;
-	struct xe_device *xe = tile_to_xe(tile);
-	u64 wopcm = xe_wopcm_size(xe);
-	u64 start, end;
-	int err;
-
-	xe_tile_assert(tile, IS_SRIOV_VF(xe));
-	xe_tile_assert(tile, ggtt_size);
-	lockdep_assert_held(&tile->mem.ggtt->lock);
-
-	/*
-	 * VF can only use part of the GGTT as allocated by the PF:
-	 *
-	 *      WOPCM                                  GUC_GGTT_TOP
-	 *      |<------------ Total GGTT size ------------------>|
-	 *
-	 *           VF GGTT base -->|<- size ->|
-	 *
-	 *      +--------------------+----------+-----------------+
-	 *      |////////////////////|   block  |\\\\\\\\\\\\\\\\\|
-	 *      +--------------------+----------+-----------------+
-	 *
-	 *      |<--- balloon[0] --->|<-- VF -->|<-- balloon[1] ->|
-	 */
-
-	if (ggtt_base < wopcm || ggtt_base > GUC_GGTT_TOP ||
-	    ggtt_size > GUC_GGTT_TOP - ggtt_base) {
-		xe_sriov_err(xe, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
-			     tile->id, ggtt_base, ggtt_base + ggtt_size - 1);
-		return -ERANGE;
-	}
-
-	start = wopcm;
-	end = ggtt_base;
-	if (end != start) {
-		err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[0],
-							 start, end);
-		if (err)
-			return err;
-	}
-
-	start = ggtt_base + ggtt_size;
-	end = GUC_GGTT_TOP;
-	if (end != start) {
-		err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[1],
-							 start, end);
-		if (err) {
-			xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
-			return err;
-		}
-	}
-
-	return 0;
-}
-
-static int vf_balloon_ggtt(struct xe_tile *tile)
-{
-	struct xe_ggtt *ggtt = tile->mem.ggtt;
-	int err;
-
-	mutex_lock(&ggtt->lock);
-	err = xe_tile_sriov_vf_balloon_ggtt_locked(tile);
-	mutex_unlock(&ggtt->lock);
-
-	return err;
-}
-
-/**
- * xe_tile_sriov_vf_deballoon_ggtt_locked - Remove balloon nodes.
- * @tile: the &xe_tile struct instance
- */
-void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile)
-{
-	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
-
-	xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[1]);
-	xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
-}
-
-static void vf_deballoon_ggtt(struct xe_tile *tile)
-{
-	mutex_lock(&tile->mem.ggtt->lock);
-	xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
-	mutex_unlock(&tile->mem.ggtt->lock);
-}
-
-static void vf_fini_ggtt_balloons(struct xe_tile *tile)
-{
-	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
-
-	xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[1]);
-	xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
-}
-
-static void cleanup_ggtt(struct drm_device *drm, void *arg)
-{
-	struct xe_tile *tile = arg;
-
-	vf_deballoon_ggtt(tile);
-	vf_fini_ggtt_balloons(tile);
-}
-
-/**
- * xe_tile_sriov_vf_prepare_ggtt - Prepare a VF's GGTT configuration.
- * @tile: the &xe_tile
- *
- * This function is for VF use only.
- *
- * Return: 0 on success or a negative error code on failure.
- */
-int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
-{
-	struct xe_device *xe = tile_to_xe(tile);
-	int err;
-
-	err = vf_init_ggtt_balloons(tile);
-	if (err)
-		return err;
-
-	err = vf_balloon_ggtt(tile);
-	if (err) {
-		vf_fini_ggtt_balloons(tile);
-		return err;
-	}
-
-	return drmm_add_action_or_reset(&xe->drm, cleanup_ggtt, tile);
-}
-
 /**
  * DOC: GGTT nodes shifting during VF post-migration recovery
  *
  * The first fixup applied to the VF KMD structures as part of post-migration
  * recovery is shifting nodes within &xe_ggtt instance. The nodes are moved
  * from range previously assigned to this VF, into newly provisioned area.
- * The changes include balloons, which are resized accordingly.
- *
- * The balloon nodes are there to eliminate unavailable ranges from use: one
- * reserves the GGTT area below the range for current VF, and another one
- * reserves area above.
  *
  * Below is a GGTT layout of example VF, with a certain address range assigned to
  * said VF, and inaccessible areas above and below:
@@ -198,10 +37,6 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
  *
  *  |<------- inaccessible for VF ------->|<VF owned>|<-- inaccessible for VF ->|
  *
- * GGTT nodes used for tracking allocations:
- *
- *      |<---------- balloon ------------>|<- nodes->|<----- balloon ------>|
- *
  * After the migration, GGTT area assigned to the VF might have shifted, either
  * to lower or to higher address. But we expect the total size and extra areas to
  * be identical, as migration can only happen between matching platforms.
@@ -219,35 +54,27 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
  * So the VF has a new slice of GGTT assigned, and during migration process, the
  * memory content was copied to that new area. But the &xe_ggtt nodes are still
  * tracking allocations using the old addresses. The nodes within VF owned area
- * have to be shifted, and balloon nodes need to be resized to properly mask out
- * areas not owned by the VF.
- *
- * Fixed &xe_ggtt nodes used for tracking allocations:
+ * have to be shifted, and the start offset for GGTT adjusted.
  *
- *     |<------ balloon ------>|<- nodes->|<----------- balloon ----------->|
- *
- * Due to use of GPU profiles, we do not expect the old and new GGTT ares to
+ * Due to use of GPU profiles, we do not expect the old and new GGTT areas to
  * overlap; but our node shifting will fix addresses properly regardless.
  */
 
 /**
- * xe_tile_sriov_vf_fixup_ggtt_nodes_locked - Shift GGTT allocations to match assigned range.
- * @tile: the &xe_tile struct instance
- * @shift: the shift value
+ * xe_tile_sriov_vf_init - Init tile specific GGTT configuration.
+ * @tile: the &xe_tile
  *
- * Since Global GTT is not virtualized, each VF has an assigned range
- * within the global space. This range might have changed during migration,
- * which requires all memory addresses pointing to GGTT to be shifted.
+ * This function is for VF use only.
+ *
+ * Return: 0 on success, negative value on error.
  */
-void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift)
+int xe_tile_sriov_vf_init(struct xe_tile *tile)
 {
-	struct xe_ggtt *ggtt = tile->mem.ggtt;
+	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
 
-	lockdep_assert_held(&ggtt->lock);
+	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
 
-	xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
-	xe_ggtt_shift_nodes_locked(ggtt, shift);
-	xe_tile_sriov_vf_balloon_ggtt_locked(tile);
+	return drmm_mutex_init(&tile->xe->drm, &config->ggtt_move_mutex);
 }
 
 /**
@@ -312,6 +139,7 @@ void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size)
 	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
 
 	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
+	lockdep_assert_held(&config->ggtt_move_mutex);
 
 	config->ggtt_size = ggtt_size;
 }
@@ -345,6 +173,7 @@ void xe_tile_sriov_vf_ggtt_base_store(struct xe_tile *tile, u64 ggtt_base)
 	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
 
 	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
+	lockdep_assert_held(&config->ggtt_move_mutex);
 
 	config->ggtt_base = ggtt_base;
 }
diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
index 749f41504883c..1ca5bc87963f0 100644
--- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
+++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
@@ -10,9 +10,7 @@
 
 struct xe_tile;
 
-int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile);
-void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile);
-void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift);
+int xe_tile_sriov_vf_init(struct xe_tile *tile);
 u64 xe_tile_sriov_vf_ggtt(struct xe_tile *tile);
 void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size);
 u64 xe_tile_sriov_vf_ggtt_base(struct xe_tile *tile);
diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
index 4807ca51614cf..2cbbc51c101d4 100644
--- a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
+++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
@@ -7,11 +7,15 @@
 #define _XE_TILE_SRIOV_VF_TYPES_H_
 
 #include <linux/types.h>
+#include <linux/mutex.h>
 
 /**
  * struct xe_tile_sriov_vf_selfconfig - VF configuration data.
  */
 struct xe_tile_sriov_vf_selfconfig {
+	/** @ggtt_move_mutex: Prevents multiple movements from happening in parallel */
+	struct mutex ggtt_move_mutex;
+
 	/** @ggtt_base: assigned base offset of the GGTT region. */
 	u64 ggtt_base;
 	/** @ggtt_size: assigned size of the GGTT region. */
-- 
2.51.0

Re: [PATCH v5 4/6] drm/xe: Rewrite GGTT VF initialisation

[Michal Wajdeczko]

On 10/10/2025 2:07 PM, Maarten Lankhorst wrote:
> The previous code was using a complicated system with 2 balloons to
> set GGTT size and adjust GGTT offset. While it works, it's overly
> complicated.

for the record:

our previous attempts to make GGTT allocations 0-based where simply NAK'ed
so there was no other option that going with the ballooning

> 
> A better approach is to set the offset and size when initialising GGTT,
> this removes the need for adding balloons. The resize function only
> needs to re-initialise GGTT at the new offset.
> 
> We use the newly created drm_mm_shift to shift the nodes.

by keeping start at xe_ggtt level that could be even not needed 

> 
> This removes the need to manipulate the internals of xe_ggtt outside
> of xe_ggtt, and cleans up a lot of now unneeded code.
> 
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> This patch has been rebased by Matthew Brost,
> with some final fixups by Maarten to remove
> the use of ggtt->mutex, and all references to the balloons.
> 
>  drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c |   2 +-
>  drivers/gpu/drm/xe/xe_device_types.h        |   2 -
>  drivers/gpu/drm/xe/xe_ggtt.c                | 143 +++-----------
>  drivers/gpu/drm/xe/xe_ggtt.h                |   5 +-
>  drivers/gpu/drm/xe/xe_ggtt_types.h          |   4 +-
>  drivers/gpu/drm/xe/xe_gt_sriov_vf.c         |   5 +-
>  drivers/gpu/drm/xe/xe_tile.c                |  18 ++
>  drivers/gpu/drm/xe/xe_tile_sriov_vf.c       | 197 ++------------------
>  drivers/gpu/drm/xe/xe_tile_sriov_vf.h       |   4 +-
>  drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h |   4 +
>  10 files changed, 69 insertions(+), 315 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> index d266882adc0e0..acddbedcf17cb 100644
> --- a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> +++ b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> @@ -67,7 +67,7 @@ static int guc_buf_test_init(struct kunit *test)
>  
>  	KUNIT_ASSERT_EQ(test, 0,
>  			xe_ggtt_init_kunit(ggtt, DUT_GGTT_START,
> -					   DUT_GGTT_START + DUT_GGTT_SIZE));
> +					   DUT_GGTT_SIZE));
>  
>  	kunit_activate_static_stub(test, xe_managed_bo_create_pin_map,
>  				   replacement_xe_managed_bo_create_pin_map);
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 02c04ad7296e4..a05164cc669f9 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -192,8 +192,6 @@ struct xe_tile {
>  			struct xe_lmtt lmtt;
>  		} pf;
>  		struct {
> -			/** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
> -			struct xe_ggtt_node *ggtt_balloon[2];
>  			/** @sriov.vf.self_config: VF configuration data */
>  			struct xe_tile_sriov_vf_selfconfig self_config;
>  		} vf;
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 1fcb128e661b6..cd4b62303e0ec 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -274,7 +274,6 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
>  	unsigned int gsm_size;
>  	u64 ggtt_start, wopcm = xe_wopcm_size(xe), ggtt_size;
> -	int err;
>  
>  	if (!IS_SRIOV_VF(xe)) {
>  		if (GRAPHICS_VERx100(xe) >= 1250)
> @@ -288,9 +287,15 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  		ggtt_start = wopcm;
>  		ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;
>  	} else {
> -		/* GGTT is expected to be 4GiB */
> -		ggtt_start = wopcm;
> -		ggtt_size = SZ_4G - ggtt_start;
> +		ggtt_start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
> +		ggtt_size = xe_tile_sriov_vf_ggtt(ggtt->tile);
> +
> +		if (ggtt_start < wopcm || ggtt_start > GUC_GGTT_TOP ||
> +		    ggtt_size > GUC_GGTT_TOP - ggtt_start) {
> +			xe_tile_err(ggtt->tile, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
> +				     ggtt->tile->id, ggtt_start, ggtt_start + ggtt_size - 1);
> +			return -ERANGE;
> +		}
>  	}
>  
>  	ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
> @@ -311,17 +316,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  	ggtt->wq = alloc_workqueue("xe-ggtt-wq", 0, WQ_MEM_RECLAIM);
>  	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size);
>  
> -	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
> -	if (err)
> -		return err;
> -
> -	if (IS_SRIOV_VF(xe)) {
> -		err = xe_tile_sriov_vf_prepare_ggtt(ggtt->tile);
> -		if (err)
> -			return err;
> -	}
> -
> -	return 0;
> +	return drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
>  }
>  ALLOW_ERROR_INJECTION(xe_ggtt_init_early, ERRNO); /* See xe_pci_probe() */
>  
> @@ -473,83 +468,8 @@ static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
>  	ggtt_invalidate_gt_tlb(ggtt->tile->media_gt);
>  }
>  
> -static void xe_ggtt_dump_node(struct xe_ggtt *ggtt,
> -			      const struct drm_mm_node *node, const char *description)
> -{
> -	char buf[10];
> -
> -	if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) {
> -		string_get_size(node->size, 1, STRING_UNITS_2, buf, sizeof(buf));
> -		xe_tile_dbg(ggtt->tile, "GGTT %#llx-%#llx (%s) %s\n",
> -			    node->start, node->start + node->size, buf, description);
> -	}
> -}
> -
>  /**
> - * xe_ggtt_node_insert_balloon_locked - prevent allocation of specified GGTT addresses
> - * @node: the &xe_ggtt_node to hold reserved GGTT node
> - * @start: the starting GGTT address of the reserved region
> - * @end: then end GGTT address of the reserved region
> - *
> - * To be used in cases where ggtt->lock is already taken.
> - * Use xe_ggtt_node_remove_balloon_locked() to release a reserved GGTT node.
> - *
> - * Return: 0 on success or a negative error code on failure.
> - */
> -int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node, u64 start, u64 end)
> -{
> -	struct xe_ggtt *ggtt = node->ggtt;
> -	int err;
> -
> -	xe_tile_assert(ggtt->tile, start < end);
> -	xe_tile_assert(ggtt->tile, IS_ALIGNED(start, XE_PAGE_SIZE));
> -	xe_tile_assert(ggtt->tile, IS_ALIGNED(end, XE_PAGE_SIZE));
> -	xe_tile_assert(ggtt->tile, !drm_mm_node_allocated(&node->base));
> -	lockdep_assert_held(&ggtt->lock);
> -
> -	node->base.color = 0;
> -	node->base.start = start;
> -	node->base.size = end - start;
> -
> -	err = drm_mm_reserve_node(&ggtt->mm, &node->base);
> -
> -	if (xe_tile_WARN(ggtt->tile, err, "Failed to balloon GGTT %#llx-%#llx (%pe)\n",
> -			 node->base.start, node->base.start + node->base.size, ERR_PTR(err)))
> -		return err;
> -
> -	xe_ggtt_dump_node(ggtt, &node->base, "balloon");
> -	return 0;
> -}
> -
> -/**
> - * xe_ggtt_node_remove_balloon_locked - release a reserved GGTT region
> - * @node: the &xe_ggtt_node with reserved GGTT region
> - *
> - * To be used in cases where ggtt->lock is already taken.
> - * See xe_ggtt_node_insert_balloon_locked() for details.
> - */
> -void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node)
> -{
> -	if (!xe_ggtt_node_allocated(node))
> -		return;
> -
> -	lockdep_assert_held(&node->ggtt->lock);
> -
> -	xe_ggtt_dump_node(node->ggtt, &node->base, "remove-balloon");
> -
> -	drm_mm_remove_node(&node->base);
> -}
> -
> -static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
> -{
> -	struct xe_tile *tile = ggtt->tile;
> -
> -	xe_tile_assert(tile, start >= ggtt->start);
> -	xe_tile_assert(tile, start + size <= ggtt->start + ggtt->size);
> -}
> -
> -/**
> - * xe_ggtt_shift_nodes_locked - Shift GGTT nodes to adjust for a change in usable address range.
> + * xe_ggtt_shift_nodes - Shift GGTT nodes to adjust for a change in usable address range.
>   * @ggtt: the &xe_ggtt struct instance
>   * @shift: change to the location of area provisioned for current VF
>   *
> @@ -563,29 +483,22 @@ static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
>   * the list of nodes was either already damaged, or that the shift brings the address range
>   * outside of valid bounds. Both cases justify an assert rather than error code.
>   */
> -void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift)
> +void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift)
>  {
> -	struct xe_tile *tile __maybe_unused = ggtt->tile;
> -	struct drm_mm_node *node, *tmpn;
> -	LIST_HEAD(temp_list_head);
> +	s64 new_start;
>  
> -	lockdep_assert_held(&ggtt->lock);
> +	if (!ggtt->size) {
> +		xe_tile_err(ggtt->tile, "Asked to resize before xe_ggtt_init_early()?\n");

that's should be xe_assert()

or our VF init flow is broken

> +		return;
> +	}
>  
> -	if (IS_ENABLED(CONFIG_DRM_XE_DEBUG))
> -		drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm)
> -			xe_ggtt_assert_fit(ggtt, node->start + shift, node->size);
> +	guard(mutex)(&ggtt->lock);
>  
> -	drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm) {
> -		drm_mm_remove_node(node);
> -		list_add(&node->node_list, &temp_list_head);
> -	}
> +	new_start = ggtt->start + shift;
> +	xe_tile_assert(ggtt->tile, new_start >= xe_wopcm_size(tile_to_xe(ggtt->tile)));
> +	xe_tile_assert(ggtt->tile, new_start + ggtt->size <= GUC_GGTT_TOP);
>  
> -	list_for_each_entry_safe(node, tmpn, &temp_list_head, node_list) {
> -		list_del(&node->node_list);
> -		node->start += shift;
> -		drm_mm_reserve_node(&ggtt->mm, node);
> -		xe_tile_assert(tile, drm_mm_node_allocated(node));
> -	}
> +	drm_mm_shift(&ggtt->mm, shift);
>  }
>  
>  /**
> @@ -637,11 +550,9 @@ int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align)
>   * @ggtt: the &xe_ggtt where the new node will later be inserted/reserved.
>   *
>   * This function will allocate the struct %xe_ggtt_node and return its pointer.
> - * This struct will then be freed after the node removal upon xe_ggtt_node_remove()
> - * or xe_ggtt_node_remove_balloon_locked().
> + * This struct will then be freed after the node removal upon xe_ggtt_node_remove().
>   * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated
> - * in GGTT. Only the xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(),
> - * xe_ggtt_node_insert_balloon_locked() will ensure the node is inserted or reserved in GGTT.
> + * in GGTT. Only xe_ggtt_node_insert() will ensure the node is inserted or reserved in GGTT.
>   *
>   * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
>   **/
> @@ -662,9 +573,9 @@ struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt)
>   * xe_ggtt_node_fini - Forcebly finalize %xe_ggtt_node struct
>   * @node: the &xe_ggtt_node to be freed
>   *
> - * If anything went wrong with either xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(),
> - * or xe_ggtt_node_insert_balloon_locked(); and this @node is not going to be reused, then,
> - * this function needs to be called to free the %xe_ggtt_node struct
> + * If anything went wrong with either xe_ggtt_node_insert() and this @node is
> + * not going to be reused, then this function needs to be called to free the
> + * %xe_ggtt_node struct
>   **/
>  void xe_ggtt_node_fini(struct xe_ggtt_node *node)
>  {
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
> index 6482bddb2ef36..eccef2d2b3cee 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt.h
> @@ -19,10 +19,7 @@ int xe_ggtt_init(struct xe_ggtt *ggtt);
>  
>  struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt);
>  void xe_ggtt_node_fini(struct xe_ggtt_node *node);
> -int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node,
> -				       u64 start, u64 size);
> -void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node);
> -void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift);
> +void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift);
>  u64 xe_ggtt_start(struct xe_ggtt *ggtt);
>  u64 xe_ggtt_size(struct xe_ggtt *ggtt);
>  
> diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
> index a27919302d6b2..b659ffc612269 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt_types.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
> @@ -57,8 +57,8 @@ struct xe_ggtt {
>   * struct xe_ggtt_node - A node in GGTT.
>   *
>   * This struct needs to be initialized (only-once) with xe_ggtt_node_init() before any node
> - * insertion, reservation, or 'ballooning'.
> - * It will, then, be finalized by either xe_ggtt_node_remove() or xe_ggtt_node_deballoon().
> + * insertion or reservation.
> + * It will, then, be finalized by either xe_ggtt_node_remove().
>   */
>  struct xe_ggtt_node {
>  	/** @ggtt: Back pointer to xe_ggtt where this region will be inserted at */
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> index 46518e629ba36..dd3cd7f140cd1 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> @@ -442,7 +442,6 @@ u32 xe_gt_sriov_vf_gmdid(struct xe_gt *gt)
>  static int vf_get_ggtt_info(struct xe_gt *gt)
>  {
>  	struct xe_tile *tile = gt_to_tile(gt);
> -	struct xe_ggtt *ggtt = tile->mem.ggtt;
>  	struct xe_guc *guc = &gt->uc.guc;
>  	u64 start, size, ggtt_size;
>  	s64 shift;
> @@ -450,7 +449,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
>  
>  	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
>  
> -	guard(mutex)(&ggtt->lock);
> +	guard(mutex)(&tile->sriov.vf.self_config.ggtt_move_mutex);

maybe instead we should just get a ggtt info *only* from the primary GT ?

and use GT-level lock only ?

>  
>  	err = guc_action_query_single_klv64(guc, GUC_KLV_VF_CFG_GGTT_START_KEY, &start);
>  	if (unlikely(err))
> @@ -480,7 +479,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
>  	if (shift && shift != start) {
>  		xe_gt_sriov_info(gt, "Shifting GGTT base by %lld to 0x%016llx\n",
>  				 shift, start);
> -		xe_tile_sriov_vf_fixup_ggtt_nodes_locked(gt_to_tile(gt), shift);
> +		xe_ggtt_shift_nodes(tile->mem.ggtt, shift);
>  	}
>  
>  	if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
> diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c
> index 6edb5062c1da5..be3900681b6d8 100644
> --- a/drivers/gpu/drm/xe/xe_tile.c
> +++ b/drivers/gpu/drm/xe/xe_tile.c
> @@ -17,6 +17,7 @@
>  #include "xe_sa.h"
>  #include "xe_svm.h"
>  #include "xe_tile.h"
> +#include "xe_tile_sriov_vf.h"
>  #include "xe_tile_sysfs.h"
>  #include "xe_ttm_vram_mgr.h"
>  #include "xe_wa.h"
> @@ -157,6 +158,12 @@ int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id)
>  	if (err)
>  		return err;
>  
> +	if (IS_SRIOV_VF(xe)) {
> +		err = xe_tile_sriov_vf_init(tile);
> +		if (err)
> +			return err;
> +	}
> +
>  	tile->primary_gt = xe_gt_alloc(tile);
>  	if (IS_ERR(tile->primary_gt))
>  		return PTR_ERR(tile->primary_gt);
> @@ -201,6 +208,17 @@ int xe_tile_init_noalloc(struct xe_tile *tile)
>  	return xe_tile_sysfs_init(tile);
>  }
>  
> +/**
> + * xe_tile_init - Initialize the remainder of the tile.
> + * @tile: The tile to initialize.
> + *
> + * This function is used for all tile initialization calls that may allocate memory.
> + *
> + * Note that since this is tile initialization, it should not perform any
> + * GT-specific operations, and thus does not need to hold GT forcewake.
> + *
> + * Returns: 0 on success, negative error code on error.
> + */

nice, but since you are not touching xe_tile_init() in this patch, its kernel-doc should be added in separate patch

>  int xe_tile_init(struct xe_tile *tile)
>  {
>  	int err;
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> index c9bac2cfdd044..d1fa46e268350 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> @@ -14,173 +14,12 @@
>  #include "xe_tile_sriov_vf.h"
>  #include "xe_wopcm.h"
>  
> -static int vf_init_ggtt_balloons(struct xe_tile *tile)
> -{
> -	struct xe_ggtt *ggtt = tile->mem.ggtt;
> -
> -	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> -
> -	tile->sriov.vf.ggtt_balloon[0] = xe_ggtt_node_init(ggtt);
> -	if (IS_ERR(tile->sriov.vf.ggtt_balloon[0]))
> -		return PTR_ERR(tile->sriov.vf.ggtt_balloon[0]);
> -
> -	tile->sriov.vf.ggtt_balloon[1] = xe_ggtt_node_init(ggtt);
> -	if (IS_ERR(tile->sriov.vf.ggtt_balloon[1])) {
> -		xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
> -		return PTR_ERR(tile->sriov.vf.ggtt_balloon[1]);
> -	}
> -
> -	return 0;
> -}
> -
> -/**
> - * xe_tile_sriov_vf_balloon_ggtt_locked - Insert balloon nodes to limit used GGTT address range.
> - * @tile: the &xe_tile struct instance
> - *
> - * Return: 0 on success or a negative error code on failure.
> - */
> -static int xe_tile_sriov_vf_balloon_ggtt_locked(struct xe_tile *tile)
> -{
> -	u64 ggtt_base = tile->sriov.vf.self_config.ggtt_base;
> -	u64 ggtt_size = tile->sriov.vf.self_config.ggtt_size;
> -	struct xe_device *xe = tile_to_xe(tile);
> -	u64 wopcm = xe_wopcm_size(xe);
> -	u64 start, end;
> -	int err;
> -
> -	xe_tile_assert(tile, IS_SRIOV_VF(xe));
> -	xe_tile_assert(tile, ggtt_size);
> -	lockdep_assert_held(&tile->mem.ggtt->lock);
> -
> -	/*
> -	 * VF can only use part of the GGTT as allocated by the PF:
> -	 *
> -	 *      WOPCM                                  GUC_GGTT_TOP
> -	 *      |<------------ Total GGTT size ------------------>|
> -	 *
> -	 *           VF GGTT base -->|<- size ->|
> -	 *
> -	 *      +--------------------+----------+-----------------+
> -	 *      |////////////////////|   block  |\\\\\\\\\\\\\\\\\|
> -	 *      +--------------------+----------+-----------------+
> -	 *
> -	 *      |<--- balloon[0] --->|<-- VF -->|<-- balloon[1] ->|
> -	 */
> -
> -	if (ggtt_base < wopcm || ggtt_base > GUC_GGTT_TOP ||
> -	    ggtt_size > GUC_GGTT_TOP - ggtt_base) {
> -		xe_sriov_err(xe, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
> -			     tile->id, ggtt_base, ggtt_base + ggtt_size - 1);
> -		return -ERANGE;
> -	}
> -
> -	start = wopcm;
> -	end = ggtt_base;
> -	if (end != start) {
> -		err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[0],
> -							 start, end);
> -		if (err)
> -			return err;
> -	}
> -
> -	start = ggtt_base + ggtt_size;
> -	end = GUC_GGTT_TOP;
> -	if (end != start) {
> -		err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[1],
> -							 start, end);
> -		if (err) {
> -			xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
> -			return err;
> -		}
> -	}
> -
> -	return 0;
> -}
> -
> -static int vf_balloon_ggtt(struct xe_tile *tile)
> -{
> -	struct xe_ggtt *ggtt = tile->mem.ggtt;
> -	int err;
> -
> -	mutex_lock(&ggtt->lock);
> -	err = xe_tile_sriov_vf_balloon_ggtt_locked(tile);
> -	mutex_unlock(&ggtt->lock);
> -
> -	return err;
> -}
> -
> -/**
> - * xe_tile_sriov_vf_deballoon_ggtt_locked - Remove balloon nodes.
> - * @tile: the &xe_tile struct instance
> - */
> -void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile)
> -{
> -	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> -
> -	xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[1]);
> -	xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
> -}
> -
> -static void vf_deballoon_ggtt(struct xe_tile *tile)
> -{
> -	mutex_lock(&tile->mem.ggtt->lock);
> -	xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
> -	mutex_unlock(&tile->mem.ggtt->lock);
> -}
> -
> -static void vf_fini_ggtt_balloons(struct xe_tile *tile)
> -{
> -	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> -
> -	xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[1]);
> -	xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
> -}
> -
> -static void cleanup_ggtt(struct drm_device *drm, void *arg)
> -{
> -	struct xe_tile *tile = arg;
> -
> -	vf_deballoon_ggtt(tile);
> -	vf_fini_ggtt_balloons(tile);
> -}
> -
> -/**
> - * xe_tile_sriov_vf_prepare_ggtt - Prepare a VF's GGTT configuration.
> - * @tile: the &xe_tile
> - *
> - * This function is for VF use only.
> - *
> - * Return: 0 on success or a negative error code on failure.
> - */
> -int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
> -{
> -	struct xe_device *xe = tile_to_xe(tile);
> -	int err;
> -
> -	err = vf_init_ggtt_balloons(tile);
> -	if (err)
> -		return err;
> -
> -	err = vf_balloon_ggtt(tile);
> -	if (err) {
> -		vf_fini_ggtt_balloons(tile);
> -		return err;
> -	}
> -
> -	return drmm_add_action_or_reset(&xe->drm, cleanup_ggtt, tile);
> -}
> -
>  /**
>   * DOC: GGTT nodes shifting during VF post-migration recovery
>   *
>   * The first fixup applied to the VF KMD structures as part of post-migration
>   * recovery is shifting nodes within &xe_ggtt instance. The nodes are moved
>   * from range previously assigned to this VF, into newly provisioned area.
> - * The changes include balloons, which are resized accordingly.
> - *
> - * The balloon nodes are there to eliminate unavailable ranges from use: one
> - * reserves the GGTT area below the range for current VF, and another one
> - * reserves area above.
>   *
>   * Below is a GGTT layout of example VF, with a certain address range assigned to
>   * said VF, and inaccessible areas above and below:
> @@ -198,10 +37,6 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
>   *
>   *  |<------- inaccessible for VF ------->|<VF owned>|<-- inaccessible for VF ->|
>   *
> - * GGTT nodes used for tracking allocations:
> - *
> - *      |<---------- balloon ------------>|<- nodes->|<----- balloon ------>|
> - *
>   * After the migration, GGTT area assigned to the VF might have shifted, either
>   * to lower or to higher address. But we expect the total size and extra areas to
>   * be identical, as migration can only happen between matching platforms.
> @@ -219,35 +54,27 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
>   * So the VF has a new slice of GGTT assigned, and during migration process, the
>   * memory content was copied to that new area. But the &xe_ggtt nodes are still
>   * tracking allocations using the old addresses. The nodes within VF owned area
> - * have to be shifted, and balloon nodes need to be resized to properly mask out
> - * areas not owned by the VF.
> - *
> - * Fixed &xe_ggtt nodes used for tracking allocations:
> + * have to be shifted, and the start offset for GGTT adjusted.
>   *
> - *     |<------ balloon ------>|<- nodes->|<----------- balloon ----------->|
> - *
> - * Due to use of GPU profiles, we do not expect the old and new GGTT ares to
> + * Due to use of GPU profiles, we do not expect the old and new GGTT areas to
>   * overlap; but our node shifting will fix addresses properly regardless.
>   */
>  
>  /**
> - * xe_tile_sriov_vf_fixup_ggtt_nodes_locked - Shift GGTT allocations to match assigned range.
> - * @tile: the &xe_tile struct instance
> - * @shift: the shift value
> + * xe_tile_sriov_vf_init - Init tile specific GGTT configuration.
> + * @tile: the &xe_tile
>   *
> - * Since Global GTT is not virtualized, each VF has an assigned range
> - * within the global space. This range might have changed during migration,
> - * which requires all memory addresses pointing to GGTT to be shifted.
> + * This function is for VF use only.
> + *
> + * Return: 0 on success, negative value on error.
>   */
> -void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift)
> +int xe_tile_sriov_vf_init(struct xe_tile *tile)
>  {
> -	struct xe_ggtt *ggtt = tile->mem.ggtt;
> +	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
>  
> -	lockdep_assert_held(&ggtt->lock);
> +	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
>  
> -	xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
> -	xe_ggtt_shift_nodes_locked(ggtt, shift);
> -	xe_tile_sriov_vf_balloon_ggtt_locked(tile);
> +	return drmm_mutex_init(&tile->xe->drm, &config->ggtt_move_mutex);
>  }
>  
>  /**
> @@ -312,6 +139,7 @@ void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size)
>  	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
>  
>  	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> +	lockdep_assert_held(&config->ggtt_move_mutex);
>  
>  	config->ggtt_size = ggtt_size;
>  }
> @@ -345,6 +173,7 @@ void xe_tile_sriov_vf_ggtt_base_store(struct xe_tile *tile, u64 ggtt_base)
>  	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
>  
>  	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> +	lockdep_assert_held(&config->ggtt_move_mutex);
>  
>  	config->ggtt_base = ggtt_base;
>  }
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> index 749f41504883c..1ca5bc87963f0 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> @@ -10,9 +10,7 @@
>  
>  struct xe_tile;
>  
> -int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile);
> -void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile);
> -void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift);
> +int xe_tile_sriov_vf_init(struct xe_tile *tile);
>  u64 xe_tile_sriov_vf_ggtt(struct xe_tile *tile);
>  void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size);
>  u64 xe_tile_sriov_vf_ggtt_base(struct xe_tile *tile);
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> index 4807ca51614cf..2cbbc51c101d4 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> @@ -7,11 +7,15 @@
>  #define _XE_TILE_SRIOV_VF_TYPES_H_
>  
>  #include <linux/types.h>
> +#include <linux/mutex.h>
>  
>  /**
>   * struct xe_tile_sriov_vf_selfconfig - VF configuration data.
>   */
>  struct xe_tile_sriov_vf_selfconfig {
> +	/** @ggtt_move_mutex: Prevents multiple movements from happening in parallel */
> +	struct mutex ggtt_move_mutex;

a) if we correctly get GGTT only from primary GT, then there should be no parallel updates ever
b) if still needed maybe make this mutex more generic to protect all tile-level VF config
or even make it top-level to protect all VF config ?

> +
>  	/** @ggtt_base: assigned base offset of the GGTT region. */
>  	u64 ggtt_base;
>  	/** @ggtt_size: assigned size of the GGTT region. */

Re: [PATCH v5 4/6] drm/xe: Rewrite GGTT VF initialisation

[Matthew Brost]

On Fri, Oct 10, 2025 at 05:00:01PM +0200, Michal Wajdeczko wrote:
> 
> 
> On 10/10/2025 2:07 PM, Maarten Lankhorst wrote:
> > The previous code was using a complicated system with 2 balloons to
> > set GGTT size and adjust GGTT offset. While it works, it's overly
> > complicated.
> 
> for the record:
> 
> our previous attempts to make GGTT allocations 0-based where simply NAK'ed
> so there was no other option that going with the ballooning
> 

I pulled this code yesterday and everything seemed to work.

> > 
> > A better approach is to set the offset and size when initialising GGTT,
> > this removes the need for adding balloons. The resize function only
> > needs to re-initialise GGTT at the new offset.
> > 
> > We use the newly created drm_mm_shift to shift the nodes.
> 
> by keeping start at xe_ggtt level that could be even not needed 
> 
> > 
> > This removes the need to manipulate the internals of xe_ggtt outside
> > of xe_ggtt, and cleans up a lot of now unneeded code.
> > 
> > Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> > This patch has been rebased by Matthew Brost,
> > with some final fixups by Maarten to remove
> > the use of ggtt->mutex, and all references to the balloons.
> > 
> >  drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c |   2 +-
> >  drivers/gpu/drm/xe/xe_device_types.h        |   2 -
> >  drivers/gpu/drm/xe/xe_ggtt.c                | 143 +++-----------
> >  drivers/gpu/drm/xe/xe_ggtt.h                |   5 +-
> >  drivers/gpu/drm/xe/xe_ggtt_types.h          |   4 +-
> >  drivers/gpu/drm/xe/xe_gt_sriov_vf.c         |   5 +-
> >  drivers/gpu/drm/xe/xe_tile.c                |  18 ++
> >  drivers/gpu/drm/xe/xe_tile_sriov_vf.c       | 197 ++------------------
> >  drivers/gpu/drm/xe/xe_tile_sriov_vf.h       |   4 +-
> >  drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h |   4 +
> >  10 files changed, 69 insertions(+), 315 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> > index d266882adc0e0..acddbedcf17cb 100644
> > --- a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> > +++ b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> > @@ -67,7 +67,7 @@ static int guc_buf_test_init(struct kunit *test)
> >  
> >  	KUNIT_ASSERT_EQ(test, 0,
> >  			xe_ggtt_init_kunit(ggtt, DUT_GGTT_START,
> > -					   DUT_GGTT_START + DUT_GGTT_SIZE));
> > +					   DUT_GGTT_SIZE));
> >  
> >  	kunit_activate_static_stub(test, xe_managed_bo_create_pin_map,
> >  				   replacement_xe_managed_bo_create_pin_map);
> > diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> > index 02c04ad7296e4..a05164cc669f9 100644
> > --- a/drivers/gpu/drm/xe/xe_device_types.h
> > +++ b/drivers/gpu/drm/xe/xe_device_types.h
> > @@ -192,8 +192,6 @@ struct xe_tile {
> >  			struct xe_lmtt lmtt;
> >  		} pf;
> >  		struct {
> > -			/** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
> > -			struct xe_ggtt_node *ggtt_balloon[2];
> >  			/** @sriov.vf.self_config: VF configuration data */
> >  			struct xe_tile_sriov_vf_selfconfig self_config;
> >  		} vf;
> > diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> > index 1fcb128e661b6..cd4b62303e0ec 100644
> > --- a/drivers/gpu/drm/xe/xe_ggtt.c
> > +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> > @@ -274,7 +274,6 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
> >  	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> >  	unsigned int gsm_size;
> >  	u64 ggtt_start, wopcm = xe_wopcm_size(xe), ggtt_size;
> > -	int err;
> >  
> >  	if (!IS_SRIOV_VF(xe)) {
> >  		if (GRAPHICS_VERx100(xe) >= 1250)
> > @@ -288,9 +287,15 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
> >  		ggtt_start = wopcm;
> >  		ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;
> >  	} else {
> > -		/* GGTT is expected to be 4GiB */
> > -		ggtt_start = wopcm;
> > -		ggtt_size = SZ_4G - ggtt_start;
> > +		ggtt_start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
> > +		ggtt_size = xe_tile_sriov_vf_ggtt(ggtt->tile);
> > +
> > +		if (ggtt_start < wopcm || ggtt_start > GUC_GGTT_TOP ||
> > +		    ggtt_size > GUC_GGTT_TOP - ggtt_start) {
> > +			xe_tile_err(ggtt->tile, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
> > +				     ggtt->tile->id, ggtt_start, ggtt_start + ggtt_size - 1);
> > +			return -ERANGE;
> > +		}
> >  	}
> >  
> >  	ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
> > @@ -311,17 +316,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
> >  	ggtt->wq = alloc_workqueue("xe-ggtt-wq", 0, WQ_MEM_RECLAIM);
> >  	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size);
> >  
> > -	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
> > -	if (err)
> > -		return err;
> > -
> > -	if (IS_SRIOV_VF(xe)) {
> > -		err = xe_tile_sriov_vf_prepare_ggtt(ggtt->tile);
> > -		if (err)
> > -			return err;
> > -	}
> > -
> > -	return 0;
> > +	return drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
> >  }
> >  ALLOW_ERROR_INJECTION(xe_ggtt_init_early, ERRNO); /* See xe_pci_probe() */
> >  
> > @@ -473,83 +468,8 @@ static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
> >  	ggtt_invalidate_gt_tlb(ggtt->tile->media_gt);
> >  }
> >  
> > -static void xe_ggtt_dump_node(struct xe_ggtt *ggtt,
> > -			      const struct drm_mm_node *node, const char *description)
> > -{
> > -	char buf[10];
> > -
> > -	if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) {
> > -		string_get_size(node->size, 1, STRING_UNITS_2, buf, sizeof(buf));
> > -		xe_tile_dbg(ggtt->tile, "GGTT %#llx-%#llx (%s) %s\n",
> > -			    node->start, node->start + node->size, buf, description);
> > -	}
> > -}
> > -
> >  /**
> > - * xe_ggtt_node_insert_balloon_locked - prevent allocation of specified GGTT addresses
> > - * @node: the &xe_ggtt_node to hold reserved GGTT node
> > - * @start: the starting GGTT address of the reserved region
> > - * @end: then end GGTT address of the reserved region
> > - *
> > - * To be used in cases where ggtt->lock is already taken.
> > - * Use xe_ggtt_node_remove_balloon_locked() to release a reserved GGTT node.
> > - *
> > - * Return: 0 on success or a negative error code on failure.
> > - */
> > -int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node, u64 start, u64 end)
> > -{
> > -	struct xe_ggtt *ggtt = node->ggtt;
> > -	int err;
> > -
> > -	xe_tile_assert(ggtt->tile, start < end);
> > -	xe_tile_assert(ggtt->tile, IS_ALIGNED(start, XE_PAGE_SIZE));
> > -	xe_tile_assert(ggtt->tile, IS_ALIGNED(end, XE_PAGE_SIZE));
> > -	xe_tile_assert(ggtt->tile, !drm_mm_node_allocated(&node->base));
> > -	lockdep_assert_held(&ggtt->lock);
> > -
> > -	node->base.color = 0;
> > -	node->base.start = start;
> > -	node->base.size = end - start;
> > -
> > -	err = drm_mm_reserve_node(&ggtt->mm, &node->base);
> > -
> > -	if (xe_tile_WARN(ggtt->tile, err, "Failed to balloon GGTT %#llx-%#llx (%pe)\n",
> > -			 node->base.start, node->base.start + node->base.size, ERR_PTR(err)))
> > -		return err;
> > -
> > -	xe_ggtt_dump_node(ggtt, &node->base, "balloon");
> > -	return 0;
> > -}
> > -
> > -/**
> > - * xe_ggtt_node_remove_balloon_locked - release a reserved GGTT region
> > - * @node: the &xe_ggtt_node with reserved GGTT region
> > - *
> > - * To be used in cases where ggtt->lock is already taken.
> > - * See xe_ggtt_node_insert_balloon_locked() for details.
> > - */
> > -void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node)
> > -{
> > -	if (!xe_ggtt_node_allocated(node))
> > -		return;
> > -
> > -	lockdep_assert_held(&node->ggtt->lock);
> > -
> > -	xe_ggtt_dump_node(node->ggtt, &node->base, "remove-balloon");
> > -
> > -	drm_mm_remove_node(&node->base);
> > -}
> > -
> > -static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
> > -{
> > -	struct xe_tile *tile = ggtt->tile;
> > -
> > -	xe_tile_assert(tile, start >= ggtt->start);
> > -	xe_tile_assert(tile, start + size <= ggtt->start + ggtt->size);
> > -}
> > -
> > -/**
> > - * xe_ggtt_shift_nodes_locked - Shift GGTT nodes to adjust for a change in usable address range.
> > + * xe_ggtt_shift_nodes - Shift GGTT nodes to adjust for a change in usable address range.
> >   * @ggtt: the &xe_ggtt struct instance
> >   * @shift: change to the location of area provisioned for current VF
> >   *
> > @@ -563,29 +483,22 @@ static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
> >   * the list of nodes was either already damaged, or that the shift brings the address range
> >   * outside of valid bounds. Both cases justify an assert rather than error code.
> >   */
> > -void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift)
> > +void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift)
> >  {
> > -	struct xe_tile *tile __maybe_unused = ggtt->tile;
> > -	struct drm_mm_node *node, *tmpn;
> > -	LIST_HEAD(temp_list_head);
> > +	s64 new_start;
> >  
> > -	lockdep_assert_held(&ggtt->lock);
> > +	if (!ggtt->size) {
> > +		xe_tile_err(ggtt->tile, "Asked to resize before xe_ggtt_init_early()?\n");
> 
> that's should be xe_assert()
> 
> or our VF init flow is broken
> 
> > +		return;
> > +	}
> >  
> > -	if (IS_ENABLED(CONFIG_DRM_XE_DEBUG))
> > -		drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm)
> > -			xe_ggtt_assert_fit(ggtt, node->start + shift, node->size);
> > +	guard(mutex)(&ggtt->lock);
> >  
> > -	drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm) {
> > -		drm_mm_remove_node(node);
> > -		list_add(&node->node_list, &temp_list_head);
> > -	}
> > +	new_start = ggtt->start + shift;
> > +	xe_tile_assert(ggtt->tile, new_start >= xe_wopcm_size(tile_to_xe(ggtt->tile)));
> > +	xe_tile_assert(ggtt->tile, new_start + ggtt->size <= GUC_GGTT_TOP);
> >  
> > -	list_for_each_entry_safe(node, tmpn, &temp_list_head, node_list) {
> > -		list_del(&node->node_list);
> > -		node->start += shift;
> > -		drm_mm_reserve_node(&ggtt->mm, node);
> > -		xe_tile_assert(tile, drm_mm_node_allocated(node));
> > -	}
> > +	drm_mm_shift(&ggtt->mm, shift);
> >  }
> >  
> >  /**
> > @@ -637,11 +550,9 @@ int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align)
> >   * @ggtt: the &xe_ggtt where the new node will later be inserted/reserved.
> >   *
> >   * This function will allocate the struct %xe_ggtt_node and return its pointer.
> > - * This struct will then be freed after the node removal upon xe_ggtt_node_remove()
> > - * or xe_ggtt_node_remove_balloon_locked().
> > + * This struct will then be freed after the node removal upon xe_ggtt_node_remove().
> >   * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated
> > - * in GGTT. Only the xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(),
> > - * xe_ggtt_node_insert_balloon_locked() will ensure the node is inserted or reserved in GGTT.
> > + * in GGTT. Only xe_ggtt_node_insert() will ensure the node is inserted or reserved in GGTT.
> >   *
> >   * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
> >   **/
> > @@ -662,9 +573,9 @@ struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt)
> >   * xe_ggtt_node_fini - Forcebly finalize %xe_ggtt_node struct
> >   * @node: the &xe_ggtt_node to be freed
> >   *
> > - * If anything went wrong with either xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(),
> > - * or xe_ggtt_node_insert_balloon_locked(); and this @node is not going to be reused, then,
> > - * this function needs to be called to free the %xe_ggtt_node struct
> > + * If anything went wrong with either xe_ggtt_node_insert() and this @node is
> > + * not going to be reused, then this function needs to be called to free the
> > + * %xe_ggtt_node struct
> >   **/
> >  void xe_ggtt_node_fini(struct xe_ggtt_node *node)
> >  {
> > diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
> > index 6482bddb2ef36..eccef2d2b3cee 100644
> > --- a/drivers/gpu/drm/xe/xe_ggtt.h
> > +++ b/drivers/gpu/drm/xe/xe_ggtt.h
> > @@ -19,10 +19,7 @@ int xe_ggtt_init(struct xe_ggtt *ggtt);
> >  
> >  struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt);
> >  void xe_ggtt_node_fini(struct xe_ggtt_node *node);
> > -int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node,
> > -				       u64 start, u64 size);
> > -void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node);
> > -void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift);
> > +void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift);
> >  u64 xe_ggtt_start(struct xe_ggtt *ggtt);
> >  u64 xe_ggtt_size(struct xe_ggtt *ggtt);
> >  
> > diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
> > index a27919302d6b2..b659ffc612269 100644
> > --- a/drivers/gpu/drm/xe/xe_ggtt_types.h
> > +++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
> > @@ -57,8 +57,8 @@ struct xe_ggtt {
> >   * struct xe_ggtt_node - A node in GGTT.
> >   *
> >   * This struct needs to be initialized (only-once) with xe_ggtt_node_init() before any node
> > - * insertion, reservation, or 'ballooning'.
> > - * It will, then, be finalized by either xe_ggtt_node_remove() or xe_ggtt_node_deballoon().
> > + * insertion or reservation.
> > + * It will, then, be finalized by either xe_ggtt_node_remove().
> >   */
> >  struct xe_ggtt_node {
> >  	/** @ggtt: Back pointer to xe_ggtt where this region will be inserted at */
> > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > index 46518e629ba36..dd3cd7f140cd1 100644
> > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > @@ -442,7 +442,6 @@ u32 xe_gt_sriov_vf_gmdid(struct xe_gt *gt)
> >  static int vf_get_ggtt_info(struct xe_gt *gt)
> >  {
> >  	struct xe_tile *tile = gt_to_tile(gt);
> > -	struct xe_ggtt *ggtt = tile->mem.ggtt;
> >  	struct xe_guc *guc = &gt->uc.guc;
> >  	u64 start, size, ggtt_size;
> >  	s64 shift;
> > @@ -450,7 +449,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
> >  
> >  	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> >  
> > -	guard(mutex)(&ggtt->lock);
> > +	guard(mutex)(&tile->sriov.vf.self_config.ggtt_move_mutex);
> 
> maybe instead we should just get a ggtt info *only* from the primary GT ?
> 
> and use GT-level lock only ?
> 

See below that doesn't work, and IMO out of scope.

Maybe a helper in xe_tile_sriov_vf.h that returns mutex * though as I
got feedback to not reach into other layer structures.

> >  
> >  	err = guc_action_query_single_klv64(guc, GUC_KLV_VF_CFG_GGTT_START_KEY, &start);
> >  	if (unlikely(err))
> > @@ -480,7 +479,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
> >  	if (shift && shift != start) {
> >  		xe_gt_sriov_info(gt, "Shifting GGTT base by %lld to 0x%016llx\n",
> >  				 shift, start);
> > -		xe_tile_sriov_vf_fixup_ggtt_nodes_locked(gt_to_tile(gt), shift);
> > +		xe_ggtt_shift_nodes(tile->mem.ggtt, shift);
> >  	}
> >  
> >  	if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
> > diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c
> > index 6edb5062c1da5..be3900681b6d8 100644
> > --- a/drivers/gpu/drm/xe/xe_tile.c
> > +++ b/drivers/gpu/drm/xe/xe_tile.c
> > @@ -17,6 +17,7 @@
> >  #include "xe_sa.h"
> >  #include "xe_svm.h"
> >  #include "xe_tile.h"
> > +#include "xe_tile_sriov_vf.h"
> >  #include "xe_tile_sysfs.h"
> >  #include "xe_ttm_vram_mgr.h"
> >  #include "xe_wa.h"
> > @@ -157,6 +158,12 @@ int xe_tile_init_early(struct xe_tile *tile, struct xe_device *xe, u8 id)
> >  	if (err)
> >  		return err;
> >  
> > +	if (IS_SRIOV_VF(xe)) {
> > +		err = xe_tile_sriov_vf_init(tile);
> > +		if (err)
> > +			return err;
> > +	}
> > +
> >  	tile->primary_gt = xe_gt_alloc(tile);
> >  	if (IS_ERR(tile->primary_gt))
> >  		return PTR_ERR(tile->primary_gt);
> > @@ -201,6 +208,17 @@ int xe_tile_init_noalloc(struct xe_tile *tile)
> >  	return xe_tile_sysfs_init(tile);
> >  }
> >  
> > +/**
> > + * xe_tile_init - Initialize the remainder of the tile.
> > + * @tile: The tile to initialize.
> > + *
> > + * This function is used for all tile initialization calls that may allocate memory.
> > + *
> > + * Note that since this is tile initialization, it should not perform any
> > + * GT-specific operations, and thus does not need to hold GT forcewake.
> > + *
> > + * Returns: 0 on success, negative error code on error.
> > + */
> 
> nice, but since you are not touching xe_tile_init() in this patch, its kernel-doc should be added in separate patch
> 
> >  int xe_tile_init(struct xe_tile *tile)
> >  {
> >  	int err;
> > diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> > index c9bac2cfdd044..d1fa46e268350 100644
> > --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> > +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> > @@ -14,173 +14,12 @@
> >  #include "xe_tile_sriov_vf.h"
> >  #include "xe_wopcm.h"
> >  
> > -static int vf_init_ggtt_balloons(struct xe_tile *tile)
> > -{
> > -	struct xe_ggtt *ggtt = tile->mem.ggtt;
> > -
> > -	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> > -
> > -	tile->sriov.vf.ggtt_balloon[0] = xe_ggtt_node_init(ggtt);
> > -	if (IS_ERR(tile->sriov.vf.ggtt_balloon[0]))
> > -		return PTR_ERR(tile->sriov.vf.ggtt_balloon[0]);
> > -
> > -	tile->sriov.vf.ggtt_balloon[1] = xe_ggtt_node_init(ggtt);
> > -	if (IS_ERR(tile->sriov.vf.ggtt_balloon[1])) {
> > -		xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
> > -		return PTR_ERR(tile->sriov.vf.ggtt_balloon[1]);
> > -	}
> > -
> > -	return 0;
> > -}
> > -
> > -/**
> > - * xe_tile_sriov_vf_balloon_ggtt_locked - Insert balloon nodes to limit used GGTT address range.
> > - * @tile: the &xe_tile struct instance
> > - *
> > - * Return: 0 on success or a negative error code on failure.
> > - */
> > -static int xe_tile_sriov_vf_balloon_ggtt_locked(struct xe_tile *tile)
> > -{
> > -	u64 ggtt_base = tile->sriov.vf.self_config.ggtt_base;
> > -	u64 ggtt_size = tile->sriov.vf.self_config.ggtt_size;
> > -	struct xe_device *xe = tile_to_xe(tile);
> > -	u64 wopcm = xe_wopcm_size(xe);
> > -	u64 start, end;
> > -	int err;
> > -
> > -	xe_tile_assert(tile, IS_SRIOV_VF(xe));
> > -	xe_tile_assert(tile, ggtt_size);
> > -	lockdep_assert_held(&tile->mem.ggtt->lock);
> > -
> > -	/*
> > -	 * VF can only use part of the GGTT as allocated by the PF:
> > -	 *
> > -	 *      WOPCM                                  GUC_GGTT_TOP
> > -	 *      |<------------ Total GGTT size ------------------>|
> > -	 *
> > -	 *           VF GGTT base -->|<- size ->|
> > -	 *
> > -	 *      +--------------------+----------+-----------------+
> > -	 *      |////////////////////|   block  |\\\\\\\\\\\\\\\\\|
> > -	 *      +--------------------+----------+-----------------+
> > -	 *
> > -	 *      |<--- balloon[0] --->|<-- VF -->|<-- balloon[1] ->|
> > -	 */
> > -
> > -	if (ggtt_base < wopcm || ggtt_base > GUC_GGTT_TOP ||
> > -	    ggtt_size > GUC_GGTT_TOP - ggtt_base) {
> > -		xe_sriov_err(xe, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
> > -			     tile->id, ggtt_base, ggtt_base + ggtt_size - 1);
> > -		return -ERANGE;
> > -	}
> > -
> > -	start = wopcm;
> > -	end = ggtt_base;
> > -	if (end != start) {
> > -		err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[0],
> > -							 start, end);
> > -		if (err)
> > -			return err;
> > -	}
> > -
> > -	start = ggtt_base + ggtt_size;
> > -	end = GUC_GGTT_TOP;
> > -	if (end != start) {
> > -		err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[1],
> > -							 start, end);
> > -		if (err) {
> > -			xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
> > -			return err;
> > -		}
> > -	}
> > -
> > -	return 0;
> > -}
> > -
> > -static int vf_balloon_ggtt(struct xe_tile *tile)
> > -{
> > -	struct xe_ggtt *ggtt = tile->mem.ggtt;
> > -	int err;
> > -
> > -	mutex_lock(&ggtt->lock);
> > -	err = xe_tile_sriov_vf_balloon_ggtt_locked(tile);
> > -	mutex_unlock(&ggtt->lock);
> > -
> > -	return err;
> > -}
> > -
> > -/**
> > - * xe_tile_sriov_vf_deballoon_ggtt_locked - Remove balloon nodes.
> > - * @tile: the &xe_tile struct instance
> > - */
> > -void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile)
> > -{
> > -	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> > -
> > -	xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[1]);
> > -	xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
> > -}
> > -
> > -static void vf_deballoon_ggtt(struct xe_tile *tile)
> > -{
> > -	mutex_lock(&tile->mem.ggtt->lock);
> > -	xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
> > -	mutex_unlock(&tile->mem.ggtt->lock);
> > -}
> > -
> > -static void vf_fini_ggtt_balloons(struct xe_tile *tile)
> > -{
> > -	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> > -
> > -	xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[1]);
> > -	xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
> > -}
> > -
> > -static void cleanup_ggtt(struct drm_device *drm, void *arg)
> > -{
> > -	struct xe_tile *tile = arg;
> > -
> > -	vf_deballoon_ggtt(tile);
> > -	vf_fini_ggtt_balloons(tile);
> > -}
> > -
> > -/**
> > - * xe_tile_sriov_vf_prepare_ggtt - Prepare a VF's GGTT configuration.
> > - * @tile: the &xe_tile
> > - *
> > - * This function is for VF use only.
> > - *
> > - * Return: 0 on success or a negative error code on failure.
> > - */
> > -int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
> > -{
> > -	struct xe_device *xe = tile_to_xe(tile);
> > -	int err;
> > -
> > -	err = vf_init_ggtt_balloons(tile);
> > -	if (err)
> > -		return err;
> > -
> > -	err = vf_balloon_ggtt(tile);
> > -	if (err) {
> > -		vf_fini_ggtt_balloons(tile);
> > -		return err;
> > -	}
> > -
> > -	return drmm_add_action_or_reset(&xe->drm, cleanup_ggtt, tile);
> > -}
> > -
> >  /**
> >   * DOC: GGTT nodes shifting during VF post-migration recovery
> >   *
> >   * The first fixup applied to the VF KMD structures as part of post-migration
> >   * recovery is shifting nodes within &xe_ggtt instance. The nodes are moved
> >   * from range previously assigned to this VF, into newly provisioned area.
> > - * The changes include balloons, which are resized accordingly.
> > - *
> > - * The balloon nodes are there to eliminate unavailable ranges from use: one
> > - * reserves the GGTT area below the range for current VF, and another one
> > - * reserves area above.
> >   *
> >   * Below is a GGTT layout of example VF, with a certain address range assigned to
> >   * said VF, and inaccessible areas above and below:
> > @@ -198,10 +37,6 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
> >   *
> >   *  |<------- inaccessible for VF ------->|<VF owned>|<-- inaccessible for VF ->|
> >   *
> > - * GGTT nodes used for tracking allocations:
> > - *
> > - *      |<---------- balloon ------------>|<- nodes->|<----- balloon ------>|
> > - *
> >   * After the migration, GGTT area assigned to the VF might have shifted, either
> >   * to lower or to higher address. But we expect the total size and extra areas to
> >   * be identical, as migration can only happen between matching platforms.
> > @@ -219,35 +54,27 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
> >   * So the VF has a new slice of GGTT assigned, and during migration process, the
> >   * memory content was copied to that new area. But the &xe_ggtt nodes are still
> >   * tracking allocations using the old addresses. The nodes within VF owned area
> > - * have to be shifted, and balloon nodes need to be resized to properly mask out
> > - * areas not owned by the VF.
> > - *
> > - * Fixed &xe_ggtt nodes used for tracking allocations:
> > + * have to be shifted, and the start offset for GGTT adjusted.
> >   *
> > - *     |<------ balloon ------>|<- nodes->|<----------- balloon ----------->|
> > - *
> > - * Due to use of GPU profiles, we do not expect the old and new GGTT ares to
> > + * Due to use of GPU profiles, we do not expect the old and new GGTT areas to
> >   * overlap; but our node shifting will fix addresses properly regardless.
> >   */
> >  
> >  /**
> > - * xe_tile_sriov_vf_fixup_ggtt_nodes_locked - Shift GGTT allocations to match assigned range.
> > - * @tile: the &xe_tile struct instance
> > - * @shift: the shift value
> > + * xe_tile_sriov_vf_init - Init tile specific GGTT configuration.
> > + * @tile: the &xe_tile
> >   *
> > - * Since Global GTT is not virtualized, each VF has an assigned range
> > - * within the global space. This range might have changed during migration,
> > - * which requires all memory addresses pointing to GGTT to be shifted.
> > + * This function is for VF use only.
> > + *
> > + * Return: 0 on success, negative value on error.
> >   */
> > -void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift)
> > +int xe_tile_sriov_vf_init(struct xe_tile *tile)
> >  {
> > -	struct xe_ggtt *ggtt = tile->mem.ggtt;
> > +	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
> >  
> > -	lockdep_assert_held(&ggtt->lock);
> > +	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> >  
> > -	xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
> > -	xe_ggtt_shift_nodes_locked(ggtt, shift);
> > -	xe_tile_sriov_vf_balloon_ggtt_locked(tile);
> > +	return drmm_mutex_init(&tile->xe->drm, &config->ggtt_move_mutex);
> >  }
> >  
> >  /**
> > @@ -312,6 +139,7 @@ void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size)
> >  	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
> >  
> >  	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> > +	lockdep_assert_held(&config->ggtt_move_mutex);
> >  
> >  	config->ggtt_size = ggtt_size;
> >  }
> > @@ -345,6 +173,7 @@ void xe_tile_sriov_vf_ggtt_base_store(struct xe_tile *tile, u64 ggtt_base)
> >  	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
> >  
> >  	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> > +	lockdep_assert_held(&config->ggtt_move_mutex);
> >  
> >  	config->ggtt_base = ggtt_base;
> >  }
> > diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> > index 749f41504883c..1ca5bc87963f0 100644
> > --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> > +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> > @@ -10,9 +10,7 @@
> >  
> >  struct xe_tile;
> >  
> > -int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile);
> > -void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile);
> > -void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift);
> > +int xe_tile_sriov_vf_init(struct xe_tile *tile);
> >  u64 xe_tile_sriov_vf_ggtt(struct xe_tile *tile);
> >  void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size);
> >  u64 xe_tile_sriov_vf_ggtt_base(struct xe_tile *tile);
> > diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> > index 4807ca51614cf..2cbbc51c101d4 100644
> > --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> > +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> > @@ -7,11 +7,15 @@
> >  #define _XE_TILE_SRIOV_VF_TYPES_H_
> >  
> >  #include <linux/types.h>
> > +#include <linux/mutex.h>
> >  
> >  /**
> >   * struct xe_tile_sriov_vf_selfconfig - VF configuration data.
> >   */
> >  struct xe_tile_sriov_vf_selfconfig {
> > +	/** @ggtt_move_mutex: Prevents multiple movements from happening in parallel */
> > +	struct mutex ggtt_move_mutex;
> 
> a) if we correctly get GGTT only from primary GT, then there should be no parallel updates ever

This is not correct. On dGPU the migration recovery worker runs a per-GT
workqueue - the GGTT query + shift needs to serialized between the two
workqueues, hence the need for a lock here. Ofc we could blindly make
all VFs which support migration share the GT workqueue like we do for
iGPU and could drop this lock. I believe that is out of scope of this
series though.

Matt 

> b) if still needed maybe make this mutex more generic to protect all tile-level VF config
> or even make it top-level to protect all VF config ?
> 
> > +
> >  	/** @ggtt_base: assigned base offset of the GGTT region. */
> >  	u64 ggtt_base;
> >  	/** @ggtt_size: assigned size of the GGTT region. */
> 

[PATCH v5 5/6] drm/xe: Convert xe_fb_pin to use a callback for insertion into GGTT

[Maarten Lankhorst]

The rotation details belong in xe_fb_pin.c, while the operations involving
GGTT belong to xe_ggtt.c. As directly locking xe_ggtt etc results in
exposing all of xe_ggtt details anyway, create a special function that
allocates a ggtt_node, and allow display to populate it using a callback
as a compromise.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 111 ++++++++++++-------------
 drivers/gpu/drm/xe/xe_ggtt.c           |  92 ++++++++++++++------
 drivers/gpu/drm/xe/xe_ggtt.h           |   9 +-
 drivers/gpu/drm/xe/xe_ggtt_types.h     |   8 +-
 4 files changed, 132 insertions(+), 88 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 1fd4a815e784b..d2e4903de0977 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -171,12 +171,13 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 }
 
 static void
-write_ggtt_rotated(struct xe_bo *bo, struct xe_ggtt *ggtt, u32 *ggtt_ofs, u32 bo_ofs,
+write_ggtt_rotated(struct xe_ggtt *ggtt, u32 *ggtt_ofs,
+		   u64 pte_flags,
+		   xe_ggtt_set_pte_fn write_pte,
+		   struct xe_bo *bo, u32 bo_ofs,
 		   u32 width, u32 height, u32 src_stride, u32 dst_stride)
 {
-	struct xe_device *xe = xe_bo_device(bo);
 	u32 column, row;
-	u64 pte = ggtt->pt_ops->pte_encode_flags(bo, xe->pat.idx[XE_CACHE_NONE]);
 
 	for (column = 0; column < width; column++) {
 		u32 src_idx = src_stride * (height - 1) + column + bo_ofs;
@@ -184,7 +185,7 @@ write_ggtt_rotated(struct xe_bo *bo, struct xe_ggtt *ggtt, u32 *ggtt_ofs, u32 bo
 		for (row = 0; row < height; row++) {
 			u64 addr = xe_bo_addr(bo, src_idx * XE_PAGE_SIZE, XE_PAGE_SIZE);
 
-			ggtt->pt_ops->ggtt_set_pte(ggtt, *ggtt_ofs, pte | addr);
+			write_pte(ggtt, *ggtt_ofs, pte_flags | addr);
 			*ggtt_ofs += XE_PAGE_SIZE;
 			src_idx -= src_stride;
 		}
@@ -194,6 +195,28 @@ write_ggtt_rotated(struct xe_bo *bo, struct xe_ggtt *ggtt, u32 *ggtt_ofs, u32 bo
 	}
 }
 
+struct fb_rotate_args {
+	const struct i915_gtt_view *view;
+	struct xe_bo *bo;
+};
+
+static void write_ggtt_rotated_node(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
+				    u64 pte_flags, xe_ggtt_set_pte_fn write_pte, void *data)
+{
+	struct fb_rotate_args *args = data;
+	struct xe_bo *bo = args->bo;
+	const struct intel_rotation_info *rot_info = &args->view->rotated;
+	u32 ggtt_ofs = node->base.start;
+
+	for (u32 i = 0; i < ARRAY_SIZE(rot_info->plane); i++)
+		write_ggtt_rotated(ggtt, &ggtt_ofs, pte_flags, write_pte,
+				   bo, rot_info->plane[i].offset,
+				   rot_info->plane[i].width,
+				   rot_info->plane[i].height,
+				   rot_info->plane[i].src_stride,
+				   rot_info->plane[i].dst_stride);
+}
+
 static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
 				const struct i915_gtt_view *view,
 				struct i915_vma *vma,
@@ -204,70 +227,40 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
 	struct xe_device *xe = to_xe_device(fb->base.dev);
 	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
 	struct xe_ggtt *ggtt = tile0->mem.ggtt;
+	u64 pte, size;
 	u32 align;
-	int ret;
-
-	/* TODO: Consider sharing framebuffer mapping?
-	 * embed i915_vma inside intel_framebuffer
-	 */
-	xe_pm_runtime_get_noresume(xe);
-	ret = mutex_lock_interruptible(&ggtt->lock);
-	if (ret)
-		goto out;
+	int ret = 0;
 
 	align = XE_PAGE_SIZE;
-	if (xe_bo_is_vram(bo) && ggtt->flags & XE_GGTT_FLAGS_64K)
-		align = max_t(u32, align, SZ_64K);
+	if (xe_bo_is_vram(bo) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
+		align = max(align, SZ_64K);
 
+	/* Fast case, preallocated GGTT view? */
 	if (bo->ggtt_node[tile0->id] && view->type == I915_GTT_VIEW_NORMAL) {
 		vma->node = bo->ggtt_node[tile0->id];
-	} else if (view->type == I915_GTT_VIEW_NORMAL) {
-		vma->node = xe_ggtt_node_init(ggtt);
-		if (IS_ERR(vma->node)) {
-			ret = PTR_ERR(vma->node);
-			goto out_unlock;
-		}
-
-		ret = xe_ggtt_node_insert_locked(vma->node, xe_bo_size(bo), align, 0);
-		if (ret) {
-			xe_ggtt_node_fini(vma->node);
-			goto out_unlock;
-		}
-
-		xe_ggtt_map_bo(ggtt, vma->node, bo, xe->pat.idx[XE_CACHE_NONE]);
-	} else {
-		u32 i, ggtt_ofs;
-		const struct intel_rotation_info *rot_info = &view->rotated;
-
-		/* display seems to use tiles instead of bytes here, so convert it back.. */
-		u32 size = intel_rotation_info_size(rot_info) * XE_PAGE_SIZE;
-
-		vma->node = xe_ggtt_node_init(ggtt);
-		if (IS_ERR(vma->node)) {
-			ret = PTR_ERR(vma->node);
-			goto out_unlock;
-		}
-
-		ret = xe_ggtt_node_insert_locked(vma->node, size, align, 0);
-		if (ret) {
-			xe_ggtt_node_fini(vma->node);
-			goto out_unlock;
-		}
+		return 0;
+	}
 
-		ggtt_ofs = vma->node->base.start;
+	/* TODO: Consider sharing framebuffer mapping?
+	 * embed i915_vma inside intel_framebuffer
+	 */
+	xe_pm_runtime_get_noresume(xe);
 
-		for (i = 0; i < ARRAY_SIZE(rot_info->plane); i++)
-			write_ggtt_rotated(bo, ggtt, &ggtt_ofs,
-					   rot_info->plane[i].offset,
-					   rot_info->plane[i].width,
-					   rot_info->plane[i].height,
-					   rot_info->plane[i].src_stride,
-					   rot_info->plane[i].dst_stride);
-	}
+	if (view->type == I915_GTT_VIEW_NORMAL)
+		size = xe_bo_size(bo);
+	else
+		/* display uses tiles instead of bytes here, so convert it back.. */
+		size = intel_rotation_info_size(&view->rotated) * XE_PAGE_SIZE;
+
+	pte = xe_ggtt_encode_pte_flags(ggtt, bo, xe->pat.idx[XE_CACHE_NONE]);
+	vma->node = xe_ggtt_node_insert_transform(ggtt, bo, pte,
+						  ALIGN(size, align), align,
+						  view->type == I915_GTT_VIEW_NORMAL ?
+						  NULL : write_ggtt_rotated_node,
+						  &(struct fb_rotate_args){view, bo});
+	if (IS_ERR(vma->node))
+		ret = PTR_ERR(vma->node);
 
-out_unlock:
-	mutex_unlock(&ggtt->lock);
-out:
 	xe_pm_runtime_put(xe);
 	return ret;
 }
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index cd4b62303e0ec..25f931e4b73a4 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -501,19 +501,7 @@ void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift)
 	drm_mm_shift(&ggtt->mm, shift);
 }
 
-/**
- * xe_ggtt_node_insert_locked - Locked version to insert a &xe_ggtt_node into the GGTT
- * @node: the &xe_ggtt_node to be inserted
- * @size: size of the node
- * @align: alignment constrain of the node
- * @mm_flags: flags to control the node behavior
- *
- * It cannot be called without first having called xe_ggtt_init() once.
- * To be used in cases where ggtt->lock is already taken.
- *
- * Return: 0 on success or a negative error code on failure.
- */
-int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
+static int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
 			       u32 size, u32 align, u32 mm_flags)
 {
 	return drm_mm_insert_node_generic(&node->ggtt->mm, &node->base, size, align, 0,
@@ -550,9 +538,13 @@ int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align)
  * @ggtt: the &xe_ggtt where the new node will later be inserted/reserved.
  *
  * This function will allocate the struct %xe_ggtt_node and return its pointer.
- * This struct will then be freed after the node removal upon xe_ggtt_node_remove().
- * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated
- * in GGTT. Only xe_ggtt_node_insert() will ensure the node is inserted or reserved in GGTT.
+ * This struct will then be freed after the node removal upon
+ * xe_ggtt_node_remove().
+ *
+ * Having %xe_ggtt_node struct allocated doesn't mean that the node is already
+ * allocated in GGTT. Only xe_ggtt_node_insert() or allocation through
+ * xe_ggtt_node_insert_transform() will ensure the node is inserted or reserved
+ * in GGTT.
  *
  * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
  **/
@@ -601,13 +593,12 @@ bool xe_ggtt_node_allocated(const struct xe_ggtt_node *node)
  * @ggtt: the &xe_ggtt where node will be mapped
  * @node: the &xe_ggtt_node where this BO is mapped
  * @bo: the &xe_bo to be mapped
- * @pat_index: Which pat_index to use.
+ * @pte: The pte flags to append.
  */
-void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
-		    struct xe_bo *bo, u16 pat_index)
+static void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
+			   struct xe_bo *bo, u64 pte)
 {
-
-	u64 start, pte, end;
+	u64 start, end;
 	struct xe_res_cursor cur;
 
 	if (XE_WARN_ON(!node))
@@ -616,7 +607,6 @@ void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
 	start = node->base.start;
 	end = start + xe_bo_size(bo);
 
-	pte = ggtt->pt_ops->pte_encode_flags(bo, pat_index);
 	if (!xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo)) {
 		xe_assert(xe_bo_device(bo), bo->ttm.ttm);
 
@@ -646,12 +636,65 @@ void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo)
 {
 	u16 cache_mode = bo->flags & XE_BO_FLAG_NEEDS_UC ? XE_CACHE_NONE : XE_CACHE_WB;
 	u16 pat_index = tile_to_xe(ggtt->tile)->pat.idx[cache_mode];
+	u64 pte;
 
 	mutex_lock(&ggtt->lock);
-	xe_ggtt_map_bo(ggtt, bo->ggtt_node[ggtt->tile->id], bo, pat_index);
+	pte = ggtt->pt_ops->pte_encode_flags(bo, pat_index);
+	xe_ggtt_map_bo(ggtt, bo->ggtt_node[ggtt->tile->id], bo, pte);
 	mutex_unlock(&ggtt->lock);
 }
 
+/**
+ * xe_ggtt_node_insert_transform - Insert a newly allocated &xe_ggtt_node into the GGTT
+ * @ggtt: the &xe_ggtt where the node will inserted/reserved.
+ * @bo: The bo to be transformed
+ * @pte_flags: The extra GGTT flags to add to mapping.
+ * @size: size of the node
+ * @align: required alignment for node
+ * @transform: transformation function that will populate the GGTT node, or NULL for linear mapping.
+ * @arg: Extra argument to pass to the transformation function.
+ *
+ * This function allows inserting a GGTT node with a custom transformation function.
+ * This is useful for display to allow inserting rotated framebuffers to GGTT.
+ *
+ * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
+ */
+struct xe_ggtt_node *xe_ggtt_node_insert_transform(struct xe_ggtt *ggtt,
+						   struct xe_bo *bo, u64 pte_flags,
+						   u64 size, u32 align,
+						   xe_ggtt_transform_cb transform, void *arg)
+{
+	struct xe_ggtt_node *node;
+	int ret;
+
+	node = xe_ggtt_node_init(ggtt);
+	if (IS_ERR(node))
+		return ERR_CAST(node);
+
+	if (mutex_lock_interruptible(&ggtt->lock) < 0) {
+		ret = -ERESTARTSYS;
+		goto err;
+	}
+
+	ret = xe_ggtt_node_insert_locked(node, size, align, 0);
+	if (ret)
+		goto err_unlock;
+
+	if (transform)
+		transform(ggtt, node, pte_flags, ggtt->pt_ops->ggtt_set_pte, arg);
+	else
+		xe_ggtt_map_bo(ggtt, node, bo, pte_flags);
+
+	mutex_unlock(&ggtt->lock);
+	return node;
+
+err_unlock:
+	mutex_unlock(&ggtt->lock);
+err:
+	xe_ggtt_node_fini(node);
+	return ERR_PTR(ret);
+}
+
 static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
 				  u64 start, u64 end, struct drm_exec *exec)
 {
@@ -690,8 +733,9 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
 	} else {
 		u16 cache_mode = bo->flags & XE_BO_FLAG_NEEDS_UC ? XE_CACHE_NONE : XE_CACHE_WB;
 		u16 pat_index = tile_to_xe(ggtt->tile)->pat.idx[cache_mode];
+		u64 pte = ggtt->pt_ops->pte_encode_flags(bo, pat_index);
 
-		xe_ggtt_map_bo(ggtt, bo->ggtt_node[tile_id], bo, pat_index);
+		xe_ggtt_map_bo(ggtt, bo->ggtt_node[tile_id], bo, pte);
 	}
 	mutex_unlock(&ggtt->lock);
 
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index eccef2d2b3cee..fb518696c3280 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -24,12 +24,13 @@ u64 xe_ggtt_start(struct xe_ggtt *ggtt);
 u64 xe_ggtt_size(struct xe_ggtt *ggtt);
 
 int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align);
-int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
-			       u32 size, u32 align, u32 mm_flags);
+struct xe_ggtt_node *
+xe_ggtt_node_insert_transform(struct xe_ggtt *ggtt,
+			      struct xe_bo *bo, u64 pte,
+			      u64 size, u32 align,
+			      xe_ggtt_transform_cb transform, void *arg);
 void xe_ggtt_node_remove(struct xe_ggtt_node *node, bool invalidate);
 bool xe_ggtt_node_allocated(const struct xe_ggtt_node *node);
-void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
-		    struct xe_bo *bo, u16 pat_index);
 void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo);
 int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo, struct drm_exec *exec);
 int xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
index b659ffc612269..ef26e7ce5064e 100644
--- a/drivers/gpu/drm/xe/xe_ggtt_types.h
+++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
@@ -71,6 +71,11 @@ struct xe_ggtt_node {
 	bool invalidate_on_remove;
 };
 
+typedef void (*xe_ggtt_set_pte_fn)(struct xe_ggtt *ggtt, u64 addr, u64 pte);
+typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
+				     struct xe_ggtt_node *node,
+				     u64 pte_flags,
+				     xe_ggtt_set_pte_fn set_pte, void *arg);
 /**
  * struct xe_ggtt_pt_ops - GGTT Page table operations
  * Which can vary from platform to platform.
@@ -78,8 +83,9 @@ struct xe_ggtt_node {
 struct xe_ggtt_pt_ops {
 	/** @pte_encode_flags: Encode PTE flags for a given BO */
 	u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index);
+
 	/** @ggtt_set_pte: Directly write into GGTT's PTE */
-	void (*ggtt_set_pte)(struct xe_ggtt *ggtt, u64 addr, u64 pte);
+	xe_ggtt_set_pte_fn ggtt_set_pte;
 };
 
 #endif
-- 
2.51.0

[PATCH v5 6/6] drm/xe: Move struct xe_ggtt to xe_ggtt.c

[Maarten Lankhorst]

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

No users left outside of xe_ggtt.c, so we can make the struct private.

This prevents us from accidentally touching it before init.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/xe_ggtt.c       | 52 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ggtt_types.h | 51 -----------------------------
 2 files changed, 52 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 25f931e4b73a4..6118278c0b59b 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -67,6 +67,58 @@
  * give us the correct placement for free.
  */
 
+/**
+ * struct xe_ggtt_pt_ops - GGTT Page table operations
+ * Which can vary from platform to platform.
+ */
+struct xe_ggtt_pt_ops {
+	/** @pte_encode_flags: Encode PTE flags for a given BO */
+	u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index);
+
+	/** @ggtt_set_pte: Directly write into GGTT's PTE */
+	xe_ggtt_set_pte_fn ggtt_set_pte;
+};
+
+/**
+ * struct xe_ggtt - Main GGTT struct
+ *
+ * In general, each tile can contains its own Global Graphics Translation Table
+ * (GGTT) instance.
+ */
+struct xe_ggtt {
+	/** @tile: Back pointer to tile where this GGTT belongs */
+	struct xe_tile *tile;
+        /** @start: Start offset of GGTT */
+	u64 start;
+	/** @size: Total usable size of this GGTT */
+	u64 size;
+
+#define XE_GGTT_FLAGS_64K BIT(0)
+	/**
+	 * @flags: Flags for this GGTT
+	 * Acceptable flags:
+	 * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K.
+	 */
+	unsigned int flags;
+	/** @scratch: Internal object allocation used as a scratch page */
+	struct xe_bo *scratch;
+	/** @lock: Mutex lock to protect GGTT data */
+	struct mutex lock;
+	/**
+	 *  @gsm: The iomem pointer to the actual location of the translation
+	 * table located in the GSM for easy PTE manipulation
+	 */
+	u64 __iomem *gsm;
+	/** @pt_ops: Page Table operations per platform */
+	const struct xe_ggtt_pt_ops *pt_ops;
+	/** @mm: The memory manager used to manage individual GGTT allocations */
+	struct drm_mm mm;
+	/** @access_count: counts GGTT writes */
+	unsigned int access_count;
+	/** @wq: Dedicated unordered work queue to process node removals */
+	struct workqueue_struct *wq;
+};
+
 static u64 xelp_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index)
 {
 	u64 pte = XE_PAGE_PRESENT;
diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
index ef26e7ce5064e..715b7cc4cfcdb 100644
--- a/drivers/gpu/drm/xe/xe_ggtt_types.h
+++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
@@ -13,46 +13,6 @@
 struct xe_bo;
 struct xe_gt;
 
-/**
- * struct xe_ggtt - Main GGTT struct
- *
- * In general, each tile can contains its own Global Graphics Translation Table
- * (GGTT) instance.
- */
-struct xe_ggtt {
-	/** @tile: Back pointer to tile where this GGTT belongs */
-	struct xe_tile *tile;
-	/** @start: Start offset of GGTT */
-	u64 start;
-	/** @size: Total usable size of this GGTT */
-	u64 size;
-
-#define XE_GGTT_FLAGS_64K BIT(0)
-	/**
-	 * @flags: Flags for this GGTT
-	 * Acceptable flags:
-	 * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K.
-	 */
-	unsigned int flags;
-	/** @scratch: Internal object allocation used as a scratch page */
-	struct xe_bo *scratch;
-	/** @lock: Mutex lock to protect GGTT data */
-	struct mutex lock;
-	/**
-	 *  @gsm: The iomem pointer to the actual location of the translation
-	 * table located in the GSM for easy PTE manipulation
-	 */
-	u64 __iomem *gsm;
-	/** @pt_ops: Page Table operations per platform */
-	const struct xe_ggtt_pt_ops *pt_ops;
-	/** @mm: The memory manager used to manage individual GGTT allocations */
-	struct drm_mm mm;
-	/** @access_count: counts GGTT writes */
-	unsigned int access_count;
-	/** @wq: Dedicated unordered work queue to process node removals */
-	struct workqueue_struct *wq;
-};
-
 /**
  * struct xe_ggtt_node - A node in GGTT.
  *
@@ -76,16 +36,5 @@ typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
 				     struct xe_ggtt_node *node,
 				     u64 pte_flags,
 				     xe_ggtt_set_pte_fn set_pte, void *arg);
-/**
- * struct xe_ggtt_pt_ops - GGTT Page table operations
- * Which can vary from platform to platform.
- */
-struct xe_ggtt_pt_ops {
-	/** @pte_encode_flags: Encode PTE flags for a given BO */
-	u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index);
-
-	/** @ggtt_set_pte: Directly write into GGTT's PTE */
-	xe_ggtt_set_pte_fn ggtt_set_pte;
-};
 
 #endif
-- 
2.51.0

Re: [PATCH v5 6/6] drm/xe: Move struct xe_ggtt to xe_ggtt.c

[Michal Wajdeczko]

On 10/10/2025 2:07 PM, Maarten Lankhorst wrote:
> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> 
> No users left outside of xe_ggtt.c, so we can make the struct private.
> 
> This prevents us from accidentally touching it before init.
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
>  drivers/gpu/drm/xe/xe_ggtt.c       | 52 ++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ggtt_types.h | 51 -----------------------------
>  2 files changed, 52 insertions(+), 51 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 25f931e4b73a4..6118278c0b59b 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -67,6 +67,58 @@
>   * give us the correct placement for free.
>   */
>  
> +/**
> + * struct xe_ggtt_pt_ops - GGTT Page table operations
> + * Which can vary from platform to platform.
> + */
> +struct xe_ggtt_pt_ops {
> +	/** @pte_encode_flags: Encode PTE flags for a given BO */
> +	u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index);
> +
> +	/** @ggtt_set_pte: Directly write into GGTT's PTE */
> +	xe_ggtt_set_pte_fn ggtt_set_pte;
> +};
> +
> +/**
> + * struct xe_ggtt - Main GGTT struct
> + *
> + * In general, each tile can contains its own Global Graphics Translation Table
> + * (GGTT) instance.
> + */
> +struct xe_ggtt {
> +	/** @tile: Back pointer to tile where this GGTT belongs */
> +	struct xe_tile *tile;
> +        /** @start: Start offset of GGTT */
> +	u64 start;
> +	/** @size: Total usable size of this GGTT */
> +	u64 size;
> +
> +#define XE_GGTT_FLAGS_64K BIT(0)
> +	/**
> +	 * @flags: Flags for this GGTT
> +	 * Acceptable flags:
> +	 * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K.
> +	 */
> +	unsigned int flags;
> +	/** @scratch: Internal object allocation used as a scratch page */
> +	struct xe_bo *scratch;
> +	/** @lock: Mutex lock to protect GGTT data */
> +	struct mutex lock;
> +	/**
> +	 *  @gsm: The iomem pointer to the actual location of the translation
> +	 * table located in the GSM for easy PTE manipulation
> +	 */
> +	u64 __iomem *gsm;
> +	/** @pt_ops: Page Table operations per platform */
> +	const struct xe_ggtt_pt_ops *pt_ops;
> +	/** @mm: The memory manager used to manage individual GGTT allocations */
> +	struct drm_mm mm;
> +	/** @access_count: counts GGTT writes */
> +	unsigned int access_count;
> +	/** @wq: Dedicated unordered work queue to process node removals */
> +	struct workqueue_struct *wq;
> +};
> +
>  static u64 xelp_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index)
>  {
>  	u64 pte = XE_PAGE_PRESENT;
> diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
> index ef26e7ce5064e..715b7cc4cfcdb 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt_types.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
> @@ -13,46 +13,6 @@
>  struct xe_bo;
>  struct xe_gt;
>  
> -/**
> - * struct xe_ggtt - Main GGTT struct
> - *
> - * In general, each tile can contains its own Global Graphics Translation Table
> - * (GGTT) instance.
> - */
> -struct xe_ggtt {
> -	/** @tile: Back pointer to tile where this GGTT belongs */
> -	struct xe_tile *tile;
> -	/** @start: Start offset of GGTT */
> -	u64 start;
> -	/** @size: Total usable size of this GGTT */
> -	u64 size;
> -
> -#define XE_GGTT_FLAGS_64K BIT(0)
> -	/**
> -	 * @flags: Flags for this GGTT
> -	 * Acceptable flags:
> -	 * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K.
> -	 */
> -	unsigned int flags;
> -	/** @scratch: Internal object allocation used as a scratch page */
> -	struct xe_bo *scratch;
> -	/** @lock: Mutex lock to protect GGTT data */
> -	struct mutex lock;
> -	/**
> -	 *  @gsm: The iomem pointer to the actual location of the translation
> -	 * table located in the GSM for easy PTE manipulation
> -	 */
> -	u64 __iomem *gsm;
> -	/** @pt_ops: Page Table operations per platform */
> -	const struct xe_ggtt_pt_ops *pt_ops;
> -	/** @mm: The memory manager used to manage individual GGTT allocations */
> -	struct drm_mm mm;
> -	/** @access_count: counts GGTT writes */
> -	unsigned int access_count;
> -	/** @wq: Dedicated unordered work queue to process node removals */
> -	struct workqueue_struct *wq;
> -};
> -
>  /**
>   * struct xe_ggtt_node - A node in GGTT.

hmm, leaving xe_ggtt_node here is surprising as initial work was about hiding its implementation details

shouldn't we start with finishing the cleanup of any users who are still accessing xe_ggtt_node directly ?

and then we can just make sure that ggtt_types.h in *only* included from ggtt.c 

>   *
> @@ -76,16 +36,5 @@ typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
>  				     struct xe_ggtt_node *node,
>  				     u64 pte_flags,
>  				     xe_ggtt_set_pte_fn set_pte, void *arg);
> -/**
> - * struct xe_ggtt_pt_ops - GGTT Page table operations
> - * Which can vary from platform to platform.
> - */
> -struct xe_ggtt_pt_ops {
> -	/** @pte_encode_flags: Encode PTE flags for a given BO */
> -	u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index);
> -
> -	/** @ggtt_set_pte: Directly write into GGTT's PTE */
> -	xe_ggtt_set_pte_fn ggtt_set_pte;
> -};
>  
>  #endif

Re: [PATCH v5 6/6] drm/xe: Move struct xe_ggtt to xe_ggtt.c

[Maarten Lankhorst]

Hey,

Den 2025-10-10 kl. 17:05, skrev Michal Wajdeczko:
> 
> 
> On 10/10/2025 2:07 PM, Maarten Lankhorst wrote:
>> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>
>> No users left outside of xe_ggtt.c, so we can make the struct private.
>>
>> This prevents us from accidentally touching it before init.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> Reviewed-by: Matthew Brost <matthew.brost@intel.com>
>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>> ---
>>  drivers/gpu/drm/xe/xe_ggtt.c       | 52 ++++++++++++++++++++++++++++++
>>  drivers/gpu/drm/xe/xe_ggtt_types.h | 51 -----------------------------
>>  2 files changed, 52 insertions(+), 51 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
>> index 25f931e4b73a4..6118278c0b59b 100644
>> --- a/drivers/gpu/drm/xe/xe_ggtt.c
>> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
>> @@ -67,6 +67,58 @@
>>   * give us the correct placement for free.
>>   */
>>  
>> +/**
>> + * struct xe_ggtt_pt_ops - GGTT Page table operations
>> + * Which can vary from platform to platform.
>> + */
>> +struct xe_ggtt_pt_ops {
>> +	/** @pte_encode_flags: Encode PTE flags for a given BO */
>> +	u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index);
>> +
>> +	/** @ggtt_set_pte: Directly write into GGTT's PTE */
>> +	xe_ggtt_set_pte_fn ggtt_set_pte;
>> +};
>> +
>> +/**
>> + * struct xe_ggtt - Main GGTT struct
>> + *
>> + * In general, each tile can contains its own Global Graphics Translation Table
>> + * (GGTT) instance.
>> + */
>> +struct xe_ggtt {
>> +	/** @tile: Back pointer to tile where this GGTT belongs */
>> +	struct xe_tile *tile;
>> +        /** @start: Start offset of GGTT */
>> +	u64 start;
>> +	/** @size: Total usable size of this GGTT */
>> +	u64 size;
>> +
>> +#define XE_GGTT_FLAGS_64K BIT(0)
>> +	/**
>> +	 * @flags: Flags for this GGTT
>> +	 * Acceptable flags:
>> +	 * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K.
>> +	 */
>> +	unsigned int flags;
>> +	/** @scratch: Internal object allocation used as a scratch page */
>> +	struct xe_bo *scratch;
>> +	/** @lock: Mutex lock to protect GGTT data */
>> +	struct mutex lock;
>> +	/**
>> +	 *  @gsm: The iomem pointer to the actual location of the translation
>> +	 * table located in the GSM for easy PTE manipulation
>> +	 */
>> +	u64 __iomem *gsm;
>> +	/** @pt_ops: Page Table operations per platform */
>> +	const struct xe_ggtt_pt_ops *pt_ops;
>> +	/** @mm: The memory manager used to manage individual GGTT allocations */
>> +	struct drm_mm mm;
>> +	/** @access_count: counts GGTT writes */
>> +	unsigned int access_count;
>> +	/** @wq: Dedicated unordered work queue to process node removals */
>> +	struct workqueue_struct *wq;
>> +};
>> +
>>  static u64 xelp_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index)
>>  {
>>  	u64 pte = XE_PAGE_PRESENT;
>> diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
>> index ef26e7ce5064e..715b7cc4cfcdb 100644
>> --- a/drivers/gpu/drm/xe/xe_ggtt_types.h
>> +++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
>> @@ -13,46 +13,6 @@
>>  struct xe_bo;
>>  struct xe_gt;
>>  
>> -/**
>> - * struct xe_ggtt - Main GGTT struct
>> - *
>> - * In general, each tile can contains its own Global Graphics Translation Table
>> - * (GGTT) instance.
>> - */
>> -struct xe_ggtt {
>> -	/** @tile: Back pointer to tile where this GGTT belongs */
>> -	struct xe_tile *tile;
>> -	/** @start: Start offset of GGTT */
>> -	u64 start;
>> -	/** @size: Total usable size of this GGTT */
>> -	u64 size;
>> -
>> -#define XE_GGTT_FLAGS_64K BIT(0)
>> -	/**
>> -	 * @flags: Flags for this GGTT
>> -	 * Acceptable flags:
>> -	 * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K.
>> -	 */
>> -	unsigned int flags;
>> -	/** @scratch: Internal object allocation used as a scratch page */
>> -	struct xe_bo *scratch;
>> -	/** @lock: Mutex lock to protect GGTT data */
>> -	struct mutex lock;
>> -	/**
>> -	 *  @gsm: The iomem pointer to the actual location of the translation
>> -	 * table located in the GSM for easy PTE manipulation
>> -	 */
>> -	u64 __iomem *gsm;
>> -	/** @pt_ops: Page Table operations per platform */
>> -	const struct xe_ggtt_pt_ops *pt_ops;
>> -	/** @mm: The memory manager used to manage individual GGTT allocations */
>> -	struct drm_mm mm;
>> -	/** @access_count: counts GGTT writes */
>> -	unsigned int access_count;
>> -	/** @wq: Dedicated unordered work queue to process node removals */
>> -	struct workqueue_struct *wq;
>> -};
>> -
>>  /**
>>   * struct xe_ggtt_node - A node in GGTT.
> 
> hmm, leaving xe_ggtt_node here is surprising as initial work was about hiding its implementation details
> 
> shouldn't we start with finishing the cleanup of any users who are still accessing xe_ggtt_node directly ?
> 
> and then we can just make sure that ggtt_types.h in *only* included from ggtt.c 

I'm working on improving this now. Looks like it's mostly trivial except xe_gt_sriov_pf.c is not using the xe_bo_ggtt_addr. Will try to fix this in a bit.
Hoping the next version will not need to expose xe_ggtt_node, and then trivially not need to have the offset applied on each node separately.

Kind regards,
~Maarten Lankhorst

✗ CI.checkpatch: warning for drm/xe: Make struct xe_ggtt private. (rev5)

[Patchwork]

== Series Details ==

Series: drm/xe: Make struct xe_ggtt private. (rev5)
URL   : https://patchwork.freedesktop.org/series/139778/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fbd08a78c3a3bb17964db2a326514c69c1dca660
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 1850f6effb36c31302e152dacd8252c2050dc4ee
Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Date:   Fri Oct 10 14:07:02 2025 +0200

    drm/xe: Move struct xe_ggtt to xe_ggtt.c
    
    No users left outside of xe_ggtt.c, so we can make the struct private.
    
    This prevents us from accidentally touching it before init.
    
    Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
    Reviewed-by: Matthew Brost <matthew.brost@intel.com>
    Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
+ /mt/dim checkpatch a83c7590b57a56cfc1f4d9e1c07948643c9ed165 drm-intel
e27845de8524 drm/xe: Only have a single drmm release action.
95e869203dea drm/mm: Introduce address space shifting
9cdd53ebdb6f drm/xe: Start using ggtt->start in preparation of balloon removal
-:90: CHECK:SPACING: No space is necessary after a cast
#90: FILE: drivers/gpu/drm/xe/xe_ggtt.c:289:
+		ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;

total: 0 errors, 0 warnings, 1 checks, 167 lines checked
a5dcf60799fa drm/xe: Rewrite GGTT VF initialisation
-:73: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#73: FILE: drivers/gpu/drm/xe/xe_ggtt.c:296:
+			xe_tile_err(ggtt->tile, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
+				     ggtt->tile->id, ggtt_start, ggtt_start + ggtt_size - 1);

total: 0 errors, 0 warnings, 1 checks, 556 lines checked
2009f28d4a50 drm/xe: Convert xe_fb_pin to use a callback for insertion into GGTT
-:195: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#195: FILE: drivers/gpu/drm/xe/xe_ggtt.c:505:
+static int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
 			       u32 size, u32 align, u32 mm_flags)

total: 0 errors, 0 warnings, 1 checks, 321 lines checked
1850f6effb36 drm/xe: Move struct xe_ggtt to xe_ggtt.c
-:43: ERROR:CODE_INDENT: code indent should use tabs where possible
#43: FILE: drivers/gpu/drm/xe/xe_ggtt.c:91:
+        /** @start: Start offset of GGTT */$

total: 1 errors, 0 warnings, 0 checks, 120 lines checked

✓ CI.KUnit: success for drm/xe: Make struct xe_ggtt private. (rev5)

[Patchwork]

== Series Details ==

Series: drm/xe: Make struct xe_ggtt private. (rev5)
URL   : https://patchwork.freedesktop.org/series/139778/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:30:46] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:30:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[13:31:27] Starting KUnit Kernel (1/1)...
[13:31:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:31:27] ================== guc_buf (11 subtests) ===================
[13:31:27] [PASSED] test_smallest
[13:31:27] [PASSED] test_largest
[13:31:27] [PASSED] test_granular
[13:31:27] [PASSED] test_unique
[13:31:28] [PASSED] test_overlap
[13:31:28] [PASSED] test_reusable
[13:31:28] [PASSED] test_too_big
[13:31:28] [PASSED] test_flush
[13:31:28] [PASSED] test_lookup
[13:31:28] [PASSED] test_data
[13:31:28] [PASSED] test_class
[13:31:28] ===================== [PASSED] guc_buf =====================
[13:31:28] =================== guc_dbm (7 subtests) ===================
[13:31:28] [PASSED] test_empty
[13:31:28] [PASSED] test_default
[13:31:28] ======================== test_size  ========================
[13:31:28] [PASSED] 4
[13:31:28] [PASSED] 8
[13:31:28] [PASSED] 32
[13:31:28] [PASSED] 256
[13:31:28] ==================== [PASSED] test_size ====================
[13:31:28] ======================= test_reuse  ========================
[13:31:28] [PASSED] 4
[13:31:28] [PASSED] 8
[13:31:28] [PASSED] 32
[13:31:28] [PASSED] 256
[13:31:28] =================== [PASSED] test_reuse ====================
[13:31:28] =================== test_range_overlap  ====================
[13:31:28] [PASSED] 4
[13:31:28] [PASSED] 8
[13:31:28] [PASSED] 32
[13:31:28] [PASSED] 256
[13:31:28] =============== [PASSED] test_range_overlap ================
[13:31:28] =================== test_range_compact  ====================
[13:31:28] [PASSED] 4
[13:31:28] [PASSED] 8
[13:31:28] [PASSED] 32
[13:31:28] [PASSED] 256
[13:31:28] =============== [PASSED] test_range_compact ================
[13:31:28] ==================== test_range_spare  =====================
[13:31:28] [PASSED] 4
[13:31:28] [PASSED] 8
[13:31:28] [PASSED] 32
[13:31:28] [PASSED] 256
[13:31:28] ================ [PASSED] test_range_spare =================
[13:31:28] ===================== [PASSED] guc_dbm =====================
[13:31:28] =================== guc_idm (6 subtests) ===================
[13:31:28] [PASSED] bad_init
[13:31:28] [PASSED] no_init
[13:31:28] [PASSED] init_fini
[13:31:28] [PASSED] check_used
[13:31:28] [PASSED] check_quota
[13:31:28] [PASSED] check_all
[13:31:28] ===================== [PASSED] guc_idm =====================
[13:31:28] ================== no_relay (3 subtests) ===================
[13:31:28] [PASSED] xe_drops_guc2pf_if_not_ready
[13:31:28] [PASSED] xe_drops_guc2vf_if_not_ready
[13:31:28] [PASSED] xe_rejects_send_if_not_ready
[13:31:28] ==================== [PASSED] no_relay =====================
[13:31:28] ================== pf_relay (14 subtests) ==================
[13:31:28] [PASSED] pf_rejects_guc2pf_too_short
[13:31:28] [PASSED] pf_rejects_guc2pf_too_long
[13:31:28] [PASSED] pf_rejects_guc2pf_no_payload
[13:31:28] [PASSED] pf_fails_no_payload
[13:31:28] [PASSED] pf_fails_bad_origin
[13:31:28] [PASSED] pf_fails_bad_type
[13:31:28] [PASSED] pf_txn_reports_error
[13:31:28] [PASSED] pf_txn_sends_pf2guc
[13:31:28] [PASSED] pf_sends_pf2guc
[13:31:28] [SKIPPED] pf_loopback_nop
[13:31:28] [SKIPPED] pf_loopback_echo
[13:31:28] [SKIPPED] pf_loopback_fail
[13:31:28] [SKIPPED] pf_loopback_busy
[13:31:28] [SKIPPED] pf_loopback_retry
[13:31:28] ==================== [PASSED] pf_relay =====================
[13:31:28] ================== vf_relay (3 subtests) ===================
[13:31:28] [PASSED] vf_rejects_guc2vf_too_short
[13:31:28] [PASSED] vf_rejects_guc2vf_too_long
[13:31:28] [PASSED] vf_rejects_guc2vf_no_payload
[13:31:28] ==================== [PASSED] vf_relay =====================
[13:31:28] ===================== lmtt (1 subtest) =====================
[13:31:28] ======================== test_ops  =========================
[13:31:28] [PASSED] 2-level
[13:31:28] [PASSED] multi-level
[13:31:28] ==================== [PASSED] test_ops =====================
[13:31:28] ====================== [PASSED] lmtt =======================
[13:31:28] ================= pf_service (11 subtests) =================
[13:31:28] [PASSED] pf_negotiate_any
[13:31:28] [PASSED] pf_negotiate_base_match
[13:31:28] [PASSED] pf_negotiate_base_newer
[13:31:28] [PASSED] pf_negotiate_base_next
[13:31:28] [SKIPPED] pf_negotiate_base_older
[13:31:28] [PASSED] pf_negotiate_base_prev
[13:31:28] [PASSED] pf_negotiate_latest_match
[13:31:28] [PASSED] pf_negotiate_latest_newer
[13:31:28] [PASSED] pf_negotiate_latest_next
[13:31:28] [SKIPPED] pf_negotiate_latest_older
[13:31:28] [SKIPPED] pf_negotiate_latest_prev
[13:31:28] =================== [PASSED] pf_service ====================
[13:31:28] ================= xe_guc_g2g (2 subtests) ==================
[13:31:28] ============== xe_live_guc_g2g_kunit_default  ==============
[13:31:28] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[13:31:28] ============== xe_live_guc_g2g_kunit_allmem  ===============
[13:31:28] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[13:31:28] =================== [SKIPPED] xe_guc_g2g ===================
[13:31:28] =================== xe_mocs (2 subtests) ===================
[13:31:28] ================ xe_live_mocs_kernel_kunit  ================
[13:31:28] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:31:28] ================ xe_live_mocs_reset_kunit  =================
[13:31:28] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:31:28] ==================== [SKIPPED] xe_mocs =====================
[13:31:28] ================= xe_migrate (2 subtests) ==================
[13:31:28] ================= xe_migrate_sanity_kunit  =================
[13:31:28] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:31:28] ================== xe_validate_ccs_kunit  ==================
[13:31:28] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:31:28] =================== [SKIPPED] xe_migrate ===================
[13:31:28] ================== xe_dma_buf (1 subtest) ==================
[13:31:28] ==================== xe_dma_buf_kunit  =====================
[13:31:28] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:31:28] =================== [SKIPPED] xe_dma_buf ===================
[13:31:28] ================= xe_bo_shrink (1 subtest) =================
[13:31:28] =================== xe_bo_shrink_kunit  ====================
[13:31:28] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:31:28] ================== [SKIPPED] xe_bo_shrink ==================
[13:31:28] ==================== xe_bo (2 subtests) ====================
[13:31:28] ================== xe_ccs_migrate_kunit  ===================
[13:31:28] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:31:28] ==================== xe_bo_evict_kunit  ====================
[13:31:28] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:31:28] ===================== [SKIPPED] xe_bo ======================
[13:31:28] ==================== args (11 subtests) ====================
[13:31:28] [PASSED] count_args_test
[13:31:28] [PASSED] call_args_example
[13:31:28] [PASSED] call_args_test
[13:31:28] [PASSED] drop_first_arg_example
[13:31:28] [PASSED] drop_first_arg_test
[13:31:28] [PASSED] first_arg_example
[13:31:28] [PASSED] first_arg_test
[13:31:28] [PASSED] last_arg_example
[13:31:28] [PASSED] last_arg_test
[13:31:28] [PASSED] pick_arg_example
[13:31:28] [PASSED] sep_comma_example
[13:31:28] ====================== [PASSED] args =======================
[13:31:28] =================== xe_pci (3 subtests) ====================
[13:31:28] ==================== check_graphics_ip  ====================
[13:31:28] [PASSED] 12.00 Xe_LP
[13:31:28] [PASSED] 12.10 Xe_LP+
[13:31:28] [PASSED] 12.55 Xe_HPG
[13:31:28] [PASSED] 12.60 Xe_HPC
[13:31:28] [PASSED] 12.70 Xe_LPG
[13:31:28] [PASSED] 12.71 Xe_LPG
[13:31:28] [PASSED] 12.74 Xe_LPG+
[13:31:28] [PASSED] 20.01 Xe2_HPG
[13:31:28] [PASSED] 20.02 Xe2_HPG
[13:31:28] [PASSED] 20.04 Xe2_LPG
[13:31:28] [PASSED] 30.00 Xe3_LPG
[13:31:28] [PASSED] 30.01 Xe3_LPG
[13:31:28] [PASSED] 30.03 Xe3_LPG
[13:31:28] ================ [PASSED] check_graphics_ip ================
[13:31:28] ===================== check_media_ip  ======================
[13:31:28] [PASSED] 12.00 Xe_M
[13:31:28] [PASSED] 12.55 Xe_HPM
[13:31:28] [PASSED] 13.00 Xe_LPM+
[13:31:28] [PASSED] 13.01 Xe2_HPM
[13:31:28] [PASSED] 20.00 Xe2_LPM
[13:31:28] [PASSED] 30.00 Xe3_LPM
[13:31:28] [PASSED] 30.02 Xe3_LPM
[13:31:28] ================= [PASSED] check_media_ip ==================
[13:31:28] ================= check_platform_gt_count  =================
[13:31:28] [PASSED] 0x9A60 (TIGERLAKE)
[13:31:28] [PASSED] 0x9A68 (TIGERLAKE)
[13:31:28] [PASSED] 0x9A70 (TIGERLAKE)
[13:31:28] [PASSED] 0x9A40 (TIGERLAKE)
[13:31:28] [PASSED] 0x9A49 (TIGERLAKE)
[13:31:28] [PASSED] 0x9A59 (TIGERLAKE)
[13:31:28] [PASSED] 0x9A78 (TIGERLAKE)
[13:31:28] [PASSED] 0x9AC0 (TIGERLAKE)
[13:31:28] [PASSED] 0x9AC9 (TIGERLAKE)
[13:31:28] [PASSED] 0x9AD9 (TIGERLAKE)
[13:31:28] [PASSED] 0x9AF8 (TIGERLAKE)
[13:31:28] [PASSED] 0x4C80 (ROCKETLAKE)
[13:31:28] [PASSED] 0x4C8A (ROCKETLAKE)
[13:31:28] [PASSED] 0x4C8B (ROCKETLAKE)
[13:31:28] [PASSED] 0x4C8C (ROCKETLAKE)
[13:31:28] [PASSED] 0x4C90 (ROCKETLAKE)
[13:31:28] [PASSED] 0x4C9A (ROCKETLAKE)
[13:31:28] [PASSED] 0x4680 (ALDERLAKE_S)
[13:31:28] [PASSED] 0x4682 (ALDERLAKE_S)
[13:31:28] [PASSED] 0x4688 (ALDERLAKE_S)
[13:31:28] [PASSED] 0x468A (ALDERLAKE_S)
[13:31:28] [PASSED] 0x468B (ALDERLAKE_S)
[13:31:28] [PASSED] 0x4690 (ALDERLAKE_S)
[13:31:28] [PASSED] 0x4692 (ALDERLAKE_S)
[13:31:28] [PASSED] 0x4693 (ALDERLAKE_S)
[13:31:28] [PASSED] 0x46A0 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46A1 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46A2 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46A3 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46A6 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46A8 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46AA (ALDERLAKE_P)
[13:31:28] [PASSED] 0x462A (ALDERLAKE_P)
[13:31:28] [PASSED] 0x4626 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x4628 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46B0 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46B1 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46B2 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46B3 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46C0 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46C1 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46C2 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46C3 (ALDERLAKE_P)
[13:31:28] [PASSED] 0x46D0 (ALDERLAKE_N)
[13:31:28] [PASSED] 0x46D1 (ALDERLAKE_N)
[13:31:28] [PASSED] 0x46D2 (ALDERLAKE_N)
[13:31:28] [PASSED] 0x46D3 (ALDERLAKE_N)
[13:31:28] [PASSED] 0x46D4 (ALDERLAKE_N)
[13:31:28] [PASSED] 0xA721 (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA7A1 (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA7A9 (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA7AC (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA7AD (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA720 (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA7A0 (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA7A8 (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA7AA (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA7AB (ALDERLAKE_P)
[13:31:28] [PASSED] 0xA780 (ALDERLAKE_S)
[13:31:28] [PASSED] 0xA781 (ALDERLAKE_S)
[13:31:28] [PASSED] 0xA782 (ALDERLAKE_S)
[13:31:28] [PASSED] 0xA783 (ALDERLAKE_S)
[13:31:28] [PASSED] 0xA788 (ALDERLAKE_S)
[13:31:28] [PASSED] 0xA789 (ALDERLAKE_S)
[13:31:28] [PASSED] 0xA78A (ALDERLAKE_S)
[13:31:28] [PASSED] 0xA78B (ALDERLAKE_S)
[13:31:28] [PASSED] 0x4905 (DG1)
[13:31:28] [PASSED] 0x4906 (DG1)
[13:31:28] [PASSED] 0x4907 (DG1)
[13:31:28] [PASSED] 0x4908 (DG1)
[13:31:28] [PASSED] 0x4909 (DG1)
[13:31:28] [PASSED] 0x56C0 (DG2)
[13:31:28] [PASSED] 0x56C2 (DG2)
[13:31:28] [PASSED] 0x56C1 (DG2)
[13:31:28] [PASSED] 0x7D51 (METEORLAKE)
[13:31:28] [PASSED] 0x7DD1 (METEORLAKE)
[13:31:28] [PASSED] 0x7D41 (METEORLAKE)
[13:31:28] [PASSED] 0x7D67 (METEORLAKE)
[13:31:28] [PASSED] 0xB640 (METEORLAKE)
[13:31:28] [PASSED] 0x56A0 (DG2)
[13:31:28] [PASSED] 0x56A1 (DG2)
[13:31:28] [PASSED] 0x56A2 (DG2)
[13:31:28] [PASSED] 0x56BE (DG2)
[13:31:28] [PASSED] 0x56BF (DG2)
[13:31:28] [PASSED] 0x5690 (DG2)
[13:31:28] [PASSED] 0x5691 (DG2)
[13:31:28] [PASSED] 0x5692 (DG2)
[13:31:28] [PASSED] 0x56A5 (DG2)
[13:31:28] [PASSED] 0x56A6 (DG2)
[13:31:28] [PASSED] 0x56B0 (DG2)
[13:31:28] [PASSED] 0x56B1 (DG2)
[13:31:28] [PASSED] 0x56BA (DG2)
[13:31:28] [PASSED] 0x56BB (DG2)
[13:31:28] [PASSED] 0x56BC (DG2)
[13:31:28] [PASSED] 0x56BD (DG2)
[13:31:28] [PASSED] 0x5693 (DG2)
[13:31:28] [PASSED] 0x5694 (DG2)
[13:31:28] [PASSED] 0x5695 (DG2)
[13:31:28] [PASSED] 0x56A3 (DG2)
[13:31:28] [PASSED] 0x56A4 (DG2)
[13:31:28] [PASSED] 0x56B2 (DG2)
[13:31:28] [PASSED] 0x56B3 (DG2)
[13:31:28] [PASSED] 0x5696 (DG2)
[13:31:28] [PASSED] 0x5697 (DG2)
[13:31:28] [PASSED] 0xB69 (PVC)
[13:31:28] [PASSED] 0xB6E (PVC)
[13:31:28] [PASSED] 0xBD4 (PVC)
[13:31:28] [PASSED] 0xBD5 (PVC)
[13:31:28] [PASSED] 0xBD6 (PVC)
[13:31:28] [PASSED] 0xBD7 (PVC)
[13:31:28] [PASSED] 0xBD8 (PVC)
[13:31:28] [PASSED] 0xBD9 (PVC)
[13:31:28] [PASSED] 0xBDA (PVC)
[13:31:28] [PASSED] 0xBDB (PVC)
[13:31:28] [PASSED] 0xBE0 (PVC)
[13:31:28] [PASSED] 0xBE1 (PVC)
[13:31:28] [PASSED] 0xBE5 (PVC)
[13:31:28] [PASSED] 0x7D40 (METEORLAKE)
[13:31:28] [PASSED] 0x7D45 (METEORLAKE)
[13:31:28] [PASSED] 0x7D55 (METEORLAKE)
[13:31:28] [PASSED] 0x7D60 (METEORLAKE)
[13:31:28] [PASSED] 0x7DD5 (METEORLAKE)
[13:31:28] [PASSED] 0x6420 (LUNARLAKE)
[13:31:28] [PASSED] 0x64A0 (LUNARLAKE)
[13:31:28] [PASSED] 0x64B0 (LUNARLAKE)
[13:31:28] [PASSED] 0xE202 (BATTLEMAGE)
[13:31:28] [PASSED] 0xE209 (BATTLEMAGE)
[13:31:28] [PASSED] 0xE20B (BATTLEMAGE)
[13:31:28] [PASSED] 0xE20C (BATTLEMAGE)
[13:31:28] [PASSED] 0xE20D (BATTLEMAGE)
[13:31:28] [PASSED] 0xE210 (BATTLEMAGE)
[13:31:28] [PASSED] 0xE211 (BATTLEMAGE)
[13:31:28] [PASSED] 0xE212 (BATTLEMAGE)
[13:31:28] [PASSED] 0xE216 (BATTLEMAGE)
[13:31:28] [PASSED] 0xE220 (BATTLEMAGE)
[13:31:28] [PASSED] 0xE221 (BATTLEMAGE)
[13:31:28] [PASSED] 0xE222 (BATTLEMAGE)
[13:31:28] [PASSED] 0xE223 (BATTLEMAGE)
[13:31:28] [PASSED] 0xB080 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB081 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB082 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB083 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB084 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB085 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB086 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB087 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB08F (PANTHERLAKE)
[13:31:28] [PASSED] 0xB090 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB0A0 (PANTHERLAKE)
[13:31:28] [PASSED] 0xB0B0 (PANTHERLAKE)
[13:31:28] [PASSED] 0xFD80 (PANTHERLAKE)
[13:31:28] [PASSED] 0xFD81 (PANTHERLAKE)
[13:31:28] ============= [PASSED] check_platform_gt_count =============
[13:31:28] ===================== [PASSED] xe_pci ======================
[13:31:28] =================== xe_rtp (2 subtests) ====================
[13:31:28] =============== xe_rtp_process_to_sr_tests  ================
[13:31:28] [PASSED] coalesce-same-reg
[13:31:28] [PASSED] no-match-no-add
[13:31:28] [PASSED] match-or
[13:31:28] [PASSED] match-or-xfail
[13:31:28] [PASSED] no-match-no-add-multiple-rules
[13:31:28] [PASSED] two-regs-two-entries
[13:31:28] [PASSED] clr-one-set-other
[13:31:28] [PASSED] set-field
[13:31:28] [PASSED] conflict-duplicate
[13:31:28] [PASSED] conflict-not-disjoint
[13:31:28] [PASSED] conflict-reg-type
[13:31:28] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:31:28] ================== xe_rtp_process_tests  ===================
[13:31:28] [PASSED] active1
[13:31:28] [PASSED] active2
[13:31:28] [PASSED] active-inactive
[13:31:28] [PASSED] inactive-active
[13:31:28] [PASSED] inactive-1st_or_active-inactive
[13:31:28] [PASSED] inactive-2nd_or_active-inactive
[13:31:28] [PASSED] inactive-last_or_active-inactive
[13:31:28] [PASSED] inactive-no_or_active-inactive
[13:31:28] ============== [PASSED] xe_rtp_process_tests ===============
[13:31:28] ===================== [PASSED] xe_rtp ======================
[13:31:28] ==================== xe_wa (1 subtest) =====================
[13:31:28] ======================== xe_wa_gt  =========================
[13:31:28] [PASSED] TIGERLAKE B0
[13:31:28] [PASSED] DG1 A0
[13:31:28] [PASSED] DG1 B0
[13:31:28] [PASSED] ALDERLAKE_S A0
[13:31:28] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[13:31:28] [PASSED] ALDERLAKE_S C0
[13:31:28] [PASSED] ALDERLAKE_S D0
[13:31:28] [PASSED] ALDERLAKE_P A0
[13:31:28] [PASSED] ALDERLAKE_P B0
[13:31:28] [PASSED] ALDERLAKE_P C0
[13:31:28] [PASSED] ALDERLAKE_S RPLS D0
[13:31:28] [PASSED] ALDERLAKE_P RPLU E0
[13:31:28] [PASSED] DG2 G10 C0
[13:31:28] [PASSED] DG2 G11 B1
[13:31:28] [PASSED] DG2 G12 A1
[13:31:28] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:31:28] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:31:28] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[13:31:28] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[13:31:28] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[13:31:28] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[13:31:28] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[13:31:28] ==================== [PASSED] xe_wa_gt =====================
[13:31:28] ====================== [PASSED] xe_wa ======================
[13:31:28] ============================================================
[13:31:28] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[13:31:28] Elapsed time: 41.371s total, 4.490s configuring, 36.464s building, 0.394s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:31:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:31:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[13:31:59] Starting KUnit Kernel (1/1)...
[13:31:59] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:31:59] ============ drm_test_pick_cmdline (2 subtests) ============
[13:31:59] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[13:31:59] =============== drm_test_pick_cmdline_named  ===============
[13:31:59] [PASSED] NTSC
[13:31:59] [PASSED] NTSC-J
[13:31:59] [PASSED] PAL
[13:31:59] [PASSED] PAL-M
[13:31:59] =========== [PASSED] drm_test_pick_cmdline_named ===========
[13:31:59] ============== [PASSED] drm_test_pick_cmdline ==============
[13:31:59] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:31:59] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:31:59] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:31:59] =========== drm_validate_clone_mode (2 subtests) ===========
[13:31:59] ============== drm_test_check_in_clone_mode  ===============
[13:31:59] [PASSED] in_clone_mode
[13:31:59] [PASSED] not_in_clone_mode
[13:31:59] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:31:59] =============== drm_test_check_valid_clones  ===============
[13:31:59] [PASSED] not_in_clone_mode
[13:31:59] [PASSED] valid_clone
[13:31:59] [PASSED] invalid_clone
[13:31:59] =========== [PASSED] drm_test_check_valid_clones ===========
[13:31:59] ============= [PASSED] drm_validate_clone_mode =============
[13:31:59] ============= drm_validate_modeset (1 subtest) =============
[13:31:59] [PASSED] drm_test_check_connector_changed_modeset
[13:31:59] ============== [PASSED] drm_validate_modeset ===============
[13:31:59] ====== drm_test_bridge_get_current_state (2 subtests) ======
[13:31:59] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:31:59] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[13:31:59] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:31:59] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:31:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:31:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:31:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[13:31:59] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:31:59] ============== drm_bridge_alloc (2 subtests) ===============
[13:31:59] [PASSED] drm_test_drm_bridge_alloc_basic
[13:31:59] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:31:59] ================ [PASSED] drm_bridge_alloc =================
[13:31:59] ================== drm_buddy (8 subtests) ==================
[13:31:59] [PASSED] drm_test_buddy_alloc_limit
[13:31:59] [PASSED] drm_test_buddy_alloc_optimistic
[13:31:59] [PASSED] drm_test_buddy_alloc_pessimistic
[13:31:59] [PASSED] drm_test_buddy_alloc_pathological
[13:31:59] [PASSED] drm_test_buddy_alloc_contiguous
[13:31:59] [PASSED] drm_test_buddy_alloc_clear
[13:31:59] [PASSED] drm_test_buddy_alloc_range_bias
[13:31:59] [PASSED] drm_test_buddy_fragmentation_performance
[13:31:59] ==================== [PASSED] drm_buddy ====================
[13:31:59] ============= drm_cmdline_parser (40 subtests) =============
[13:31:59] [PASSED] drm_test_cmdline_force_d_only
[13:31:59] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:31:59] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:31:59] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:31:59] [PASSED] drm_test_cmdline_force_e_only
[13:31:59] [PASSED] drm_test_cmdline_res
[13:31:59] [PASSED] drm_test_cmdline_res_vesa
[13:31:59] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:31:59] [PASSED] drm_test_cmdline_res_rblank
[13:31:59] [PASSED] drm_test_cmdline_res_bpp
[13:31:59] [PASSED] drm_test_cmdline_res_refresh
[13:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:31:59] [PASSED] drm_test_cmdline_res_margins_force_on
[13:31:59] [PASSED] drm_test_cmdline_res_vesa_margins
[13:31:59] [PASSED] drm_test_cmdline_name
[13:31:59] [PASSED] drm_test_cmdline_name_bpp
[13:31:59] [PASSED] drm_test_cmdline_name_option
[13:31:59] [PASSED] drm_test_cmdline_name_bpp_option
[13:31:59] [PASSED] drm_test_cmdline_rotate_0
[13:31:59] [PASSED] drm_test_cmdline_rotate_90
[13:31:59] [PASSED] drm_test_cmdline_rotate_180
[13:31:59] [PASSED] drm_test_cmdline_rotate_270
[13:31:59] [PASSED] drm_test_cmdline_hmirror
[13:31:59] [PASSED] drm_test_cmdline_vmirror
[13:31:59] [PASSED] drm_test_cmdline_margin_options
[13:31:59] [PASSED] drm_test_cmdline_multiple_options
[13:31:59] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:31:59] [PASSED] drm_test_cmdline_extra_and_option
[13:31:59] [PASSED] drm_test_cmdline_freestanding_options
[13:31:59] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:31:59] [PASSED] drm_test_cmdline_panel_orientation
[13:31:59] ================ drm_test_cmdline_invalid  =================
[13:31:59] [PASSED] margin_only
[13:31:59] [PASSED] interlace_only
[13:31:59] [PASSED] res_missing_x
[13:31:59] [PASSED] res_missing_y
[13:31:59] [PASSED] res_bad_y
[13:31:59] [PASSED] res_missing_y_bpp
[13:31:59] [PASSED] res_bad_bpp
[13:31:59] [PASSED] res_bad_refresh
[13:31:59] [PASSED] res_bpp_refresh_force_on_off
[13:31:59] [PASSED] res_invalid_mode
[13:31:59] [PASSED] res_bpp_wrong_place_mode
[13:31:59] [PASSED] name_bpp_refresh
[13:31:59] [PASSED] name_refresh
[13:31:59] [PASSED] name_refresh_wrong_mode
[13:31:59] [PASSED] name_refresh_invalid_mode
[13:31:59] [PASSED] rotate_multiple
[13:31:59] [PASSED] rotate_invalid_val
[13:31:59] [PASSED] rotate_truncated
[13:31:59] [PASSED] invalid_option
[13:31:59] [PASSED] invalid_tv_option
[13:31:59] [PASSED] truncated_tv_option
[13:31:59] ============ [PASSED] drm_test_cmdline_invalid =============
[13:31:59] =============== drm_test_cmdline_tv_options  ===============
[13:31:59] [PASSED] NTSC
[13:31:59] [PASSED] NTSC_443
[13:31:59] [PASSED] NTSC_J
[13:31:59] [PASSED] PAL
[13:31:59] [PASSED] PAL_M
[13:31:59] [PASSED] PAL_N
[13:31:59] [PASSED] SECAM
[13:31:59] [PASSED] MONO_525
[13:31:59] [PASSED] MONO_625
[13:31:59] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:31:59] =============== [PASSED] drm_cmdline_parser ================
[13:31:59] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:31:59] [PASSED] drm_test_connector_hdmi_init_valid
[13:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:31:59] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:31:59] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:31:59] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[13:31:59] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:31:59] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:31:59] [PASSED] supported_formats=0x3 yuv420_allowed=1
[13:31:59] [PASSED] supported_formats=0x3 yuv420_allowed=0
[13:31:59] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:31:59] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:31:59] [PASSED] drm_test_connector_hdmi_init_null_product
[13:31:59] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:31:59] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:31:59] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:31:59] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:31:59] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:31:59] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:31:59] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:31:59] ========= drm_test_connector_hdmi_init_type_valid  =========
[13:31:59] [PASSED] HDMI-A
[13:31:59] [PASSED] HDMI-B
[13:31:59] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:31:59] ======== drm_test_connector_hdmi_init_type_invalid  ========
[13:31:59] [PASSED] Unknown
[13:31:59] [PASSED] VGA
[13:31:59] [PASSED] DVI-I
[13:31:59] [PASSED] DVI-D
[13:31:59] [PASSED] DVI-A
[13:31:59] [PASSED] Composite
[13:31:59] [PASSED] SVIDEO
[13:31:59] [PASSED] LVDS
[13:31:59] [PASSED] Component
[13:31:59] [PASSED] DIN
[13:31:59] [PASSED] DP
[13:31:59] [PASSED] TV
[13:31:59] [PASSED] eDP
[13:31:59] [PASSED] Virtual
[13:31:59] [PASSED] DSI
[13:31:59] [PASSED] DPI
[13:31:59] [PASSED] Writeback
[13:31:59] [PASSED] SPI
[13:31:59] [PASSED] USB
[13:31:59] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:31:59] ============ [PASSED] drmm_connector_hdmi_init =============
[13:31:59] ============= drmm_connector_init (3 subtests) =============
[13:31:59] [PASSED] drm_test_drmm_connector_init
[13:31:59] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:31:59] ========= drm_test_drmm_connector_init_type_valid  =========
[13:31:59] [PASSED] Unknown
[13:31:59] [PASSED] VGA
[13:31:59] [PASSED] DVI-I
[13:31:59] [PASSED] DVI-D
[13:31:59] [PASSED] DVI-A
[13:31:59] [PASSED] Composite
[13:31:59] [PASSED] SVIDEO
[13:31:59] [PASSED] LVDS
[13:31:59] [PASSED] Component
[13:31:59] [PASSED] DIN
[13:31:59] [PASSED] DP
[13:31:59] [PASSED] HDMI-A
[13:31:59] [PASSED] HDMI-B
[13:31:59] [PASSED] TV
[13:31:59] [PASSED] eDP
[13:31:59] [PASSED] Virtual
[13:31:59] [PASSED] DSI
[13:31:59] [PASSED] DPI
[13:31:59] [PASSED] Writeback
[13:31:59] [PASSED] SPI
[13:31:59] [PASSED] USB
[13:31:59] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:31:59] =============== [PASSED] drmm_connector_init ===============
[13:31:59] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_init
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:31:59] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[13:31:59] [PASSED] Unknown
[13:31:59] [PASSED] VGA
[13:31:59] [PASSED] DVI-I
[13:31:59] [PASSED] DVI-D
[13:31:59] [PASSED] DVI-A
[13:31:59] [PASSED] Composite
[13:31:59] [PASSED] SVIDEO
[13:31:59] [PASSED] LVDS
[13:31:59] [PASSED] Component
[13:31:59] [PASSED] DIN
[13:31:59] [PASSED] DP
[13:31:59] [PASSED] HDMI-A
[13:31:59] [PASSED] HDMI-B
[13:31:59] [PASSED] TV
[13:31:59] [PASSED] eDP
[13:31:59] [PASSED] Virtual
[13:31:59] [PASSED] DSI
[13:31:59] [PASSED] DPI
[13:31:59] [PASSED] Writeback
[13:31:59] [PASSED] SPI
[13:31:59] [PASSED] USB
[13:31:59] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:31:59] ======== drm_test_drm_connector_dynamic_init_name  =========
[13:31:59] [PASSED] Unknown
[13:31:59] [PASSED] VGA
[13:31:59] [PASSED] DVI-I
[13:31:59] [PASSED] DVI-D
[13:31:59] [PASSED] DVI-A
[13:31:59] [PASSED] Composite
[13:31:59] [PASSED] SVIDEO
[13:31:59] [PASSED] LVDS
[13:31:59] [PASSED] Component
[13:31:59] [PASSED] DIN
[13:31:59] [PASSED] DP
[13:31:59] [PASSED] HDMI-A
[13:31:59] [PASSED] HDMI-B
[13:31:59] [PASSED] TV
[13:31:59] [PASSED] eDP
[13:31:59] [PASSED] Virtual
[13:31:59] [PASSED] DSI
[13:31:59] [PASSED] DPI
[13:31:59] [PASSED] Writeback
[13:31:59] [PASSED] SPI
[13:31:59] [PASSED] USB
[13:31:59] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:31:59] =========== [PASSED] drm_connector_dynamic_init ============
[13:31:59] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:31:59] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:31:59] ======= drm_connector_dynamic_register (7 subtests) ========
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:31:59] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:31:59] ========= [PASSED] drm_connector_dynamic_register ==========
[13:31:59] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:31:59] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:31:59] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:31:59] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:31:59] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:31:59] ========== drm_test_get_tv_mode_from_name_valid  ===========
[13:31:59] [PASSED] NTSC
[13:31:59] [PASSED] NTSC-443
[13:31:59] [PASSED] NTSC-J
[13:31:59] [PASSED] PAL
[13:31:59] [PASSED] PAL-M
[13:31:59] [PASSED] PAL-N
[13:31:59] [PASSED] SECAM
[13:31:59] [PASSED] Mono
[13:31:59] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:31:59] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:31:59] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:31:59] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:31:59] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[13:31:59] [PASSED] VIC 96
[13:31:59] [PASSED] VIC 97
[13:31:59] [PASSED] VIC 101
[13:31:59] [PASSED] VIC 102
[13:31:59] [PASSED] VIC 106
[13:31:59] [PASSED] VIC 107
[13:31:59] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:31:59] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:31:59] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:31:59] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[13:31:59] [PASSED] Automatic
[13:31:59] [PASSED] Full
[13:31:59] [PASSED] Limited 16:235
[13:31:59] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:31:59] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:31:59] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:31:59] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:31:59] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[13:31:59] [PASSED] RGB
[13:31:59] [PASSED] YUV 4:2:0
[13:31:59] [PASSED] YUV 4:2:2
[13:31:59] [PASSED] YUV 4:4:4
[13:31:59] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:31:59] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:31:59] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:31:59] ============= drm_damage_helper (21 subtests) ==============
[13:31:59] [PASSED] drm_test_damage_iter_no_damage
[13:31:59] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:31:59] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:31:59] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:31:59] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:31:59] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:31:59] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:31:59] [PASSED] drm_test_damage_iter_simple_damage
[13:31:59] [PASSED] drm_test_damage_iter_single_damage
[13:31:59] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:31:59] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:31:59] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:31:59] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:31:59] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:31:59] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:31:59] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:31:59] [PASSED] drm_test_damage_iter_damage
[13:31:59] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:31:59] [PASSED] drm_test_damage_iter_damage_one_outside
[13:31:59] [PASSED] drm_test_damage_iter_damage_src_moved
[13:31:59] [PASSED] drm_test_damage_iter_damage_not_visible
[13:31:59] ================ [PASSED] drm_damage_helper ================
[13:31:59] ============== drm_dp_mst_helper (3 subtests) ==============
[13:31:59] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[13:31:59] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:31:59] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:31:59] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:31:59] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:31:59] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:31:59] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:31:59] ============== drm_test_dp_mst_calc_pbn_div  ===============
[13:31:59] [PASSED] Link rate 2000000 lane count 4
[13:31:59] [PASSED] Link rate 2000000 lane count 2
[13:31:59] [PASSED] Link rate 2000000 lane count 1
[13:31:59] [PASSED] Link rate 1350000 lane count 4
[13:31:59] [PASSED] Link rate 1350000 lane count 2
[13:31:59] [PASSED] Link rate 1350000 lane count 1
[13:31:59] [PASSED] Link rate 1000000 lane count 4
[13:31:59] [PASSED] Link rate 1000000 lane count 2
[13:31:59] [PASSED] Link rate 1000000 lane count 1
[13:31:59] [PASSED] Link rate 810000 lane count 4
[13:31:59] [PASSED] Link rate 810000 lane count 2
[13:31:59] [PASSED] Link rate 810000 lane count 1
[13:31:59] [PASSED] Link rate 540000 lane count 4
[13:31:59] [PASSED] Link rate 540000 lane count 2
[13:31:59] [PASSED] Link rate 540000 lane count 1
[13:31:59] [PASSED] Link rate 270000 lane count 4
[13:31:59] [PASSED] Link rate 270000 lane count 2
[13:31:59] [PASSED] Link rate 270000 lane count 1
[13:31:59] [PASSED] Link rate 162000 lane count 4
[13:31:59] [PASSED] Link rate 162000 lane count 2
[13:31:59] [PASSED] Link rate 162000 lane count 1
[13:31:59] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:31:59] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[13:31:59] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:31:59] [PASSED] DP_POWER_UP_PHY with port number
[13:31:59] [PASSED] DP_POWER_DOWN_PHY with port number
[13:31:59] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:31:59] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:31:59] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:31:59] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:31:59] [PASSED] DP_QUERY_PAYLOAD with port number
[13:31:59] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:31:59] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:31:59] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:31:59] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:31:59] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:31:59] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:31:59] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:31:59] [PASSED] DP_REMOTE_I2C_READ with port number
[13:31:59] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:31:59] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:31:59] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:31:59] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:31:59] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:31:59] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:31:59] ================ [PASSED] drm_dp_mst_helper ================
[13:31:59] ================== drm_exec (7 subtests) ===================
[13:31:59] [PASSED] sanitycheck
[13:31:59] [PASSED] test_lock
[13:31:59] [PASSED] test_lock_unlock
[13:31:59] [PASSED] test_duplicates
[13:31:59] [PASSED] test_prepare
[13:31:59] [PASSED] test_prepare_array
[13:31:59] [PASSED] test_multiple_loops
[13:31:59] ==================== [PASSED] drm_exec =====================
[13:31:59] =========== drm_format_helper_test (17 subtests) ===========
[13:31:59] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:31:59] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:31:59] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:31:59] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:31:59] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:31:59] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:31:59] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:31:59] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:31:59] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:31:59] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:31:59] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:31:59] ============== drm_test_fb_xrgb8888_to_mono  ===============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:31:59] ==================== drm_test_fb_swab  =====================
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ================ [PASSED] drm_test_fb_swab =================
[13:31:59] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:31:59] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[13:31:59] [PASSED] single_pixel_source_buffer
[13:31:59] [PASSED] single_pixel_clip_rectangle
[13:31:59] [PASSED] well_known_colors
[13:31:59] [PASSED] destination_pitch
[13:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:31:59] ================= drm_test_fb_clip_offset  =================
[13:31:59] [PASSED] pass through
[13:31:59] [PASSED] horizontal offset
[13:31:59] [PASSED] vertical offset
[13:31:59] [PASSED] horizontal and vertical offset
[13:31:59] [PASSED] horizontal offset (custom pitch)
[13:31:59] [PASSED] vertical offset (custom pitch)
[13:31:59] [PASSED] horizontal and vertical offset (custom pitch)
[13:31:59] ============= [PASSED] drm_test_fb_clip_offset =============
[13:31:59] =================== drm_test_fb_memcpy  ====================
[13:31:59] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:31:59] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:31:59] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:31:59] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:31:59] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:31:59] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:31:59] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:31:59] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:31:59] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:31:59] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:31:59] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:31:59] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:31:59] =============== [PASSED] drm_test_fb_memcpy ================
[13:31:59] ============= [PASSED] drm_format_helper_test ==============
[13:31:59] ================= drm_format (18 subtests) =================
[13:31:59] [PASSED] drm_test_format_block_width_invalid
[13:31:59] [PASSED] drm_test_format_block_width_one_plane
[13:31:59] [PASSED] drm_test_format_block_width_two_plane
[13:31:59] [PASSED] drm_test_format_block_width_three_plane
[13:31:59] [PASSED] drm_test_format_block_width_tiled
[13:31:59] [PASSED] drm_test_format_block_height_invalid
[13:31:59] [PASSED] drm_test_format_block_height_one_plane
[13:31:59] [PASSED] drm_test_format_block_height_two_plane
[13:31:59] [PASSED] drm_test_format_block_height_three_plane
[13:31:59] [PASSED] drm_test_format_block_height_tiled
[13:31:59] [PASSED] drm_test_format_min_pitch_invalid
[13:31:59] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:31:59] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:31:59] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:31:59] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:31:59] [PASSED] drm_test_format_min_pitch_two_plane
[13:31:59] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:31:59] [PASSED] drm_test_format_min_pitch_tiled
[13:31:59] =================== [PASSED] drm_format ====================
[13:31:59] ============== drm_framebuffer (10 subtests) ===============
[13:31:59] ========== drm_test_framebuffer_check_src_coords  ==========
[13:31:59] [PASSED] Success: source fits into fb
[13:31:59] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:31:59] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:31:59] [PASSED] Fail: overflowing fb with source width
[13:31:59] [PASSED] Fail: overflowing fb with source height
[13:31:59] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:31:59] [PASSED] drm_test_framebuffer_cleanup
[13:31:59] =============== drm_test_framebuffer_create  ===============
[13:31:59] [PASSED] ABGR8888 normal sizes
[13:31:59] [PASSED] ABGR8888 max sizes
[13:31:59] [PASSED] ABGR8888 pitch greater than min required
[13:31:59] [PASSED] ABGR8888 pitch less than min required
[13:31:59] [PASSED] ABGR8888 Invalid width
[13:31:59] [PASSED] ABGR8888 Invalid buffer handle
[13:31:59] [PASSED] No pixel format
[13:31:59] [PASSED] ABGR8888 Width 0
[13:31:59] [PASSED] ABGR8888 Height 0
[13:31:59] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:31:59] [PASSED] ABGR8888 Large buffer offset
[13:31:59] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:31:59] [PASSED] ABGR8888 Invalid flag
[13:31:59] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:31:59] [PASSED] ABGR8888 Valid buffer modifier
[13:31:59] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:31:59] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:31:59] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:31:59] [PASSED] NV12 Normal sizes
[13:31:59] [PASSED] NV12 Max sizes
[13:31:59] [PASSED] NV12 Invalid pitch
[13:31:59] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:31:59] [PASSED] NV12 different  modifier per-plane
[13:31:59] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:31:59] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:31:59] [PASSED] NV12 Modifier for inexistent plane
[13:31:59] [PASSED] NV12 Handle for inexistent plane
[13:31:59] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:31:59] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:31:59] [PASSED] YVU420 Normal sizes
[13:31:59] [PASSED] YVU420 Max sizes
[13:31:59] [PASSED] YVU420 Invalid pitch
[13:31:59] [PASSED] YVU420 Different pitches
[13:31:59] [PASSED] YVU420 Different buffer offsets/pitches
[13:31:59] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:31:59] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:31:59] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:31:59] [PASSED] YVU420 Valid modifier
[13:31:59] [PASSED] YVU420 Different modifiers per plane
[13:31:59] [PASSED] YVU420 Modifier for inexistent plane
[13:31:59] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:31:59] [PASSED] X0L2 Normal sizes
[13:31:59] [PASSED] X0L2 Max sizes
[13:31:59] [PASSED] X0L2 Invalid pitch
[13:31:59] [PASSED] X0L2 Pitch greater than minimum required
[13:31:59] [PASSED] X0L2 Handle for inexistent plane
[13:31:59] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:31:59] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:31:59] [PASSED] X0L2 Valid modifier
[13:31:59] [PASSED] X0L2 Modifier for inexistent plane
[13:31:59] =========== [PASSED] drm_test_framebuffer_create ===========
[13:31:59] [PASSED] drm_test_framebuffer_free
[13:31:59] [PASSED] drm_test_framebuffer_init
[13:31:59] [PASSED] drm_test_framebuffer_init_bad_format
[13:31:59] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:31:59] [PASSED] drm_test_framebuffer_lookup
[13:31:59] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:31:59] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:31:59] ================= [PASSED] drm_framebuffer =================
[13:31:59] ================ drm_gem_shmem (8 subtests) ================
[13:31:59] [PASSED] drm_gem_shmem_test_obj_create
[13:31:59] [PASSED] drm_gem_shmem_test_obj_create_private
[13:31:59] [PASSED] drm_gem_shmem_test_pin_pages
[13:31:59] [PASSED] drm_gem_shmem_test_vmap
[13:31:59] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:31:59] [PASSED] drm_gem_shmem_test_get_sg_table
[13:31:59] [PASSED] drm_gem_shmem_test_madvise
[13:31:59] [PASSED] drm_gem_shmem_test_purge
[13:31:59] ================== [PASSED] drm_gem_shmem ==================
[13:31:59] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[13:31:59] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:31:59] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:31:59] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:31:59] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:31:59] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:31:59] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:31:59] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[13:31:59] [PASSED] Automatic
[13:31:59] [PASSED] Full
[13:31:59] [PASSED] Limited 16:235
[13:31:59] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:31:59] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:31:59] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:31:59] [PASSED] drm_test_check_disable_connector
[13:31:59] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:31:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:31:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:31:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:31:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:31:59] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:31:59] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:31:59] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:31:59] [PASSED] drm_test_check_output_bpc_dvi
[13:31:59] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:31:59] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:31:59] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:31:59] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:31:59] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:31:59] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:31:59] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:31:59] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:31:59] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:31:59] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:31:59] [PASSED] drm_test_check_broadcast_rgb_value
[13:31:59] [PASSED] drm_test_check_bpc_8_value
[13:31:59] [PASSED] drm_test_check_bpc_10_value
[13:31:59] [PASSED] drm_test_check_bpc_12_value
[13:31:59] [PASSED] drm_test_check_format_value
[13:31:59] [PASSED] drm_test_check_tmds_char_value
[13:31:59] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:31:59] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[13:31:59] [PASSED] drm_test_check_mode_valid
[13:31:59] [PASSED] drm_test_check_mode_valid_reject
[13:31:59] [PASSED] drm_test_check_mode_valid_reject_rate
[13:31:59] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:31:59] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:31:59] ================= drm_managed (2 subtests) =================
[13:31:59] [PASSED] drm_test_managed_release_action
[13:31:59] [PASSED] drm_test_managed_run_action
[13:31:59] =================== [PASSED] drm_managed ===================
[13:31:59] =================== drm_mm (6 subtests) ====================
[13:31:59] [PASSED] drm_test_mm_init
[13:31:59] [PASSED] drm_test_mm_debug
[13:31:59] [PASSED] drm_test_mm_align32
[13:31:59] [PASSED] drm_test_mm_align64
[13:31:59] [PASSED] drm_test_mm_lowest
[13:31:59] [PASSED] drm_test_mm_highest
[13:31:59] ===================== [PASSED] drm_mm ======================
[13:31:59] ============= drm_modes_analog_tv (5 subtests) =============
[13:31:59] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:31:59] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:31:59] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:31:59] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:31:59] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:31:59] =============== [PASSED] drm_modes_analog_tv ===============
[13:31:59] ============== drm_plane_helper (2 subtests) ===============
[13:31:59] =============== drm_test_check_plane_state  ================
[13:31:59] [PASSED] clipping_simple
[13:31:59] [PASSED] clipping_rotate_reflect
[13:31:59] [PASSED] positioning_simple
[13:31:59] [PASSED] upscaling
[13:31:59] [PASSED] downscaling
[13:31:59] [PASSED] rounding1
[13:31:59] [PASSED] rounding2
[13:31:59] [PASSED] rounding3
[13:31:59] [PASSED] rounding4
[13:31:59] =========== [PASSED] drm_test_check_plane_state ============
[13:31:59] =========== drm_test_check_invalid_plane_state  ============
[13:31:59] [PASSED] positioning_invalid
[13:31:59] [PASSED] upscaling_invalid
[13:31:59] [PASSED] downscaling_invalid
[13:31:59] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:31:59] ================ [PASSED] drm_plane_helper =================
[13:31:59] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:31:59] ====== drm_test_connector_helper_tv_get_modes_check  =======
[13:31:59] [PASSED] None
[13:31:59] [PASSED] PAL
[13:31:59] [PASSED] NTSC
[13:31:59] [PASSED] Both, NTSC Default
[13:31:59] [PASSED] Both, PAL Default
[13:31:59] [PASSED] Both, NTSC Default, with PAL on command-line
[13:31:59] [PASSED] Both, PAL Default, with NTSC on command-line
[13:31:59] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:31:59] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:31:59] ================== drm_rect (9 subtests) ===================
[13:31:59] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:31:59] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:31:59] [PASSED] drm_test_rect_clip_scaled_clipped
[13:31:59] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:31:59] ================= drm_test_rect_intersect  =================
[13:31:59] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:31:59] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:31:59] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:31:59] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:31:59] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:31:59] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:31:59] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:31:59] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:31:59] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:31:59] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:31:59] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:31:59] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:31:59] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:31:59] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:31:59] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:31:59] ============= [PASSED] drm_test_rect_intersect =============
[13:31:59] ================ drm_test_rect_calc_hscale  ================
[13:31:59] [PASSED] normal use
[13:31:59] [PASSED] out of max range
[13:31:59] [PASSED] out of min range
[13:31:59] [PASSED] zero dst
[13:31:59] [PASSED] negative src
[13:31:59] [PASSED] negative dst
[13:31:59] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:31:59] ================ drm_test_rect_calc_vscale  ================
[13:31:59] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[13:31:59] [PASSED] out of max range
[13:31:59] [PASSED] out of min range
[13:31:59] [PASSED] zero dst
[13:31:59] [PASSED] negative src
[13:31:59] [PASSED] negative dst
[13:31:59] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:31:59] ================== drm_test_rect_rotate  ===================
[13:31:59] [PASSED] reflect-x
[13:31:59] [PASSED] reflect-y
[13:31:59] [PASSED] rotate-0
[13:31:59] [PASSED] rotate-90
[13:31:59] [PASSED] rotate-180
[13:31:59] [PASSED] rotate-270
[13:31:59] ============== [PASSED] drm_test_rect_rotate ===============
[13:31:59] ================ drm_test_rect_rotate_inv  =================
[13:31:59] [PASSED] reflect-x
[13:31:59] [PASSED] reflect-y
[13:31:59] [PASSED] rotate-0
[13:31:59] [PASSED] rotate-90
[13:31:59] [PASSED] rotate-180
[13:31:59] [PASSED] rotate-270
[13:31:59] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:31:59] ==================== [PASSED] drm_rect =====================
[13:31:59] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:31:59] ============ drm_test_sysfb_build_fourcc_list  =============
[13:31:59] [PASSED] no native formats
[13:31:59] [PASSED] XRGB8888 as native format
[13:31:59] [PASSED] remove duplicates
[13:31:59] [PASSED] convert alpha formats
[13:31:59] [PASSED] random formats
[13:31:59] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:31:59] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:31:59] ============================================================
[13:31:59] Testing complete. Ran 622 tests: passed: 622
[13:32:00] Elapsed time: 31.792s total, 1.721s configuring, 29.604s building, 0.412s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:32:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:32:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[13:32:10] Starting KUnit Kernel (1/1)...
[13:32:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:32:10] ================= ttm_device (5 subtests) ==================
[13:32:10] [PASSED] ttm_device_init_basic
[13:32:10] [PASSED] ttm_device_init_multiple
[13:32:10] [PASSED] ttm_device_fini_basic
[13:32:10] [PASSED] ttm_device_init_no_vma_man
[13:32:10] ================== ttm_device_init_pools  ==================
[13:32:10] [PASSED] No DMA allocations, no DMA32 required
[13:32:10] [PASSED] DMA allocations, DMA32 required
[13:32:10] [PASSED] No DMA allocations, DMA32 required
[13:32:10] [PASSED] DMA allocations, no DMA32 required
[13:32:10] ============== [PASSED] ttm_device_init_pools ==============
[13:32:10] =================== [PASSED] ttm_device ====================
[13:32:10] ================== ttm_pool (8 subtests) ===================
[13:32:10] ================== ttm_pool_alloc_basic  ===================
[13:32:10] [PASSED] One page
[13:32:10] [PASSED] More than one page
[13:32:10] [PASSED] Above the allocation limit
[13:32:10] [PASSED] One page, with coherent DMA mappings enabled
[13:32:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:32:10] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:32:10] ============== ttm_pool_alloc_basic_dma_addr  ==============
[13:32:10] [PASSED] One page
[13:32:10] [PASSED] More than one page
[13:32:10] [PASSED] Above the allocation limit
[13:32:10] [PASSED] One page, with coherent DMA mappings enabled
[13:32:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:32:10] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:32:10] [PASSED] ttm_pool_alloc_order_caching_match
[13:32:10] [PASSED] ttm_pool_alloc_caching_mismatch
[13:32:10] [PASSED] ttm_pool_alloc_order_mismatch
[13:32:10] [PASSED] ttm_pool_free_dma_alloc
[13:32:10] [PASSED] ttm_pool_free_no_dma_alloc
[13:32:10] [PASSED] ttm_pool_fini_basic
[13:32:10] ==================== [PASSED] ttm_pool =====================
[13:32:10] ================ ttm_resource (8 subtests) =================
[13:32:10] ================= ttm_resource_init_basic  =================
[13:32:10] [PASSED] Init resource in TTM_PL_SYSTEM
[13:32:10] [PASSED] Init resource in TTM_PL_VRAM
[13:32:10] [PASSED] Init resource in a private placement
[13:32:10] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:32:10] ============= [PASSED] ttm_resource_init_basic =============
[13:32:10] [PASSED] ttm_resource_init_pinned
[13:32:10] [PASSED] ttm_resource_fini_basic
[13:32:10] [PASSED] ttm_resource_manager_init_basic
[13:32:10] [PASSED] ttm_resource_manager_usage_basic
[13:32:10] [PASSED] ttm_resource_manager_set_used_basic
[13:32:10] [PASSED] ttm_sys_man_alloc_basic
[13:32:10] [PASSED] ttm_sys_man_free_basic
[13:32:10] ================== [PASSED] ttm_resource ===================
[13:32:10] =================== ttm_tt (15 subtests) ===================
[13:32:10] ==================== ttm_tt_init_basic  ====================
[13:32:10] [PASSED] Page-aligned size
[13:32:10] [PASSED] Extra pages requested
[13:32:10] ================ [PASSED] ttm_tt_init_basic ================
[13:32:10] [PASSED] ttm_tt_init_misaligned
[13:32:10] [PASSED] ttm_tt_fini_basic
[13:32:10] [PASSED] ttm_tt_fini_sg
[13:32:10] [PASSED] ttm_tt_fini_shmem
[13:32:10] [PASSED] ttm_tt_create_basic
[13:32:10] [PASSED] ttm_tt_create_invalid_bo_type
[13:32:10] [PASSED] ttm_tt_create_ttm_exists
[13:32:10] [PASSED] ttm_tt_create_failed
[13:32:10] [PASSED] ttm_tt_destroy_basic
[13:32:10] [PASSED] ttm_tt_populate_null_ttm
[13:32:10] [PASSED] ttm_tt_populate_populated_ttm
[13:32:10] [PASSED] ttm_tt_unpopulate_basic
[13:32:10] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:32:10] [PASSED] ttm_tt_swapin_basic
[13:32:10] ===================== [PASSED] ttm_tt ======================
[13:32:10] =================== ttm_bo (14 subtests) ===================
[13:32:10] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[13:32:10] [PASSED] Cannot be interrupted and sleeps
[13:32:10] [PASSED] Cannot be interrupted, locks straight away
[13:32:10] [PASSED] Can be interrupted, sleeps
[13:32:10] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:32:10] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:32:10] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:32:10] [PASSED] ttm_bo_reserve_double_resv
[13:32:10] [PASSED] ttm_bo_reserve_interrupted
[13:32:10] [PASSED] ttm_bo_reserve_deadlock
[13:32:10] [PASSED] ttm_bo_unreserve_basic
[13:32:10] [PASSED] ttm_bo_unreserve_pinned
[13:32:10] [PASSED] ttm_bo_unreserve_bulk
[13:32:10] [PASSED] ttm_bo_fini_basic
[13:32:10] [PASSED] ttm_bo_fini_shared_resv
[13:32:10] [PASSED] ttm_bo_pin_basic
[13:32:10] [PASSED] ttm_bo_pin_unpin_resource
[13:32:10] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:32:10] ===================== [PASSED] ttm_bo ======================
[13:32:10] ============== ttm_bo_validate (21 subtests) ===============
[13:32:10] ============== ttm_bo_init_reserved_sys_man  ===============
[13:32:10] [PASSED] Buffer object for userspace
[13:32:10] [PASSED] Kernel buffer object
[13:32:10] [PASSED] Shared buffer object
[13:32:10] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:32:10] ============== ttm_bo_init_reserved_mock_man  ==============
[13:32:10] [PASSED] Buffer object for userspace
[13:32:10] [PASSED] Kernel buffer object
[13:32:10] [PASSED] Shared buffer object
[13:32:10] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:32:10] [PASSED] ttm_bo_init_reserved_resv
[13:32:10] ================== ttm_bo_validate_basic  ==================
[13:32:10] [PASSED] Buffer object for userspace
[13:32:10] [PASSED] Kernel buffer object
[13:32:10] [PASSED] Shared buffer object
[13:32:10] ============== [PASSED] ttm_bo_validate_basic ==============
[13:32:10] [PASSED] ttm_bo_validate_invalid_placement
[13:32:10] ============= ttm_bo_validate_same_placement  ==============
[13:32:10] [PASSED] System manager
[13:32:10] [PASSED] VRAM manager
[13:32:10] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:32:10] [PASSED] ttm_bo_validate_failed_alloc
[13:32:10] [PASSED] ttm_bo_validate_pinned
[13:32:10] [PASSED] ttm_bo_validate_busy_placement
[13:32:10] ================ ttm_bo_validate_multihop  =================
[13:32:10] [PASSED] Buffer object for userspace
[13:32:10] [PASSED] Kernel buffer object
[13:32:10] [PASSED] Shared buffer object
[13:32:10] ============ [PASSED] ttm_bo_validate_multihop =============
[13:32:10] ========== ttm_bo_validate_no_placement_signaled  ==========
[13:32:10] [PASSED] Buffer object in system domain, no page vector
[13:32:10] [PASSED] Buffer object in system domain with an existing page vector
[13:32:10] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:32:10] ======== ttm_bo_validate_no_placement_not_signaled  ========
[13:32:10] [PASSED] Buffer object for userspace
[13:32:10] [PASSED] Kernel buffer object
[13:32:10] [PASSED] Shared buffer object
[13:32:10] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:32:10] [PASSED] ttm_bo_validate_move_fence_signaled
[13:32:10] ========= ttm_bo_validate_move_fence_not_signaled  =========
[13:32:10] [PASSED] Waits for GPU
[13:32:10] [PASSED] Tries to lock straight away
[13:32:10] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:32:10] [PASSED] ttm_bo_validate_happy_evict
[13:32:10] [PASSED] ttm_bo_validate_all_pinned_evict
[13:32:10] [PASSED] ttm_bo_validate_allowed_only_evict
[13:32:10] [PASSED] ttm_bo_validate_deleted_evict
[13:32:10] [PASSED] ttm_bo_validate_busy_domain_evict
[13:32:10] [PASSED] ttm_bo_validate_evict_gutting
[13:32:10] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[13:32:10] ================= [PASSED] ttm_bo_validate =================
[13:32:10] ============================================================
[13:32:10] Testing complete. Ran 101 tests: passed: 101
[13:32:11] Elapsed time: 10.897s total, 1.686s configuring, 8.995s building, 0.184s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for drm/xe: Make struct xe_ggtt private. (rev5)

[Patchwork]

== Series Details ==

Series: drm/xe: Make struct xe_ggtt private. (rev5)
URL   : https://patchwork.freedesktop.org/series/139778/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast a83c7590b57a56cfc1f4d9e1c07948643c9ed165
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2042:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:
+drivers/gpu/drm/i915/gt/intel_reset.c:1569:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_sseu.c:598:17: error: too long token expansion
+drivers/gpu/drm/i915/i915_active.c:1062:16: warning: context imbalance in '__i915_active_fence_set' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    expected struct list_head const *list
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    got struct list_head [noderef] __rcu *pos
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/i915_gpu_error.c:692:3: warning: symbol 'guc_hw_reg_state' was not declared. Should it be static?
+drivers/gpu/drm/i915/i915_irq.c:465:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:465:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:473:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:473:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:478:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:478:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:478:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:516:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:516:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:524:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:524:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:529:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:529:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:529:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:573:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:573:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:576:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:576:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:580:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:580:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:587:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:587:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:587:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:587:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/intel_uncore.c:1928:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1929:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1931:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1996:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1997:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1998:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2018:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2019:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2020:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_wakeref.c:146:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+drivers/gpu/drm/ttm/ttm_bo.c:1198:31: warning: symbol 'ttm_swap_ops' was not declared. Should it be static?
+drivers/gpu/drm/ttm/ttm_bo_util.c:329:38:    expected void *virtual
+drivers/gpu/drm/ttm/ttm_bo_util.c:329:38:    got void [noderef] __iomem *
+drivers/gpu/drm/ttm/ttm_bo_util.c:329:38: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/ttm/ttm_bo_util.c:332:38:    expected void *virtual
+drivers/gpu/drm/ttm/ttm_bo_util.c:332:38:    got void [noderef] __iomem *
+drivers/gpu/drm/ttm/ttm_bo_util.c:332:38: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/ttm/ttm_bo_util.c:335:38:    expected void *virtual
+drivers/gpu/drm/ttm/ttm_bo_util.c:335:38:    got void [noderef] __iomem *
+drivers/gpu/drm/ttm/ttm_bo_util.c:335:38: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/ttm/ttm_bo_util.c:467:28:    expected void volatile [noderef] __iomem *addr
+drivers/gpu/drm/ttm/ttm_bo_util.c:467:28:    got void *virtual
+drivers/gpu/drm/ttm/ttm_bo_util.c:467:28: warning: incorrect type in argument 1 (different address spaces)

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for drm/xe: Make struct xe_ggtt private. (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4961 bytes --]

== Series Details ==

Series: drm/xe: Make struct xe_ggtt private. (rev5)
URL   : https://patchwork.freedesktop.org/series/139778/
State : failure

== Summary ==

CI Bug Log - changes from xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165_BAT -> xe-pw-139778v5_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-139778v5_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-139778v5_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-139778v5_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_module_load@load:
    - bat-dg2-oem2:       [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-dg2-oem2/igt@xe_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-dg2-oem2/igt@xe_module_load@load.html
    - bat-atsm-2:         [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-atsm-2/igt@xe_module_load@load.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-atsm-2/igt@xe_module_load@load.html
    - bat-adlp-vm:        [PASS][5] -> [ABORT][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-adlp-vm/igt@xe_module_load@load.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-adlp-vm/igt@xe_module_load@load.html
    - bat-lnl-1:          [PASS][7] -> [ABORT][8]
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-lnl-1/igt@xe_module_load@load.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-lnl-1/igt@xe_module_load@load.html
    - bat-bmg-2:          [PASS][9] -> [ABORT][10]
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-bmg-2/igt@xe_module_load@load.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-bmg-2/igt@xe_module_load@load.html
    - bat-bmg-1:          [PASS][11] -> [ABORT][12]
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-bmg-1/igt@xe_module_load@load.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-bmg-1/igt@xe_module_load@load.html
    - bat-adlp-7:         [PASS][13] -> [ABORT][14]
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-adlp-7/igt@xe_module_load@load.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-adlp-7/igt@xe_module_load@load.html
    - bat-lnl-2:          [PASS][15] -> [ABORT][16]
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-lnl-2/igt@xe_module_load@load.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-lnl-2/igt@xe_module_load@load.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@xe_module_load@load:
    - {bat-ptl-2}:        [PASS][17] -> [ABORT][18]
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-ptl-2/igt@xe_module_load@load.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-ptl-2/igt@xe_module_load@load.html
    - {bat-ptl-1}:        [PASS][19] -> [ABORT][20]
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-ptl-1/igt@xe_module_load@load.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-ptl-1/igt@xe_module_load@load.html
    - {bat-ptl-vm}:       [PASS][21] -> [ABORT][22]
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/bat-ptl-vm/igt@xe_module_load@load.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/bat-ptl-vm/igt@xe_module_load@load.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).



Build changes
-------------

  * Linux: xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165 -> xe-pw-139778v5

  IGT_8581: 8581
  xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165: a83c7590b57a56cfc1f4d9e1c07948643c9ed165
  xe-pw-139778v5: 139778v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/index.html

[-- Attachment #2: Type: text/html, Size: 5641 bytes --]

✗ Xe.CI.Full: failure for drm/xe: Make struct xe_ggtt private. (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30558 bytes --]

== Series Details ==

Series: drm/xe: Make struct xe_ggtt private. (rev5)
URL   : https://patchwork.freedesktop.org/series/139778/
State : failure

== Summary ==

CI Bug Log - changes from xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165_FULL -> xe-pw-139778v5_FULL
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with xe-pw-139778v5_FULL need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-139778v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-139778v5_FULL:

### IGT changes ###

#### Warnings ####

  * igt@xe_module_load@load:
    - shard-lnl:          ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [SKIP][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26]) ([Intel XE#378]) -> ([DMESG-WARN][27], [DMESG-WARN][28], [DMESG-WARN][29], [DMESG-WARN][30], [DMESG-WARN][31], [DMESG-WARN][32], [DMESG-WARN][33], [DMESG-WARN][34], [DMESG-WARN][35], [DMESG-WARN][36], [DMESG-WARN][37], [DMESG-WARN][38], [DMESG-WARN][39], [DMESG-WARN][40], [DMESG-WARN][41], [DMESG-WARN][42], [DMESG-WARN][43], [DMESG-WARN][44], [DMESG-WARN][45], [DMESG-WARN][46], [DMESG-WARN][47], [DMESG-WARN][48], [DMESG-WARN][49], [DMESG-WARN][50], [DMESG-WARN][51])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-3/igt@xe_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-5/igt@xe_module_load@load.html
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-5/igt@xe_module_load@load.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-1/igt@xe_module_load@load.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-8/igt@xe_module_load@load.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-2/igt@xe_module_load@load.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-8/igt@xe_module_load@load.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-2/igt@xe_module_load@load.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-3/igt@xe_module_load@load.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-5/igt@xe_module_load@load.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-8/igt@xe_module_load@load.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-5/igt@xe_module_load@load.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-4/igt@xe_module_load@load.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-4/igt@xe_module_load@load.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-4/igt@xe_module_load@load.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-4/igt@xe_module_load@load.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-1/igt@xe_module_load@load.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-3/igt@xe_module_load@load.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-1/igt@xe_module_load@load.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-2/igt@xe_module_load@load.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-1/igt@xe_module_load@load.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-1/igt@xe_module_load@load.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-7/igt@xe_module_load@load.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-7/igt@xe_module_load@load.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-7/igt@xe_module_load@load.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-lnl-7/igt@xe_module_load@load.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-1/igt@xe_module_load@load.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-1/igt@xe_module_load@load.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-1/igt@xe_module_load@load.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-1/igt@xe_module_load@load.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-8/igt@xe_module_load@load.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-8/igt@xe_module_load@load.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-8/igt@xe_module_load@load.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-8/igt@xe_module_load@load.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-4/igt@xe_module_load@load.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-4/igt@xe_module_load@load.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-4/igt@xe_module_load@load.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-3/igt@xe_module_load@load.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-3/igt@xe_module_load@load.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-3/igt@xe_module_load@load.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-3/igt@xe_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-2/igt@xe_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-2/igt@xe_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-2/igt@xe_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-7/igt@xe_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-7/igt@xe_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-5/igt@xe_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-5/igt@xe_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-5/igt@xe_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-5/igt@xe_module_load@load.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-lnl-5/igt@xe_module_load@load.html
    - shard-bmg:          ([PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [SKIP][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77]) ([Intel XE#2457]) -> ([DMESG-WARN][78], [DMESG-WARN][79], [DMESG-WARN][80], [DMESG-WARN][81], [DMESG-WARN][82], [DMESG-WARN][83], [DMESG-WARN][84], [DMESG-WARN][85], [DMESG-WARN][86], [DMESG-WARN][87], [DMESG-WARN][88], [DMESG-WARN][89], [DMESG-WARN][90], [DMESG-WARN][91], [DMESG-WARN][92], [DMESG-WARN][93], [DMESG-WARN][94], [DMESG-WARN][95], [DMESG-WARN][96], [DMESG-WARN][97], [DMESG-WARN][98], [DMESG-WARN][99], [DMESG-WARN][100], [DMESG-WARN][101], [DMESG-WARN][102])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-4/igt@xe_module_load@load.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-5/igt@xe_module_load@load.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-5/igt@xe_module_load@load.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-1/igt@xe_module_load@load.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-6/igt@xe_module_load@load.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-6/igt@xe_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-7/igt@xe_module_load@load.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-7/igt@xe_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-5/igt@xe_module_load@load.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-4/igt@xe_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-4/igt@xe_module_load@load.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-2/igt@xe_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-2/igt@xe_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-1/igt@xe_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-3/igt@xe_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-1/igt@xe_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-3/igt@xe_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-8/igt@xe_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-6/igt@xe_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-3/igt@xe_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-5/igt@xe_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-6/igt@xe_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-8/igt@xe_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-2/igt@xe_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-1/igt@xe_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-bmg-8/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-4/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-4/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-8/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-8/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-8/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-8/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-1/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-1/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-1/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-7/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-7/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-7/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-2/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-2/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-2/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-2/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-6/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-6/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-6/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-3/igt@xe_module_load@load.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-3/igt@xe_module_load@load.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-3/igt@xe_module_load@load.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-3/igt@xe_module_load@load.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-5/igt@xe_module_load@load.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-bmg-5/igt@xe_module_load@load.html
    - shard-adlp:         ([PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [SKIP][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128]) ([Intel XE#378] / [Intel XE#5612]) -> ([DMESG-WARN][129], [DMESG-WARN][130], [DMESG-WARN][131], [DMESG-WARN][132], [DMESG-WARN][133], [DMESG-WARN][134], [DMESG-WARN][135], [DMESG-WARN][136], [DMESG-WARN][137], [DMESG-WARN][138], [DMESG-WARN][139], [DMESG-WARN][140], [DMESG-WARN][141], [DMESG-WARN][142], [DMESG-WARN][143], [DMESG-WARN][144], [DMESG-WARN][145], [DMESG-WARN][146], [DMESG-WARN][147], [DMESG-WARN][148], [DMESG-WARN][149], [DMESG-WARN][150], [DMESG-WARN][151], [DMESG-WARN][152], [DMESG-WARN][153])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-8/igt@xe_module_load@load.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-8/igt@xe_module_load@load.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-1/igt@xe_module_load@load.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-1/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-6/igt@xe_module_load@load.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-9/igt@xe_module_load@load.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-8/igt@xe_module_load@load.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-8/igt@xe_module_load@load.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-9/igt@xe_module_load@load.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-9/igt@xe_module_load@load.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-3/igt@xe_module_load@load.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-3/igt@xe_module_load@load.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-3/igt@xe_module_load@load.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-4/igt@xe_module_load@load.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-4/igt@xe_module_load@load.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-8/igt@xe_module_load@load.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-2/igt@xe_module_load@load.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-9/igt@xe_module_load@load.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-1/igt@xe_module_load@load.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-6/igt@xe_module_load@load.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-1/igt@xe_module_load@load.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-4/igt@xe_module_load@load.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-4/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-2/igt@xe_module_load@load.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-2/igt@xe_module_load@load.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-adlp-6/igt@xe_module_load@load.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-6/igt@xe_module_load@load.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-6/igt@xe_module_load@load.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-6/igt@xe_module_load@load.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-6/igt@xe_module_load@load.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-9/igt@xe_module_load@load.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-9/igt@xe_module_load@load.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-9/igt@xe_module_load@load.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-8/igt@xe_module_load@load.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-8/igt@xe_module_load@load.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-8/igt@xe_module_load@load.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-2/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-2/igt@xe_module_load@load.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-2/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-2/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-3/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-3/igt@xe_module_load@load.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-3/igt@xe_module_load@load.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-3/igt@xe_module_load@load.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-4/igt@xe_module_load@load.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-4/igt@xe_module_load@load.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-4/igt@xe_module_load@load.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-1/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-1/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-1/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-adlp-1/igt@xe_module_load@load.html
    - shard-dg2-set2:     ([PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [SKIP][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179]) ([Intel XE#378]) -> ([DMESG-WARN][180], [DMESG-WARN][181], [DMESG-WARN][182], [DMESG-WARN][183], [DMESG-WARN][184], [DMESG-WARN][185], [DMESG-WARN][186], [DMESG-WARN][187], [DMESG-WARN][188], [DMESG-WARN][189], [DMESG-WARN][190], [DMESG-WARN][191], [DMESG-WARN][192], [DMESG-WARN][193], [DMESG-WARN][194], [DMESG-WARN][195], [DMESG-WARN][196], [DMESG-WARN][197], [DMESG-WARN][198], [DMESG-WARN][199], [DMESG-WARN][200], [DMESG-WARN][201], [DMESG-WARN][202], [DMESG-WARN][203], [DMESG-WARN][204])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-432/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-432/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-432/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-434/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-433/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-435/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-466/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-435/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-466/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-466/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-463/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-463/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-463/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-434/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-464/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-434/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-434/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-464/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-434/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-435/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-464/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-432/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-463/igt@xe_module_load@load.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-433/igt@xe_module_load@load.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-433/igt@xe_module_load@load.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165/shard-dg2-464/igt@xe_module_load@load.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-434/igt@xe_module_load@load.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-434/igt@xe_module_load@load.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-434/igt@xe_module_load@load.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-434/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-464/igt@xe_module_load@load.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-464/igt@xe_module_load@load.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-464/igt@xe_module_load@load.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-464/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-433/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-433/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-433/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-463/igt@xe_module_load@load.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-463/igt@xe_module_load@load.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-463/igt@xe_module_load@load.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-463/igt@xe_module_load@load.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-466/igt@xe_module_load@load.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-466/igt@xe_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-466/igt@xe_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-435/igt@xe_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-435/igt@xe_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-435/igt@xe_module_load@load.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-435/igt@xe_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-432/igt@xe_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-432/igt@xe_module_load@load.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/shard-dg2-432/igt@xe_module_load@load.html

  
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612


Build changes
-------------

  * Linux: xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165 -> xe-pw-139778v5

  IGT_8581: 8581
  xe-3897-a83c7590b57a56cfc1f4d9e1c07948643c9ed165: a83c7590b57a56cfc1f4d9e1c07948643c9ed165
  xe-pw-139778v5: 139778v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139778v5/index.html

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