From: Imre Deak <imre.deak@intel.com>
To: "Kandpal, Suraj" <suraj.kandpal@intel.com>
Cc: "Kahola, Mika" <mika.kahola@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v2 04/15] drm/i915/lt_phy: Drop LT PHY crtc_state for port calculation
Date: Thu, 8 Jan 2026 16:15:44 +0200 [thread overview]
Message-ID: <aV-8ENon-SNGF36w@ideak-desk> (raw)
In-Reply-To: <IA3PR11MB8937D97F8D85DEAA1977839EE387A@IA3PR11MB8937.namprd11.prod.outlook.com>
On Tue, Jan 06, 2026 at 05:49:15AM +0000, Kandpal, Suraj wrote:
> > Subject: [PATCH v2 04/15] drm/i915/lt_phy: Drop LT PHY crtc_state for port calculation
> > ...
> >
> > @@ -1748,12 +1746,10 @@ intel_lt_phy_calc_hdmi_port_clock(const struct intel_crtc_state *crtc_state)
> > }
> >
> > int
> > -intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
> > - const struct intel_crtc_state *crtc_state)
> > +intel_lt_phy_calc_port_clock(struct intel_display *display,
> > + const struct intel_lt_phy_pll_state *lt_state)
> > {
> > int clk;
> > - const struct intel_lt_phy_pll_state *lt_state =
> > - &crtc_state->dpll_hw_state.ltpll;
> > u8 mode, rate;
> >
> > mode = REG_FIELD_GET8(LT_PHY_VDR_MODE_ENCODING_MASK,
> > @@ -1769,7 +1765,7 @@ intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
> > lt_state->config[0]);
> > clk = intel_lt_phy_get_dp_clock(rate);
> > } else {
> > - clk = intel_lt_phy_calc_hdmi_port_clock(crtc_state);
> > + clk = intel_lt_phy_calc_hdmi_port_clock(display, lt_state);
> > }
> >
> > return clk;
> > @@ -2220,6 +2216,7 @@ void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state,
> > struct intel_lt_phy_pll_state *pll_state)
> > {
> > + struct intel_display *display = to_intel_display(encoder);
> > u8 owned_lane_mask;
> > u8 lane;
> > struct ref_tracker *wakeref;
> > @@ -2245,7 +2242,7 @@ void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
> > }
> >
> > pll_state->clock =
> > - intel_lt_phy_calc_port_clock(encoder, crtc_state);
> > + intel_lt_phy_calc_port_clock(display,
> > +&crtc_state->dpll_hw_state.ltpll);
>
> Readout_hw_state already has pll_state maybe you can directly pass
> that instead of what's inside crtc_state Since by this point we would
> have read and dumped everything inside pll_state anyways.
This is actually a fix of the existing code: crtc_state is the new state
of CTRC computed by the commit when intel_lt_phy_pll_readout_hw_state()
is called from intel_lt_phy_pll_state_verify(). That new CRTC state and
within that the new PLL state is what supposed to be verified, so
nothing from crtc_state should be used to derive the read-out pll_state.
In detail, for the verification intel_lt_phy_pll_readout_hw_state()
reads out the PLL state from the HW into pll_state passed to it, also
computing the corresponding PLL clock via
intel_lt_phy_calc_port_clock(). intel_lt_phy_pll_state_verify() verifies
then if the read-out PLL state in pll_state matches the state in
crtc_state->dpll_hw_state.ltpll. So computing pll_state->clock based on
crtc_state->dpll_hw_state.ltpll is incorrect based on the above (in the
existing code before this patchset) and as such the fix for it should be
a separate patch.
> Regards,
> Suraj Kandpal
>
> > intel_lt_phy_transaction_end(encoder, wakeref);
> > }
next prev parent reply other threads:[~2026-01-08 14:15 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-17 15:19 [PATCH v2 00/15] drm/i915/pll: Verify pll dividers and remove redundant .clock member Mika Kahola
2025-12-17 15:19 ` [PATCH v2 01/15] drm/i915/c10: Move C10 port clock calculation Mika Kahola
2026-01-06 5:08 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 02/15] drm/i915/c20: Move C20 " Mika Kahola
2026-01-06 5:10 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 03/15] drm/i915/cx0: Drop Cx0 crtc_state from HDMI TMDS pll divider calculation Mika Kahola
2026-01-06 5:13 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 04/15] drm/i915/lt_phy: Drop LT PHY crtc_state for port calculation Mika Kahola
2026-01-06 5:49 ` Kandpal, Suraj
2026-01-08 14:15 ` Imre Deak [this message]
2026-01-14 5:25 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 05/15] drm/i915/cx0: Drop encoder from port clock calculation Mika Kahola
2026-01-06 6:02 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 06/15] drm/i915/cx0: Create macro around pll tables Mika Kahola
2026-01-06 5:54 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 07/15] drm/i915/lt_phy: Create macro for lt phy pll state Mika Kahola
2026-01-06 5:56 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 08/15] drm/i915/display: Add helper function for fuzzy clock check Mika Kahola
2026-01-08 3:53 ` Kandpal, Suraj
2026-01-14 13:01 ` Kahola, Mika
2025-12-17 15:19 ` [PATCH v2 09/15] drm/i915/cx0: Fix HDMI FRL clock rates Mika Kahola
2026-01-06 6:04 ` Kandpal, Suraj
2026-01-08 14:19 ` Imre Deak
2026-01-09 4:09 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 10/15] drm/i915/cx0: Add a fuzzy check for DP/HDMI clock rates during programming Mika Kahola
2026-01-14 5:32 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 11/15] drm/i915/cx0: Verify C10/C20 pll dividers Mika Kahola
2026-01-06 5:04 ` Kandpal, Suraj
2026-01-08 14:30 ` Imre Deak
2026-01-14 5:24 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 12/15] drm/i915/lt_phy: Add verification for lt phy " Mika Kahola
2026-01-06 5:07 ` Kandpal, Suraj
2026-01-08 14:35 ` Imre Deak
2026-01-09 4:12 ` Kandpal, Suraj
2026-01-09 9:39 ` Kahola, Mika
2026-01-13 14:36 ` Imre Deak
2026-01-13 14:57 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 13/15] drm/i915/cx0: Drop C20 25.175 MHz rate Mika Kahola
2026-01-06 6:15 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 14/15] drm/i915/lt_phy: Drop 27.2 " Mika Kahola
2026-01-06 6:16 ` Kandpal, Suraj
2025-12-17 15:19 ` [PATCH v2 15/15] drm/i915/display: Remove .clock member from eDP/DP/HDMI pll tables Mika Kahola
2026-01-06 5:51 ` Kandpal, Suraj
2026-01-06 6:01 ` Kandpal, Suraj
2025-12-17 17:34 ` ✗ CI.checkpatch: warning for drm/i915/pll: Verify pll dividers and remove redundant .clock member (rev2) Patchwork
2025-12-17 17:36 ` ✓ CI.KUnit: success " Patchwork
2025-12-17 18:16 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-18 16:39 ` ✗ Xe.CI.Full: failure " Patchwork
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