[PATCH v5 0/4] drm/xe/hwmon: Expose new temperature attributes

[PATCH v5 0/4] drm/xe/hwmon: Expose new temperature attributes

[Karthik Poosa]

Expose tempX_emergency and tempX_crit for package and vram,
representing shutdown and critical temperature thresholds.
These values are read via pcode thermal mailbox commands.

These are read using pcode thermal mailbox commands

v2:
 - Expose memory controller, pcie and individual vram
   temperatures also.
 - Addressed some of review comments of v1 from KVP.

v3:
 - Combine patches 1,2,3 into patch 1.
 - Combine patches 4,5 to patch 2.
 - Addressed review comments from v2.
 - Update kernel version in Xe hwmon documentation.

v4:
 - Address review comments of v3.
 - Update kernel version to 7.0 in Xe hwmon documentation.

v5:
- Address review comments in v4 from Raag.
- Group new temperature attributes with existing temperature attributes as
  per channel index in Xe hwmon documentation.
- Minor aesthetic refinements.
- Minor code improvements.
- Use DIV_ROUND_UP to calculate dwords needed for temperature limits.
- Use TEMP_MASK instead of TEMP_MASK_MAILBOX.
- Add PCIE_SENSOR_MASK which uses REG_FIELD_GET as replacement of
  PCIE_SENSOR_SHIFT.
- Improve VRAM label handling to eliminate temp variable by introducing a
  dedicated array vram_label in xe_hwmon_thermal_info.
- Change the label from vram_X to vram_ch_X.
- Remove a magic numbers.

Karthik Poosa (4):
  drm/xe/hwmon: Expose temperature limits
  drm/xe/hwmon: Expose memory controller temperature
  drm/xe/hwmon: Expose GPU pcie temperature
  drm/xe/hwmon: Expose individual vram channel temperature

 .../ABI/testing/sysfs-driver-intel-xe-hwmon   | 110 +++++++
 drivers/gpu/drm/xe/regs/xe_pcode_regs.h       |   3 +
 drivers/gpu/drm/xe/xe_device_types.h          |   2 +
 drivers/gpu/drm/xe/xe_hwmon.c                 | 281 +++++++++++++++++-
 drivers/gpu/drm/xe/xe_pci.c                   |   3 +
 drivers/gpu/drm/xe/xe_pci_types.h             |   1 +
 drivers/gpu/drm/xe/xe_pcode_api.h             |   5 +
 7 files changed, 396 insertions(+), 9 deletions(-)

-- 
2.25.1

[PATCH v5 1/4] drm/xe/hwmon: Expose temperature limits

[Karthik Poosa]

Read temperature limits using pcode mailbox and expose shutdown
temperature limit as tempX_emergency, critical temperature limit as
tempX_crit and GPU max temperature limit as temp2_max.

Update Xe hwmon documentation for these entries.

v2:
 - Resolve a documentation warning.
 - Address below review comments from Raag.
 - Update date and kernel version in Xe hwmon documentation.
 - Remove explicit disable of has_mbx_thermal_info for unsupported
   platforms.
 - Remove unnecessary default case in switches.
 - Remove obvious comments.
 - Use TEMP_LIMIT_MAX to compute number of dwords needed in
   xe_hwmon_thermal_info.
 - Remove THERMAL_LIMITS_DWORDS macro.
 - Use has_mbx_thermal_info for checking thermal mailbox support.

v3:
 - Address below minor comments. (Raag)
 - Group new temperature attributes with existing temperature attributes
   as per channel index in Xe hwmon documentation.
 - Rename enums of xe_temp_limit to improve clarity.
 - Use DIV_ROUND_UP to calculate dwords needed for temperature limits.
 - Use return instead of breaks in xe_hwmon_temp_read.
 - Minor aesthetic refinements.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
 .../ABI/testing/sysfs-driver-intel-xe-hwmon   |  40 +++++++
 drivers/gpu/drm/xe/xe_device_types.h          |   2 +
 drivers/gpu/drm/xe/xe_hwmon.c                 | 103 +++++++++++++++++-
 drivers/gpu/drm/xe/xe_pci.c                   |   3 +
 drivers/gpu/drm/xe/xe_pci_types.h             |   1 +
 drivers/gpu/drm/xe/xe_pcode_api.h             |   3 +
 6 files changed, 149 insertions(+), 3 deletions(-)

diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index d9e2b17c6872..2b00ef13b6ad 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -109,6 +109,22 @@ Description:	RO. Package current voltage in millivolt.
 
 		Only supported for particular Intel Xe graphics platforms.
 
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_crit
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. Package critical temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_emergency
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. Package shutdown temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
 What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_input
 Date:		March 2025
 KernelVersion:	6.15
@@ -117,6 +133,30 @@ Description:	RO. Package temperature in millidegree Celsius.
 
 		Only supported for particular Intel Xe graphics platforms.
 
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_max
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. Package maximum temperature limit in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_crit
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. VRAM critical temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_emergency
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. VRAM shutdown temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
 What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_input
 Date:		March 2025
 KernelVersion:	6.15
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 4dab3057f58d..f689766adcb1 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -341,6 +341,8 @@ struct xe_device {
 		 * pcode mailbox commands.
 		 */
 		u8 has_mbx_power_limits:1;
+		/** @info.has_mbx_thermal_info: Device supports thermal mailbox commands */
+		u8 has_mbx_thermal_info:1;
 		/** @info.has_mem_copy_instr: Device supports MEM_COPY instruction */
 		u8 has_mem_copy_instr:1;
 		/** @info.has_mert: Device has standalone MERT */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index ff2aea52ef75..c9899d5f5306 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -53,6 +53,15 @@ enum xe_fan_channel {
 	FAN_MAX,
 };
 
+enum xe_temp_limit {
+	TEMP_LIMIT_PKG_SHUTDOWN,
+	TEMP_LIMIT_PKG_CRIT,
+	TEMP_LIMIT_MEM_SHUTDOWN,
+	TEMP_LIMIT_PKG_MAX,
+	TEMP_LIMIT_MEM_CRIT,
+	TEMP_LIMIT_MAX
+};
+
 /* Attribute index for powerX_xxx_interval sysfs entries */
 enum sensor_attr_power {
 	SENSOR_INDEX_PSYS_PL1,
@@ -111,6 +120,18 @@ struct xe_hwmon_fan_info {
 	u64 time_prev;
 };
 
+/**
+ * struct xe_hwmon_thermal_info - to store temperature data
+ */
+struct xe_hwmon_thermal_info {
+	union {
+		/** @limit: temperatures limits */
+		u8 limit[TEMP_LIMIT_MAX];
+		/** @data: temperature limits in dwords */
+		u32 data[DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32))];
+	};
+};
+
 /**
  * struct xe_hwmon - xe hwmon data structure
  */
@@ -137,7 +158,8 @@ struct xe_hwmon {
 	u32 pl1_on_boot[CHANNEL_MAX];
 	/** @pl2_on_boot: power limit PL2 on boot */
 	u32 pl2_on_boot[CHANNEL_MAX];
-
+	/** @temp: Temperature info */
+	struct xe_hwmon_thermal_info temp;
 };
 
 static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 attr, int channel,
@@ -677,8 +699,11 @@ static const struct attribute_group *hwmon_groups[] = {
 };
 
 static const struct hwmon_channel_info * const hwmon_info[] = {
-	HWMON_CHANNEL_INFO(temp, HWMON_T_LABEL, HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_INPUT | HWMON_T_LABEL),
+	HWMON_CHANNEL_INFO(temp,
+			   HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL |
+			   HWMON_T_MAX,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
 	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
 			   HWMON_P_CAP,
 			   HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CAP),
@@ -689,6 +714,19 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
 	NULL
 };
 
+static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
+{
+	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
+	int ret;
+
+	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
+			    &hwmon->temp.data[0], &hwmon->temp.data[1]);
+	drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
+		hwmon->temp.data[0], hwmon->temp.data[1]);
+
+	return ret;
+}
+
 /* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
 static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
 {
@@ -787,6 +825,31 @@ static umode_t
 xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 {
 	switch (attr) {
+	case hwmon_temp_emergency:
+		switch (channel) {
+		case CHANNEL_PKG:
+			return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
+		case CHANNEL_VRAM:
+			return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
+		default:
+			return 0;
+		}
+	case hwmon_temp_crit:
+		switch (channel) {
+		case CHANNEL_PKG:
+			return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
+		case CHANNEL_VRAM:
+			return hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] ? 0444 : 0;
+		default:
+			return 0;
+		}
+	case hwmon_temp_max:
+		switch (channel) {
+		case CHANNEL_PKG:
+			return hwmon->temp.limit[TEMP_LIMIT_PKG_MAX] ? 0444 : 0;
+		default:
+			return 0;
+		}
 	case hwmon_temp_input:
 	case hwmon_temp_label:
 		return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP, channel)) ? 0444 : 0;
@@ -808,6 +871,37 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 		/* HW register value is in degrees Celsius, convert to millidegrees. */
 		*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
 		return 0;
+	case hwmon_temp_emergency:
+		switch (channel) {
+		case CHANNEL_PKG:
+			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
+			return 0;
+		case CHANNEL_VRAM:
+			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
+			return 0;
+		default:
+			return -EOPNOTSUPP;
+		}
+	case hwmon_temp_crit:
+		switch (channel) {
+		case CHANNEL_PKG:
+			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
+			return 0;
+		case CHANNEL_VRAM:
+			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] * MILLIDEGREE_PER_DEGREE;
+			return 0;
+		default:
+			return -EOPNOTSUPP;
+		}
+		break;
+	case hwmon_temp_max:
+		switch (channel) {
+		case CHANNEL_PKG:
+			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_MAX] * MILLIDEGREE_PER_DEGREE;
+			return 0;
+		default:
+			return -EOPNOTSUPP;
+		}
 	default:
 		return -EOPNOTSUPP;
 	}
@@ -1263,6 +1357,9 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
 	for (channel = 0; channel < FAN_MAX; channel++)
 		if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
 			xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
+
+	if (hwmon->xe->info.has_mbx_thermal_info && xe_hwmon_pcode_read_thermal_info(hwmon))
+		drm_dbg(&hwmon->xe->drm, "Thermal mailbox not supported by card firmware\n");
 }
 
 int xe_hwmon_register(struct xe_device *xe)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index a1fdca451ce0..776ed4bd538b 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -366,6 +366,7 @@ static const struct xe_device_desc bmg_desc = {
 	.has_fan_control = true,
 	.has_flat_ccs = 1,
 	.has_mbx_power_limits = true,
+	.has_mbx_thermal_info = true,
 	.has_gsc_nvm = 1,
 	.has_heci_cscfi = 1,
 	.has_i2c = true,
@@ -421,6 +422,7 @@ static const struct xe_device_desc cri_desc = {
 	.has_gsc_nvm = 1,
 	.has_i2c = true,
 	.has_mbx_power_limits = true,
+	.has_mbx_thermal_info = true,
 	.has_mert = true,
 	.has_pre_prod_wa = 1,
 	.has_soc_remapper_sysctrl = true,
@@ -686,6 +688,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	/* runtime fusing may force flat_ccs to disabled later */
 	xe->info.has_flat_ccs = desc->has_flat_ccs;
 	xe->info.has_mbx_power_limits = desc->has_mbx_power_limits;
+	xe->info.has_mbx_thermal_info = desc->has_mbx_thermal_info;
 	xe->info.has_gsc_nvm = desc->has_gsc_nvm;
 	xe->info.has_heci_gscfi = desc->has_heci_gscfi;
 	xe->info.has_heci_cscfi = desc->has_heci_cscfi;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 5f20f56571d1..20acc5349ee6 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -48,6 +48,7 @@ struct xe_device_desc {
 	u8 has_late_bind:1;
 	u8 has_llc:1;
 	u8 has_mbx_power_limits:1;
+	u8 has_mbx_thermal_info:1;
 	u8 has_mem_copy_instr:1;
 	u8 has_mert:1;
 	u8 has_pre_prod_wa:1;
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
index 975892d6b230..dc8f241e5b9e 100644
--- a/drivers/gpu/drm/xe/xe_pcode_api.h
+++ b/drivers/gpu/drm/xe/xe_pcode_api.h
@@ -50,6 +50,9 @@
 #define	READ_PL_FROM_FW				0x1
 #define	READ_PL_FROM_PCODE			0x0
 
+#define   PCODE_THERMAL_INFO			0x25
+#define     READ_THERMAL_LIMITS			0x0
+
 #define   PCODE_LATE_BINDING			0x5C
 #define     GET_CAPABILITY_STATUS		0x0
 #define       V1_FAN_SUPPORTED			REG_BIT(0)
-- 
2.25.1

Re: [PATCH v5 1/4] drm/xe/hwmon: Expose temperature limits

[Raag Jadav]

On Sat, Jan 10, 2026 at 01:46:41AM +0530, Karthik Poosa wrote:
> Read temperature limits using pcode mailbox and expose shutdown
> temperature limit as tempX_emergency, critical temperature limit as
> tempX_crit and GPU max temperature limit as temp2_max.
> 
> Update Xe hwmon documentation for these entries.

...

> @@ -808,6 +871,37 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>  		/* HW register value is in degrees Celsius, convert to millidegrees. */
>  		*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
>  		return 0;
> +	case hwmon_temp_emergency:
> +		switch (channel) {
> +		case CHANNEL_PKG:
> +			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> +			return 0;
> +		case CHANNEL_VRAM:
> +			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> +			return 0;
> +		default:
> +			return -EOPNOTSUPP;
> +		}
> +	case hwmon_temp_crit:
> +		switch (channel) {
> +		case CHANNEL_PKG:
> +			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
> +			return 0;
> +		case CHANNEL_VRAM:
> +			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] * MILLIDEGREE_PER_DEGREE;
> +			return 0;
> +		default:
> +			return -EOPNOTSUPP;
> +		}
> +		break;

Missed an instance, please drop it ;)

> +	case hwmon_temp_max:
> +		switch (channel) {
> +		case CHANNEL_PKG:
> +			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_MAX] * MILLIDEGREE_PER_DEGREE;
> +			return 0;
> +		default:
> +			return -EOPNOTSUPP;
> +		}
>  	default:
>  		return -EOPNOTSUPP;
>  	}
> @@ -1263,6 +1357,9 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
>  	for (channel = 0; channel < FAN_MAX; channel++)
>  		if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
>  			xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
> +
> +	if (hwmon->xe->info.has_mbx_thermal_info && xe_hwmon_pcode_read_thermal_info(hwmon))
> +		drm_dbg(&hwmon->xe->drm, "Thermal mailbox not supported by card firmware\n");

I think this should be drm_warn() but I'll let you all make the final call.

Reviewed-by: Raag Jadav <raag.jadav@intel.com>

Re: [PATCH v5 1/4] drm/xe/hwmon: Expose temperature limits

[Poosa, Karthik]

On 10-01-2026 15:39, Raag Jadav wrote:
> On Sat, Jan 10, 2026 at 01:46:41AM +0530, Karthik Poosa wrote:
>> Read temperature limits using pcode mailbox and expose shutdown
>> temperature limit as tempX_emergency, critical temperature limit as
>> tempX_crit and GPU max temperature limit as temp2_max.
>>
>> Update Xe hwmon documentation for these entries.
> ...
>
>> @@ -808,6 +871,37 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>   		/* HW register value is in degrees Celsius, convert to millidegrees. */
>>   		*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
>>   		return 0;
>> +	case hwmon_temp_emergency:
>> +		switch (channel) {
>> +		case CHANNEL_PKG:
>> +			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>> +			return 0;
>> +		case CHANNEL_VRAM:
>> +			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>> +			return 0;
>> +		default:
>> +			return -EOPNOTSUPP;
>> +		}
>> +	case hwmon_temp_crit:
>> +		switch (channel) {
>> +		case CHANNEL_PKG:
>> +			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
>> +			return 0;
>> +		case CHANNEL_VRAM:
>> +			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] * MILLIDEGREE_PER_DEGREE;
>> +			return 0;
>> +		default:
>> +			return -EOPNOTSUPP;
>> +		}
>> +		break;
> Missed an instance, please drop it ;)
okay
>
>> +	case hwmon_temp_max:
>> +		switch (channel) {
>> +		case CHANNEL_PKG:
>> +			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_MAX] * MILLIDEGREE_PER_DEGREE;
>> +			return 0;
>> +		default:
>> +			return -EOPNOTSUPP;
>> +		}
>>   	default:
>>   		return -EOPNOTSUPP;
>>   	}
>> @@ -1263,6 +1357,9 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
>>   	for (channel = 0; channel < FAN_MAX; channel++)
>>   		if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
>>   			xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
>> +
>> +	if (hwmon->xe->info.has_mbx_thermal_info && xe_hwmon_pcode_read_thermal_info(hwmon))
>> +		drm_dbg(&hwmon->xe->drm, "Thermal mailbox not supported by card firmware\n");
> I think this should be drm_warn() but I'll let you all make the final call.
Yes, drm_warn should be fine.
>
> Reviewed-by: Raag Jadav <raag.jadav@intel.com>

[PATCH v5 2/4] drm/xe/hwmon: Expose memory controller temperature

[Karthik Poosa]

Expose GPU memory controller average temperature and its limits under
temp4_xxx.
Update Xe hwmon documentation for this.

v2:
 - Rephrase commit message. (Badal)
 - Update kernel version in Xe hwmon documentation. (Raag)

v3:
 - Update kernel version in Xe hwmon documentation.
 - Address review comments from Raag.
 - Remove obvious comments.
 - Remove redundant debug logs.
 - Remove unnecessary checks.
 - Avoid magic numbers.
 - Add new comments.
 - Use temperature sensors count to make memory controller visible.
 - Use temperature limits of package for memory controller.

v4:
 - Address review comments from Raag.
 - Group new temperature attributes with existing temperature attributes
   as per channel index in Xe hwmon documentation.
 - Use DIV_ROUND_UP to calculate dwords needed for temperature limits.
 - Minor aesthetic refinements.
 - Remove unused TEMP_MASK_MAILBOX.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
 .../ABI/testing/sysfs-driver-intel-xe-hwmon   | 24 ++++++
 drivers/gpu/drm/xe/xe_hwmon.c                 | 79 +++++++++++++++++--
 drivers/gpu/drm/xe/xe_pcode_api.h             |  2 +
 3 files changed, 100 insertions(+), 5 deletions(-)

diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index 2b00ef13b6ad..550206885624 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -165,6 +165,30 @@ Description:	RO. VRAM temperature in millidegree Celsius.
 
 		Only supported for particular Intel Xe graphics platforms.
 
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_crit
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. Memory controller critical temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_emergency
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. Memory controller shutdown temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_input
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. Memory controller average temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
 What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/fan1_input
 Date:		March 2025
 KernelVersion:	6.16
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index c9899d5f5306..a545e4674e99 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -43,6 +43,7 @@ enum xe_hwmon_channel {
 	CHANNEL_CARD,
 	CHANNEL_PKG,
 	CHANNEL_VRAM,
+	CHANNEL_MCTRL,
 	CHANNEL_MAX,
 };
 
@@ -100,6 +101,9 @@ enum sensor_attr_power {
  */
 #define PL_WRITE_MBX_TIMEOUT_MS	(1)
 
+/* Index of memory controller in READ_THERMAL_DATA output */
+#define TEMP_INDEX_MCTRL	(2)
+
 /**
  * struct xe_hwmon_energy_info - to accumulate energy
  */
@@ -130,6 +134,10 @@ struct xe_hwmon_thermal_info {
 		/** @data: temperature limits in dwords */
 		u32 data[DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32))];
 	};
+	/** @count: no of temperature sensors available for the platform */
+	u8 count;
+	/** @value: signed value from each sensor */
+	s8 value[U8_MAX];
 };
 
 /**
@@ -703,6 +711,7 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
 			   HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL |
 			   HWMON_T_MAX,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
 	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
 			   HWMON_P_CAP,
@@ -718,15 +727,50 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
 {
 	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
 	int ret;
+	u32 config = 0;
 
 	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
 			    &hwmon->temp.data[0], &hwmon->temp.data[1]);
+	if (ret)
+		return ret;
+
 	drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
 		hwmon->temp.data[0], hwmon->temp.data[1]);
 
+	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_CONFIG, 0),
+			    &config, NULL);
+	if (ret)
+		return ret;
+
+	drm_dbg(&hwmon->xe->drm, "thermal config count %d\n", config);
+	hwmon->temp.count = config & TEMP_MASK;
+
 	return ret;
 }
 
+static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
+{
+	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
+	u32 *dword = (u32 *)hwmon->temp.value;
+	s32 average = 0;
+	int ret, i;
+
+	for (i = 0; i < DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32)); i++) {
+		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
+				    (dword + i), NULL);
+		if (ret)
+			return ret;
+		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
+	}
+
+	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
+		average += hwmon->temp.value[i];
+
+	average /= (hwmon->temp.count - TEMP_INDEX_MCTRL - 1);
+	*val = average * MILLIDEGREE_PER_DEGREE;
+	return 0;
+}
+
 /* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
 static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
 {
@@ -831,6 +875,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 			return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
 		case CHANNEL_VRAM:
 			return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
+		case CHANNEL_MCTRL:
+			return hwmon->temp.count ? 0444 : 0;
 		default:
 			return 0;
 		}
@@ -840,6 +886,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 			return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
 		case CHANNEL_VRAM:
 			return hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] ? 0444 : 0;
+		case CHANNEL_MCTRL:
+			return hwmon->temp.count ? 0444 : 0;
 		default:
 			return 0;
 		}
@@ -852,7 +900,16 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		}
 	case hwmon_temp_input:
 	case hwmon_temp_label:
-		return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP, channel)) ? 0444 : 0;
+		switch (channel) {
+		case CHANNEL_PKG:
+		case CHANNEL_VRAM:
+			return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
+								channel)) ? 0444 : 0;
+		case CHANNEL_MCTRL:
+			return hwmon->temp.count ? 0444 : 0;
+		default:
+			return 0;
+		}
 	default:
 		return 0;
 	}
@@ -866,14 +923,23 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 
 	switch (attr) {
 	case hwmon_temp_input:
-		reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
+		switch (channel) {
+		case CHANNEL_PKG:
+		case CHANNEL_VRAM:
+			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
 
-		/* HW register value is in degrees Celsius, convert to millidegrees. */
-		*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
-		return 0;
+			/* HW register value is in degrees Celsius, convert to millidegrees. */
+			*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
+			return 0;
+		case CHANNEL_MCTRL:
+			return get_mc_temp(hwmon, val);
+		default:
+			return -EOPNOTSUPP;
+		}
 	case hwmon_temp_emergency:
 		switch (channel) {
 		case CHANNEL_PKG:
+		case CHANNEL_MCTRL:
 			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
 			return 0;
 		case CHANNEL_VRAM:
@@ -885,6 +951,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 	case hwmon_temp_crit:
 		switch (channel) {
 		case CHANNEL_PKG:
+		case CHANNEL_MCTRL:
 			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
 			return 0;
 		case CHANNEL_VRAM:
@@ -1263,6 +1330,8 @@ static int xe_hwmon_read_label(struct device *dev,
 			*str = "pkg";
 		else if (channel == CHANNEL_VRAM)
 			*str = "vram";
+		else if (channel == CHANNEL_MCTRL)
+			*str = "mctrl";
 		return 0;
 	case hwmon_power:
 	case hwmon_energy:
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
index dc8f241e5b9e..ad713a3e34e5 100644
--- a/drivers/gpu/drm/xe/xe_pcode_api.h
+++ b/drivers/gpu/drm/xe/xe_pcode_api.h
@@ -52,6 +52,8 @@
 
 #define   PCODE_THERMAL_INFO			0x25
 #define     READ_THERMAL_LIMITS			0x0
+#define     READ_THERMAL_CONFIG			0x1
+#define     READ_THERMAL_DATA			0x2
 
 #define   PCODE_LATE_BINDING			0x5C
 #define     GET_CAPABILITY_STATUS		0x0
-- 
2.25.1

Re: [PATCH v5 2/4] drm/xe/hwmon: Expose memory controller temperature

[Raag Jadav]

On Sat, Jan 10, 2026 at 01:46:42AM +0530, Karthik Poosa wrote:
> Expose GPU memory controller average temperature and its limits under
> temp4_xxx.
> Update Xe hwmon documentation for this.

...

> @@ -718,15 +727,50 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>  {
>  	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>  	int ret;
> +	u32 config = 0;

Use reverse xmas tree order.

>  	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
>  			    &hwmon->temp.data[0], &hwmon->temp.data[1]);
> +	if (ret)
> +		return ret;
> +
>  	drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
>  		hwmon->temp.data[0], hwmon->temp.data[1]);
>  
> +	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_CONFIG, 0),
> +			    &config, NULL);
> +	if (ret)
> +		return ret;
> +
> +	drm_dbg(&hwmon->xe->drm, "thermal config count %d\n", config);

If you want decimal value then I think you should print after[*] you mask
it, but if you want raw value then I think 0x%x would be more useful for
debugging.

> +	hwmon->temp.count = config & TEMP_MASK;

Use REG_FIELD_GET() for consistency.

[*]

Reviewed-by: Raag Jadav <raag.jadav@intel.com>

Re: [PATCH v5 2/4] drm/xe/hwmon: Expose memory controller temperature

[Poosa, Karthik]

On 10-01-2026 16:12, Raag Jadav wrote:
> On Sat, Jan 10, 2026 at 01:46:42AM +0530, Karthik Poosa wrote:
>> Expose GPU memory controller average temperature and its limits under
>> temp4_xxx.
>> Update Xe hwmon documentation for this.
> ...
>
>> @@ -718,15 +727,50 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>>   {
>>   	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>>   	int ret;
>> +	u32 config = 0;
> Use reverse xmas tree order.
okay
>
>>   	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
>>   			    &hwmon->temp.data[0], &hwmon->temp.data[1]);
>> +	if (ret)
>> +		return ret;
>> +
>>   	drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
>>   		hwmon->temp.data[0], hwmon->temp.data[1]);
>>   
>> +	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_CONFIG, 0),
>> +			    &config, NULL);
>> +	if (ret)
>> +		return ret;
>> +
>> +	drm_dbg(&hwmon->xe->drm, "thermal config count %d\n", config);
> If you want decimal value then I think you should print after[*] you mask
> it, but if you want raw value then I think 0x%x would be more useful for
> debugging.
I'll prefer a raw value for debug, will change this to 0x%x in next 
revision.
>
>> +	hwmon->temp.count = config & TEMP_MASK;
> Use REG_FIELD_GET() for consistency.
okay
>
> [*]
>
> Reviewed-by: Raag Jadav <raag.jadav@intel.com>

[PATCH v5 3/4] drm/xe/hwmon: Expose GPU pcie temperature

[Karthik Poosa]

Expose GPU PCIe average temperature and its limits via hwmon sysfs entry
temp5_xxx.
Update Xe hwmon sysfs documentation for this.

v2: Update kernel version in Xe hwmon documentation. (Raag)

v3:
 - Address review comments from Raag.
 - Remove redundant debug log.
 - Update kernel version in Xe hwmon documentation. (Raag)

v4:
 - Address review comments from Raag.
 - Group new temperature attributes with existing temperature attributes
   as per channel index in Xe hwmon documentation.
 - Use TEMP_MASK instead of TEMP_MASK_MAILBOX.
 - Add PCIE_SENSOR_MASK which uses REG_FIELD_GET as replacement of
   PCIE_SENSOR_SHIFT.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
 .../ABI/testing/sysfs-driver-intel-xe-hwmon   | 24 +++++++++++++
 drivers/gpu/drm/xe/xe_hwmon.c                 | 36 ++++++++++++++++++-
 2 files changed, 59 insertions(+), 1 deletion(-)

diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index 550206885624..6e21bebf0e0d 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -189,6 +189,30 @@ Description:	RO. Memory controller average temperature in millidegree Celsius.
 
 		Only supported for particular Intel Xe graphics platforms.
 
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_crit
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. GPU PCIe critical temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_emergency
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. GPU PCIe shutdown temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_input
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. GPU PCIe temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
 What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/fan1_input
 Date:		March 2025
 KernelVersion:	6.16
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index a545e4674e99..2bb67471b755 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -44,6 +44,7 @@ enum xe_hwmon_channel {
 	CHANNEL_PKG,
 	CHANNEL_VRAM,
 	CHANNEL_MCTRL,
+	CHANNEL_PCIE,
 	CHANNEL_MAX,
 };
 
@@ -102,7 +103,9 @@ enum sensor_attr_power {
 #define PL_WRITE_MBX_TIMEOUT_MS	(1)
 
 /* Index of memory controller in READ_THERMAL_DATA output */
-#define TEMP_INDEX_MCTRL	(2)
+#define TEMP_INDEX_MCTRL	2
+#define PCIE_SENSOR_GROUP_ID	0x2
+#define PCIE_SENSOR_MASK	REG_GENMASK(31, 16)
 
 /**
  * struct xe_hwmon_energy_info - to accumulate energy
@@ -712,6 +715,7 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL |
 			   HWMON_T_MAX,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
 	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
 			   HWMON_P_CAP,
@@ -771,6 +775,27 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 	return 0;
 }
 
+static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
+{
+	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
+	int ret;
+	u32 data = 0;
+
+	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA,
+						  PCIE_SENSOR_GROUP_ID), &data, NULL);
+	if (ret)
+		return ret;
+
+	/* Sensor offset is different for G21 */
+	if (hwmon->xe->info.subplatform != XE_SUBPLATFORM_BATTLEMAGE_G21)
+		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
+
+	data &= TEMP_MASK;
+	*val = (s8)data * MILLIDEGREE_PER_DEGREE;
+
+	return 0;
+}
+
 /* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
 static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
 {
@@ -876,6 +901,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		case CHANNEL_VRAM:
 			return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
 		case CHANNEL_MCTRL:
+		case CHANNEL_PCIE:
 			return hwmon->temp.count ? 0444 : 0;
 		default:
 			return 0;
@@ -887,6 +913,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		case CHANNEL_VRAM:
 			return hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] ? 0444 : 0;
 		case CHANNEL_MCTRL:
+		case CHANNEL_PCIE:
 			return hwmon->temp.count ? 0444 : 0;
 		default:
 			return 0;
@@ -906,6 +933,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 			return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
 								channel)) ? 0444 : 0;
 		case CHANNEL_MCTRL:
+		case CHANNEL_PCIE:
 			return hwmon->temp.count ? 0444 : 0;
 		default:
 			return 0;
@@ -933,6 +961,8 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 			return 0;
 		case CHANNEL_MCTRL:
 			return get_mc_temp(hwmon, val);
+		case CHANNEL_PCIE:
+			return get_pcie_temp(hwmon, val);
 		default:
 			return -EOPNOTSUPP;
 		}
@@ -940,6 +970,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 		switch (channel) {
 		case CHANNEL_PKG:
 		case CHANNEL_MCTRL:
+		case CHANNEL_PCIE:
 			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
 			return 0;
 		case CHANNEL_VRAM:
@@ -952,6 +983,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 		switch (channel) {
 		case CHANNEL_PKG:
 		case CHANNEL_MCTRL:
+		case CHANNEL_PCIE:
 			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
 			return 0;
 		case CHANNEL_VRAM:
@@ -1332,6 +1364,8 @@ static int xe_hwmon_read_label(struct device *dev,
 			*str = "vram";
 		else if (channel == CHANNEL_MCTRL)
 			*str = "mctrl";
+		else if (channel == CHANNEL_PCIE)
+			*str = "pcie";
 		return 0;
 	case hwmon_power:
 	case hwmon_energy:
-- 
2.25.1

Re: [PATCH v5 3/4] drm/xe/hwmon: Expose GPU pcie temperature

[Raag Jadav]

On Sat, Jan 10, 2026 at 01:46:43AM +0530, Karthik Poosa wrote:
> Expose GPU PCIe average temperature and its limits via hwmon sysfs entry

Please also use 'PCIe' with correct upper/lower case in patch subject.

...

>  /* Index of memory controller in READ_THERMAL_DATA output */
> -#define TEMP_INDEX_MCTRL	(2)
> +#define TEMP_INDEX_MCTRL	2

Unneeded churn. If you don't want braces, don't even introduce it in
earlier patch.

> +#define PCIE_SENSOR_GROUP_ID	0x2

This is used as part of mailbox command ...

> +#define PCIE_SENSOR_MASK	REG_GENMASK(31, 16)

... and these are output bitfields, so both should be in xe_pcode_api.h.

...

> +static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
> +{
> +	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> +	int ret;
> +	u32 data = 0;

Use reverse xmas tree order.

> +	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA,
> +						  PCIE_SENSOR_GROUP_ID), &data, NULL);
> +	if (ret)
> +		return ret;
> +
> +	/* Sensor offset is different for G21 */
> +	if (hwmon->xe->info.subplatform != XE_SUBPLATFORM_BATTLEMAGE_G21)
> +		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
> +
> +	data &= TEMP_MASK;

Use REG_FIELD_GET() for consistency.

> +	*val = (s8)data * MILLIDEGREE_PER_DEGREE;
> +
> +	return 0;
> +}

Reviewed-by: Raag Jadav <raag.jadav@intel.com>

Re: [PATCH v5 3/4] drm/xe/hwmon: Expose GPU pcie temperature

[Poosa, Karthik]

On 10-01-2026 16:43, Raag Jadav wrote:
> On Sat, Jan 10, 2026 at 01:46:43AM +0530, Karthik Poosa wrote:
>> Expose GPU PCIe average temperature and its limits via hwmon sysfs entry
> Please also use 'PCIe' with correct upper/lower case in patch subject.
>
> ...
PCIe is the right usage, changing it wherever needed.
>
>>   /* Index of memory controller in READ_THERMAL_DATA output */
>> -#define TEMP_INDEX_MCTRL	(2)
>> +#define TEMP_INDEX_MCTRL	2
> Unneeded churn. If you don't want braces, don't even introduce it in
> earlier patch.
Removing the parentheses in previous patch
>
>> +#define PCIE_SENSOR_GROUP_ID	0x2
> This is used as part of mailbox command ...
>
>> +#define PCIE_SENSOR_MASK	REG_GENMASK(31, 16)
> ... and these are output bitfields, so both should be in xe_pcode_api.h.
>
> ...
okay
>
>> +static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
>> +{
>> +	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>> +	int ret;
>> +	u32 data = 0;
> Use reverse xmas tree order.
ok
>
>> +	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA,
>> +						  PCIE_SENSOR_GROUP_ID), &data, NULL);
>> +	if (ret)
>> +		return ret;
>> +
>> +	/* Sensor offset is different for G21 */
>> +	if (hwmon->xe->info.subplatform != XE_SUBPLATFORM_BATTLEMAGE_G21)
>> +		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
>> +
>> +	data &= TEMP_MASK;
> Use REG_FIELD_GET() for consistency.
ok
>
>> +	*val = (s8)data * MILLIDEGREE_PER_DEGREE;
>> +
>> +	return 0;
>> +}
> Reviewed-by: Raag Jadav <raag.jadav@intel.com>

[PATCH v5 4/4] drm/xe/hwmon: Expose individual vram channel temperature

[Karthik Poosa]

Expose individual VRAM temperature attributes.
Update Xe hwmon documentation for this entry.

v2:
 - Avoid using default switch case for VRAM individual temperatures.
 - Append labels with vram number.
 - Update kernel version in Xe hwmon documentation.

v3:
 - Add missing brackets in Xe hwmon documentation from vram sysfs.
 - Reorder BMG_VRAM_TEMPERATURE_N macro in xe_pcode_regs.h.
 - Add api to check if vram is available on the channel.

v4:
 - Improve VRAM label handling to eliminate temp variable by
   introducing a dedicated array vram_label in xe_hwmon_thermal_info.
 - Remove a magic number.
 - Change the label from vram_X to vram_ch_X.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
 .../ABI/testing/sysfs-driver-intel-xe-hwmon   | 22 +++++++
 drivers/gpu/drm/xe/regs/xe_pcode_regs.h       |  3 +
 drivers/gpu/drm/xe/xe_hwmon.c                 | 65 ++++++++++++++++++-
 3 files changed, 89 insertions(+), 1 deletion(-)

diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index 6e21bebf0e0d..55ab45f669ac 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -211,6 +211,28 @@ KernelVersion:	7.0
 Contact:	intel-xe@lists.freedesktop.org
 Description:	RO. GPU PCIe temperature in millidegree Celsius.
 
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp[6-21]_crit
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. VRAM channel critical temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp[6-21]_emergency
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. VRAM channel shutdown temperature in millidegree Celsius.
+
+		Only supported for particular Intel Xe graphics platforms.
+
+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp[6-21]_input
+Date:		January 2026
+KernelVersion:	7.0
+Contact:	intel-xe@lists.freedesktop.org
+Description:	RO. VRAM channel temperature in millidegree Celsius.
+
 		Only supported for particular Intel Xe graphics platforms.
 
 What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/fan1_input
diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
index fb097607b86c..6627591c05b7 100644
--- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
@@ -22,6 +22,9 @@
 #define BMG_FAN_2_SPEED				XE_REG(0x138170)
 #define BMG_FAN_3_SPEED				XE_REG(0x1381a0)
 #define BMG_VRAM_TEMPERATURE			XE_REG(0x1382c0)
+#define BMG_VRAM_TEMPERATURE_N(n)		XE_REG(0x138260 + (n))
+#define   TEMP_MASK_VRAM_N			REG_GENMASK(30, 8)
+#define   TEMP_SIGN_MASK			BIT(31)
 #define BMG_PACKAGE_TEMPERATURE			XE_REG(0x138434)
 
 #endif /* _XE_PCODE_REGS_H_ */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 2bb67471b755..2403687a73fe 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -39,12 +39,16 @@ enum xe_hwmon_reg_operation {
 	REG_READ64,
 };
 
+#define MAX_VRAM_CHANNELS      (16)
+
 enum xe_hwmon_channel {
 	CHANNEL_CARD,
 	CHANNEL_PKG,
 	CHANNEL_VRAM,
 	CHANNEL_MCTRL,
 	CHANNEL_PCIE,
+	CHANNEL_VRAM_N,
+	CHANNEL_VRAM_N_MAX = CHANNEL_VRAM_N + MAX_VRAM_CHANNELS,
 	CHANNEL_MAX,
 };
 
@@ -106,6 +110,7 @@ enum sensor_attr_power {
 #define TEMP_INDEX_MCTRL	2
 #define PCIE_SENSOR_GROUP_ID	0x2
 #define PCIE_SENSOR_MASK	REG_GENMASK(31, 16)
+#define MAX_LABEL_SIZE		16
 
 /**
  * struct xe_hwmon_energy_info - to accumulate energy
@@ -141,6 +146,8 @@ struct xe_hwmon_thermal_info {
 	u8 count;
 	/** @value: signed value from each sensor */
 	s8 value[U8_MAX];
+	/** @vram_label: vram label names */
+	char vram_label[MAX_VRAM_CHANNELS][MAX_LABEL_SIZE];
 };
 
 /**
@@ -257,6 +264,9 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
 				return BMG_PACKAGE_TEMPERATURE;
 			else if (channel == CHANNEL_VRAM)
 				return BMG_VRAM_TEMPERATURE;
+			else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
+				return BMG_VRAM_TEMPERATURE_N(((channel - CHANNEL_VRAM_N) *
+								sizeof(u32)));
 		} else if (xe->info.platform == XE_DG2) {
 			if (channel == CHANNEL_PKG)
 				return PCU_CR_PACKAGE_TEMPERATURE;
@@ -716,6 +726,22 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
 			   HWMON_T_MAX,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
 	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
 			   HWMON_P_CAP,
@@ -890,6 +916,21 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
 	*value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
 }
 
+static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
+{
+	struct xe_reg vram_ch_temp;
+	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
+
+	vram_ch_temp = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
+	if (xe_reg_is_valid(vram_ch_temp) && xe_mmio_read32(mmio, vram_ch_temp)) {
+		/* Create label only for available vram channel */
+		sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N], "vram_ch_%d",
+			(channel - CHANNEL_VRAM_N));
+		return 1;
+	}
+	return 0;
+}
+
 static umode_t
 xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 {
@@ -903,6 +944,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
 			return hwmon->temp.count ? 0444 : 0;
+		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
 		default:
 			return 0;
 		}
@@ -915,6 +958,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
 			return hwmon->temp.count ? 0444 : 0;
+		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
 		default:
 			return 0;
 		}
@@ -935,6 +980,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
 			return hwmon->temp.count ? 0444 : 0;
+		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
 		default:
 			return 0;
 		}
@@ -963,6 +1010,16 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 			return get_mc_temp(hwmon, val);
 		case CHANNEL_PCIE:
 			return get_pcie_temp(hwmon, val);
+		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
+			/*
+			 * This temperature format is bit 31 for sign, bits [30:8] for whole number
+			 * and bits [7:0] for fraction
+			 */
+			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) *
+				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
+				 MILLIDEGREE_PER_DEGREE;
+			return 0;
 		default:
 			return -EOPNOTSUPP;
 		}
@@ -974,6 +1031,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
 			return 0;
 		case CHANNEL_VRAM:
+		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
 			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
 			return 0;
 		default:
@@ -987,6 +1045,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
 			return 0;
 		case CHANNEL_VRAM:
+		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
 			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] * MILLIDEGREE_PER_DEGREE;
 			return 0;
 		default:
@@ -1356,16 +1415,20 @@ static int xe_hwmon_read_label(struct device *dev,
 			       enum hwmon_sensor_types type,
 			       u32 attr, int channel, const char **str)
 {
+	struct xe_hwmon *hwmon = dev_get_drvdata(dev);
+
 	switch (type) {
 	case hwmon_temp:
 		if (channel == CHANNEL_PKG)
 			*str = "pkg";
 		else if (channel == CHANNEL_VRAM)
-			*str = "vram";
+			*str = "vram_avg";
 		else if (channel == CHANNEL_MCTRL)
 			*str = "mctrl";
 		else if (channel == CHANNEL_PCIE)
 			*str = "pcie";
+		else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
+			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
 		return 0;
 	case hwmon_power:
 	case hwmon_energy:
-- 
2.25.1

Re: [PATCH v5 4/4] drm/xe/hwmon: Expose individual vram channel temperature

[Raag Jadav]

On Sat, Jan 10, 2026 at 01:46:44AM +0530, Karthik Poosa wrote:
> Expose individual VRAM temperature attributes.

Please also use 'VRAM' in caps in patch subject.

...

> @@ -257,6 +264,9 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
>  				return BMG_PACKAGE_TEMPERATURE;
>  			else if (channel == CHANNEL_VRAM)
>  				return BMG_VRAM_TEMPERATURE;
> +			else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
> +				return BMG_VRAM_TEMPERATURE_N(((channel - CHANNEL_VRAM_N) *
> +								sizeof(u32)));

Make (n * sizeof(u32)) as part of BMG_VRAM_TEMPERATURE_N(). With that
perhaps this'll be a single line.

...

> @@ -890,6 +916,21 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
>  	*value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
>  }
>  
> +static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
> +{
> +	struct xe_reg vram_ch_temp;
> +	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
> +
> +	vram_ch_temp = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
> +	if (xe_reg_is_valid(vram_ch_temp) && xe_mmio_read32(mmio, vram_ch_temp)) {
> +		/* Create label only for available vram channel */
> +		sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N], "vram_ch_%d",
> +			(channel - CHANNEL_VRAM_N));
> +		return 1;
> +	}
> +	return 0;
> +}

I'd write this as

static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
{
        struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
        int vram_id = channel - CHANNEL_VRAM_N;
        struct xe_reg vram_reg;

        vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
        if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
                return false;

        /* Create label only for available vram channel */
        sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
        return true;
}

>  static umode_t
>  xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  {
> @@ -903,6 +944,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  		case CHANNEL_MCTRL:
>  		case CHANNEL_PCIE:
>  			return hwmon->temp.count ? 0444 : 0;
> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;

Shouldn't we also check hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]?

>  		default:
>  			return 0;
>  		}
> @@ -915,6 +958,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  		case CHANNEL_MCTRL:
>  		case CHANNEL_PCIE:
>  			return hwmon->temp.count ? 0444 : 0;
> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;

Ditto, hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]?

>  		default:
>  			return 0;
>  		}
> @@ -935,6 +980,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>  		case CHANNEL_MCTRL:
>  		case CHANNEL_PCIE:
>  			return hwmon->temp.count ? 0444 : 0;
> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
>  		default:
>  			return 0;
>  		}
> @@ -963,6 +1010,16 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>  			return get_mc_temp(hwmon, val);
>  		case CHANNEL_PCIE:
>  			return get_pcie_temp(hwmon, val);
> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> +			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
> +			/*
> +			 * This temperature format is bit 31 for sign, bits [30:8] for whole number
> +			 * and bits [7:0] for fraction

Nit: "Temperature format is 24 bits [31:8] signed integer and
8 bits [7:0] fraction."

> +			 */
> +			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) *
> +				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *

Since you're already casting it, I'm wondering if you need to check
for sign?

> +				 MILLIDEGREE_PER_DEGREE;
> +			return 0;
>  		default:
>  			return -EOPNOTSUPP;
>  		}
> @@ -974,6 +1031,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>  			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>  			return 0;
>  		case CHANNEL_VRAM:
> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>  			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>  			return 0;
>  		default:
> @@ -987,6 +1045,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>  			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
>  			return 0;
>  		case CHANNEL_VRAM:
> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>  			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] * MILLIDEGREE_PER_DEGREE;
>  			return 0;
>  		default:
> @@ -1356,16 +1415,20 @@ static int xe_hwmon_read_label(struct device *dev,
>  			       enum hwmon_sensor_types type,
>  			       u32 attr, int channel, const char **str)
>  {
> +	struct xe_hwmon *hwmon = dev_get_drvdata(dev);
> +
>  	switch (type) {
>  	case hwmon_temp:
>  		if (channel == CHANNEL_PKG)
>  			*str = "pkg";
>  		else if (channel == CHANNEL_VRAM)
> -			*str = "vram";
> +			*str = "vram_avg";

If you look at the readings this is actually not average, so it's a bit
misleading.

Raag

>  		else if (channel == CHANNEL_MCTRL)
>  			*str = "mctrl";
>  		else if (channel == CHANNEL_PCIE)
>  			*str = "pcie";
> +		else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
> +			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
>  		return 0;
>  	case hwmon_power:
>  	case hwmon_energy:
> -- 
> 2.25.1
> 

Re: [PATCH v5 4/4] drm/xe/hwmon: Expose individual vram channel temperature

[Poosa, Karthik]

[-- Attachment #1: Type: text/plain, Size: 6365 bytes --]


On 10-01-2026 21:53, Raag Jadav wrote:
> On Sat, Jan 10, 2026 at 01:46:44AM +0530, Karthik Poosa wrote:
>> Expose individual VRAM temperature attributes.
> Please also use 'VRAM' in caps in patch subject.
>
> ...
ok
>
>> @@ -257,6 +264,9 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
>>   				return BMG_PACKAGE_TEMPERATURE;
>>   			else if (channel == CHANNEL_VRAM)
>>   				return BMG_VRAM_TEMPERATURE;
>> +			else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
>> +				return BMG_VRAM_TEMPERATURE_N(((channel - CHANNEL_VRAM_N) *
>> +								sizeof(u32)));
> Make (n * sizeof(u32)) as part of BMG_VRAM_TEMPERATURE_N(). With that
> perhaps this'll be a single line.
ok
>
> ...
>
>> @@ -890,6 +916,21 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
>>   	*value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
>>   }
>>   
>> +static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
>> +{
>> +	struct xe_reg vram_ch_temp;
>> +	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
>> +
>> +	vram_ch_temp = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
>> +	if (xe_reg_is_valid(vram_ch_temp) && xe_mmio_read32(mmio, vram_ch_temp)) {
>> +		/* Create label only for available vram channel */
>> +		sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N], "vram_ch_%d",
>> +			(channel - CHANNEL_VRAM_N));
>> +		return 1;
>> +	}
>> +	return 0;
>> +}
> I'd write this as
>
> static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
> {
>          struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
>          int vram_id = channel - CHANNEL_VRAM_N;
>          struct xe_reg vram_reg;
>
>          vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
>          if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
>                  return false;
>
>          /* Create label only for available vram channel */
>          sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
>          return true;
> }
I'll agree with vram_id and boolean values, for readability,
other than that I would like to stick to current implementation.
>>   static umode_t
>>   xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   {
>> @@ -903,6 +944,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   		case CHANNEL_MCTRL:
>>   		case CHANNEL_PCIE:
>>   			return hwmon->temp.count ? 0444 : 0;
>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>> +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
> Shouldn't we also check hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]?
that can be secondary check, then this would apply to all channels !
>
>>   		default:
>>   			return 0;
>>   		}
>> @@ -915,6 +958,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   		case CHANNEL_MCTRL:
>>   		case CHANNEL_PCIE:
>>   			return hwmon->temp.count ? 0444 : 0;
>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>> +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
> Ditto, hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]?
>
>>   		default:
>>   			return 0;
>>   		}
>> @@ -935,6 +980,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>   		case CHANNEL_MCTRL:
>>   		case CHANNEL_PCIE:
>>   			return hwmon->temp.count ? 0444 : 0;
>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>> +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
>>   		default:
>>   			return 0;
>>   		}
>> @@ -963,6 +1010,16 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>   			return get_mc_temp(hwmon, val);
>>   		case CHANNEL_PCIE:
>>   			return get_pcie_temp(hwmon, val);
>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>> +			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
>> +			/*
>> +			 * This temperature format is bit 31 for sign, bits [30:8] for whole number
>> +			 * and bits [7:0] for fraction
> Nit: "Temperature format is 24 bits [31:8] signed integer and
> 8 bits [7:0] fraction."
>
>> +			 */
>> +			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) */
>> +				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
> Since you're already casting it, I'm wondering if you need to check
> for sign?
|REG_FIELD_GET() returns unsigned type, which gets stored |the lower 24 
bits of an |s32|, discarding the sign bit; consequently, negative values 
are interpreted as positive, requiring an explicit sign check.
>
>> +				 MILLIDEGREE_PER_DEGREE;
>> +			return 0;
>>   		default:
>>   			return -EOPNOTSUPP;
>>   		}
>> @@ -974,6 +1031,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>   			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>>   			return 0;
>>   		case CHANNEL_VRAM:
>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>>   			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>>   			return 0;
>>   		default:
>> @@ -987,6 +1045,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>   			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
>>   			return 0;
>>   		case CHANNEL_VRAM:
>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>>   			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] * MILLIDEGREE_PER_DEGREE;
>>   			return 0;
>>   		default:
>> @@ -1356,16 +1415,20 @@ static int xe_hwmon_read_label(struct device *dev,
>>   			       enum hwmon_sensor_types type,
>>   			       u32 attr, int channel, const char **str)
>>   {
>> +	struct xe_hwmon *hwmon = dev_get_drvdata(dev);
>> +
>>   	switch (type) {
>>   	case hwmon_temp:
>>   		if (channel == CHANNEL_PKG)
>>   			*str = "pkg";
>>   		else if (channel == CHANNEL_VRAM)
>> -			*str = "vram";
>> +			*str = "vram_avg";
> If you look at the readings this is actually not average, so it's a bit
> misleading.
>
> Raag

what is your suggestion for that label here ?

>
>>   		else if (channel == CHANNEL_MCTRL)
>>   			*str = "mctrl";
>>   		else if (channel == CHANNEL_PCIE)
>>   			*str = "pcie";
>> +		else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
>> +			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
>>   		return 0;
>>   	case hwmon_power:
>>   	case hwmon_energy:
>> -- 
>> 2.25.1
>>

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Re: [PATCH v5 4/4] drm/xe/hwmon: Expose individual vram channel temperature

[Raag Jadav]

On Sun, Jan 11, 2026 at 12:52:39AM +0530, Poosa, Karthik wrote:
> On 10-01-2026 21:53, Raag Jadav wrote:
> > On Sat, Jan 10, 2026 at 01:46:44AM +0530, Karthik Poosa wrote:

...

> > > +static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
> > > +{
> > > +	struct xe_reg vram_ch_temp;
> > > +	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
> > > +
> > > +	vram_ch_temp = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
> > > +	if (xe_reg_is_valid(vram_ch_temp) && xe_mmio_read32(mmio, vram_ch_temp)) {
> > > +		/* Create label only for available vram channel */
> > > +		sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N], "vram_ch_%d",
> > > +			(channel - CHANNEL_VRAM_N));
> > > +		return 1;
> > > +	}
> > > +	return 0;
> > > +}
> > I'd write this as
> > 
> > static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
> > {
> >          struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
> >          int vram_id = channel - CHANNEL_VRAM_N;
> >          struct xe_reg vram_reg;
> > 
> >          vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
> >          if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
> >                  return false;
> > 
> >          /* Create label only for available vram channel */
> >          sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
> >          return true;
> > }
> I'll agree with vram_id and boolean values, for readability,
> other than that I would like to stick to current implementation.

The usual practice is early return negative cases, but upto you.

Also, just curious: Do we need the 'ch' string here? We already know
it's channel, right?

> > >   static umode_t
> > >   xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> > >   {
> > > @@ -903,6 +944,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> > >   		case CHANNEL_MCTRL:
> > >   		case CHANNEL_PCIE:
> > >   			return hwmon->temp.count ? 0444 : 0;
> > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
> > Shouldn't we also check hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]?
> that can be secondary check, then this would apply to all channels !

For the channels that return data from the mailbox, we'd want to make sure
the data source is also working. Else we'll have dummy attributes exposing
no useful data.

> > >   		default:
> > >   			return 0;
> > >   		}
> > > @@ -915,6 +958,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> > >   		case CHANNEL_MCTRL:
> > >   		case CHANNEL_PCIE:
> > >   			return hwmon->temp.count ? 0444 : 0;
> > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
> > Ditto, hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]?
> > 
> > >   		default:
> > >   			return 0;
> > >   		}
> > > @@ -935,6 +980,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> > >   		case CHANNEL_MCTRL:
> > >   		case CHANNEL_PCIE:
> > >   			return hwmon->temp.count ? 0444 : 0;
> > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
> > >   		default:
> > >   			return 0;
> > >   		}
> > > @@ -963,6 +1010,16 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> > >   			return get_mc_temp(hwmon, val);
> > >   		case CHANNEL_PCIE:
> > >   			return get_pcie_temp(hwmon, val);
> > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > +			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
> > > +			/*
> > > +			 * This temperature format is bit 31 for sign, bits [30:8] for whole number
> > > +			 * and bits [7:0] for fraction
> > Nit: "Temperature format is 24 bits [31:8] signed integer and
> > 8 bits [7:0] fraction."
> > 
> > > +			 */
> > > +			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) */
> > > +				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
> > Since you're already casting it, I'm wondering if you need to check
> > for sign?
> |REG_FIELD_GET() returns unsigned type, which gets stored |the lower 24 bits
> of an |s32|, discarding the sign bit; consequently, negative values are
> interpreted as positive, requiring an explicit sign check.

Would something like this work?

	s32 vram_n = (reg_val & TEMP_SIGN_MASK) | REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val);

	*val = vram_n * MILLIDEGREE_PER_DEGREE;
	return 0;

> > > +				 MILLIDEGREE_PER_DEGREE;
> > > +			return 0;
> > >   		default:
> > >   			return -EOPNOTSUPP;
> > >   		}
> > > @@ -974,6 +1031,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> > >   			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> > >   			return 0;
> > >   		case CHANNEL_VRAM:
> > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > >   			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> > >   			return 0;
> > >   		default:
> > > @@ -987,6 +1045,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> > >   			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
> > >   			return 0;
> > >   		case CHANNEL_VRAM:
> > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > >   			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] * MILLIDEGREE_PER_DEGREE;
> > >   			return 0;
> > >   		default:
> > > @@ -1356,16 +1415,20 @@ static int xe_hwmon_read_label(struct device *dev,
> > >   			       enum hwmon_sensor_types type,
> > >   			       u32 attr, int channel, const char **str)
> > >   {
> > > +	struct xe_hwmon *hwmon = dev_get_drvdata(dev);
> > > +
> > >   	switch (type) {
> > >   	case hwmon_temp:
> > >   		if (channel == CHANNEL_PKG)
> > >   			*str = "pkg";
> > >   		else if (channel == CHANNEL_VRAM)
> > > -			*str = "vram";
> > > +			*str = "vram_avg";
> > If you look at the readings this is actually not average, so it's a bit
> > misleading.
> 
> what is your suggestion for that label here ?

Since this is a stable ABI, let's first make sure that we can actually
change output string. If we can, then something like vram_high or
vram_peak would be more appropriate.

Note: This is different from _max attribute which signifies the limit.

Raag

> > >   		else if (channel == CHANNEL_MCTRL)
> > >   			*str = "mctrl";
> > >   		else if (channel == CHANNEL_PCIE)
> > >   			*str = "pcie";
> > > +		else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
> > > +			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
> > >   		return 0;
> > >   	case hwmon_power:
> > >   	case hwmon_energy:
> > > -- 
> > > 2.25.1
> > > 

Re: [PATCH v5 4/4] drm/xe/hwmon: Expose individual vram channel temperature

[Poosa, Karthik]

On 12-01-2026 13:41, Raag Jadav wrote:
> On Sun, Jan 11, 2026 at 12:52:39AM +0530, Poosa, Karthik wrote:
>> On 10-01-2026 21:53, Raag Jadav wrote:
>>> On Sat, Jan 10, 2026 at 01:46:44AM +0530, Karthik Poosa wrote:
> ...
>
>>>> +static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
>>>> +{
>>>> +	struct xe_reg vram_ch_temp;
>>>> +	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
>>>> +
>>>> +	vram_ch_temp = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
>>>> +	if (xe_reg_is_valid(vram_ch_temp) && xe_mmio_read32(mmio, vram_ch_temp)) {
>>>> +		/* Create label only for available vram channel */
>>>> +		sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N], "vram_ch_%d",
>>>> +			(channel - CHANNEL_VRAM_N));
>>>> +		return 1;
>>>> +	}
>>>> +	return 0;
>>>> +}
>>> I'd write this as
>>>
>>> static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
>>> {
>>>           struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
>>>           int vram_id = channel - CHANNEL_VRAM_N;
>>>           struct xe_reg vram_reg;
>>>
>>>           vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);i!
>>>           if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
>>>                   return false;
>>>
>>>           /* Create label only for available vram channel */
>>>           sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
>>>           return true;
>>> }
>> I'll agree with vram_id and boolean values, for readability,
>> other than that I would like to stick to current implementation.
> The usual practice is early return negative cases, but upto you.
okay we can do that in next revision
>
> Also, just curious: Do we need the 'ch' string here? We already know
> it's channel, right?
yes to differentiate between existing channel "vram", I've appended with 
_ch_X
>>>>    static umode_t
>>>>    xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>>>    {
>>>> @@ -903,6 +944,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>>>    		case CHANNEL_MCTRL:
>>>>    		case CHANNEL_PCIE:
>>>>    			return hwmon->temp.count ? 0444 : 0;
>>>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>>>> +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
>>> Shouldn't we also check hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]?
>> that can be secondary check, then this would apply to all channels !
> For the channels that return data from the mailbox, we'd want to make sure
> the data source is also working. Else we'll have dummy attributes exposing
> no useful data.
okay, I shall add this in next revision
>
>>>>    		default:
>>>>    			return 0;
>>>>    		}
>>>> @@ -915,6 +958,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>>>    		case CHANNEL_MCTRL:
>>>>    		case CHANNEL_PCIE:
>>>>    			return hwmon->temp.count ? 0444 : 0;
>>>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>>>> +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
>>> Ditto, hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]?
>>>
>>>>    		default:
>>>>    			return 0;
>>>>    		}
>>>> @@ -935,6 +980,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>>>>    		case CHANNEL_MCTRL:
>>>>    		case CHANNEL_PCIE:
>>>>    			return hwmon->temp.count ? 0444 : 0;
>>>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>>>> +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
>>>>    		default:
>>>>    			return 0;
>>>>    		}
>>>> @@ -963,6 +1010,16 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>>>    			return get_mc_temp(hwmon, val);
>>>>    		case CHANNEL_PCIE:
>>>>    			return get_pcie_temp(hwmon, val);
>>>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>>>> +			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
>>>> +			/*
>>>> +			 * This temperature format is bit 31 for sign, bits [30:8] for whole number
>>>> +			 * and bits [7:0] for fraction
>>> Nit: "Temperature format is 24 bits [31:8] signed integer and
>>> 8 bits [7:0] fraction."
>>>
>>>> +			 */
>>>> +			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) */
>>>> +				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
>>> Since you're already casting it, I'm wondering if you need to check
>>> for sign?
>> |REG_FIELD_GET() returns unsigned type, which gets stored |the lower 24 bits
>> of an |s32|, discarding the sign bit; consequently, negative values are
>> interpreted as positive, requiring an explicit sign check.
> Would something like this work?
>
> 	s32 vram_n = (reg_val & TEMP_SIGN_MASK) | REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val);
this is okay
>
> 	*val = vram_n * MILLIDEGREE_PER_DEGREE;

but this wont work as it will treat value as unsigned and we'll need to 
again check the sign check here.

existing one does these all in a single statement.

> 	return 0;
>
>>>> +				 MILLIDEGREE_PER_DEGREE;
>>>> +			return 0;
>>>>    		default:
>>>>    			return -EOPNOTSUPP;
>>>>    		}
>>>> @@ -974,6 +1031,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>>>    			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>>>>    			return 0;
>>>>    		case CHANNEL_VRAM:
>>>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>>>>    			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>>>>    			return 0;
>>>>    		default:
>>>> @@ -987,6 +1045,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>>>    			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
>>>>    			return 0;
>>>>    		case CHANNEL_VRAM:
>>>> +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
>>>>    			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] * MILLIDEGREE_PER_DEGREE;
>>>>    			return 0;
>>>>    		default:
>>>> @@ -1356,16 +1415,20 @@ static int xe_hwmon_read_label(struct device *dev,
>>>>    			       enum hwmon_sensor_types type,
>>>>    			       u32 attr, int channel, const char **str)
>>>>    {
>>>> +	struct xe_hwmon *hwmon = dev_get_drvdata(dev);
>>>> +
>>>>    	switch (type) {
>>>>    	case hwmon_temp:
>>>>    		if (channel == CHANNEL_PKG)
>>>>    			*str = "pkg";
>>>>    		else if (channel == CHANNEL_VRAM)
>>>> -			*str = "vram";
>>>> +			*str = "vram_avg";
>>> If you look at the readings this is actually not average, so it's a bit
>>> misleading.
>> what is your suggestion for that label here ?
> Since this is a stable ABI, let's first make sure that we can actually
> change output string. If we can, then something like vram_high or
> vram_peak would be more appropriate.
>
> Note: This is different from _max attribute which signifies the limit.
>
> Raag

1. Actually, this label change can be a separate patch.

2. We are modifying label here, ABI still remains same, so this should 
be okay

vram_peak seems apt, as it the current max value of all vrams

Rodrigo, can you also share your comments on this ?

>
>>>>    		else if (channel == CHANNEL_MCTRL)
>>>>    			*str = "mctrl";
>>>>    		else if (channel == CHANNEL_PCIE)
>>>>    			*str = "pcie";
>>>> +		else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
>>>> +			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
>>>>    		return 0;
>>>>    	case hwmon_power:
>>>>    	case hwmon_energy:
>>>> -- 
>>>> 2.25.1
>>>>

Re: [PATCH v5 4/4] drm/xe/hwmon: Expose individual vram channel temperature

[Rodrigo Vivi]

On Mon, Jan 12, 2026 at 05:15:35PM +0530, Poosa, Karthik wrote:
> 
> On 12-01-2026 13:41, Raag Jadav wrote:
> > On Sun, Jan 11, 2026 at 12:52:39AM +0530, Poosa, Karthik wrote:
> > > On 10-01-2026 21:53, Raag Jadav wrote:
> > > > On Sat, Jan 10, 2026 at 01:46:44AM +0530, Karthik Poosa wrote:
> > ...
> > 
> > > > > +static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
> > > > > +{
> > > > > +	struct xe_reg vram_ch_temp;
> > > > > +	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
> > > > > +
> > > > > +	vram_ch_temp = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
> > > > > +	if (xe_reg_is_valid(vram_ch_temp) && xe_mmio_read32(mmio, vram_ch_temp)) {
> > > > > +		/* Create label only for available vram channel */
> > > > > +		sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N], "vram_ch_%d",
> > > > > +			(channel - CHANNEL_VRAM_N));
> > > > > +		return 1;
> > > > > +	}
> > > > > +	return 0;
> > > > > +}
> > > > I'd write this as
> > > > 
> > > > static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
> > > > {
> > > >           struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
> > > >           int vram_id = channel - CHANNEL_VRAM_N;
> > > >           struct xe_reg vram_reg;
> > > > 
> > > >           vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);i!
> > > >           if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
> > > >                   return false;
> > > > 
> > > >           /* Create label only for available vram channel */
> > > >           sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
> > > >           return true;
> > > > }
> > > I'll agree with vram_id and boolean values, for readability,
> > > other than that I would like to stick to current implementation.
> > The usual practice is early return negative cases, but upto you.
> okay we can do that in next revision
> > 
> > Also, just curious: Do we need the 'ch' string here? We already know
> > it's channel, right?
> yes to differentiate between existing channel "vram", I've appended with
> _ch_X
> > > > >    static umode_t
> > > > >    xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> > > > >    {
> > > > > @@ -903,6 +944,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> > > > >    		case CHANNEL_MCTRL:
> > > > >    		case CHANNEL_PCIE:
> > > > >    			return hwmon->temp.count ? 0444 : 0;
> > > > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > > > +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
> > > > Shouldn't we also check hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]?
> > > that can be secondary check, then this would apply to all channels !
> > For the channels that return data from the mailbox, we'd want to make sure
> > the data source is also working. Else we'll have dummy attributes exposing
> > no useful data.
> okay, I shall add this in next revision
> > 
> > > > >    		default:
> > > > >    			return 0;
> > > > >    		}
> > > > > @@ -915,6 +958,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> > > > >    		case CHANNEL_MCTRL:
> > > > >    		case CHANNEL_PCIE:
> > > > >    			return hwmon->temp.count ? 0444 : 0;
> > > > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > > > +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
> > > > Ditto, hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]?
> > > > 
> > > > >    		default:
> > > > >    			return 0;
> > > > >    		}
> > > > > @@ -935,6 +980,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> > > > >    		case CHANNEL_MCTRL:
> > > > >    		case CHANNEL_PCIE:
> > > > >    			return hwmon->temp.count ? 0444 : 0;
> > > > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > > > +			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
> > > > >    		default:
> > > > >    			return 0;
> > > > >    		}
> > > > > @@ -963,6 +1010,16 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> > > > >    			return get_mc_temp(hwmon, val);
> > > > >    		case CHANNEL_PCIE:
> > > > >    			return get_pcie_temp(hwmon, val);
> > > > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > > > +			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
> > > > > +			/*
> > > > > +			 * This temperature format is bit 31 for sign, bits [30:8] for whole number
> > > > > +			 * and bits [7:0] for fraction
> > > > Nit: "Temperature format is 24 bits [31:8] signed integer and
> > > > 8 bits [7:0] fraction."
> > > > 
> > > > > +			 */
> > > > > +			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) */
> > > > > +				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
> > > > Since you're already casting it, I'm wondering if you need to check
> > > > for sign?
> > > |REG_FIELD_GET() returns unsigned type, which gets stored |the lower 24 bits
> > > of an |s32|, discarding the sign bit; consequently, negative values are
> > > interpreted as positive, requiring an explicit sign check.
> > Would something like this work?
> > 
> > 	s32 vram_n = (reg_val & TEMP_SIGN_MASK) | REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val);
> this is okay
> > 
> > 	*val = vram_n * MILLIDEGREE_PER_DEGREE;
> 
> but this wont work as it will treat value as unsigned and we'll need to
> again check the sign check here.
> 
> existing one does these all in a single statement.
> 
> > 	return 0;
> > 
> > > > > +				 MILLIDEGREE_PER_DEGREE;
> > > > > +			return 0;
> > > > >    		default:
> > > > >    			return -EOPNOTSUPP;
> > > > >    		}
> > > > > @@ -974,6 +1031,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> > > > >    			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> > > > >    			return 0;
> > > > >    		case CHANNEL_VRAM:
> > > > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > > >    			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> > > > >    			return 0;
> > > > >    		default:
> > > > > @@ -987,6 +1045,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> > > > >    			*val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
> > > > >    			return 0;
> > > > >    		case CHANNEL_VRAM:
> > > > > +		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> > > > >    			*val = hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] * MILLIDEGREE_PER_DEGREE;
> > > > >    			return 0;
> > > > >    		default:
> > > > > @@ -1356,16 +1415,20 @@ static int xe_hwmon_read_label(struct device *dev,
> > > > >    			       enum hwmon_sensor_types type,
> > > > >    			       u32 attr, int channel, const char **str)
> > > > >    {
> > > > > +	struct xe_hwmon *hwmon = dev_get_drvdata(dev);
> > > > > +
> > > > >    	switch (type) {
> > > > >    	case hwmon_temp:
> > > > >    		if (channel == CHANNEL_PKG)
> > > > >    			*str = "pkg";
> > > > >    		else if (channel == CHANNEL_VRAM)
> > > > > -			*str = "vram";
> > > > > +			*str = "vram_avg";
> > > > If you look at the readings this is actually not average, so it's a bit
> > > > misleading.
> > > what is your suggestion for that label here ?
> > Since this is a stable ABI, let's first make sure that we can actually
> > change output string. If we can, then something like vram_high or
> > vram_peak would be more appropriate.
> > 
> > Note: This is different from _max attribute which signifies the limit.
> > 
> > Raag
> 
> 1. Actually, this label change can be a separate patch.
> 
> 2. We are modifying label here, ABI still remains same, so this should be
> okay
> 
> vram_peak seems apt, as it the current max value of all vrams
> 
> Rodrigo, can you also share your comments on this ?

I'd say we can keep it as 'vram' only... like the last version of this
patch is doing. I see no reason to modify it.

And if some tool out there is already relying on these strings, it
might break. So, better to keep and avoid changing it.

> 
> > 
> > > > >    		else if (channel == CHANNEL_MCTRL)
> > > > >    			*str = "mctrl";
> > > > >    		else if (channel == CHANNEL_PCIE)
> > > > >    			*str = "pcie";
> > > > > +		else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
> > > > > +			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
> > > > >    		return 0;
> > > > >    	case hwmon_power:
> > > > >    	case hwmon_energy:
> > > > > -- 
> > > > > 2.25.1
> > > > > 

✓ CI.KUnit: success for drm/xe/hwmon: Expose new temperature attributes (rev7)

[Patchwork]

== Series Details ==

Series: drm/xe/hwmon: Expose new temperature attributes (rev7)
URL   : https://patchwork.freedesktop.org/series/158384/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:16:03] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:16:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:16:39] Starting KUnit Kernel (1/1)...
[20:16:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:16:39] ================== guc_buf (11 subtests) ===================
[20:16:40] [PASSED] test_smallest
[20:16:40] [PASSED] test_largest
[20:16:40] [PASSED] test_granular
[20:16:40] [PASSED] test_unique
[20:16:40] [PASSED] test_overlap
[20:16:40] [PASSED] test_reusable
[20:16:40] [PASSED] test_too_big
[20:16:40] [PASSED] test_flush
[20:16:40] [PASSED] test_lookup
[20:16:40] [PASSED] test_data
[20:16:40] [PASSED] test_class
[20:16:40] ===================== [PASSED] guc_buf =====================
[20:16:40] =================== guc_dbm (7 subtests) ===================
[20:16:40] [PASSED] test_empty
[20:16:40] [PASSED] test_default
[20:16:40] ======================== test_size  ========================
[20:16:40] [PASSED] 4
[20:16:40] [PASSED] 8
[20:16:40] [PASSED] 32
[20:16:40] [PASSED] 256
[20:16:40] ==================== [PASSED] test_size ====================
[20:16:40] ======================= test_reuse  ========================
[20:16:40] [PASSED] 4
[20:16:40] [PASSED] 8
[20:16:40] [PASSED] 32
[20:16:40] [PASSED] 256
[20:16:40] =================== [PASSED] test_reuse ====================
[20:16:40] =================== test_range_overlap  ====================
[20:16:40] [PASSED] 4
[20:16:40] [PASSED] 8
[20:16:40] [PASSED] 32
[20:16:40] [PASSED] 256
[20:16:40] =============== [PASSED] test_range_overlap ================
[20:16:40] =================== test_range_compact  ====================
[20:16:40] [PASSED] 4
[20:16:40] [PASSED] 8
[20:16:40] [PASSED] 32
[20:16:40] [PASSED] 256
[20:16:40] =============== [PASSED] test_range_compact ================
[20:16:40] ==================== test_range_spare  =====================
[20:16:40] [PASSED] 4
[20:16:40] [PASSED] 8
[20:16:40] [PASSED] 32
[20:16:40] [PASSED] 256
[20:16:40] ================ [PASSED] test_range_spare =================
[20:16:40] ===================== [PASSED] guc_dbm =====================
[20:16:40] =================== guc_idm (6 subtests) ===================
[20:16:40] [PASSED] bad_init
[20:16:40] [PASSED] no_init
[20:16:40] [PASSED] init_fini
[20:16:40] [PASSED] check_used
[20:16:40] [PASSED] check_quota
[20:16:40] [PASSED] check_all
[20:16:40] ===================== [PASSED] guc_idm =====================
[20:16:40] ================== no_relay (3 subtests) ===================
[20:16:40] [PASSED] xe_drops_guc2pf_if_not_ready
[20:16:40] [PASSED] xe_drops_guc2vf_if_not_ready
[20:16:40] [PASSED] xe_rejects_send_if_not_ready
[20:16:40] ==================== [PASSED] no_relay =====================
[20:16:40] ================== pf_relay (14 subtests) ==================
[20:16:40] [PASSED] pf_rejects_guc2pf_too_short
[20:16:40] [PASSED] pf_rejects_guc2pf_too_long
[20:16:40] [PASSED] pf_rejects_guc2pf_no_payload
[20:16:40] [PASSED] pf_fails_no_payload
[20:16:40] [PASSED] pf_fails_bad_origin
[20:16:40] [PASSED] pf_fails_bad_type
[20:16:40] [PASSED] pf_txn_reports_error
[20:16:40] [PASSED] pf_txn_sends_pf2guc
[20:16:40] [PASSED] pf_sends_pf2guc
[20:16:40] [SKIPPED] pf_loopback_nop
[20:16:40] [SKIPPED] pf_loopback_echo
[20:16:40] [SKIPPED] pf_loopback_fail
[20:16:40] [SKIPPED] pf_loopback_busy
[20:16:40] [SKIPPED] pf_loopback_retry
[20:16:40] ==================== [PASSED] pf_relay =====================
[20:16:40] ================== vf_relay (3 subtests) ===================
[20:16:40] [PASSED] vf_rejects_guc2vf_too_short
[20:16:40] [PASSED] vf_rejects_guc2vf_too_long
[20:16:40] [PASSED] vf_rejects_guc2vf_no_payload
[20:16:40] ==================== [PASSED] vf_relay =====================
[20:16:40] ================ pf_gt_config (6 subtests) =================
[20:16:40] [PASSED] fair_contexts_1vf
[20:16:40] [PASSED] fair_doorbells_1vf
[20:16:40] [PASSED] fair_ggtt_1vf
[20:16:40] ====================== fair_contexts  ======================
[20:16:40] [PASSED] 1 VF
[20:16:40] [PASSED] 2 VFs
[20:16:40] [PASSED] 3 VFs
[20:16:40] [PASSED] 4 VFs
[20:16:40] [PASSED] 5 VFs
[20:16:40] [PASSED] 6 VFs
[20:16:40] [PASSED] 7 VFs
[20:16:40] [PASSED] 8 VFs
[20:16:40] [PASSED] 9 VFs
[20:16:40] [PASSED] 10 VFs
[20:16:40] [PASSED] 11 VFs
[20:16:40] [PASSED] 12 VFs
[20:16:40] [PASSED] 13 VFs
[20:16:40] [PASSED] 14 VFs
[20:16:40] [PASSED] 15 VFs
[20:16:40] [PASSED] 16 VFs
[20:16:40] [PASSED] 17 VFs
[20:16:40] [PASSED] 18 VFs
[20:16:40] [PASSED] 19 VFs
[20:16:40] [PASSED] 20 VFs
[20:16:40] [PASSED] 21 VFs
[20:16:40] [PASSED] 22 VFs
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[20:16:40] [PASSED] 35 VFs
[20:16:40] [PASSED] 36 VFs
[20:16:40] [PASSED] 37 VFs
[20:16:40] [PASSED] 38 VFs
[20:16:40] [PASSED] 39 VFs
[20:16:40] [PASSED] 40 VFs
[20:16:40] [PASSED] 41 VFs
[20:16:40] [PASSED] 42 VFs
[20:16:40] [PASSED] 43 VFs
[20:16:40] [PASSED] 44 VFs
[20:16:40] [PASSED] 45 VFs
[20:16:40] [PASSED] 46 VFs
[20:16:40] [PASSED] 47 VFs
[20:16:40] [PASSED] 48 VFs
[20:16:40] [PASSED] 49 VFs
[20:16:40] [PASSED] 50 VFs
[20:16:40] [PASSED] 51 VFs
[20:16:40] [PASSED] 52 VFs
[20:16:40] [PASSED] 53 VFs
[20:16:40] [PASSED] 54 VFs
[20:16:40] [PASSED] 55 VFs
[20:16:40] [PASSED] 56 VFs
[20:16:40] [PASSED] 57 VFs
[20:16:40] [PASSED] 58 VFs
[20:16:40] [PASSED] 59 VFs
[20:16:40] [PASSED] 60 VFs
[20:16:40] [PASSED] 61 VFs
[20:16:40] [PASSED] 62 VFs
[20:16:40] [PASSED] 63 VFs
[20:16:40] ================== [PASSED] fair_contexts ==================
[20:16:40] ===================== fair_doorbells  ======================
[20:16:40] [PASSED] 1 VF
[20:16:40] [PASSED] 2 VFs
[20:16:40] [PASSED] 3 VFs
[20:16:40] [PASSED] 4 VFs
[20:16:40] [PASSED] 5 VFs
[20:16:40] [PASSED] 6 VFs
[20:16:40] [PASSED] 7 VFs
[20:16:40] [PASSED] 8 VFs
[20:16:40] [PASSED] 9 VFs
[20:16:40] [PASSED] 10 VFs
[20:16:40] [PASSED] 11 VFs
[20:16:40] [PASSED] 12 VFs
[20:16:40] [PASSED] 13 VFs
[20:16:40] [PASSED] 14 VFs
[20:16:40] [PASSED] 15 VFs
[20:16:40] [PASSED] 16 VFs
[20:16:40] [PASSED] 17 VFs
[20:16:40] [PASSED] 18 VFs
[20:16:40] [PASSED] 19 VFs
[20:16:40] [PASSED] 20 VFs
[20:16:40] [PASSED] 21 VFs
[20:16:40] [PASSED] 22 VFs
[20:16:40] [PASSED] 23 VFs
[20:16:40] [PASSED] 24 VFs
[20:16:40] [PASSED] 25 VFs
[20:16:40] [PASSED] 26 VFs
[20:16:40] [PASSED] 27 VFs
[20:16:40] [PASSED] 28 VFs
[20:16:40] [PASSED] 29 VFs
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[20:16:40] [PASSED] 32 VFs
[20:16:40] [PASSED] 33 VFs
[20:16:40] [PASSED] 34 VFs
[20:16:40] [PASSED] 35 VFs
[20:16:40] [PASSED] 36 VFs
[20:16:40] [PASSED] 37 VFs
[20:16:40] [PASSED] 38 VFs
[20:16:40] [PASSED] 39 VFs
[20:16:40] [PASSED] 40 VFs
[20:16:40] [PASSED] 41 VFs
[20:16:40] [PASSED] 42 VFs
[20:16:40] [PASSED] 43 VFs
[20:16:40] [PASSED] 44 VFs
[20:16:40] [PASSED] 45 VFs
[20:16:40] [PASSED] 46 VFs
[20:16:40] [PASSED] 47 VFs
[20:16:40] [PASSED] 48 VFs
[20:16:40] [PASSED] 49 VFs
[20:16:40] [PASSED] 50 VFs
[20:16:40] [PASSED] 51 VFs
[20:16:40] [PASSED] 52 VFs
[20:16:40] [PASSED] 53 VFs
[20:16:40] [PASSED] 54 VFs
[20:16:40] [PASSED] 55 VFs
[20:16:40] [PASSED] 56 VFs
[20:16:40] [PASSED] 57 VFs
[20:16:40] [PASSED] 58 VFs
[20:16:40] [PASSED] 59 VFs
[20:16:40] [PASSED] 60 VFs
[20:16:40] [PASSED] 61 VFs
[20:16:40] [PASSED] 62 VFs
[20:16:40] [PASSED] 63 VFs
[20:16:40] ================= [PASSED] fair_doorbells ==================
[20:16:40] ======================== fair_ggtt  ========================
[20:16:40] [PASSED] 1 VF
[20:16:40] [PASSED] 2 VFs
[20:16:40] [PASSED] 3 VFs
[20:16:40] [PASSED] 4 VFs
[20:16:40] [PASSED] 5 VFs
[20:16:40] [PASSED] 6 VFs
[20:16:40] [PASSED] 7 VFs
[20:16:40] [PASSED] 8 VFs
[20:16:40] [PASSED] 9 VFs
[20:16:40] [PASSED] 10 VFs
[20:16:40] [PASSED] 11 VFs
[20:16:40] [PASSED] 12 VFs
[20:16:40] [PASSED] 13 VFs
[20:16:40] [PASSED] 14 VFs
[20:16:40] [PASSED] 15 VFs
[20:16:40] [PASSED] 16 VFs
[20:16:40] [PASSED] 17 VFs
[20:16:40] [PASSED] 18 VFs
[20:16:40] [PASSED] 19 VFs
[20:16:40] [PASSED] 20 VFs
[20:16:40] [PASSED] 21 VFs
[20:16:40] [PASSED] 22 VFs
[20:16:40] [PASSED] 23 VFs
[20:16:40] [PASSED] 24 VFs
[20:16:40] [PASSED] 25 VFs
[20:16:40] [PASSED] 26 VFs
[20:16:40] [PASSED] 27 VFs
[20:16:40] [PASSED] 28 VFs
[20:16:40] [PASSED] 29 VFs
[20:16:40] [PASSED] 30 VFs
[20:16:40] [PASSED] 31 VFs
[20:16:40] [PASSED] 32 VFs
[20:16:40] [PASSED] 33 VFs
[20:16:40] [PASSED] 34 VFs
[20:16:40] [PASSED] 35 VFs
[20:16:40] [PASSED] 36 VFs
[20:16:40] [PASSED] 37 VFs
[20:16:40] [PASSED] 38 VFs
[20:16:40] [PASSED] 39 VFs
[20:16:40] [PASSED] 40 VFs
[20:16:40] [PASSED] 41 VFs
[20:16:40] [PASSED] 42 VFs
[20:16:40] [PASSED] 43 VFs
[20:16:40] [PASSED] 44 VFs
[20:16:40] [PASSED] 45 VFs
[20:16:40] [PASSED] 46 VFs
[20:16:40] [PASSED] 47 VFs
[20:16:40] [PASSED] 48 VFs
[20:16:40] [PASSED] 49 VFs
[20:16:40] [PASSED] 50 VFs
[20:16:40] [PASSED] 51 VFs
[20:16:40] [PASSED] 52 VFs
[20:16:40] [PASSED] 53 VFs
[20:16:40] [PASSED] 54 VFs
[20:16:40] [PASSED] 55 VFs
[20:16:40] [PASSED] 56 VFs
[20:16:40] [PASSED] 57 VFs
[20:16:40] [PASSED] 58 VFs
[20:16:40] [PASSED] 59 VFs
[20:16:40] [PASSED] 60 VFs
[20:16:40] [PASSED] 61 VFs
[20:16:40] [PASSED] 62 VFs
[20:16:40] [PASSED] 63 VFs
[20:16:40] ==================== [PASSED] fair_ggtt ====================
[20:16:40] ================== [PASSED] pf_gt_config ===================
[20:16:40] ===================== lmtt (1 subtest) =====================
[20:16:40] ======================== test_ops  =========================
[20:16:40] [PASSED] 2-level
[20:16:40] [PASSED] multi-level
[20:16:40] ==================== [PASSED] test_ops =====================
[20:16:40] ====================== [PASSED] lmtt =======================
[20:16:40] ================= pf_service (11 subtests) =================
[20:16:40] [PASSED] pf_negotiate_any
[20:16:40] [PASSED] pf_negotiate_base_match
[20:16:40] [PASSED] pf_negotiate_base_newer
[20:16:40] [PASSED] pf_negotiate_base_next
[20:16:40] [SKIPPED] pf_negotiate_base_older
[20:16:40] [PASSED] pf_negotiate_base_prev
[20:16:40] [PASSED] pf_negotiate_latest_match
[20:16:40] [PASSED] pf_negotiate_latest_newer
[20:16:40] [PASSED] pf_negotiate_latest_next
[20:16:40] [SKIPPED] pf_negotiate_latest_older
[20:16:40] [SKIPPED] pf_negotiate_latest_prev
[20:16:40] =================== [PASSED] pf_service ====================
[20:16:40] ================= xe_guc_g2g (2 subtests) ==================
[20:16:40] ============== xe_live_guc_g2g_kunit_default  ==============
[20:16:40] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[20:16:40] ============== xe_live_guc_g2g_kunit_allmem  ===============
[20:16:40] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[20:16:40] =================== [SKIPPED] xe_guc_g2g ===================
[20:16:40] =================== xe_mocs (2 subtests) ===================
[20:16:40] ================ xe_live_mocs_kernel_kunit  ================
[20:16:40] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:16:40] ================ xe_live_mocs_reset_kunit  =================
[20:16:40] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:16:40] ==================== [SKIPPED] xe_mocs =====================
[20:16:40] ================= xe_migrate (2 subtests) ==================
[20:16:40] ================= xe_migrate_sanity_kunit  =================
[20:16:40] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:16:40] ================== xe_validate_ccs_kunit  ==================
[20:16:40] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:16:40] =================== [SKIPPED] xe_migrate ===================
[20:16:40] ================== xe_dma_buf (1 subtest) ==================
[20:16:40] ==================== xe_dma_buf_kunit  =====================
[20:16:40] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:16:40] =================== [SKIPPED] xe_dma_buf ===================
[20:16:40] ================= xe_bo_shrink (1 subtest) =================
[20:16:40] =================== xe_bo_shrink_kunit  ====================
[20:16:40] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:16:40] ================== [SKIPPED] xe_bo_shrink ==================
[20:16:40] ==================== xe_bo (2 subtests) ====================
[20:16:40] ================== xe_ccs_migrate_kunit  ===================
[20:16:40] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:16:40] ==================== xe_bo_evict_kunit  ====================
[20:16:40] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:16:40] ===================== [SKIPPED] xe_bo ======================
[20:16:40] ==================== args (13 subtests) ====================
[20:16:40] [PASSED] count_args_test
[20:16:40] [PASSED] call_args_example
[20:16:40] [PASSED] call_args_test
[20:16:40] [PASSED] drop_first_arg_example
[20:16:40] [PASSED] drop_first_arg_test
[20:16:40] [PASSED] first_arg_example
[20:16:40] [PASSED] first_arg_test
[20:16:40] [PASSED] last_arg_example
[20:16:40] [PASSED] last_arg_test
[20:16:40] [PASSED] pick_arg_example
[20:16:40] [PASSED] if_args_example
[20:16:40] [PASSED] if_args_test
[20:16:40] [PASSED] sep_comma_example
[20:16:40] ====================== [PASSED] args =======================
[20:16:40] =================== xe_pci (3 subtests) ====================
[20:16:40] ==================== check_graphics_ip  ====================
[20:16:40] [PASSED] 12.00 Xe_LP
[20:16:40] [PASSED] 12.10 Xe_LP+
[20:16:40] [PASSED] 12.55 Xe_HPG
[20:16:40] [PASSED] 12.60 Xe_HPC
[20:16:40] [PASSED] 12.70 Xe_LPG
[20:16:40] [PASSED] 12.71 Xe_LPG
[20:16:40] [PASSED] 12.74 Xe_LPG+
[20:16:40] [PASSED] 20.01 Xe2_HPG
[20:16:40] [PASSED] 20.02 Xe2_HPG
[20:16:40] [PASSED] 20.04 Xe2_LPG
[20:16:40] [PASSED] 30.00 Xe3_LPG
[20:16:40] [PASSED] 30.01 Xe3_LPG
[20:16:40] [PASSED] 30.03 Xe3_LPG
[20:16:40] [PASSED] 30.04 Xe3_LPG
[20:16:40] [PASSED] 30.05 Xe3_LPG
[20:16:40] [PASSED] 35.11 Xe3p_XPC
[20:16:40] ================ [PASSED] check_graphics_ip ================
[20:16:40] ===================== check_media_ip  ======================
[20:16:40] [PASSED] 12.00 Xe_M
[20:16:40] [PASSED] 12.55 Xe_HPM
[20:16:40] [PASSED] 13.00 Xe_LPM+
[20:16:40] [PASSED] 13.01 Xe2_HPM
[20:16:40] [PASSED] 20.00 Xe2_LPM
[20:16:40] [PASSED] 30.00 Xe3_LPM
[20:16:40] [PASSED] 30.02 Xe3_LPM
[20:16:40] [PASSED] 35.00 Xe3p_LPM
[20:16:40] [PASSED] 35.03 Xe3p_HPM
[20:16:40] ================= [PASSED] check_media_ip ==================
[20:16:40] =================== check_platform_desc  ===================
[20:16:40] [PASSED] 0x9A60 (TIGERLAKE)
[20:16:40] [PASSED] 0x9A68 (TIGERLAKE)
[20:16:40] [PASSED] 0x9A70 (TIGERLAKE)
[20:16:40] [PASSED] 0x9A40 (TIGERLAKE)
[20:16:40] [PASSED] 0x9A49 (TIGERLAKE)
[20:16:40] [PASSED] 0x9A59 (TIGERLAKE)
[20:16:40] [PASSED] 0x9A78 (TIGERLAKE)
[20:16:40] [PASSED] 0x9AC0 (TIGERLAKE)
[20:16:40] [PASSED] 0x9AC9 (TIGERLAKE)
[20:16:40] [PASSED] 0x9AD9 (TIGERLAKE)
[20:16:40] [PASSED] 0x9AF8 (TIGERLAKE)
[20:16:40] [PASSED] 0x4C80 (ROCKETLAKE)
[20:16:40] [PASSED] 0x4C8A (ROCKETLAKE)
[20:16:40] [PASSED] 0x4C8B (ROCKETLAKE)
[20:16:40] [PASSED] 0x4C8C (ROCKETLAKE)
[20:16:40] [PASSED] 0x4C90 (ROCKETLAKE)
[20:16:40] [PASSED] 0x4C9A (ROCKETLAKE)
[20:16:40] [PASSED] 0x4680 (ALDERLAKE_S)
[20:16:40] [PASSED] 0x4682 (ALDERLAKE_S)
[20:16:40] [PASSED] 0x4688 (ALDERLAKE_S)
[20:16:40] [PASSED] 0x468A (ALDERLAKE_S)
[20:16:40] [PASSED] 0x468B (ALDERLAKE_S)
[20:16:40] [PASSED] 0x4690 (ALDERLAKE_S)
[20:16:40] [PASSED] 0x4692 (ALDERLAKE_S)
[20:16:40] [PASSED] 0x4693 (ALDERLAKE_S)
[20:16:40] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46AA (ALDERLAKE_P)
[20:16:40] [PASSED] 0x462A (ALDERLAKE_P)
[20:16:40] [PASSED] 0x4626 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[20:16:40] [PASSED] 0x46B0 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:16:40] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:16:40] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:16:40] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:16:40] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:16:40] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:16:40] [PASSED] 0xA721 (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA720 (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:16:40] [PASSED] 0xA780 (ALDERLAKE_S)
[20:16:40] [PASSED] 0xA781 (ALDERLAKE_S)
[20:16:40] [PASSED] 0xA782 (ALDERLAKE_S)
[20:16:40] [PASSED] 0xA783 (ALDERLAKE_S)
[20:16:40] [PASSED] 0xA788 (ALDERLAKE_S)
[20:16:40] [PASSED] 0xA789 (ALDERLAKE_S)
[20:16:40] [PASSED] 0xA78A (ALDERLAKE_S)
[20:16:40] [PASSED] 0xA78B (ALDERLAKE_S)
[20:16:40] [PASSED] 0x4905 (DG1)
[20:16:40] [PASSED] 0x4906 (DG1)
[20:16:40] [PASSED] 0x4907 (DG1)
[20:16:40] [PASSED] 0x4908 (DG1)
[20:16:40] [PASSED] 0x4909 (DG1)
[20:16:40] [PASSED] 0x56C0 (DG2)
[20:16:40] [PASSED] 0x56C2 (DG2)
[20:16:40] [PASSED] 0x56C1 (DG2)
[20:16:40] [PASSED] 0x7D51 (METEORLAKE)
[20:16:40] [PASSED] 0x7DD1 (METEORLAKE)
[20:16:40] [PASSED] 0x7D41 (METEORLAKE)
[20:16:40] [PASSED] 0x7D67 (METEORLAKE)
[20:16:40] [PASSED] 0xB640 (METEORLAKE)
[20:16:40] [PASSED] 0x56A0 (DG2)
[20:16:40] [PASSED] 0x56A1 (DG2)
[20:16:40] [PASSED] 0x56A2 (DG2)
[20:16:40] [PASSED] 0x56BE (DG2)
[20:16:40] [PASSED] 0x56BF (DG2)
[20:16:40] [PASSED] 0x5690 (DG2)
[20:16:40] [PASSED] 0x5691 (DG2)
[20:16:40] [PASSED] 0x5692 (DG2)
[20:16:40] [PASSED] 0x56A5 (DG2)
[20:16:40] [PASSED] 0x56A6 (DG2)
[20:16:40] [PASSED] 0x56B0 (DG2)
[20:16:40] [PASSED] 0x56B1 (DG2)
[20:16:40] [PASSED] 0x56BA (DG2)
[20:16:40] [PASSED] 0x56BB (DG2)
[20:16:40] [PASSED] 0x56BC (DG2)
[20:16:40] [PASSED] 0x56BD (DG2)
[20:16:40] [PASSED] 0x5693 (DG2)
[20:16:40] [PASSED] 0x5694 (DG2)
[20:16:40] [PASSED] 0x5695 (DG2)
[20:16:40] [PASSED] 0x56A3 (DG2)
[20:16:40] [PASSED] 0x56A4 (DG2)
[20:16:40] [PASSED] 0x56B2 (DG2)
[20:16:40] [PASSED] 0x56B3 (DG2)
[20:16:40] [PASSED] 0x5696 (DG2)
[20:16:40] [PASSED] 0x5697 (DG2)
[20:16:40] [PASSED] 0xB69 (PVC)
[20:16:40] [PASSED] 0xB6E (PVC)
[20:16:40] [PASSED] 0xBD4 (PVC)
[20:16:40] [PASSED] 0xBD5 (PVC)
[20:16:40] [PASSED] 0xBD6 (PVC)
[20:16:40] [PASSED] 0xBD7 (PVC)
[20:16:40] [PASSED] 0xBD8 (PVC)
[20:16:40] [PASSED] 0xBD9 (PVC)
[20:16:40] [PASSED] 0xBDA (PVC)
[20:16:40] [PASSED] 0xBDB (PVC)
[20:16:40] [PASSED] 0xBE0 (PVC)
[20:16:40] [PASSED] 0xBE1 (PVC)
[20:16:40] [PASSED] 0xBE5 (PVC)
[20:16:40] [PASSED] 0x7D40 (METEORLAKE)
[20:16:40] [PASSED] 0x7D45 (METEORLAKE)
[20:16:40] [PASSED] 0x7D55 (METEORLAKE)
[20:16:40] [PASSED] 0x7D60 (METEORLAKE)
[20:16:40] [PASSED] 0x7DD5 (METEORLAKE)
[20:16:40] [PASSED] 0x6420 (LUNARLAKE)
[20:16:40] [PASSED] 0x64A0 (LUNARLAKE)
[20:16:40] [PASSED] 0x64B0 (LUNARLAKE)
[20:16:40] [PASSED] 0xE202 (BATTLEMAGE)
[20:16:40] [PASSED] 0xE209 (BATTLEMAGE)
[20:16:40] [PASSED] 0xE20B (BATTLEMAGE)
[20:16:40] [PASSED] 0xE20C (BATTLEMAGE)
[20:16:40] [PASSED] 0xE20D (BATTLEMAGE)
[20:16:40] [PASSED] 0xE210 (BATTLEMAGE)
[20:16:40] [PASSED] 0xE211 (BATTLEMAGE)
[20:16:40] [PASSED] 0xE212 (BATTLEMAGE)
[20:16:40] [PASSED] 0xE216 (BATTLEMAGE)
[20:16:40] [PASSED] 0xE220 (BATTLEMAGE)
[20:16:40] [PASSED] 0xE221 (BATTLEMAGE)
[20:16:40] [PASSED] 0xE222 (BATTLEMAGE)
[20:16:40] [PASSED] 0xE223 (BATTLEMAGE)
[20:16:40] [PASSED] 0xB080 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB081 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB082 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB083 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB084 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB085 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB086 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB087 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB08F (PANTHERLAKE)
[20:16:40] [PASSED] 0xB090 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:16:40] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:16:40] [PASSED] 0xFD80 (PANTHERLAKE)
[20:16:40] [PASSED] 0xFD81 (PANTHERLAKE)
[20:16:40] [PASSED] 0xD740 (NOVALAKE_S)
[20:16:40] [PASSED] 0xD741 (NOVALAKE_S)
[20:16:40] [PASSED] 0xD742 (NOVALAKE_S)
[20:16:40] [PASSED] 0xD743 (NOVALAKE_S)
[20:16:40] [PASSED] 0xD744 (NOVALAKE_S)
[20:16:40] [PASSED] 0xD745 (NOVALAKE_S)
[20:16:40] [PASSED] 0x674C (CRESCENTISLAND)
[20:16:40] =============== [PASSED] check_platform_desc ===============
[20:16:40] ===================== [PASSED] xe_pci ======================
[20:16:40] =================== xe_rtp (2 subtests) ====================
[20:16:40] =============== xe_rtp_process_to_sr_tests  ================
[20:16:40] [PASSED] coalesce-same-reg
[20:16:40] [PASSED] no-match-no-add
[20:16:40] [PASSED] match-or
[20:16:40] [PASSED] match-or-xfail
[20:16:40] [PASSED] no-match-no-add-multiple-rules
[20:16:40] [PASSED] two-regs-two-entries
[20:16:40] [PASSED] clr-one-set-other
[20:16:40] [PASSED] set-field
[20:16:40] [PASSED] conflict-duplicate
[20:16:40] [PASSED] conflict-not-disjoint
[20:16:40] [PASSED] conflict-reg-type
[20:16:40] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:16:40] ================== xe_rtp_process_tests  ===================
[20:16:40] [PASSED] active1
[20:16:40] [PASSED] active2
[20:16:40] [PASSED] active-inactive
[20:16:40] [PASSED] inactive-active
[20:16:40] [PASSED] inactive-1st_or_active-inactive
[20:16:40] [PASSED] inactive-2nd_or_active-inactive
[20:16:40] [PASSED] inactive-last_or_active-inactive
[20:16:40] [PASSED] inactive-no_or_active-inactive
[20:16:40] ============== [PASSED] xe_rtp_process_tests ===============
[20:16:40] ===================== [PASSED] xe_rtp ======================
[20:16:40] ==================== xe_wa (1 subtest) =====================
[20:16:40] ======================== xe_wa_gt  =========================
[20:16:40] [PASSED] TIGERLAKE B0
[20:16:40] [PASSED] DG1 A0
[20:16:40] [PASSED] DG1 B0
[20:16:40] [PASSED] ALDERLAKE_S A0
[20:16:40] [PASSED] ALDERLAKE_S B0
[20:16:40] [PASSED] ALDERLAKE_S C0
[20:16:40] [PASSED] ALDERLAKE_S D0
[20:16:40] [PASSED] ALDERLAKE_P A0
[20:16:40] [PASSED] ALDERLAKE_P B0
[20:16:40] [PASSED] ALDERLAKE_P C0
[20:16:40] [PASSED] ALDERLAKE_S RPLS D0
[20:16:40] [PASSED] ALDERLAKE_P RPLU E0
[20:16:40] [PASSED] DG2 G10 C0
[20:16:40] [PASSED] DG2 G11 B1
[20:16:40] [PASSED] DG2 G12 A1
[20:16:40] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:16:40] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:16:40] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[20:16:40] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[20:16:40] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[20:16:40] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[20:16:40] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[20:16:40] ==================== [PASSED] xe_wa_gt =====================
[20:16:40] ====================== [PASSED] xe_wa ======================
[20:16:40] ============================================================
[20:16:40] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[20:16:40] Elapsed time: 36.325s total, 4.243s configuring, 31.612s building, 0.458s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:16:40] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:16:42] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:17:07] Starting KUnit Kernel (1/1)...
[20:17:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:17:07] ============ drm_test_pick_cmdline (2 subtests) ============
[20:17:07] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[20:17:07] =============== drm_test_pick_cmdline_named  ===============
[20:17:07] [PASSED] NTSC
[20:17:07] [PASSED] NTSC-J
[20:17:07] [PASSED] PAL
[20:17:07] [PASSED] PAL-M
[20:17:07] =========== [PASSED] drm_test_pick_cmdline_named ===========
[20:17:07] ============== [PASSED] drm_test_pick_cmdline ==============
[20:17:07] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:17:07] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:17:07] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:17:07] =========== drm_validate_clone_mode (2 subtests) ===========
[20:17:07] ============== drm_test_check_in_clone_mode  ===============
[20:17:07] [PASSED] in_clone_mode
[20:17:07] [PASSED] not_in_clone_mode
[20:17:07] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:17:07] =============== drm_test_check_valid_clones  ===============
[20:17:07] [PASSED] not_in_clone_mode
[20:17:07] [PASSED] valid_clone
[20:17:07] [PASSED] invalid_clone
[20:17:07] =========== [PASSED] drm_test_check_valid_clones ===========
[20:17:07] ============= [PASSED] drm_validate_clone_mode =============
[20:17:07] ============= drm_validate_modeset (1 subtest) =============
[20:17:07] [PASSED] drm_test_check_connector_changed_modeset
[20:17:07] ============== [PASSED] drm_validate_modeset ===============
[20:17:07] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:17:07] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:17:07] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:17:07] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:17:07] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:17:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:17:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:17:07] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:17:07] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:17:07] ============== drm_bridge_alloc (2 subtests) ===============
[20:17:07] [PASSED] drm_test_drm_bridge_alloc_basic
[20:17:07] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:17:07] ================ [PASSED] drm_bridge_alloc =================
[20:17:07] ================== drm_buddy (8 subtests) ==================
[20:17:07] [PASSED] drm_test_buddy_alloc_limit
[20:17:07] [PASSED] drm_test_buddy_alloc_optimistic
[20:17:07] [PASSED] drm_test_buddy_alloc_pessimistic
[20:17:07] [PASSED] drm_test_buddy_alloc_pathological
[20:17:07] [PASSED] drm_test_buddy_alloc_contiguous
[20:17:07] [PASSED] drm_test_buddy_alloc_clear
[20:17:07] [PASSED] drm_test_buddy_alloc_range_bias
[20:17:07] [PASSED] drm_test_buddy_fragmentation_performance
[20:17:07] ==================== [PASSED] drm_buddy ====================
[20:17:07] ============= drm_cmdline_parser (40 subtests) =============
[20:17:07] [PASSED] drm_test_cmdline_force_d_only
[20:17:07] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:17:07] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:17:07] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:17:07] [PASSED] drm_test_cmdline_force_e_only
[20:17:07] [PASSED] drm_test_cmdline_res
[20:17:07] [PASSED] drm_test_cmdline_res_vesa
[20:17:07] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:17:07] [PASSED] drm_test_cmdline_res_rblank
[20:17:07] [PASSED] drm_test_cmdline_res_bpp
[20:17:07] [PASSED] drm_test_cmdline_res_refresh
[20:17:07] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:17:07] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:17:07] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:17:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:17:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:17:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:17:07] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:17:07] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:17:07] [PASSED] drm_test_cmdline_res_margins_force_on
[20:17:07] [PASSED] drm_test_cmdline_res_vesa_margins
[20:17:07] [PASSED] drm_test_cmdline_name
[20:17:07] [PASSED] drm_test_cmdline_name_bpp
[20:17:07] [PASSED] drm_test_cmdline_name_option
[20:17:07] [PASSED] drm_test_cmdline_name_bpp_option
[20:17:07] [PASSED] drm_test_cmdline_rotate_0
[20:17:07] [PASSED] drm_test_cmdline_rotate_90
[20:17:07] [PASSED] drm_test_cmdline_rotate_180
[20:17:07] [PASSED] drm_test_cmdline_rotate_270
[20:17:07] [PASSED] drm_test_cmdline_hmirror
[20:17:07] [PASSED] drm_test_cmdline_vmirror
[20:17:07] [PASSED] drm_test_cmdline_margin_options
[20:17:07] [PASSED] drm_test_cmdline_multiple_options
[20:17:07] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:17:07] [PASSED] drm_test_cmdline_extra_and_option
[20:17:07] [PASSED] drm_test_cmdline_freestanding_options
[20:17:07] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:17:07] [PASSED] drm_test_cmdline_panel_orientation
[20:17:07] ================ drm_test_cmdline_invalid  =================
[20:17:07] [PASSED] margin_only
[20:17:07] [PASSED] interlace_only
[20:17:07] [PASSED] res_missing_x
[20:17:07] [PASSED] res_missing_y
[20:17:07] [PASSED] res_bad_y
[20:17:07] [PASSED] res_missing_y_bpp
[20:17:07] [PASSED] res_bad_bpp
[20:17:07] [PASSED] res_bad_refresh
[20:17:07] [PASSED] res_bpp_refresh_force_on_off
[20:17:07] [PASSED] res_invalid_mode
[20:17:07] [PASSED] res_bpp_wrong_place_mode
[20:17:07] [PASSED] name_bpp_refresh
[20:17:07] [PASSED] name_refresh
[20:17:07] [PASSED] name_refresh_wrong_mode
[20:17:07] [PASSED] name_refresh_invalid_mode
[20:17:07] [PASSED] rotate_multiple
[20:17:07] [PASSED] rotate_invalid_val
[20:17:07] [PASSED] rotate_truncated
[20:17:07] [PASSED] invalid_option
[20:17:07] [PASSED] invalid_tv_option
[20:17:07] [PASSED] truncated_tv_option
[20:17:07] ============ [PASSED] drm_test_cmdline_invalid =============
[20:17:07] =============== drm_test_cmdline_tv_options  ===============
[20:17:07] [PASSED] NTSC
[20:17:07] [PASSED] NTSC_443
[20:17:07] [PASSED] NTSC_J
[20:17:07] [PASSED] PAL
[20:17:07] [PASSED] PAL_M
[20:17:07] [PASSED] PAL_N
[20:17:07] [PASSED] SECAM
[20:17:07] [PASSED] MONO_525
[20:17:07] [PASSED] MONO_625
[20:17:07] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:17:07] =============== [PASSED] drm_cmdline_parser ================
[20:17:07] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:17:07] [PASSED] drm_test_connector_hdmi_init_valid
[20:17:07] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:17:07] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:17:07] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:17:07] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:17:07] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:17:07] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:17:07] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:17:07] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[20:17:07] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:17:07] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:17:07] [PASSED] supported_formats=0x3 yuv420_allowed=1
[20:17:07] [PASSED] supported_formats=0x3 yuv420_allowed=0
[20:17:07] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:17:07] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:17:07] [PASSED] drm_test_connector_hdmi_init_null_product
[20:17:07] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:17:07] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:17:07] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:17:07] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:17:07] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:17:07] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:17:07] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:17:07] ========= drm_test_connector_hdmi_init_type_valid  =========
[20:17:07] [PASSED] HDMI-A
[20:17:07] [PASSED] HDMI-B
[20:17:07] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:17:07] ======== drm_test_connector_hdmi_init_type_invalid  ========
[20:17:07] [PASSED] Unknown
[20:17:07] [PASSED] VGA
[20:17:07] [PASSED] DVI-I
[20:17:07] [PASSED] DVI-D
[20:17:07] [PASSED] DVI-A
[20:17:07] [PASSED] Composite
[20:17:07] [PASSED] SVIDEO
[20:17:07] [PASSED] LVDS
[20:17:07] [PASSED] Component
[20:17:07] [PASSED] DIN
[20:17:07] [PASSED] DP
[20:17:07] [PASSED] TV
[20:17:07] [PASSED] eDP
[20:17:07] [PASSED] Virtual
[20:17:07] [PASSED] DSI
[20:17:07] [PASSED] DPI
[20:17:07] [PASSED] Writeback
[20:17:07] [PASSED] SPI
[20:17:07] [PASSED] USB
[20:17:07] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:17:07] ============ [PASSED] drmm_connector_hdmi_init =============
[20:17:07] ============= drmm_connector_init (3 subtests) =============
[20:17:07] [PASSED] drm_test_drmm_connector_init
[20:17:07] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:17:07] ========= drm_test_drmm_connector_init_type_valid  =========
[20:17:07] [PASSED] Unknown
[20:17:07] [PASSED] VGA
[20:17:07] [PASSED] DVI-I
[20:17:07] [PASSED] DVI-D
[20:17:07] [PASSED] DVI-A
[20:17:07] [PASSED] Composite
[20:17:07] [PASSED] SVIDEO
[20:17:07] [PASSED] LVDS
[20:17:07] [PASSED] Component
[20:17:07] [PASSED] DIN
[20:17:07] [PASSED] DP
[20:17:07] [PASSED] HDMI-A
[20:17:07] [PASSED] HDMI-B
[20:17:07] [PASSED] TV
[20:17:07] [PASSED] eDP
[20:17:07] [PASSED] Virtual
[20:17:07] [PASSED] DSI
[20:17:07] [PASSED] DPI
[20:17:07] [PASSED] Writeback
[20:17:07] [PASSED] SPI
[20:17:07] [PASSED] USB
[20:17:07] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:17:07] =============== [PASSED] drmm_connector_init ===============
[20:17:07] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_init
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:17:07] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[20:17:07] [PASSED] Unknown
[20:17:07] [PASSED] VGA
[20:17:07] [PASSED] DVI-I
[20:17:07] [PASSED] DVI-D
[20:17:07] [PASSED] DVI-A
[20:17:07] [PASSED] Composite
[20:17:07] [PASSED] SVIDEO
[20:17:07] [PASSED] LVDS
[20:17:07] [PASSED] Component
[20:17:07] [PASSED] DIN
[20:17:07] [PASSED] DP
[20:17:07] [PASSED] HDMI-A
[20:17:07] [PASSED] HDMI-B
[20:17:07] [PASSED] TV
[20:17:07] [PASSED] eDP
[20:17:07] [PASSED] Virtual
[20:17:07] [PASSED] DSI
[20:17:07] [PASSED] DPI
[20:17:07] [PASSED] Writeback
[20:17:07] [PASSED] SPI
[20:17:07] [PASSED] USB
[20:17:07] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:17:07] ======== drm_test_drm_connector_dynamic_init_name  =========
[20:17:07] [PASSED] Unknown
[20:17:07] [PASSED] VGA
[20:17:07] [PASSED] DVI-I
[20:17:07] [PASSED] DVI-D
[20:17:07] [PASSED] DVI-A
[20:17:07] [PASSED] Composite
[20:17:07] [PASSED] SVIDEO
[20:17:07] [PASSED] LVDS
[20:17:07] [PASSED] Component
[20:17:07] [PASSED] DIN
[20:17:07] [PASSED] DP
[20:17:07] [PASSED] HDMI-A
[20:17:07] [PASSED] HDMI-B
[20:17:07] [PASSED] TV
[20:17:07] [PASSED] eDP
[20:17:07] [PASSED] Virtual
[20:17:07] [PASSED] DSI
[20:17:07] [PASSED] DPI
[20:17:07] [PASSED] Writeback
[20:17:07] [PASSED] SPI
[20:17:07] [PASSED] USB
[20:17:07] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:17:07] =========== [PASSED] drm_connector_dynamic_init ============
[20:17:07] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:17:07] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:17:07] ======= drm_connector_dynamic_register (7 subtests) ========
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:17:07] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:17:07] ========= [PASSED] drm_connector_dynamic_register ==========
[20:17:07] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:17:07] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:17:07] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:17:07] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:17:07] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:17:07] ========== drm_test_get_tv_mode_from_name_valid  ===========
[20:17:07] [PASSED] NTSC
[20:17:07] [PASSED] NTSC-443
[20:17:07] [PASSED] NTSC-J
[20:17:07] [PASSED] PAL
[20:17:07] [PASSED] PAL-M
[20:17:07] [PASSED] PAL-N
[20:17:07] [PASSED] SECAM
[20:17:07] [PASSED] Mono
[20:17:07] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:17:07] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:17:07] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:17:07] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:17:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:17:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:17:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:17:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:17:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:17:07] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:17:07] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[20:17:07] [PASSED] VIC 96
[20:17:07] [PASSED] VIC 97
[20:17:07] [PASSED] VIC 101
[20:17:07] [PASSED] VIC 102
[20:17:07] [PASSED] VIC 106
[20:17:07] [PASSED] VIC 107
[20:17:07] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:17:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:17:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:17:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:17:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:17:07] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:17:07] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:17:07] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:17:07] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[20:17:07] [PASSED] Automatic
[20:17:07] [PASSED] Full
[20:17:07] [PASSED] Limited 16:235
[20:17:07] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:17:07] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:17:07] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:17:07] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:17:07] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[20:17:07] [PASSED] RGB
[20:17:07] [PASSED] YUV 4:2:0
[20:17:07] [PASSED] YUV 4:2:2
[20:17:07] [PASSED] YUV 4:4:4
[20:17:07] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:17:07] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:17:07] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:17:07] ============= drm_damage_helper (21 subtests) ==============
[20:17:07] [PASSED] drm_test_damage_iter_no_damage
[20:17:07] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:17:07] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:17:07] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:17:07] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:17:07] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:17:07] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:17:07] [PASSED] drm_test_damage_iter_simple_damage
[20:17:07] [PASSED] drm_test_damage_iter_single_damage
[20:17:07] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:17:07] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:17:07] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:17:07] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:17:07] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:17:07] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:17:07] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:17:07] [PASSED] drm_test_damage_iter_damage
[20:17:07] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:17:07] [PASSED] drm_test_damage_iter_damage_one_outside
[20:17:07] [PASSED] drm_test_damage_iter_damage_src_moved
[20:17:07] [PASSED] drm_test_damage_iter_damage_not_visible
[20:17:07] ================ [PASSED] drm_damage_helper ================
[20:17:07] ============== drm_dp_mst_helper (3 subtests) ==============
[20:17:07] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[20:17:07] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:17:07] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:17:07] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:17:07] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:17:07] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:17:07] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:17:07] ============== drm_test_dp_mst_calc_pbn_div  ===============
[20:17:07] [PASSED] Link rate 2000000 lane count 4
[20:17:07] [PASSED] Link rate 2000000 lane count 2
[20:17:07] [PASSED] Link rate 2000000 lane count 1
[20:17:07] [PASSED] Link rate 1350000 lane count 4
[20:17:07] [PASSED] Link rate 1350000 lane count 2
[20:17:07] [PASSED] Link rate 1350000 lane count 1
[20:17:07] [PASSED] Link rate 1000000 lane count 4
[20:17:07] [PASSED] Link rate 1000000 lane count 2
[20:17:07] [PASSED] Link rate 1000000 lane count 1
[20:17:07] [PASSED] Link rate 810000 lane count 4
[20:17:07] [PASSED] Link rate 810000 lane count 2
[20:17:07] [PASSED] Link rate 810000 lane count 1
[20:17:07] [PASSED] Link rate 540000 lane count 4
[20:17:07] [PASSED] Link rate 540000 lane count 2
[20:17:07] [PASSED] Link rate 540000 lane count 1
[20:17:07] [PASSED] Link rate 270000 lane count 4
[20:17:07] [PASSED] Link rate 270000 lane count 2
[20:17:07] [PASSED] Link rate 270000 lane count 1
[20:17:07] [PASSED] Link rate 162000 lane count 4
[20:17:07] [PASSED] Link rate 162000 lane count 2
[20:17:07] [PASSED] Link rate 162000 lane count 1
[20:17:07] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:17:07] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[20:17:07] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:17:07] [PASSED] DP_POWER_UP_PHY with port number
[20:17:07] [PASSED] DP_POWER_DOWN_PHY with port number
[20:17:07] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:17:07] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:17:07] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:17:07] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:17:07] [PASSED] DP_QUERY_PAYLOAD with port number
[20:17:07] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:17:07] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:17:07] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:17:07] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:17:07] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:17:07] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:17:07] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:17:07] [PASSED] DP_REMOTE_I2C_READ with port number
[20:17:07] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:17:07] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:17:07] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:17:07] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:17:07] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:17:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:17:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:17:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:17:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:17:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:17:07] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:17:07] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:17:07] ================ [PASSED] drm_dp_mst_helper ================
[20:17:07] ================== drm_exec (7 subtests) ===================
[20:17:07] [PASSED] sanitycheck
[20:17:07] [PASSED] test_lock
[20:17:07] [PASSED] test_lock_unlock
[20:17:07] [PASSED] test_duplicates
[20:17:07] [PASSED] test_prepare
[20:17:07] [PASSED] test_prepare_array
[20:17:07] [PASSED] test_multiple_loops
[20:17:07] ==================== [PASSED] drm_exec =====================
[20:17:07] =========== drm_format_helper_test (17 subtests) ===========
[20:17:07] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:17:07] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:17:07] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:17:07] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:17:07] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:17:07] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:17:07] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:17:07] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:17:07] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:17:07] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:17:07] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:17:07] ============== drm_test_fb_xrgb8888_to_mono  ===============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:17:07] ==================== drm_test_fb_swab  =====================
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ================ [PASSED] drm_test_fb_swab =================
[20:17:07] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:17:07] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[20:17:07] [PASSED] single_pixel_source_buffer
[20:17:07] [PASSED] single_pixel_clip_rectangle
[20:17:07] [PASSED] well_known_colors
[20:17:07] [PASSED] destination_pitch
[20:17:07] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:17:07] ================= drm_test_fb_clip_offset  =================
[20:17:07] [PASSED] pass through
[20:17:07] [PASSED] horizontal offset
[20:17:07] [PASSED] vertical offset
[20:17:07] [PASSED] horizontal and vertical offset
[20:17:07] [PASSED] horizontal offset (custom pitch)
[20:17:07] [PASSED] vertical offset (custom pitch)
[20:17:07] [PASSED] horizontal and vertical offset (custom pitch)
[20:17:07] ============= [PASSED] drm_test_fb_clip_offset =============
[20:17:07] =================== drm_test_fb_memcpy  ====================
[20:17:07] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:17:07] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:17:07] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:17:07] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:17:07] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:17:07] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:17:07] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:17:07] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:17:07] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:17:07] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:17:07] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:17:07] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:17:07] =============== [PASSED] drm_test_fb_memcpy ================
[20:17:07] ============= [PASSED] drm_format_helper_test ==============
[20:17:07] ================= drm_format (18 subtests) =================
[20:17:07] [PASSED] drm_test_format_block_width_invalid
[20:17:07] [PASSED] drm_test_format_block_width_one_plane
[20:17:07] [PASSED] drm_test_format_block_width_two_plane
[20:17:07] [PASSED] drm_test_format_block_width_three_plane
[20:17:07] [PASSED] drm_test_format_block_width_tiled
[20:17:07] [PASSED] drm_test_format_block_height_invalid
[20:17:07] [PASSED] drm_test_format_block_height_one_plane
[20:17:07] [PASSED] drm_test_format_block_height_two_plane
[20:17:07] [PASSED] drm_test_format_block_height_three_plane
[20:17:07] [PASSED] drm_test_format_block_height_tiled
[20:17:07] [PASSED] drm_test_format_min_pitch_invalid
[20:17:07] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:17:07] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:17:07] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:17:07] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:17:07] [PASSED] drm_test_format_min_pitch_two_plane
[20:17:07] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:17:07] [PASSED] drm_test_format_min_pitch_tiled
[20:17:07] =================== [PASSED] drm_format ====================
[20:17:07] ============== drm_framebuffer (10 subtests) ===============
[20:17:07] ========== drm_test_framebuffer_check_src_coords  ==========
[20:17:07] [PASSED] Success: source fits into fb
[20:17:07] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:17:07] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:17:07] [PASSED] Fail: overflowing fb with source width
[20:17:07] [PASSED] Fail: overflowing fb with source height
[20:17:07] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:17:07] [PASSED] drm_test_framebuffer_cleanup
[20:17:07] =============== drm_test_framebuffer_create  ===============
[20:17:07] [PASSED] ABGR8888 normal sizes
[20:17:07] [PASSED] ABGR8888 max sizes
[20:17:07] [PASSED] ABGR8888 pitch greater than min required
[20:17:07] [PASSED] ABGR8888 pitch less than min required
[20:17:07] [PASSED] ABGR8888 Invalid width
[20:17:07] [PASSED] ABGR8888 Invalid buffer handle
[20:17:07] [PASSED] No pixel format
[20:17:07] [PASSED] ABGR8888 Width 0
[20:17:07] [PASSED] ABGR8888 Height 0
[20:17:07] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:17:07] [PASSED] ABGR8888 Large buffer offset
[20:17:07] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:17:07] [PASSED] ABGR8888 Invalid flag
[20:17:07] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:17:07] [PASSED] ABGR8888 Valid buffer modifier
[20:17:07] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:17:07] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:17:07] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:17:07] [PASSED] NV12 Normal sizes
[20:17:07] [PASSED] NV12 Max sizes
[20:17:07] [PASSED] NV12 Invalid pitch
[20:17:07] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:17:07] [PASSED] NV12 different  modifier per-plane
[20:17:07] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:17:07] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:17:07] [PASSED] NV12 Modifier for inexistent plane
[20:17:07] [PASSED] NV12 Handle for inexistent plane
[20:17:07] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:17:07] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:17:07] [PASSED] YVU420 Normal sizes
[20:17:07] [PASSED] YVU420 Max sizes
[20:17:07] [PASSED] YVU420 Invalid pitch
[20:17:07] [PASSED] YVU420 Different pitches
[20:17:07] [PASSED] YVU420 Different buffer offsets/pitches
[20:17:07] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:17:07] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:17:07] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:17:07] [PASSED] YVU420 Valid modifier
[20:17:07] [PASSED] YVU420 Different modifiers per plane
[20:17:07] [PASSED] YVU420 Modifier for inexistent plane
[20:17:07] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:17:07] [PASSED] X0L2 Normal sizes
[20:17:07] [PASSED] X0L2 Max sizes
[20:17:07] [PASSED] X0L2 Invalid pitch
[20:17:07] [PASSED] X0L2 Pitch greater than minimum required
[20:17:07] [PASSED] X0L2 Handle for inexistent plane
[20:17:07] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:17:07] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:17:07] [PASSED] X0L2 Valid modifier
[20:17:07] [PASSED] X0L2 Modifier for inexistent plane
[20:17:07] =========== [PASSED] drm_test_framebuffer_create ===========
[20:17:07] [PASSED] drm_test_framebuffer_free
[20:17:07] [PASSED] drm_test_framebuffer_init
[20:17:07] [PASSED] drm_test_framebuffer_init_bad_format
[20:17:07] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:17:07] [PASSED] drm_test_framebuffer_lookup
[20:17:07] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:17:07] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:17:07] ================= [PASSED] drm_framebuffer =================
[20:17:07] ================ drm_gem_shmem (8 subtests) ================
[20:17:07] [PASSED] drm_gem_shmem_test_obj_create
[20:17:07] [PASSED] drm_gem_shmem_test_obj_create_private
[20:17:07] [PASSED] drm_gem_shmem_test_pin_pages
[20:17:07] [PASSED] drm_gem_shmem_test_vmap
[20:17:07] [PASSED] drm_gem_shmem_test_get_sg_table
[20:17:07] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:17:07] [PASSED] drm_gem_shmem_test_madvise
[20:17:07] [PASSED] drm_gem_shmem_test_purge
[20:17:07] ================== [PASSED] drm_gem_shmem ==================
[20:17:07] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:17:07] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:17:07] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:17:07] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:17:07] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:17:07] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:17:07] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:17:07] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[20:17:07] [PASSED] Automatic
[20:17:07] [PASSED] Full
[20:17:07] [PASSED] Limited 16:235
[20:17:07] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:17:07] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:17:07] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:17:07] [PASSED] drm_test_check_disable_connector
[20:17:07] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:17:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:17:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:17:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:17:07] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:17:07] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:17:07] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:17:07] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:17:07] [PASSED] drm_test_check_output_bpc_dvi
[20:17:07] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:17:07] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:17:07] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:17:07] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:17:07] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:17:07] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:17:07] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:17:07] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:17:07] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:17:07] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:17:07] [PASSED] drm_test_check_broadcast_rgb_value
[20:17:07] [PASSED] drm_test_check_bpc_8_value
[20:17:07] [PASSED] drm_test_check_bpc_10_value
[20:17:07] [PASSED] drm_test_check_bpc_12_value
[20:17:07] [PASSED] drm_test_check_format_value
[20:17:07] [PASSED] drm_test_check_tmds_char_value
[20:17:07] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:17:07] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:17:07] [PASSED] drm_test_check_mode_valid
[20:17:07] [PASSED] drm_test_check_mode_valid_reject
[20:17:07] [PASSED] drm_test_check_mode_valid_reject_rate
[20:17:07] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:17:07] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:17:07] ================= drm_managed (2 subtests) =================
[20:17:07] [PASSED] drm_test_managed_release_action
[20:17:07] [PASSED] drm_test_managed_run_action
[20:17:07] =================== [PASSED] drm_managed ===================
[20:17:07] =================== drm_mm (6 subtests) ====================
[20:17:07] [PASSED] drm_test_mm_init
[20:17:07] [PASSED] drm_test_mm_debug
[20:17:07] [PASSED] drm_test_mm_align32
[20:17:07] [PASSED] drm_test_mm_align64
[20:17:07] [PASSED] drm_test_mm_lowest
[20:17:07] [PASSED] drm_test_mm_highest
[20:17:07] ===================== [PASSED] drm_mm ======================
[20:17:07] ============= drm_modes_analog_tv (5 subtests) =============
[20:17:07] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:17:07] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:17:07] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:17:07] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:17:07] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:17:07] =============== [PASSED] drm_modes_analog_tv ===============
[20:17:07] ============== drm_plane_helper (2 subtests) ===============
[20:17:07] =============== drm_test_check_plane_state  ================
[20:17:07] [PASSED] clipping_simple
[20:17:07] [PASSED] clipping_rotate_reflect
[20:17:07] [PASSED] positioning_simple
[20:17:07] [PASSED] upscaling
[20:17:07] [PASSED] downscaling
[20:17:07] [PASSED] rounding1
[20:17:07] [PASSED] rounding2
[20:17:07] [PASSED] rounding3
[20:17:07] [PASSED] rounding4
[20:17:07] =========== [PASSED] drm_test_check_plane_state ============
[20:17:07] =========== drm_test_check_invalid_plane_state  ============
[20:17:07] [PASSED] positioning_invalid
[20:17:07] [PASSED] upscaling_invalid
[20:17:07] [PASSED] downscaling_invalid
[20:17:07] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:17:07] ================ [PASSED] drm_plane_helper =================
[20:17:07] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:17:07] ====== drm_test_connector_helper_tv_get_modes_check  =======
[20:17:07] [PASSED] None
[20:17:07] [PASSED] PAL
[20:17:07] [PASSED] NTSC
[20:17:07] [PASSED] Both, NTSC Default
[20:17:07] [PASSED] Both, PAL Default
[20:17:07] [PASSED] Both, NTSC Default, with PAL on command-line
[20:17:07] [PASSED] Both, PAL Default, with NTSC on command-line
[20:17:07] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:17:07] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:17:07] ================== drm_rect (9 subtests) ===================
[20:17:07] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:17:07] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:17:07] [PASSED] drm_test_rect_clip_scaled_clipped
[20:17:07] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:17:07] ================= drm_test_rect_intersect  =================
[20:17:07] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:17:07] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:17:07] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:17:07] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:17:07] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:17:07] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:17:07] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:17:07] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:17:07] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:17:07] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:17:07] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:17:07] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:17:07] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:17:07] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:17:07] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:17:07] ============= [PASSED] drm_test_rect_intersect =============
[20:17:07] ================ drm_test_rect_calc_hscale  ================
[20:17:07] [PASSED] normal use
[20:17:07] [PASSED] out of max range
[20:17:07] [PASSED] out of min range
[20:17:07] [PASSED] zero dst
[20:17:07] [PASSED] negative src
[20:17:07] [PASSED] negative dst
[20:17:07] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:17:07] ================ drm_test_rect_calc_vscale  ================
[20:17:07] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[20:17:07] [PASSED] out of max range
[20:17:07] [PASSED] out of min range
[20:17:07] [PASSED] zero dst
[20:17:07] [PASSED] negative src
[20:17:07] [PASSED] negative dst
[20:17:07] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:17:07] ================== drm_test_rect_rotate  ===================
[20:17:07] [PASSED] reflect-x
[20:17:07] [PASSED] reflect-y
[20:17:07] [PASSED] rotate-0
[20:17:07] [PASSED] rotate-90
[20:17:07] [PASSED] rotate-180
[20:17:07] [PASSED] rotate-270
[20:17:07] ============== [PASSED] drm_test_rect_rotate ===============
[20:17:07] ================ drm_test_rect_rotate_inv  =================
[20:17:07] [PASSED] reflect-x
[20:17:07] [PASSED] reflect-y
[20:17:07] [PASSED] rotate-0
[20:17:07] [PASSED] rotate-90
[20:17:07] [PASSED] rotate-180
[20:17:07] [PASSED] rotate-270
[20:17:07] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:17:07] ==================== [PASSED] drm_rect =====================
[20:17:07] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:17:07] ============ drm_test_sysfb_build_fourcc_list  =============
[20:17:07] [PASSED] no native formats
[20:17:07] [PASSED] XRGB8888 as native format
[20:17:07] [PASSED] remove duplicates
[20:17:07] [PASSED] convert alpha formats
[20:17:07] [PASSED] random formats
[20:17:07] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:17:07] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:17:07] ================== drm_fixp (2 subtests) ===================
[20:17:07] [PASSED] drm_test_int2fixp
[20:17:07] [PASSED] drm_test_sm2fixp
[20:17:07] ==================== [PASSED] drm_fixp =====================
[20:17:07] ============================================================
[20:17:07] Testing complete. Ran 624 tests: passed: 624
[20:17:07] Elapsed time: 27.606s total, 1.644s configuring, 25.544s building, 0.375s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:17:08] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:17:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:17:19] Starting KUnit Kernel (1/1)...
[20:17:19] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:17:19] ================= ttm_device (5 subtests) ==================
[20:17:19] [PASSED] ttm_device_init_basic
[20:17:19] [PASSED] ttm_device_init_multiple
[20:17:19] [PASSED] ttm_device_fini_basic
[20:17:19] [PASSED] ttm_device_init_no_vma_man
[20:17:19] ================== ttm_device_init_pools  ==================
[20:17:19] [PASSED] No DMA allocations, no DMA32 required
[20:17:19] [PASSED] DMA allocations, DMA32 required
[20:17:19] [PASSED] No DMA allocations, DMA32 required
[20:17:19] [PASSED] DMA allocations, no DMA32 required
[20:17:19] ============== [PASSED] ttm_device_init_pools ==============
[20:17:19] =================== [PASSED] ttm_device ====================
[20:17:19] ================== ttm_pool (8 subtests) ===================
[20:17:19] ================== ttm_pool_alloc_basic  ===================
[20:17:19] [PASSED] One page
[20:17:19] [PASSED] More than one page
[20:17:19] [PASSED] Above the allocation limit
[20:17:19] [PASSED] One page, with coherent DMA mappings enabled
[20:17:19] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:17:19] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:17:19] ============== ttm_pool_alloc_basic_dma_addr  ==============
[20:17:19] [PASSED] One page
[20:17:19] [PASSED] More than one page
[20:17:19] [PASSED] Above the allocation limit
[20:17:19] [PASSED] One page, with coherent DMA mappings enabled
[20:17:19] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:17:19] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:17:19] [PASSED] ttm_pool_alloc_order_caching_match
[20:17:19] [PASSED] ttm_pool_alloc_caching_mismatch
[20:17:19] [PASSED] ttm_pool_alloc_order_mismatch
[20:17:19] [PASSED] ttm_pool_free_dma_alloc
[20:17:19] [PASSED] ttm_pool_free_no_dma_alloc
[20:17:19] [PASSED] ttm_pool_fini_basic
[20:17:19] ==================== [PASSED] ttm_pool =====================
[20:17:19] ================ ttm_resource (8 subtests) =================
[20:17:19] ================= ttm_resource_init_basic  =================
[20:17:19] [PASSED] Init resource in TTM_PL_SYSTEM
[20:17:19] [PASSED] Init resource in TTM_PL_VRAM
[20:17:19] [PASSED] Init resource in a private placement
[20:17:19] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:17:19] ============= [PASSED] ttm_resource_init_basic =============
[20:17:19] [PASSED] ttm_resource_init_pinned
[20:17:19] [PASSED] ttm_resource_fini_basic
[20:17:19] [PASSED] ttm_resource_manager_init_basic
[20:17:19] [PASSED] ttm_resource_manager_usage_basic
[20:17:19] [PASSED] ttm_resource_manager_set_used_basic
[20:17:19] [PASSED] ttm_sys_man_alloc_basic
[20:17:19] [PASSED] ttm_sys_man_free_basic
[20:17:19] ================== [PASSED] ttm_resource ===================
[20:17:19] =================== ttm_tt (15 subtests) ===================
[20:17:19] ==================== ttm_tt_init_basic  ====================
[20:17:19] [PASSED] Page-aligned size
[20:17:19] [PASSED] Extra pages requested
[20:17:19] ================ [PASSED] ttm_tt_init_basic ================
[20:17:19] [PASSED] ttm_tt_init_misaligned
[20:17:19] [PASSED] ttm_tt_fini_basic
[20:17:19] [PASSED] ttm_tt_fini_sg
[20:17:19] [PASSED] ttm_tt_fini_shmem
[20:17:19] [PASSED] ttm_tt_create_basic
[20:17:19] [PASSED] ttm_tt_create_invalid_bo_type
[20:17:19] [PASSED] ttm_tt_create_ttm_exists
[20:17:19] [PASSED] ttm_tt_create_failed
[20:17:19] [PASSED] ttm_tt_destroy_basic
[20:17:19] [PASSED] ttm_tt_populate_null_ttm
[20:17:19] [PASSED] ttm_tt_populate_populated_ttm
[20:17:19] [PASSED] ttm_tt_unpopulate_basic
[20:17:19] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:17:19] [PASSED] ttm_tt_swapin_basic
[20:17:19] ===================== [PASSED] ttm_tt ======================
[20:17:19] =================== ttm_bo (14 subtests) ===================
[20:17:19] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[20:17:19] [PASSED] Cannot be interrupted and sleeps
[20:17:19] [PASSED] Cannot be interrupted, locks straight away
[20:17:19] [PASSED] Can be interrupted, sleeps
[20:17:19] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:17:19] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:17:19] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:17:19] [PASSED] ttm_bo_reserve_double_resv
[20:17:19] [PASSED] ttm_bo_reserve_interrupted
[20:17:19] [PASSED] ttm_bo_reserve_deadlock
[20:17:19] [PASSED] ttm_bo_unreserve_basic
[20:17:19] [PASSED] ttm_bo_unreserve_pinned
[20:17:19] [PASSED] ttm_bo_unreserve_bulk
[20:17:19] [PASSED] ttm_bo_fini_basic
[20:17:19] [PASSED] ttm_bo_fini_shared_resv
[20:17:19] [PASSED] ttm_bo_pin_basic
[20:17:19] [PASSED] ttm_bo_pin_unpin_resource
[20:17:19] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:17:19] ===================== [PASSED] ttm_bo ======================
[20:17:19] ============== ttm_bo_validate (21 subtests) ===============
[20:17:19] ============== ttm_bo_init_reserved_sys_man  ===============
[20:17:19] [PASSED] Buffer object for userspace
[20:17:19] [PASSED] Kernel buffer object
[20:17:19] [PASSED] Shared buffer object
[20:17:19] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:17:19] ============== ttm_bo_init_reserved_mock_man  ==============
[20:17:19] [PASSED] Buffer object for userspace
[20:17:19] [PASSED] Kernel buffer object
[20:17:19] [PASSED] Shared buffer object
[20:17:19] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:17:19] [PASSED] ttm_bo_init_reserved_resv
[20:17:19] ================== ttm_bo_validate_basic  ==================
[20:17:19] [PASSED] Buffer object for userspace
[20:17:19] [PASSED] Kernel buffer object
[20:17:19] [PASSED] Shared buffer object
[20:17:19] ============== [PASSED] ttm_bo_validate_basic ==============
[20:17:19] [PASSED] ttm_bo_validate_invalid_placement
[20:17:19] ============= ttm_bo_validate_same_placement  ==============
[20:17:19] [PASSED] System manager
[20:17:19] [PASSED] VRAM manager
[20:17:19] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:17:19] [PASSED] ttm_bo_validate_failed_alloc
[20:17:19] [PASSED] ttm_bo_validate_pinned
[20:17:19] [PASSED] ttm_bo_validate_busy_placement
[20:17:19] ================ ttm_bo_validate_multihop  =================
[20:17:19] [PASSED] Buffer object for userspace
[20:17:19] [PASSED] Kernel buffer object
[20:17:19] [PASSED] Shared buffer object
[20:17:19] ============ [PASSED] ttm_bo_validate_multihop =============
[20:17:19] ========== ttm_bo_validate_no_placement_signaled  ==========
[20:17:19] [PASSED] Buffer object in system domain, no page vector
[20:17:19] [PASSED] Buffer object in system domain with an existing page vector
[20:17:19] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:17:19] ======== ttm_bo_validate_no_placement_not_signaled  ========
[20:17:19] [PASSED] Buffer object for userspace
[20:17:19] [PASSED] Kernel buffer object
[20:17:19] [PASSED] Shared buffer object
[20:17:19] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:17:19] [PASSED] ttm_bo_validate_move_fence_signaled
[20:17:19] ========= ttm_bo_validate_move_fence_not_signaled  =========
[20:17:19] [PASSED] Waits for GPU
[20:17:19] [PASSED] Tries to lock straight away
[20:17:19] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:17:19] [PASSED] ttm_bo_validate_happy_evict
[20:17:19] [PASSED] ttm_bo_validate_all_pinned_evict
[20:17:19] [PASSED] ttm_bo_validate_allowed_only_evict
[20:17:19] [PASSED] ttm_bo_validate_deleted_evict
[20:17:19] [PASSED] ttm_bo_validate_busy_domain_evict
[20:17:19] [PASSED] ttm_bo_validate_evict_gutting
[20:17:19] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[20:17:19] ================= [PASSED] ttm_bo_validate =================
[20:17:19] ============================================================
[20:17:19] Testing complete. Ran 101 tests: passed: 101
[20:17:19] Elapsed time: 11.269s total, 1.698s configuring, 9.355s building, 0.179s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe/hwmon: Expose new temperature attributes (rev7)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1466 bytes --]

== Series Details ==

Series: drm/xe/hwmon: Expose new temperature attributes (rev7)
URL   : https://patchwork.freedesktop.org/series/158384/
State : success

== Summary ==

CI Bug Log - changes from xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e_BAT -> xe-pw-158384v7_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-158384v7_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [FAIL][1] ([Intel XE#6519]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/bat-dg2-oem2/igt@xe_waitfence@engine.html

  
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519


Build changes
-------------

  * IGT: IGT_8693 -> IGT_8694
  * Linux: xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e -> xe-pw-158384v7

  IGT_8693: 8693
  IGT_8694: 8694
  xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e: 440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e
  xe-pw-158384v7: 158384v7

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/index.html

[-- Attachment #2: Type: text/html, Size: 2045 bytes --]

✓ Xe.CI.Full: success for drm/xe/hwmon: Expose new temperature attributes (rev7)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 41693 bytes --]

== Series Details ==

Series: drm/xe/hwmon: Expose new temperature attributes (rev7)
URL   : https://patchwork.freedesktop.org/series/158384/
State : success

== Summary ==

CI Bug Log - changes from xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e_FULL -> xe-pw-158384v7_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-158384v7_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear:
    - shard-lnl:          [PASS][1] -> [FAIL][2] ([Intel XE#5993]) +3 other tests fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-2/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
    - shard-lnl:          [PASS][3] -> [FAIL][4] ([Intel XE#6054]) +3 other tests fail
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-lnl-2/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-4/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2327]) +6 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#1407])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-2/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#1124]) +16 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2328])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#1124])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-8/igt@kms_big_fb@yf-tiled-32bpp-rotate-270.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#2191])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-1/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html

  * igt@kms_bw@linear-tiling-1-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#367]) +2 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-1920x1080p:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#367])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-1/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#3432])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#3432]) +3 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2887]) +25 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#2887]) +2 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-4/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs.html

  * igt@kms_chamelium_color@ctm-0-25:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2325]) +2 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_chamelium_color@ctm-0-25.html

  * igt@kms_chamelium_color@ctm-green-to-red:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#306])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-1/igt@kms_chamelium_color@ctm-green-to-red.html

  * igt@kms_chamelium_frames@hdmi-aspect-ratio:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2252]) +15 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_chamelium_frames@hdmi-aspect-ratio.html

  * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#373]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-3/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][22] ([Intel XE#1178] / [Intel XE#3304]) +1 other test fail
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html

  * igt@kms_content_protection@atomic-hdcp14:
    - shard-bmg:          NOTRUN -> [FAIL][23] ([Intel XE#3304]) +3 other tests fail
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_content_protection@atomic-hdcp14.html

  * igt@kms_content_protection@content-type-change:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2341]) +2 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2390])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@legacy:
    - shard-lnl:          NOTRUN -> [SKIP][26] ([Intel XE#3278])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-7/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          NOTRUN -> [FAIL][27] ([Intel XE#6707]) +1 other test fail
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-128x42:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2320]) +5 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-128x42.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#2321]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-2/igt@kms_cursor_crc@cursor-random-512x512.html
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2321])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-256x85:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#1424])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-3/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#309])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#1508])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#4331])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#2244]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#4422]) +1 other test skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#4156])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_feature_discovery@display-4x:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#1138])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2375])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2293] / [Intel XE#2380]) +5 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2293]) +5 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-indfb-plflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#651])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-3/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2311]) +46 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#4141]) +22 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#656]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2352]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2313]) +45 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#6911]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2486])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#2393])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#5021])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#5020])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#6886]) +4 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#870]) +2 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2938])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#2391])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#2392])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#2499])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@package-g7:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#6814])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@kms_pm_rpm@package-g7.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#1406] / [Intel XE#1489]) +6 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#1406] / [Intel XE#2387])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-psr2-sprite-render:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#1406])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-2/igt@kms_psr@fbc-psr2-sprite-render.html

  * igt@kms_psr@fbc-psr2-sprite-render@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#1406] / [Intel XE#4609])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-2/igt@kms_psr@fbc-psr2-sprite-render@edp-1.html

  * igt@kms_psr@psr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +16 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#3414] / [Intel XE#3904])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#2330])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_scaling_modes@scaling-mode-full-aspect:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#2413]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_scaling_modes@scaling-mode-full-aspect.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#1435])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_setmode@basic@pipe-b-edp-1:
    - shard-lnl:          [PASS][69] -> [FAIL][70] ([Intel XE#6361]) +2 other tests fail
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-lnl-8/igt@kms_setmode@basic@pipe-b-edp-1.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-5/igt@kms_setmode@basic@pipe-b-edp-1.html

  * igt@kms_sharpness_filter@filter-formats:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#6503]) +5 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_sharpness_filter@filter-formats.html

  * igt@kms_vrr@cmrr@pipe-a-edp-1:
    - shard-lnl:          [PASS][72] -> [FAIL][73] ([Intel XE#4459]) +1 other test fail
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-lnl-1/igt@kms_vrr@cmrr@pipe-a-edp-1.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-4/igt@kms_vrr@cmrr@pipe-a-edp-1.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#1499]) +3 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@kms_vrr@flip-suspend.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [PASS][75] -> [FAIL][76] ([Intel XE#2142]) +1 other test fail
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-lnl-7/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-3/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@testdisplay:
    - shard-bmg:          NOTRUN -> [ABORT][77] ([Intel XE#6740] / [Intel XE#6976])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@testdisplay.html

  * igt@xe_compute@eu-busy-10s:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#6599])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@xe_compute@eu-busy-10s.html

  * igt@xe_eudebug@basic-exec-queues:
    - shard-lnl:          NOTRUN -> [SKIP][79] ([Intel XE#4837])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-7/igt@xe_eudebug@basic-exec-queues.html

  * igt@xe_eudebug@basic-vm-access-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#4837]) +14 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_eudebug@basic-vm-access-userptr.html

  * igt@xe_eudebug_online@pagefault-one-of-many:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#6665])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@xe_eudebug_online@pagefault-one-of-many.html

  * igt@xe_eudebug_online@stopped-thread:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#4837] / [Intel XE#6665]) +7 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_eudebug_online@stopped-thread.html

  * igt@xe_eudebug_sriov@deny-sriov:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#5793])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@xe_eudebug_sriov@deny-sriov.html

  * igt@xe_evict@evict-large:
    - shard-lnl:          NOTRUN -> [SKIP][84] ([Intel XE#688])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-5/igt@xe_evict@evict-large.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#2322]) +15 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-priority:
    - shard-lnl:          NOTRUN -> [SKIP][86] ([Intel XE#6874])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-1/igt@xe_exec_multi_queue@many-queues-preempt-mode-priority.html

  * igt@xe_exec_multi_queue@two-queues-priority:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#6874]) +54 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@xe_exec_multi_queue@two-queues-priority.html

  * igt@xe_exec_system_allocator@many-64k-mmap-new-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#5007]) +1 other test skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@xe_exec_system_allocator@many-64k-mmap-new-huge-nomemset.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma:
    - shard-lnl:          NOTRUN -> [SKIP][89] ([Intel XE#6196])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma.html

  * igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-new-huge:
    - shard-bmg:          NOTRUN -> [SKIP][90] ([Intel XE#4943]) +38 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-new-huge.html

  * igt@xe_exec_system_allocator@twice-mmap-huge:
    - shard-lnl:          NOTRUN -> [SKIP][91] ([Intel XE#4943]) +1 other test skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-2/igt@xe_exec_system_allocator@twice-mmap-huge.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - shard-bmg:          NOTRUN -> [SKIP][92] ([Intel XE#2229])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_multigpu_svm@mgpu-coherency-basic:
    - shard-lnl:          NOTRUN -> [SKIP][93] ([Intel XE#6964])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-2/igt@xe_multigpu_svm@mgpu-coherency-basic.html

  * igt@xe_multigpu_svm@mgpu-coherency-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#6964]) +3 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@xe_multigpu_svm@mgpu-coherency-prefetch.html

  * igt@xe_oa@oa-tlb-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#2248])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@xe_oa@oa-tlb-invalidate.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#1420])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_peer2peer@read:
    - shard-bmg:          NOTRUN -> [SKIP][97] ([Intel XE#2427] / [Intel XE#6953])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_peer2peer@read.html

  * igt@xe_pm@d3cold-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][98] ([Intel XE#5694])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pm@d3hot-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#5742])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@xe_pm@d3hot-i2c.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][100] ([Intel XE#2284])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#4733]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#944]) +4 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_query@multigpu-query-mem-usage.html

  * igt@xe_sriov_flr@flr-each-isolation:
    - shard-lnl:          NOTRUN -> [SKIP][103] ([Intel XE#3342])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-2/igt@xe_sriov_flr@flr-each-isolation.html
    - shard-bmg:          NOTRUN -> [FAIL][104] ([Intel XE#6569])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@xe_sriov_flr@flr-each-isolation.html

  * igt@xe_sriov_flr@flr-vfs-parallel:
    - shard-bmg:          [PASS][105] -> [FAIL][106] ([Intel XE#6569])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-10/igt@xe_sriov_flr@flr-vfs-parallel.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@xe_sriov_flr@flr-vfs-parallel.html

  * igt@xe_sriov_vram@vf-access-provisioned:
    - shard-lnl:          NOTRUN -> [SKIP][107] ([Intel XE#6376])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-5/igt@xe_sriov_vram@vf-access-provisioned.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][108] ([Intel XE#301]) -> [PASS][109] +1 other test pass
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-lnl:          [FAIL][110] ([Intel XE#718]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-lnl-5/igt@kms_pm_dc@dc6-dpms.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-7/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-lnl:          [FAIL][112] ([Intel XE#1874]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-lnl-5/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-3/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][114] ([Intel XE#6321]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
    - shard-lnl:          [FAIL][116] ([Intel XE#5625]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-lnl-8/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [SKIP][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130], [PASS][131]) ([Intel XE#2457]) -> ([PASS][132], [PASS][133], [PASS][134], [PASS][135], [PASS][136], [PASS][137], [PASS][138], [PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-3/igt@xe_module_load@load.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-3/igt@xe_module_load@load.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-10/igt@xe_module_load@load.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-10/igt@xe_module_load@load.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-10/igt@xe_module_load@load.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-1/igt@xe_module_load@load.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-1/igt@xe_module_load@load.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-1/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-1/igt@xe_module_load@load.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-2/igt@xe_module_load@load.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-9/igt@xe_module_load@load.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-2/igt@xe_module_load@load.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-9/igt@xe_module_load@load.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-9/igt@xe_module_load@load.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@xe_module_load@load.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@xe_module_load@load.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@xe_module_load@load.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_module_load@load.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-10/igt@xe_module_load@load.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@xe_module_load@load.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-3/igt@xe_module_load@load.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@xe_module_load@load.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-1/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-9/igt@xe_module_load@load.html

  
#### Warnings ####

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][145] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][146] ([Intel XE#3544])
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391
  [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
  [Intel XE#5793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5793
  [Intel XE#5993]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5993
  [Intel XE#6054]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6054
  [Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
  [Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6976]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6976
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_8693 -> IGT_8694
  * Linux: xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e -> xe-pw-158384v7

  IGT_8693: 8693
  IGT_8694: 8694
  xe-4359-440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e: 440d2cb5f3dfa9cbbfda4cc18a5ad8541bb1d07e
  xe-pw-158384v7: 158384v7

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v7/index.html

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