Re: [PATCH v3 4/4] drm/xe/xe_hw_error: Add support for PVC SOC errors

[Raag Jadav <raag.jadav@intel.com>]

On Mon, Jan 12, 2026 at 10:15:58AM +0530, Riana Tauro wrote:
> On 12/15/2025 4:22 PM, Raag Jadav wrote:
> > On Fri, Dec 05, 2025 at 02:09:36PM +0530, Riana Tauro wrote:
> > > Report the SOC nonfatal/fatal hardware error and update the counters.

...

> > > +	master_global_errstat = xe_mmio_read32(mmio, SOC_GLOBAL_ERR_STAT_REG(base, severity));
> > > +	if (master_global_errstat & SOC_SLAVE_IEH) {
> > > +		slave_global_errstat = xe_mmio_read32(mmio,
> > > +						      SOC_GLOBAL_ERR_STAT_REG(slave_base, severity));
> > > +		if (slave_global_errstat & SOC_IEH1_LOCAL_ERR_STATUS) {
> > > +			slave_local_errstat = xe_mmio_read32(mmio,
> > > +							     SOC_LOCAL_ERR_STAT_REG(slave_base,
> > > +										    severity));
> > > +
> > > +			for_each_set_bit(regbit, &slave_local_errstat, XE_RAS_REG_SIZE) {
> > > +				if (severity == DRM_XE_RAS_ERROR_FATAL)
> > 
> > Shouldn't this condition be outside the loop? Also, should we not log it
> > after we clear the bits?
> 
> Yeah condition can be.
> 
> But why should we log it after? Anyway the rest of the registers need to
> cleared too to unmask

Yes, doesn't make much functional difference but the rule of thumb is to

1. Execute
2. Log

so just ordering change, but upto you.

Raag