[PATCH 00/11] drm/i915: Eliminate FB usage from low level pinning code

[PATCH 00/11] drm/i915: Eliminate FB usage from low level pinning code

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Some work towards a proper display<->parent fb_pin interface.
The goal of the series here is to eliminate display specific 
things (the fb structure itself, and any display platform
checks) from the low level pinning code.

Ville Syrjälä (11):
  drm/xe/fb: Use the correct gtt view for remapped FBs
  drm/i915: Introduce struct intel_fb_pin_params
  drm/i915: Extract intel_fb_needs_cpu_access()
  drm/i915: Introduce pin_params.needs_cpu_lmem_access
  drm/i915: Extract intel_plane_needs_low_address()
  drm/i915: Introduce pin_params.needs_low_address
  drm/i915: Introduce pin_params.needs_physical
  drm/i915: Extract intel_plane_needs_fence()
  drm/i915: Introduce pin_params.needs_fence
  drm/xe: Eliminate intel_fb_uses_dpt() call from __xe_pin_fb_vma()
  drm/i915: Don't pass the framebuffer to low level pinning functions

 drivers/gpu/drm/i915/display/intel_fb.c       |  7 +-
 drivers/gpu/drm/i915/display/intel_fb.h       |  1 +
 drivers/gpu/drm/i915/display/intel_fb_pin.h   | 20 +++--
 drivers/gpu/drm/i915/display/intel_fbdev.c    | 19 +++--
 drivers/gpu/drm/i915/display/intel_plane.c    | 22 +++++
 drivers/gpu/drm/i915/display/intel_plane.h    |  3 +
 drivers/gpu/drm/i915/i915_fb_pin.c            | 85 ++++++++++---------
 drivers/gpu/drm/xe/display/xe_fb_pin.c        | 65 +++++++-------
 drivers/gpu/drm/xe/display/xe_initial_plane.c |  6 +-
 9 files changed, 135 insertions(+), 93 deletions(-)

-- 
2.52.0

[PATCH 01/11] drm/xe/fb: Use the correct gtt view for remapped FBs

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Use the proper gtt view from the plane state rather than always
assuming that it came directly from the FB. This is in the DPT
codepath so the view should currently always come from the FB,
but in the future we may also want per-plane remapping with DPT.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 739d9c019094..91e5c1052589 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -154,7 +154,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 	if (view->type == I915_GTT_VIEW_NORMAL)
 		dpt_size = ALIGN(size / XE_PAGE_SIZE * 8, XE_PAGE_SIZE);
 	else if (view->type == I915_GTT_VIEW_REMAPPED)
-		dpt_size = ALIGN(intel_remapped_info_size(&fb->remapped_view.gtt.remapped) * 8,
+		dpt_size = ALIGN(intel_remapped_info_size(&view->remapped) * 8,
 				 XE_PAGE_SIZE);
 	else
 		/* display uses 4K tiles instead of bytes here, convert to entries.. */
-- 
2.52.0

[PATCH 02/11] drm/i915: Introduce struct intel_fb_pin_params

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We need to pass a lot of information between the display driver
and the core driver to get framebuffers mapped into GGTT/DPT
correctly. Rather than passing around a swarm of integers and
boolean as function arguments, let's collect it all into a
structure (struct intel_fb_pin_params).

Start by moving the gtt view, alignment, phys_alignment,
and vtd_guard there. Going forward additional things need
to added as well (mainly various boolean flags).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb_pin.h   | 12 +++--
 drivers/gpu/drm/i915/display/intel_fbdev.c    | 13 +++--
 drivers/gpu/drm/i915/i915_fb_pin.c            | 54 ++++++++++---------
 drivers/gpu/drm/xe/display/xe_fb_pin.c        | 39 +++++++-------
 drivers/gpu/drm/xe/display/xe_initial_plane.c |  6 ++-
 5 files changed, 69 insertions(+), 55 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
index 2eca42b74c4a..e6271437459d 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -14,12 +14,16 @@ struct intel_plane_state;
 struct i915_gtt_view;
 struct iosys_map;
 
+struct intel_fb_pin_params {
+	const struct i915_gtt_view *view;
+	unsigned int alignment;
+	unsigned int phys_alignment;
+	unsigned int vtd_guard;
+};
+
 struct i915_vma *
 intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
-		     const struct i915_gtt_view *view,
-		     unsigned int alignment,
-		     unsigned int phys_alignment,
-		     unsigned int vtd_guard,
+		     const struct intel_fb_pin_params *pin_params,
 		     int *out_fence_id);
 
 void intel_fb_unpin_vma(struct i915_vma *vma, int fence_id);
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 1e22b3fd79ba..136fa827c8f0 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -264,6 +264,7 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
 {
 	struct intel_display *display = to_intel_display(helper->dev);
 	struct intel_fbdev *ifbdev = to_intel_fbdev(helper);
+	struct intel_fb_pin_params pin_params = {};
 	struct intel_framebuffer *fb = ifbdev->fb;
 	struct fb_info *info = helper->info;
 	struct ref_tracker *wakeref;
@@ -308,11 +309,13 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
 	 * This also validates that any existing fb inherited from the
 	 * BIOS is suitable for own access.
 	 */
-	vma = intel_fb_pin_to_ggtt(&fb->base, &fb->normal_view.gtt,
-				   fb->min_alignment, 0,
-				   intel_fb_view_vtd_guard(&fb->base, &fb->normal_view,
-							   DRM_MODE_ROTATE_0),
-				   NULL);
+	pin_params.view = &fb->normal_view.gtt;
+	pin_params.alignment = fb->min_alignment;
+	pin_params.vtd_guard = intel_fb_view_vtd_guard(&fb->base,
+						       &fb->normal_view,
+						       DRM_MODE_ROTATE_0);
+
+	vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params, NULL);
 	if (IS_ERR(vma)) {
 		ret = PTR_ERR(vma);
 		goto out_unlock;
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index 85649bae25fb..4fe6b9859b3f 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -24,9 +24,8 @@
 
 static struct i915_vma *
 intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
-		    const struct i915_gtt_view *view,
-		    unsigned int alignment,
-		    struct intel_dpt *dpt)
+		    struct intel_dpt *dpt,
+		    const struct intel_fb_pin_params *pin_params)
 {
 	struct drm_i915_private *i915 = to_i915(fb->dev);
 	struct drm_gem_object *_obj = intel_fb_bo(fb);
@@ -74,19 +73,20 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
 		if (ret)
 			continue;
 
-		vma = i915_vma_instance(obj, vm, view);
+		vma = i915_vma_instance(obj, vm, pin_params->view);
 		if (IS_ERR(vma)) {
 			ret = PTR_ERR(vma);
 			continue;
 		}
 
-		if (i915_vma_misplaced(vma, 0, alignment, 0)) {
+		if (i915_vma_misplaced(vma, 0, pin_params->alignment, 0)) {
 			ret = i915_vma_unbind(vma);
 			if (ret)
 				continue;
 		}
 
-		ret = i915_vma_pin_ww(vma, &ww, 0, alignment, PIN_GLOBAL);
+		ret = i915_vma_pin_ww(vma, &ww, 0, pin_params->alignment,
+				      PIN_GLOBAL);
 		if (ret)
 			continue;
 	}
@@ -95,7 +95,8 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
 		goto err;
 	}
 
-	vma->display_alignment = max(vma->display_alignment, alignment);
+	vma->display_alignment = max(vma->display_alignment,
+				     pin_params->alignment);
 
 	i915_gem_object_flush_if_display(obj);
 
@@ -108,10 +109,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
 
 struct i915_vma *
 intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
-		     const struct i915_gtt_view *view,
-		     unsigned int alignment,
-		     unsigned int phys_alignment,
-		     unsigned int vtd_guard,
+		     const struct intel_fb_pin_params *pin_params,
 		     int *out_fence_id)
 {
 	struct intel_display *display = to_intel_display(fb->dev);
@@ -127,7 +125,8 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 	if (drm_WARN_ON(&i915->drm, !i915_gem_object_is_framebuffer(obj)))
 		return ERR_PTR(-EINVAL);
 
-	if (drm_WARN_ON(&i915->drm, alignment && !is_power_of_2(alignment)))
+	if (drm_WARN_ON(&i915->drm, pin_params->alignment &&
+			!is_power_of_2(pin_params->alignment)))
 		return ERR_PTR(-EINVAL);
 
 	/*
@@ -156,8 +155,8 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 	i915_gem_ww_ctx_init(&ww, true);
 retry:
 	ret = i915_gem_object_lock(obj, &ww);
-	if (!ret && phys_alignment)
-		ret = i915_gem_object_attach_phys(obj, phys_alignment);
+	if (!ret && pin_params->phys_alignment)
+		ret = i915_gem_object_attach_phys(obj, pin_params->phys_alignment);
 	else if (!ret && HAS_LMEM(i915))
 		ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
 	if (!ret)
@@ -165,8 +164,10 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 	if (ret)
 		goto err;
 
-	vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment,
-						   vtd_guard, view, pinctl);
+	vma = i915_gem_object_pin_to_display_plane(obj, &ww,
+						   pin_params->alignment,
+						   pin_params->vtd_guard,
+						   pin_params->view, pinctl);
 	if (IS_ERR(vma)) {
 		ret = PTR_ERR(vma);
 		goto err_unpin;
@@ -269,12 +270,15 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 	struct i915_vma *vma;
 
 	if (!intel_fb_uses_dpt(&fb->base)) {
+		struct intel_fb_pin_params pin_params = {
+			.view = &plane_state->view.gtt,
+			.alignment = intel_plane_fb_min_alignment(plane_state),
+			.phys_alignment = intel_plane_fb_min_phys_alignment(plane_state),
+			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
+		};
 		int fence_id = -1;
 
-		vma = intel_fb_pin_to_ggtt(&fb->base, &plane_state->view.gtt,
-					   intel_plane_fb_min_alignment(plane_state),
-					   intel_plane_fb_min_phys_alignment(plane_state),
-					   intel_plane_fb_vtd_guard(plane_state),
+		vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params,
 					   intel_plane_uses_fence(plane_state) ? &fence_id : NULL);
 		if (IS_ERR(vma))
 			return PTR_ERR(vma);
@@ -282,16 +286,18 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 		plane_state->ggtt_vma = vma;
 		plane_state->fence_id = fence_id;
 	} else {
-		unsigned int alignment = intel_plane_fb_min_alignment(plane_state);
+		struct intel_fb_pin_params pin_params = {
+			.view = &plane_state->view.gtt,
+			.alignment = intel_plane_fb_min_alignment(plane_state),
+		};
 
-		vma = i915_dpt_pin_to_ggtt(fb->dpt, alignment / 512);
+		vma = i915_dpt_pin_to_ggtt(fb->dpt, pin_params.alignment / 512);
 		if (IS_ERR(vma))
 			return PTR_ERR(vma);
 
 		plane_state->ggtt_vma = vma;
 
-		vma = intel_fb_pin_to_dpt(&fb->base, &plane_state->view.gtt,
-					  alignment, fb->dpt);
+		vma = intel_fb_pin_to_dpt(&fb->base, fb->dpt, &pin_params);
 		if (IS_ERR(vma)) {
 			i915_dpt_unpin_from_ggtt(fb->dpt);
 			plane_state->ggtt_vma = NULL;
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 91e5c1052589..58cd527e1fde 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -140,14 +140,14 @@ write_dpt_remapped(struct xe_bo *bo,
 }
 
 static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
-			       const struct i915_gtt_view *view,
-			       struct i915_vma *vma,
-			       unsigned int alignment)
+			       const struct intel_fb_pin_params *pin_params,
+			       struct i915_vma *vma)
 {
 	struct xe_device *xe = to_xe_device(fb->base.dev);
 	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
 	struct xe_ggtt *ggtt = tile0->mem.ggtt;
 	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
+	const struct i915_gtt_view *view = pin_params->view;
 	struct xe_bo *bo = gem_to_xe_bo(obj), *dpt;
 	u32 dpt_size, size = bo->ttm.base.size;
 
@@ -168,7 +168,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 						   XE_BO_FLAG_VRAM0 |
 						   XE_BO_FLAG_GGTT |
 						   XE_BO_FLAG_PAGETABLE,
-						   alignment, false);
+						   pin_params->alignment, false);
 	else
 		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
 						   dpt_size,  ~0ull,
@@ -176,7 +176,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 						   XE_BO_FLAG_STOLEN |
 						   XE_BO_FLAG_GGTT |
 						   XE_BO_FLAG_PAGETABLE,
-						   alignment, false);
+						   pin_params->alignment, false);
 	if (IS_ERR(dpt))
 		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
 						   dpt_size,  ~0ull,
@@ -185,7 +185,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 						   XE_BO_FLAG_GGTT |
 						   XE_BO_FLAG_PAGETABLE |
 						   XE_BO_FLAG_FORCE_WC,
-						   alignment, false);
+						   pin_params->alignment, false);
 	if (IS_ERR(dpt))
 		return PTR_ERR(dpt);
 
@@ -269,11 +269,11 @@ static void write_ggtt_rotated_node(struct xe_ggtt *ggtt, struct xe_ggtt_node *n
 }
 
 static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
-				const struct i915_gtt_view *view,
-				struct i915_vma *vma,
-				unsigned int alignment)
+				const struct intel_fb_pin_params *pin_params,
+				struct i915_vma *vma)
 {
 	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
+	const struct i915_gtt_view *view = pin_params->view;
 	struct xe_bo *bo = gem_to_xe_bo(obj);
 	struct xe_device *xe = to_xe_device(fb->base.dev);
 	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
@@ -319,8 +319,7 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
 }
 
 static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
-					const struct i915_gtt_view *view,
-					unsigned int alignment)
+					const struct intel_fb_pin_params *pin_params)
 {
 	struct drm_device *dev = fb->base.dev;
 	struct xe_device *xe = to_xe_device(dev);
@@ -377,9 +376,9 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
 
 	vma->bo = bo;
 	if (intel_fb_uses_dpt(&fb->base))
-		ret = __xe_pin_fb_vma_dpt(fb, view, vma, alignment);
+		ret = __xe_pin_fb_vma_dpt(fb, pin_params, vma);
 	else
-		ret = __xe_pin_fb_vma_ggtt(fb, view, vma,  alignment);
+		ret = __xe_pin_fb_vma_ggtt(fb, pin_params, vma);
 	if (ret)
 		goto err_unpin;
 
@@ -414,16 +413,13 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
 
 struct i915_vma *
 intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
-		     const struct i915_gtt_view *view,
-		     unsigned int alignment,
-		     unsigned int phys_alignment,
-		     unsigned int vtd_guard,
+		     const struct intel_fb_pin_params *pin_params,
 		     int *out_fence_id)
 {
 	if (out_fence_id)
 		*out_fence_id = -1;
 
-	return __xe_pin_fb_vma(to_intel_framebuffer(fb), view, alignment);
+	return __xe_pin_fb_vma(to_intel_framebuffer(fb), pin_params);
 }
 
 void intel_fb_unpin_vma(struct i915_vma *vma, int fence_id)
@@ -475,7 +471,10 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
 	struct i915_vma *vma;
 	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
-	unsigned int alignment = plane->min_alignment(plane, fb, 0);
+	struct intel_fb_pin_params pin_params = {
+		.view = &new_plane_state->view.gtt,
+		.alignment = plane->min_alignment(plane, fb, 0),
+	};
 
 	if (reuse_vma(new_plane_state, old_plane_state))
 		return 0;
@@ -483,7 +482,7 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
 	/* We reject creating !SCANOUT fb's, so this is weird.. */
 	drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_FORCE_WC));
 
-	vma = __xe_pin_fb_vma(intel_fb, &new_plane_state->view.gtt, alignment);
+	vma = __xe_pin_fb_vma(intel_fb, &pin_params);
 
 	if (IS_ERR(vma))
 		return PTR_ERR(vma);
diff --git a/drivers/gpu/drm/xe/display/xe_initial_plane.c b/drivers/gpu/drm/xe/display/xe_initial_plane.c
index 381d68c58463..4f0ad4692ed6 100644
--- a/drivers/gpu/drm/xe/display/xe_initial_plane.c
+++ b/drivers/gpu/drm/xe/display/xe_initial_plane.c
@@ -134,9 +134,11 @@ xe_initial_plane_setup(struct drm_plane_state *_plane_state,
 {
 	struct intel_plane_state *plane_state = to_intel_plane_state(_plane_state);
 	struct i915_vma *vma;
+	struct intel_fb_pin_params pin_params = {
+		.view = &plane_state->view.gtt,
+	};
 
-	vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt,
-				   0, 0, 0, NULL);
+	vma = intel_fb_pin_to_ggtt(fb, &pin_params, NULL);
 	if (IS_ERR(vma))
 		return PTR_ERR(vma);
 
-- 
2.52.0

Re: [PATCH 02/11] drm/i915: Introduce struct intel_fb_pin_params

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We need to pass a lot of information between the display driver
> and the core driver to get framebuffers mapped into GGTT/DPT
> correctly. Rather than passing around a swarm of integers and
> boolean as function arguments, let's collect it all into a
> structure (struct intel_fb_pin_params).
>
> Start by moving the gtt view, alignment, phys_alignment,
> and vtd_guard there. Going forward additional things need
> to added as well (mainly various boolean flags).

Neat.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fb_pin.h   | 12 +++--
>  drivers/gpu/drm/i915/display/intel_fbdev.c    | 13 +++--
>  drivers/gpu/drm/i915/i915_fb_pin.c            | 54 ++++++++++---------
>  drivers/gpu/drm/xe/display/xe_fb_pin.c        | 39 +++++++-------
>  drivers/gpu/drm/xe/display/xe_initial_plane.c |  6 ++-
>  5 files changed, 69 insertions(+), 55 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> index 2eca42b74c4a..e6271437459d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> @@ -14,12 +14,16 @@ struct intel_plane_state;
>  struct i915_gtt_view;
>  struct iosys_map;
>  
> +struct intel_fb_pin_params {
> +	const struct i915_gtt_view *view;
> +	unsigned int alignment;
> +	unsigned int phys_alignment;
> +	unsigned int vtd_guard;
> +};
> +
>  struct i915_vma *
>  intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
> -		     const struct i915_gtt_view *view,
> -		     unsigned int alignment,
> -		     unsigned int phys_alignment,
> -		     unsigned int vtd_guard,
> +		     const struct intel_fb_pin_params *pin_params,
>  		     int *out_fence_id);
>  
>  void intel_fb_unpin_vma(struct i915_vma *vma, int fence_id);
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index 1e22b3fd79ba..136fa827c8f0 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -264,6 +264,7 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
>  {
>  	struct intel_display *display = to_intel_display(helper->dev);
>  	struct intel_fbdev *ifbdev = to_intel_fbdev(helper);
> +	struct intel_fb_pin_params pin_params = {};
>  	struct intel_framebuffer *fb = ifbdev->fb;
>  	struct fb_info *info = helper->info;
>  	struct ref_tracker *wakeref;
> @@ -308,11 +309,13 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
>  	 * This also validates that any existing fb inherited from the
>  	 * BIOS is suitable for own access.
>  	 */
> -	vma = intel_fb_pin_to_ggtt(&fb->base, &fb->normal_view.gtt,
> -				   fb->min_alignment, 0,
> -				   intel_fb_view_vtd_guard(&fb->base, &fb->normal_view,
> -							   DRM_MODE_ROTATE_0),
> -				   NULL);
> +	pin_params.view = &fb->normal_view.gtt;
> +	pin_params.alignment = fb->min_alignment;
> +	pin_params.vtd_guard = intel_fb_view_vtd_guard(&fb->base,
> +						       &fb->normal_view,
> +						       DRM_MODE_ROTATE_0);
> +
> +	vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params, NULL);
>  	if (IS_ERR(vma)) {
>  		ret = PTR_ERR(vma);
>  		goto out_unlock;
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index 85649bae25fb..4fe6b9859b3f 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -24,9 +24,8 @@
>  
>  static struct i915_vma *
>  intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
> -		    const struct i915_gtt_view *view,
> -		    unsigned int alignment,
> -		    struct intel_dpt *dpt)
> +		    struct intel_dpt *dpt,
> +		    const struct intel_fb_pin_params *pin_params)
>  {
>  	struct drm_i915_private *i915 = to_i915(fb->dev);
>  	struct drm_gem_object *_obj = intel_fb_bo(fb);
> @@ -74,19 +73,20 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
>  		if (ret)
>  			continue;
>  
> -		vma = i915_vma_instance(obj, vm, view);
> +		vma = i915_vma_instance(obj, vm, pin_params->view);
>  		if (IS_ERR(vma)) {
>  			ret = PTR_ERR(vma);
>  			continue;
>  		}
>  
> -		if (i915_vma_misplaced(vma, 0, alignment, 0)) {
> +		if (i915_vma_misplaced(vma, 0, pin_params->alignment, 0)) {
>  			ret = i915_vma_unbind(vma);
>  			if (ret)
>  				continue;
>  		}
>  
> -		ret = i915_vma_pin_ww(vma, &ww, 0, alignment, PIN_GLOBAL);
> +		ret = i915_vma_pin_ww(vma, &ww, 0, pin_params->alignment,
> +				      PIN_GLOBAL);
>  		if (ret)
>  			continue;
>  	}
> @@ -95,7 +95,8 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
>  		goto err;
>  	}
>  
> -	vma->display_alignment = max(vma->display_alignment, alignment);
> +	vma->display_alignment = max(vma->display_alignment,
> +				     pin_params->alignment);
>  
>  	i915_gem_object_flush_if_display(obj);
>  
> @@ -108,10 +109,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
>  
>  struct i915_vma *
>  intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
> -		     const struct i915_gtt_view *view,
> -		     unsigned int alignment,
> -		     unsigned int phys_alignment,
> -		     unsigned int vtd_guard,
> +		     const struct intel_fb_pin_params *pin_params,
>  		     int *out_fence_id)
>  {
>  	struct intel_display *display = to_intel_display(fb->dev);
> @@ -127,7 +125,8 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  	if (drm_WARN_ON(&i915->drm, !i915_gem_object_is_framebuffer(obj)))
>  		return ERR_PTR(-EINVAL);
>  
> -	if (drm_WARN_ON(&i915->drm, alignment && !is_power_of_2(alignment)))
> +	if (drm_WARN_ON(&i915->drm, pin_params->alignment &&
> +			!is_power_of_2(pin_params->alignment)))
>  		return ERR_PTR(-EINVAL);
>  
>  	/*
> @@ -156,8 +155,8 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  	i915_gem_ww_ctx_init(&ww, true);
>  retry:
>  	ret = i915_gem_object_lock(obj, &ww);
> -	if (!ret && phys_alignment)
> -		ret = i915_gem_object_attach_phys(obj, phys_alignment);
> +	if (!ret && pin_params->phys_alignment)
> +		ret = i915_gem_object_attach_phys(obj, pin_params->phys_alignment);
>  	else if (!ret && HAS_LMEM(i915))
>  		ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
>  	if (!ret)
> @@ -165,8 +164,10 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  	if (ret)
>  		goto err;
>  
> -	vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment,
> -						   vtd_guard, view, pinctl);
> +	vma = i915_gem_object_pin_to_display_plane(obj, &ww,
> +						   pin_params->alignment,
> +						   pin_params->vtd_guard,
> +						   pin_params->view, pinctl);
>  	if (IS_ERR(vma)) {
>  		ret = PTR_ERR(vma);
>  		goto err_unpin;
> @@ -269,12 +270,15 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  	struct i915_vma *vma;
>  
>  	if (!intel_fb_uses_dpt(&fb->base)) {
> +		struct intel_fb_pin_params pin_params = {
> +			.view = &plane_state->view.gtt,
> +			.alignment = intel_plane_fb_min_alignment(plane_state),
> +			.phys_alignment = intel_plane_fb_min_phys_alignment(plane_state),
> +			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
> +		};
>  		int fence_id = -1;
>  
> -		vma = intel_fb_pin_to_ggtt(&fb->base, &plane_state->view.gtt,
> -					   intel_plane_fb_min_alignment(plane_state),
> -					   intel_plane_fb_min_phys_alignment(plane_state),
> -					   intel_plane_fb_vtd_guard(plane_state),
> +		vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params,
>  					   intel_plane_uses_fence(plane_state) ? &fence_id : NULL);
>  		if (IS_ERR(vma))
>  			return PTR_ERR(vma);
> @@ -282,16 +286,18 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  		plane_state->ggtt_vma = vma;
>  		plane_state->fence_id = fence_id;
>  	} else {
> -		unsigned int alignment = intel_plane_fb_min_alignment(plane_state);
> +		struct intel_fb_pin_params pin_params = {
> +			.view = &plane_state->view.gtt,
> +			.alignment = intel_plane_fb_min_alignment(plane_state),
> +		};
>  
> -		vma = i915_dpt_pin_to_ggtt(fb->dpt, alignment / 512);
> +		vma = i915_dpt_pin_to_ggtt(fb->dpt, pin_params.alignment / 512);
>  		if (IS_ERR(vma))
>  			return PTR_ERR(vma);
>  
>  		plane_state->ggtt_vma = vma;
>  
> -		vma = intel_fb_pin_to_dpt(&fb->base, &plane_state->view.gtt,
> -					  alignment, fb->dpt);
> +		vma = intel_fb_pin_to_dpt(&fb->base, fb->dpt, &pin_params);
>  		if (IS_ERR(vma)) {
>  			i915_dpt_unpin_from_ggtt(fb->dpt);
>  			plane_state->ggtt_vma = NULL;
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 91e5c1052589..58cd527e1fde 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -140,14 +140,14 @@ write_dpt_remapped(struct xe_bo *bo,
>  }
>  
>  static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
> -			       const struct i915_gtt_view *view,
> -			       struct i915_vma *vma,
> -			       unsigned int alignment)
> +			       const struct intel_fb_pin_params *pin_params,
> +			       struct i915_vma *vma)
>  {
>  	struct xe_device *xe = to_xe_device(fb->base.dev);
>  	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
>  	struct xe_ggtt *ggtt = tile0->mem.ggtt;
>  	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
> +	const struct i915_gtt_view *view = pin_params->view;
>  	struct xe_bo *bo = gem_to_xe_bo(obj), *dpt;
>  	u32 dpt_size, size = bo->ttm.base.size;
>  
> @@ -168,7 +168,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
>  						   XE_BO_FLAG_VRAM0 |
>  						   XE_BO_FLAG_GGTT |
>  						   XE_BO_FLAG_PAGETABLE,
> -						   alignment, false);
> +						   pin_params->alignment, false);
>  	else
>  		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
>  						   dpt_size,  ~0ull,
> @@ -176,7 +176,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
>  						   XE_BO_FLAG_STOLEN |
>  						   XE_BO_FLAG_GGTT |
>  						   XE_BO_FLAG_PAGETABLE,
> -						   alignment, false);
> +						   pin_params->alignment, false);
>  	if (IS_ERR(dpt))
>  		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
>  						   dpt_size,  ~0ull,
> @@ -185,7 +185,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
>  						   XE_BO_FLAG_GGTT |
>  						   XE_BO_FLAG_PAGETABLE |
>  						   XE_BO_FLAG_FORCE_WC,
> -						   alignment, false);
> +						   pin_params->alignment, false);
>  	if (IS_ERR(dpt))
>  		return PTR_ERR(dpt);
>  
> @@ -269,11 +269,11 @@ static void write_ggtt_rotated_node(struct xe_ggtt *ggtt, struct xe_ggtt_node *n
>  }
>  
>  static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
> -				const struct i915_gtt_view *view,
> -				struct i915_vma *vma,
> -				unsigned int alignment)
> +				const struct intel_fb_pin_params *pin_params,
> +				struct i915_vma *vma)
>  {
>  	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
> +	const struct i915_gtt_view *view = pin_params->view;
>  	struct xe_bo *bo = gem_to_xe_bo(obj);
>  	struct xe_device *xe = to_xe_device(fb->base.dev);
>  	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
> @@ -319,8 +319,7 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
>  }
>  
>  static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> -					const struct i915_gtt_view *view,
> -					unsigned int alignment)
> +					const struct intel_fb_pin_params *pin_params)
>  {
>  	struct drm_device *dev = fb->base.dev;
>  	struct xe_device *xe = to_xe_device(dev);
> @@ -377,9 +376,9 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>  
>  	vma->bo = bo;
>  	if (intel_fb_uses_dpt(&fb->base))
> -		ret = __xe_pin_fb_vma_dpt(fb, view, vma, alignment);
> +		ret = __xe_pin_fb_vma_dpt(fb, pin_params, vma);
>  	else
> -		ret = __xe_pin_fb_vma_ggtt(fb, view, vma,  alignment);
> +		ret = __xe_pin_fb_vma_ggtt(fb, pin_params, vma);
>  	if (ret)
>  		goto err_unpin;
>  
> @@ -414,16 +413,13 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
>  
>  struct i915_vma *
>  intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
> -		     const struct i915_gtt_view *view,
> -		     unsigned int alignment,
> -		     unsigned int phys_alignment,
> -		     unsigned int vtd_guard,
> +		     const struct intel_fb_pin_params *pin_params,
>  		     int *out_fence_id)
>  {
>  	if (out_fence_id)
>  		*out_fence_id = -1;
>  
> -	return __xe_pin_fb_vma(to_intel_framebuffer(fb), view, alignment);
> +	return __xe_pin_fb_vma(to_intel_framebuffer(fb), pin_params);
>  }
>  
>  void intel_fb_unpin_vma(struct i915_vma *vma, int fence_id)
> @@ -475,7 +471,10 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
>  	struct i915_vma *vma;
>  	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
>  	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
> -	unsigned int alignment = plane->min_alignment(plane, fb, 0);
> +	struct intel_fb_pin_params pin_params = {
> +		.view = &new_plane_state->view.gtt,
> +		.alignment = plane->min_alignment(plane, fb, 0),
> +	};
>  
>  	if (reuse_vma(new_plane_state, old_plane_state))
>  		return 0;
> @@ -483,7 +482,7 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
>  	/* We reject creating !SCANOUT fb's, so this is weird.. */
>  	drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_FORCE_WC));
>  
> -	vma = __xe_pin_fb_vma(intel_fb, &new_plane_state->view.gtt, alignment);
> +	vma = __xe_pin_fb_vma(intel_fb, &pin_params);
>  
>  	if (IS_ERR(vma))
>  		return PTR_ERR(vma);
> diff --git a/drivers/gpu/drm/xe/display/xe_initial_plane.c b/drivers/gpu/drm/xe/display/xe_initial_plane.c
> index 381d68c58463..4f0ad4692ed6 100644
> --- a/drivers/gpu/drm/xe/display/xe_initial_plane.c
> +++ b/drivers/gpu/drm/xe/display/xe_initial_plane.c
> @@ -134,9 +134,11 @@ xe_initial_plane_setup(struct drm_plane_state *_plane_state,
>  {
>  	struct intel_plane_state *plane_state = to_intel_plane_state(_plane_state);
>  	struct i915_vma *vma;
> +	struct intel_fb_pin_params pin_params = {
> +		.view = &plane_state->view.gtt,
> +	};
>  
> -	vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt,
> -				   0, 0, 0, NULL);
> +	vma = intel_fb_pin_to_ggtt(fb, &pin_params, NULL);
>  	if (IS_ERR(vma))
>  		return PTR_ERR(vma);

-- 
Jani Nikula, Intel

[PATCH 03/11] drm/i915: Extract intel_fb_needs_cpu_access()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Replace the naked "does the framebuffer have a clear color
plane?" checks with a more abstract helper that simply tells
us whether we require CPU access to the framebuffer's memory.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb.c | 5 +++++
 drivers/gpu/drm/i915/display/intel_fb.h | 1 +
 drivers/gpu/drm/i915/i915_fb_pin.c      | 2 +-
 drivers/gpu/drm/xe/display/xe_fb_pin.c  | 2 +-
 4 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index c4af368deffd..cbeb39ebdb73 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -521,6 +521,11 @@ bool intel_fb_needs_64k_phys(u64 modifier)
 				      INTEL_PLANE_CAP_NEED64K_PHYS);
 }
 
+bool intel_fb_needs_cpu_access(const struct drm_framebuffer *fb)
+{
+	return intel_fb_rc_ccs_cc_plane(fb) >= 0;
+}
+
 /**
  * intel_fb_is_tile4_modifier: Check if a modifier is a tile4 modifier type
  * @modifier: Modifier to check
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index fc2c4d59bf06..0a027e2595b2 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -38,6 +38,7 @@ bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier);
 bool intel_fb_is_mc_ccs_modifier(u64 modifier);
 bool intel_fb_needs_64k_phys(u64 modifier);
 bool intel_fb_is_tile4_modifier(u64 modifier);
+bool intel_fb_needs_cpu_access(const struct drm_framebuffer *fb);
 
 bool intel_fb_is_ccs_aux_plane(const struct drm_framebuffer *fb, int color_plane);
 int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb);
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index 4fe6b9859b3f..780be25ad43b 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -61,7 +61,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
 			 * ensure it is always in the mappable part of lmem, if this is
 			 * a small-bar device.
 			 */
-			if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
+			if (intel_fb_needs_cpu_access(fb))
 				flags &= ~I915_BO_ALLOC_GPU_ONLY;
 			ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
 							flags);
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 58cd527e1fde..205492639dba 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -335,7 +335,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
 
 	refcount_set(&vma->ref, 1);
 	if (IS_DGFX(to_xe_device(bo->ttm.base.dev)) &&
-	    intel_fb_rc_ccs_cc_plane(&fb->base) >= 0 &&
+	    intel_fb_needs_cpu_access(&fb->base) &&
 	    !(bo->flags & XE_BO_FLAG_NEEDS_CPU_ACCESS)) {
 		struct xe_vram_region *vram = xe_device_get_root_tile(xe)->mem.vram;
 
-- 
2.52.0

Re: [PATCH 03/11] drm/i915: Extract intel_fb_needs_cpu_access()

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Replace the naked "does the framebuffer have a clear color
> plane?" checks with a more abstract helper that simply tells
> us whether we require CPU access to the framebuffer's memory.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_fb.c | 5 +++++
>  drivers/gpu/drm/i915/display/intel_fb.h | 1 +
>  drivers/gpu/drm/i915/i915_fb_pin.c      | 2 +-
>  drivers/gpu/drm/xe/display/xe_fb_pin.c  | 2 +-
>  4 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index c4af368deffd..cbeb39ebdb73 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -521,6 +521,11 @@ bool intel_fb_needs_64k_phys(u64 modifier)
>  				      INTEL_PLANE_CAP_NEED64K_PHYS);
>  }
>  
> +bool intel_fb_needs_cpu_access(const struct drm_framebuffer *fb)
> +{
> +	return intel_fb_rc_ccs_cc_plane(fb) >= 0;
> +}
> +
>  /**
>   * intel_fb_is_tile4_modifier: Check if a modifier is a tile4 modifier type
>   * @modifier: Modifier to check
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
> index fc2c4d59bf06..0a027e2595b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb.h
> @@ -38,6 +38,7 @@ bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier);
>  bool intel_fb_is_mc_ccs_modifier(u64 modifier);
>  bool intel_fb_needs_64k_phys(u64 modifier);
>  bool intel_fb_is_tile4_modifier(u64 modifier);
> +bool intel_fb_needs_cpu_access(const struct drm_framebuffer *fb);
>  
>  bool intel_fb_is_ccs_aux_plane(const struct drm_framebuffer *fb, int color_plane);
>  int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb);
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index 4fe6b9859b3f..780be25ad43b 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -61,7 +61,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
>  			 * ensure it is always in the mappable part of lmem, if this is
>  			 * a small-bar device.
>  			 */
> -			if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
> +			if (intel_fb_needs_cpu_access(fb))
>  				flags &= ~I915_BO_ALLOC_GPU_ONLY;
>  			ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
>  							flags);
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 58cd527e1fde..205492639dba 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -335,7 +335,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>  
>  	refcount_set(&vma->ref, 1);
>  	if (IS_DGFX(to_xe_device(bo->ttm.base.dev)) &&
> -	    intel_fb_rc_ccs_cc_plane(&fb->base) >= 0 &&
> +	    intel_fb_needs_cpu_access(&fb->base) &&
>  	    !(bo->flags & XE_BO_FLAG_NEEDS_CPU_ACCESS)) {
>  		struct xe_vram_region *vram = xe_device_get_root_tile(xe)->mem.vram;

-- 
Jani Nikula, Intel

[PATCH 04/11] drm/i915: Introduce pin_params.needs_cpu_lmem_access

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a new flag pin_params.neeeds_cpu_lmem_access so that the
low level pinning code doesn't need to peek into the display
driver's framebuffer structure.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
 drivers/gpu/drm/i915/i915_fb_pin.c          | 4 +++-
 drivers/gpu/drm/xe/display/xe_fb_pin.c      | 3 ++-
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
index e6271437459d..bcf5a1f46092 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -19,6 +19,7 @@ struct intel_fb_pin_params {
 	unsigned int alignment;
 	unsigned int phys_alignment;
 	unsigned int vtd_guard;
+	bool needs_cpu_lmem_access;
 };
 
 struct i915_vma *
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index 780be25ad43b..96ffc4b0d809 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -61,7 +61,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
 			 * ensure it is always in the mappable part of lmem, if this is
 			 * a small-bar device.
 			 */
-			if (intel_fb_needs_cpu_access(fb))
+			if (pin_params->needs_cpu_lmem_access)
 				flags &= ~I915_BO_ALLOC_GPU_ONLY;
 			ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
 							flags);
@@ -275,6 +275,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 			.alignment = intel_plane_fb_min_alignment(plane_state),
 			.phys_alignment = intel_plane_fb_min_phys_alignment(plane_state),
 			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
+			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
 		};
 		int fence_id = -1;
 
@@ -289,6 +290,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 		struct intel_fb_pin_params pin_params = {
 			.view = &plane_state->view.gtt,
 			.alignment = intel_plane_fb_min_alignment(plane_state),
+			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
 		};
 
 		vma = i915_dpt_pin_to_ggtt(fb->dpt, pin_params.alignment / 512);
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 205492639dba..a4eb06cfa769 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -335,7 +335,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
 
 	refcount_set(&vma->ref, 1);
 	if (IS_DGFX(to_xe_device(bo->ttm.base.dev)) &&
-	    intel_fb_needs_cpu_access(&fb->base) &&
+	    pin_params->needs_cpu_lmem_access &&
 	    !(bo->flags & XE_BO_FLAG_NEEDS_CPU_ACCESS)) {
 		struct xe_vram_region *vram = xe_device_get_root_tile(xe)->mem.vram;
 
@@ -474,6 +474,7 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
 	struct intel_fb_pin_params pin_params = {
 		.view = &new_plane_state->view.gtt,
 		.alignment = plane->min_alignment(plane, fb, 0),
+		.needs_cpu_lmem_access = intel_fb_needs_cpu_access(fb),
 	};
 
 	if (reuse_vma(new_plane_state, old_plane_state))
-- 
2.52.0

Re: [PATCH 04/11] drm/i915: Introduce pin_params.needs_cpu_lmem_access

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a new flag pin_params.neeeds_cpu_lmem_access so that the
> low level pinning code doesn't need to peek into the display
> driver's framebuffer structure.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
>  drivers/gpu/drm/i915/i915_fb_pin.c          | 4 +++-
>  drivers/gpu/drm/xe/display/xe_fb_pin.c      | 3 ++-
>  3 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> index e6271437459d..bcf5a1f46092 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> @@ -19,6 +19,7 @@ struct intel_fb_pin_params {
>  	unsigned int alignment;
>  	unsigned int phys_alignment;
>  	unsigned int vtd_guard;
> +	bool needs_cpu_lmem_access;
>  };
>  
>  struct i915_vma *
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index 780be25ad43b..96ffc4b0d809 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -61,7 +61,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
>  			 * ensure it is always in the mappable part of lmem, if this is
>  			 * a small-bar device.
>  			 */
> -			if (intel_fb_needs_cpu_access(fb))
> +			if (pin_params->needs_cpu_lmem_access)
>  				flags &= ~I915_BO_ALLOC_GPU_ONLY;
>  			ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
>  							flags);
> @@ -275,6 +275,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  			.alignment = intel_plane_fb_min_alignment(plane_state),
>  			.phys_alignment = intel_plane_fb_min_phys_alignment(plane_state),
>  			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
> +			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),

IIUC this path never uses .needs_cpu_lmem_access, but you initialize it
anyway. What I find confusing is initializing it here apparently
unnecessarily, but then leaving it out on a number of other paths that
don't need it.

Other than that,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>  		};
>  		int fence_id = -1;
>  
> @@ -289,6 +290,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  		struct intel_fb_pin_params pin_params = {
>  			.view = &plane_state->view.gtt,
>  			.alignment = intel_plane_fb_min_alignment(plane_state),
> +			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
>  		};
>  
>  		vma = i915_dpt_pin_to_ggtt(fb->dpt, pin_params.alignment / 512);
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 205492639dba..a4eb06cfa769 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -335,7 +335,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>  
>  	refcount_set(&vma->ref, 1);
>  	if (IS_DGFX(to_xe_device(bo->ttm.base.dev)) &&
> -	    intel_fb_needs_cpu_access(&fb->base) &&
> +	    pin_params->needs_cpu_lmem_access &&
>  	    !(bo->flags & XE_BO_FLAG_NEEDS_CPU_ACCESS)) {
>  		struct xe_vram_region *vram = xe_device_get_root_tile(xe)->mem.vram;
>  
> @@ -474,6 +474,7 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
>  	struct intel_fb_pin_params pin_params = {
>  		.view = &new_plane_state->view.gtt,
>  		.alignment = plane->min_alignment(plane, fb, 0),
> +		.needs_cpu_lmem_access = intel_fb_needs_cpu_access(fb),
>  	};
>  
>  	if (reuse_vma(new_plane_state, old_plane_state))

-- 
Jani Nikula, Intel

Re: [PATCH 04/11] drm/i915: Introduce pin_params.needs_cpu_lmem_access

[Ville Syrjälä]

On Fri, Apr 17, 2026 at 12:39:54PM +0300, Jani Nikula wrote:
> On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Add a new flag pin_params.neeeds_cpu_lmem_access so that the
> > low level pinning code doesn't need to peek into the display
> > driver's framebuffer structure.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
> >  drivers/gpu/drm/i915/i915_fb_pin.c          | 4 +++-
> >  drivers/gpu/drm/xe/display/xe_fb_pin.c      | 3 ++-
> >  3 files changed, 6 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> > index e6271437459d..bcf5a1f46092 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> > +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> > @@ -19,6 +19,7 @@ struct intel_fb_pin_params {
> >  	unsigned int alignment;
> >  	unsigned int phys_alignment;
> >  	unsigned int vtd_guard;
> > +	bool needs_cpu_lmem_access;
> >  };
> >  
> >  struct i915_vma *
> > diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> > index 780be25ad43b..96ffc4b0d809 100644
> > --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> > +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> > @@ -61,7 +61,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
> >  			 * ensure it is always in the mappable part of lmem, if this is
> >  			 * a small-bar device.
> >  			 */
> > -			if (intel_fb_needs_cpu_access(fb))
> > +			if (pin_params->needs_cpu_lmem_access)
> >  				flags &= ~I915_BO_ALLOC_GPU_ONLY;
> >  			ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
> >  							flags);
> > @@ -275,6 +275,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
> >  			.alignment = intel_plane_fb_min_alignment(plane_state),
> >  			.phys_alignment = intel_plane_fb_min_phys_alignment(plane_state),
> >  			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
> > +			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
> 
> IIUC this path never uses .needs_cpu_lmem_access, but you initialize it
> anyway. What I find confusing is initializing it here apparently
> unnecessarily, but then leaving it out on a number of other paths that
> don't need it.

Hmm, yeah looks like we don't have the explicit migrate stuff
in the DPT path for some reason.

I'm sure the migration is happening though because I've used
DG2 on a small BAR system quite a bit, and page flips with clear
color work fine on i915 (unlike on xe+small BAR where it just
fails). And I remember even seeing the migration popping up in
the profiles. Now I'm wondering what might be triggering it
before the vma has been pinned...

Ideally I'd like to get rid of this whole thing and instead have
userspace put the clear color into its own separate little BO.
That way we wouldn't have to waste the precious CPU visible LMEM
on the full framebuffers. The kernel part of that is pretty trivial
and I have the patches in some branch, but sadly the Mesa side
is much more complicated. That particular onion has at least four
layers through which the extra dmabuf would need to get plumbed :(

> 
> Other than that,
> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> >  		};
> >  		int fence_id = -1;
> >  
> > @@ -289,6 +290,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
> >  		struct intel_fb_pin_params pin_params = {
> >  			.view = &plane_state->view.gtt,
> >  			.alignment = intel_plane_fb_min_alignment(plane_state),
> > +			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
> >  		};
> >  
> >  		vma = i915_dpt_pin_to_ggtt(fb->dpt, pin_params.alignment / 512);
> > diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> > index 205492639dba..a4eb06cfa769 100644
> > --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> > +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> > @@ -335,7 +335,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> >  
> >  	refcount_set(&vma->ref, 1);
> >  	if (IS_DGFX(to_xe_device(bo->ttm.base.dev)) &&
> > -	    intel_fb_needs_cpu_access(&fb->base) &&
> > +	    pin_params->needs_cpu_lmem_access &&
> >  	    !(bo->flags & XE_BO_FLAG_NEEDS_CPU_ACCESS)) {
> >  		struct xe_vram_region *vram = xe_device_get_root_tile(xe)->mem.vram;
> >  
> > @@ -474,6 +474,7 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
> >  	struct intel_fb_pin_params pin_params = {
> >  		.view = &new_plane_state->view.gtt,
> >  		.alignment = plane->min_alignment(plane, fb, 0),
> > +		.needs_cpu_lmem_access = intel_fb_needs_cpu_access(fb),
> >  	};
> >  
> >  	if (reuse_vma(new_plane_state, old_plane_state))
> 
> -- 
> Jani Nikula, Intel

-- 
Ville Syrjälä
Intel

Re: [PATCH 04/11] drm/i915: Introduce pin_params.needs_cpu_lmem_access

[Ville Syrjälä]

On Fri, Apr 17, 2026 at 02:33:07PM +0300, Ville Syrjälä wrote:
> On Fri, Apr 17, 2026 at 12:39:54PM +0300, Jani Nikula wrote:
> > On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > Add a new flag pin_params.neeeds_cpu_lmem_access so that the
> > > low level pinning code doesn't need to peek into the display
> > > driver's framebuffer structure.
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
> > >  drivers/gpu/drm/i915/i915_fb_pin.c          | 4 +++-
> > >  drivers/gpu/drm/xe/display/xe_fb_pin.c      | 3 ++-
> > >  3 files changed, 6 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> > > index e6271437459d..bcf5a1f46092 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> > > @@ -19,6 +19,7 @@ struct intel_fb_pin_params {
> > >  	unsigned int alignment;
> > >  	unsigned int phys_alignment;
> > >  	unsigned int vtd_guard;
> > > +	bool needs_cpu_lmem_access;
> > >  };
> > >  
> > >  struct i915_vma *
> > > diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> > > index 780be25ad43b..96ffc4b0d809 100644
> > > --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> > > +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> > > @@ -61,7 +61,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
> > >  			 * ensure it is always in the mappable part of lmem, if this is
> > >  			 * a small-bar device.
> > >  			 */
> > > -			if (intel_fb_needs_cpu_access(fb))
> > > +			if (pin_params->needs_cpu_lmem_access)
> > >  				flags &= ~I915_BO_ALLOC_GPU_ONLY;
> > >  			ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
> > >  							flags);
> > > @@ -275,6 +275,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
> > >  			.alignment = intel_plane_fb_min_alignment(plane_state),
> > >  			.phys_alignment = intel_plane_fb_min_phys_alignment(plane_state),
> > >  			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
> > > +			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
> > 
> > IIUC this path never uses .needs_cpu_lmem_access, but you initialize it
> > anyway. What I find confusing is initializing it here apparently
> > unnecessarily, but then leaving it out on a number of other paths that
> > don't need it.
> 
> Hmm, yeah looks like we don't have the explicit migrate stuff
> in the DPT path for some reason.

Doh. Misread it. It is exactly the DPT path where we have this.
And that makes sense since DG2+ require DPT for tiled buffers
and clear color is only a thing with certain tiled modifiers.
And DG1, which doesn't have DPT, also doesn't support small-BAR
operation, so the migration is never needed there.

I guess the only situation where we might need the migration
in the ggtt path is if we run DG2 with DPT disable via the
modparam. But I've never actually tried that so not sure it
even works. Should probably give it a go at some point...

-- 
Ville Syrjälä
Intel

[PATCH 05/11] drm/i915: Extract intel_plane_needs_low_address()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract the naked "gmch? -> need a low ggtt address" check into
a more descriptive helper (intel_plane_needs_low_address()).
The goal being to eliminate all display specific stuff from the
low level pinning code.

The actual implementation still abuses PIN_MAPPABLE to achieve
this goal. I'm not entire convinced that this whole thing even
needs to exist, and the original issue wasn't just caused by
some other bug. But no time to dig into it right now, so let's
keep going.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_plane.c | 13 +++++++++++++
 drivers/gpu/drm/i915/display/intel_plane.h |  2 ++
 drivers/gpu/drm/i915/i915_fb_pin.c         | 11 ++---------
 3 files changed, 17 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index f15dd9e91243..f41f4c2ac320 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -171,6 +171,19 @@ intel_plane_destroy_state(struct drm_plane *plane,
 	kfree(plane_state);
 }
 
+bool intel_plane_needs_low_address(struct intel_display *display)
+{
+	/*
+	 * Valleyview is definitely limited to scanning out the first
+	 * 512MiB. Lets presume this behaviour was inherited from the
+	 * g4x display engine and that all earlier gen are similarly
+	 * limited. Testing suggests that it is a little more
+	 * complicated than this. For example, Cherryview appears quite
+	 * happy to scanout from anywhere within its global aperture.
+	 */
+	return HAS_GMCH(display);
+}
+
 bool intel_plane_needs_physical(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
diff --git a/drivers/gpu/drm/i915/display/intel_plane.h b/drivers/gpu/drm/i915/display/intel_plane.h
index 5a8f2f3baab5..7fa7fbbb58dc 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_plane.h
@@ -15,6 +15,7 @@ struct drm_rect;
 struct intel_atomic_state;
 struct intel_crtc;
 struct intel_crtc_state;
+struct intel_display;
 struct intel_dsb;
 struct intel_plane;
 struct intel_plane_state;
@@ -79,6 +80,7 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);
 void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
 			       struct intel_plane_state *plane_state);
 void intel_plane_helper_add(struct intel_plane *plane);
+bool intel_plane_needs_low_address(struct intel_display *display);
 bool intel_plane_needs_physical(struct intel_plane *plane);
 void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state,
 					 struct intel_plane_state *new_plane_state);
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index 96ffc4b0d809..a3e5107c12f0 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -140,16 +140,9 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 
 	atomic_inc(&i915->pending_fb_pin);
 
-	/*
-	 * Valleyview is definitely limited to scanning out the first
-	 * 512MiB. Lets presume this behaviour was inherited from the
-	 * g4x display engine and that all earlier gen are similarly
-	 * limited. Testing suggests that it is a little more
-	 * complicated than this. For example, Cherryview appears quite
-	 * happy to scanout from anywhere within its global aperture.
-	 */
 	pinctl = 0;
-	if (HAS_GMCH(display))
+	/* PIN_MAPPABLE limits the address to GMADR size */
+	if (intel_plane_needs_low_address(display))
 		pinctl |= PIN_MAPPABLE;
 
 	i915_gem_ww_ctx_init(&ww, true);
-- 
2.52.0

Re: [PATCH 05/11] drm/i915: Extract intel_plane_needs_low_address()

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Extract the naked "gmch? -> need a low ggtt address" check into
> a more descriptive helper (intel_plane_needs_low_address()).
> The goal being to eliminate all display specific stuff from the
> low level pinning code.
>
> The actual implementation still abuses PIN_MAPPABLE to achieve
> this goal. I'm not entire convinced that this whole thing even
> needs to exist, and the original issue wasn't just caused by
> some other bug. But no time to dig into it right now, so let's
> keep going.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_plane.c | 13 +++++++++++++
>  drivers/gpu/drm/i915/display/intel_plane.h |  2 ++
>  drivers/gpu/drm/i915/i915_fb_pin.c         | 11 ++---------
>  3 files changed, 17 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
> index f15dd9e91243..f41f4c2ac320 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> @@ -171,6 +171,19 @@ intel_plane_destroy_state(struct drm_plane *plane,
>  	kfree(plane_state);
>  }
>  
> +bool intel_plane_needs_low_address(struct intel_display *display)
> +{
> +	/*
> +	 * Valleyview is definitely limited to scanning out the first
> +	 * 512MiB. Lets presume this behaviour was inherited from the
> +	 * g4x display engine and that all earlier gen are similarly
> +	 * limited. Testing suggests that it is a little more
> +	 * complicated than this. For example, Cherryview appears quite
> +	 * happy to scanout from anywhere within its global aperture.
> +	 */
> +	return HAS_GMCH(display);
> +}
> +
>  bool intel_plane_needs_physical(struct intel_plane *plane)
>  {
>  	struct intel_display *display = to_intel_display(plane);
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.h b/drivers/gpu/drm/i915/display/intel_plane.h
> index 5a8f2f3baab5..7fa7fbbb58dc 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_plane.h
> @@ -15,6 +15,7 @@ struct drm_rect;
>  struct intel_atomic_state;
>  struct intel_crtc;
>  struct intel_crtc_state;
> +struct intel_display;
>  struct intel_dsb;
>  struct intel_plane;
>  struct intel_plane_state;
> @@ -79,6 +80,7 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);
>  void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
>  			       struct intel_plane_state *plane_state);
>  void intel_plane_helper_add(struct intel_plane *plane);
> +bool intel_plane_needs_low_address(struct intel_display *display);
>  bool intel_plane_needs_physical(struct intel_plane *plane);
>  void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state,
>  					 struct intel_plane_state *new_plane_state);
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index 96ffc4b0d809..a3e5107c12f0 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -140,16 +140,9 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  
>  	atomic_inc(&i915->pending_fb_pin);
>  
> -	/*
> -	 * Valleyview is definitely limited to scanning out the first
> -	 * 512MiB. Lets presume this behaviour was inherited from the
> -	 * g4x display engine and that all earlier gen are similarly
> -	 * limited. Testing suggests that it is a little more
> -	 * complicated than this. For example, Cherryview appears quite
> -	 * happy to scanout from anywhere within its global aperture.
> -	 */
>  	pinctl = 0;
> -	if (HAS_GMCH(display))
> +	/* PIN_MAPPABLE limits the address to GMADR size */
> +	if (intel_plane_needs_low_address(display))
>  		pinctl |= PIN_MAPPABLE;
>  
>  	i915_gem_ww_ctx_init(&ww, true);

-- 
Jani Nikula, Intel

[PATCH 06/11] drm/i915: Introduce pin_params.needs_low_address

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a new flag pin_params.needs_low_address to inform the pinning
code that the display needs a low ggtt address.

The goal is to eliminate all display specific stuff from
the low level pinning code (the direct intel_plane_needs_low_addres())
call in this case).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
 drivers/gpu/drm/i915/display/intel_fbdev.c  | 2 ++
 drivers/gpu/drm/i915/i915_fb_pin.c          | 4 +++-
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
index bcf5a1f46092..cf54a96569de 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -20,6 +20,7 @@ struct intel_fb_pin_params {
 	unsigned int phys_alignment;
 	unsigned int vtd_guard;
 	bool needs_cpu_lmem_access;
+	bool needs_low_address;
 };
 
 struct i915_vma *
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 136fa827c8f0..4c3e54acde81 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -55,6 +55,7 @@
 #include "intel_fb_pin.h"
 #include "intel_fbdev.h"
 #include "intel_frontbuffer.h"
+#include "intel_plane.h"
 
 struct intel_fbdev {
 	struct intel_framebuffer *fb;
@@ -314,6 +315,7 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
 	pin_params.vtd_guard = intel_fb_view_vtd_guard(&fb->base,
 						       &fb->normal_view,
 						       DRM_MODE_ROTATE_0);
+	pin_params.needs_low_address = intel_plane_needs_low_address(display);
 
 	vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params, NULL);
 	if (IS_ERR(vma)) {
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index a3e5107c12f0..97e4cdfd2447 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -142,7 +142,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 
 	pinctl = 0;
 	/* PIN_MAPPABLE limits the address to GMADR size */
-	if (intel_plane_needs_low_address(display))
+	if (pin_params->needs_low_address)
 		pinctl |= PIN_MAPPABLE;
 
 	i915_gem_ww_ctx_init(&ww, true);
@@ -256,6 +256,7 @@ intel_plane_fb_vtd_guard(const struct intel_plane_state *plane_state)
 int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 		       const struct intel_plane_state *old_plane_state)
 {
+	struct intel_display *display = to_intel_display(plane_state);
 	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
 	const struct intel_framebuffer *fb =
@@ -269,6 +270,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 			.phys_alignment = intel_plane_fb_min_phys_alignment(plane_state),
 			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
 			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
+			.needs_low_address = intel_plane_needs_low_address(display),
 		};
 		int fence_id = -1;
 
-- 
2.52.0

Re: [PATCH 06/11] drm/i915: Introduce pin_params.needs_low_address

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a new flag pin_params.needs_low_address to inform the pinning
> code that the display needs a low ggtt address.
>
> The goal is to eliminate all display specific stuff from
> the low level pinning code (the direct intel_plane_needs_low_addres())
> call in this case).

So this one initializes .needs_low_address only where needed. I guess my
main concern is that the calling code does need to know the low-level
implementation detail of when you do need to initialize it.

Regardless, I think overall this is going in the right direction.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
>  drivers/gpu/drm/i915/display/intel_fbdev.c  | 2 ++
>  drivers/gpu/drm/i915/i915_fb_pin.c          | 4 +++-
>  3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> index bcf5a1f46092..cf54a96569de 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> @@ -20,6 +20,7 @@ struct intel_fb_pin_params {
>  	unsigned int phys_alignment;
>  	unsigned int vtd_guard;
>  	bool needs_cpu_lmem_access;
> +	bool needs_low_address;
>  };
>  
>  struct i915_vma *
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index 136fa827c8f0..4c3e54acde81 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -55,6 +55,7 @@
>  #include "intel_fb_pin.h"
>  #include "intel_fbdev.h"
>  #include "intel_frontbuffer.h"
> +#include "intel_plane.h"
>  
>  struct intel_fbdev {
>  	struct intel_framebuffer *fb;
> @@ -314,6 +315,7 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
>  	pin_params.vtd_guard = intel_fb_view_vtd_guard(&fb->base,
>  						       &fb->normal_view,
>  						       DRM_MODE_ROTATE_0);
> +	pin_params.needs_low_address = intel_plane_needs_low_address(display);
>  
>  	vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params, NULL);
>  	if (IS_ERR(vma)) {
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index a3e5107c12f0..97e4cdfd2447 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -142,7 +142,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  
>  	pinctl = 0;
>  	/* PIN_MAPPABLE limits the address to GMADR size */
> -	if (intel_plane_needs_low_address(display))
> +	if (pin_params->needs_low_address)
>  		pinctl |= PIN_MAPPABLE;
>  
>  	i915_gem_ww_ctx_init(&ww, true);
> @@ -256,6 +256,7 @@ intel_plane_fb_vtd_guard(const struct intel_plane_state *plane_state)
>  int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  		       const struct intel_plane_state *old_plane_state)
>  {
> +	struct intel_display *display = to_intel_display(plane_state);
>  	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
>  	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
>  	const struct intel_framebuffer *fb =
> @@ -269,6 +270,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  			.phys_alignment = intel_plane_fb_min_phys_alignment(plane_state),
>  			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
>  			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
> +			.needs_low_address = intel_plane_needs_low_address(display),
>  		};
>  		int fence_id = -1;

-- 
Jani Nikula, Intel

[PATCH 07/11] drm/i915: Introduce pin_params.needs_physical

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a new flag pin_params.needs_physical to inform the pinning
code that the display needs a physical address and not GGTT
address.

This isn't strictly necessary as the current phys_alignment!=0
check is enough in practice. But theoretically one could have
needs_physical==true without any alignment requirements. And
having an explicit flag feels a bit less magical.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
 drivers/gpu/drm/i915/i915_fb_pin.c          | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
index cf54a96569de..3e37e9874f50 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -21,6 +21,7 @@ struct intel_fb_pin_params {
 	unsigned int vtd_guard;
 	bool needs_cpu_lmem_access;
 	bool needs_low_address;
+	bool needs_physical;
 };
 
 struct i915_vma *
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index 97e4cdfd2447..bfe9a5342e13 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -148,7 +148,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 	i915_gem_ww_ctx_init(&ww, true);
 retry:
 	ret = i915_gem_object_lock(obj, &ww);
-	if (!ret && pin_params->phys_alignment)
+	if (!ret && pin_params->needs_physical)
 		ret = i915_gem_object_attach_phys(obj, pin_params->phys_alignment);
 	else if (!ret && HAS_LMEM(i915))
 		ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
@@ -271,6 +271,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
 			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
 			.needs_low_address = intel_plane_needs_low_address(display),
+			.needs_physical = intel_plane_needs_physical(plane),
 		};
 		int fence_id = -1;
 
-- 
2.52.0

Re: [PATCH 07/11] drm/i915: Introduce pin_params.needs_physical

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a new flag pin_params.needs_physical to inform the pinning
> code that the display needs a physical address and not GGTT
> address.
>
> This isn't strictly necessary as the current phys_alignment!=0
> check is enough in practice. But theoretically one could have
> needs_physical==true without any alignment requirements. And
> having an explicit flag feels a bit less magical.

Agreed.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
>  drivers/gpu/drm/i915/i915_fb_pin.c          | 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> index cf54a96569de..3e37e9874f50 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> @@ -21,6 +21,7 @@ struct intel_fb_pin_params {
>  	unsigned int vtd_guard;
>  	bool needs_cpu_lmem_access;
>  	bool needs_low_address;
> +	bool needs_physical;
>  };
>  
>  struct i915_vma *
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index 97e4cdfd2447..bfe9a5342e13 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -148,7 +148,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  	i915_gem_ww_ctx_init(&ww, true);
>  retry:
>  	ret = i915_gem_object_lock(obj, &ww);
> -	if (!ret && pin_params->phys_alignment)
> +	if (!ret && pin_params->needs_physical)
>  		ret = i915_gem_object_attach_phys(obj, pin_params->phys_alignment);
>  	else if (!ret && HAS_LMEM(i915))
>  		ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
> @@ -271,6 +271,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  			.vtd_guard = intel_plane_fb_vtd_guard(plane_state),
>  			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
>  			.needs_low_address = intel_plane_needs_low_address(display),
> +			.needs_physical = intel_plane_needs_physical(plane),
>  		};
>  		int fence_id = -1;

-- 
Jani Nikula, Intel

[PATCH 08/11] drm/i915: Extract intel_plane_needs_fence()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract the naked DISPLA_VER<4 checks into a descriptive little
helper (intel_plane_needs_fence()).

And while at it document the reason why the check is what it is.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb.c    | 2 +-
 drivers/gpu/drm/i915/display/intel_plane.c | 9 +++++++++
 drivers/gpu/drm/i915/display/intel_plane.h | 1 +
 drivers/gpu/drm/i915/i915_fb_pin.c         | 2 +-
 4 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index cbeb39ebdb73..1c0859d5f829 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -1287,7 +1287,7 @@ bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
 	struct intel_display *display = to_intel_display(plane_state);
 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
 
-	return DISPLAY_VER(display) < 4 ||
+	return intel_plane_needs_fence(display) ||
 		(plane->fbc && !plane_state->no_fbc_reason &&
 		 i915_gtt_view_is_normal(&plane_state->view.gtt));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index f41f4c2ac320..c2b58d3b9c23 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -192,6 +192,15 @@ bool intel_plane_needs_physical(struct intel_plane *plane)
 		DISPLAY_INFO(display)->cursor_needs_physical;
 }
 
+bool intel_plane_needs_fence(struct intel_display *display)
+{
+	/*
+	 * pre-i965 planes use the fence for tiled scanout.
+	 * i965+ planes have their own tiled scanout control bit.
+	 */
+	return DISPLAY_VER(display) < 4;
+}
+
 bool intel_plane_can_async_flip(struct intel_plane *plane,
 				const struct drm_format_info *info,
 				u64 modifier)
diff --git a/drivers/gpu/drm/i915/display/intel_plane.h b/drivers/gpu/drm/i915/display/intel_plane.h
index 7fa7fbbb58dc..7b5456f56f42 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_plane.h
@@ -82,6 +82,7 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
 void intel_plane_helper_add(struct intel_plane *plane);
 bool intel_plane_needs_low_address(struct intel_display *display);
 bool intel_plane_needs_physical(struct intel_plane *plane);
+bool intel_plane_needs_fence(struct intel_display *display);
 void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state,
 					 struct intel_plane_state *new_plane_state);
 int intel_plane_add_affected(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index bfe9a5342e13..a8ed888183cb 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -188,7 +188,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 		 * mode that matches the user configuration.
 		 */
 		ret = i915_vma_pin_fence(vma);
-		if (ret != 0 && DISPLAY_VER(display) < 4) {
+		if (ret != 0 && intel_plane_needs_fence(display)) {
 			i915_vma_unpin(vma);
 			goto err_unpin;
 		}
-- 
2.52.0

Re: [PATCH 08/11] drm/i915: Extract intel_plane_needs_fence()

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Extract the naked DISPLA_VER<4 checks into a descriptive little
> helper (intel_plane_needs_fence()).

*DISPLAY_VER

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>
> And while at it document the reason why the check is what it is.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fb.c    | 2 +-
>  drivers/gpu/drm/i915/display/intel_plane.c | 9 +++++++++
>  drivers/gpu/drm/i915/display/intel_plane.h | 1 +
>  drivers/gpu/drm/i915/i915_fb_pin.c         | 2 +-
>  4 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index cbeb39ebdb73..1c0859d5f829 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -1287,7 +1287,7 @@ bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
>  	struct intel_display *display = to_intel_display(plane_state);
>  	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
>  
> -	return DISPLAY_VER(display) < 4 ||
> +	return intel_plane_needs_fence(display) ||
>  		(plane->fbc && !plane_state->no_fbc_reason &&
>  		 i915_gtt_view_is_normal(&plane_state->view.gtt));
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
> index f41f4c2ac320..c2b58d3b9c23 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> @@ -192,6 +192,15 @@ bool intel_plane_needs_physical(struct intel_plane *plane)
>  		DISPLAY_INFO(display)->cursor_needs_physical;
>  }
>  
> +bool intel_plane_needs_fence(struct intel_display *display)
> +{
> +	/*
> +	 * pre-i965 planes use the fence for tiled scanout.
> +	 * i965+ planes have their own tiled scanout control bit.
> +	 */
> +	return DISPLAY_VER(display) < 4;
> +}
> +
>  bool intel_plane_can_async_flip(struct intel_plane *plane,
>  				const struct drm_format_info *info,
>  				u64 modifier)
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.h b/drivers/gpu/drm/i915/display/intel_plane.h
> index 7fa7fbbb58dc..7b5456f56f42 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_plane.h
> @@ -82,6 +82,7 @@ void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
>  void intel_plane_helper_add(struct intel_plane *plane);
>  bool intel_plane_needs_low_address(struct intel_display *display);
>  bool intel_plane_needs_physical(struct intel_plane *plane);
> +bool intel_plane_needs_fence(struct intel_display *display);
>  void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state,
>  					 struct intel_plane_state *new_plane_state);
>  int intel_plane_add_affected(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index bfe9a5342e13..a8ed888183cb 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -188,7 +188,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  		 * mode that matches the user configuration.
>  		 */
>  		ret = i915_vma_pin_fence(vma);
> -		if (ret != 0 && DISPLAY_VER(display) < 4) {
> +		if (ret != 0 && intel_plane_needs_fence(display)) {
>  			i915_vma_unpin(vma);
>  			goto err_unpin;
>  		}

-- 
Jani Nikula, Intel

[PATCH 09/11] drm/i915: Introduce pin_params.needs_fence

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a new flag pin_params.needs_fencel to inform the pinning
code that the display needs a fence for tiled scanout.

The goal is to eliminate all display specific stuff from
the low level pinning code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
 drivers/gpu/drm/i915/i915_fb_pin.c          | 4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
index 3e37e9874f50..95f83bf7411f 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -22,6 +22,7 @@ struct intel_fb_pin_params {
 	bool needs_cpu_lmem_access;
 	bool needs_low_address;
 	bool needs_physical;
+	bool needs_fence;
 };
 
 struct i915_vma *
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index a8ed888183cb..5060ec8c76ca 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -112,7 +112,6 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 		     const struct intel_fb_pin_params *pin_params,
 		     int *out_fence_id)
 {
-	struct intel_display *display = to_intel_display(fb->dev);
 	struct drm_i915_private *i915 = to_i915(fb->dev);
 	struct drm_gem_object *_obj = intel_fb_bo(fb);
 	struct drm_i915_gem_object *obj = to_intel_bo(_obj);
@@ -188,7 +187,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 		 * mode that matches the user configuration.
 		 */
 		ret = i915_vma_pin_fence(vma);
-		if (ret != 0 && intel_plane_needs_fence(display)) {
+		if (ret != 0 && pin_params->needs_fence) {
 			i915_vma_unpin(vma);
 			goto err_unpin;
 		}
@@ -272,6 +271,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
 			.needs_low_address = intel_plane_needs_low_address(display),
 			.needs_physical = intel_plane_needs_physical(plane),
+			.needs_fence = intel_plane_needs_fence(display),
 		};
 		int fence_id = -1;
 
-- 
2.52.0

Re: [PATCH 09/11] drm/i915: Introduce pin_params.needs_fence

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a new flag pin_params.needs_fencel to inform the pinning

*needs_fence

> code that the display needs a fence for tiled scanout.
>
> The goal is to eliminate all display specific stuff from
> the low level pinning code.

Again, I find it just a little magical that .needs_fence is only
initialized in certain code paths, with the implementation detail
knowledge where the member is used. E.g. in this case out_fence_id !=
NULL.

Regardless,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
>  drivers/gpu/drm/i915/i915_fb_pin.c          | 4 ++--
>  2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> index 3e37e9874f50..95f83bf7411f 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> @@ -22,6 +22,7 @@ struct intel_fb_pin_params {
>  	bool needs_cpu_lmem_access;
>  	bool needs_low_address;
>  	bool needs_physical;
> +	bool needs_fence;
>  };
>  
>  struct i915_vma *
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index a8ed888183cb..5060ec8c76ca 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -112,7 +112,6 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  		     const struct intel_fb_pin_params *pin_params,
>  		     int *out_fence_id)
>  {
> -	struct intel_display *display = to_intel_display(fb->dev);
>  	struct drm_i915_private *i915 = to_i915(fb->dev);
>  	struct drm_gem_object *_obj = intel_fb_bo(fb);
>  	struct drm_i915_gem_object *obj = to_intel_bo(_obj);
> @@ -188,7 +187,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  		 * mode that matches the user configuration.
>  		 */
>  		ret = i915_vma_pin_fence(vma);
> -		if (ret != 0 && intel_plane_needs_fence(display)) {
> +		if (ret != 0 && pin_params->needs_fence) {
>  			i915_vma_unpin(vma);
>  			goto err_unpin;
>  		}
> @@ -272,6 +271,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
>  			.needs_low_address = intel_plane_needs_low_address(display),
>  			.needs_physical = intel_plane_needs_physical(plane),
> +			.needs_fence = intel_plane_needs_fence(display),
>  		};
>  		int fence_id = -1;

-- 
Jani Nikula, Intel

Re: [PATCH 09/11] drm/i915: Introduce pin_params.needs_fence

[Ville Syrjälä]

On Fri, Apr 17, 2026 at 12:58:26PM +0300, Jani Nikula wrote:
> On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Add a new flag pin_params.needs_fencel to inform the pinning
> 
> *needs_fence
> 
> > code that the display needs a fence for tiled scanout.
> >
> > The goal is to eliminate all display specific stuff from
> > the low level pinning code.
> 
> Again, I find it just a little magical that .needs_fence is only
> initialized in certain code paths, with the implementation detail
> knowledge where the member is used.

I think in the end we could more or less set all the pin_params
members identically in all the codepaths. Though in the end we
should only have three codepaths (plane ggtt pin, plane dpt pin,
fbdev ggtt pin), so the xe vs. i915 differences here will just
go away with that.

> E.g. in this case out_fence_id !=
> NULL.

I suppose for that particular thing I could also add a
.uses_fence and just always require the &fence_id to be
passed in. Although I guess then I'd need to add the
fence_id tracking to to the fbdev path as well.

Hmm, I think fences might disappear on runtime suspend
so it might not really work to have a fence being tracked
for the fbdev perma-pin and expect it to survive runtime
suspend. So it may be that we never want to request a fence
in the fbdev codepath. But if the fence disappears then how
would a tiled fbdev framebuffer even work? I need to check
this...

And for the DPT path we probably shouldn't set any fence flags
(nor even have the *out_fence_id) since fence+DPT is just
nonsense.

> 
> Regardless,
> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> 
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 +
> >  drivers/gpu/drm/i915/i915_fb_pin.c          | 4 ++--
> >  2 files changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> > index 3e37e9874f50..95f83bf7411f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> > +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> > @@ -22,6 +22,7 @@ struct intel_fb_pin_params {
> >  	bool needs_cpu_lmem_access;
> >  	bool needs_low_address;
> >  	bool needs_physical;
> > +	bool needs_fence;
> >  };
> >  
> >  struct i915_vma *
> > diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> > index a8ed888183cb..5060ec8c76ca 100644
> > --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> > +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> > @@ -112,7 +112,6 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
> >  		     const struct intel_fb_pin_params *pin_params,
> >  		     int *out_fence_id)
> >  {
> > -	struct intel_display *display = to_intel_display(fb->dev);
> >  	struct drm_i915_private *i915 = to_i915(fb->dev);
> >  	struct drm_gem_object *_obj = intel_fb_bo(fb);
> >  	struct drm_i915_gem_object *obj = to_intel_bo(_obj);
> > @@ -188,7 +187,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
> >  		 * mode that matches the user configuration.
> >  		 */
> >  		ret = i915_vma_pin_fence(vma);
> > -		if (ret != 0 && intel_plane_needs_fence(display)) {
> > +		if (ret != 0 && pin_params->needs_fence) {
> >  			i915_vma_unpin(vma);
> >  			goto err_unpin;
> >  		}
> > @@ -272,6 +271,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
> >  			.needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base),
> >  			.needs_low_address = intel_plane_needs_low_address(display),
> >  			.needs_physical = intel_plane_needs_physical(plane),
> > +			.needs_fence = intel_plane_needs_fence(display),
> >  		};
> >  		int fence_id = -1;
> 
> -- 
> Jani Nikula, Intel

-- 
Ville Syrjälä
Intel

[PATCH 10/11] drm/xe: Eliminate intel_fb_uses_dpt() call from __xe_pin_fb_vma()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Move the intel_fb_uses_dpt() out from __xe_pin_fb_vma() into
intel_plane_pin_fb() so the we don't any display stuff that deep
in the pinning code.

And intel_fb_pin_to_ggtt() can just say "this does not need DPT"
always since it's specifically about pinning the fb into GGTT.
The previous logic here was kinda insane with the high level code
assuming GGTT, and low level code potentially deciding otherwise.
In practice it should have been fine because intel_fb_pin_to_ggtt()
only gets used from the intiial_palne code, and there we are
not supposed to be have a framebuffer that needs DPT.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index a4eb06cfa769..44562769fbc9 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -318,7 +318,7 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
 	return ret;
 }
 
-static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
+static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, bool is_dpt,
 					const struct intel_fb_pin_params *pin_params)
 {
 	struct drm_device *dev = fb->base.dev;
@@ -375,7 +375,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
 		goto err;
 
 	vma->bo = bo;
-	if (intel_fb_uses_dpt(&fb->base))
+	if (is_dpt)
 		ret = __xe_pin_fb_vma_dpt(fb, pin_params, vma);
 	else
 		ret = __xe_pin_fb_vma_ggtt(fb, pin_params, vma);
@@ -419,7 +419,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
 	if (out_fence_id)
 		*out_fence_id = -1;
 
-	return __xe_pin_fb_vma(to_intel_framebuffer(fb), pin_params);
+	return __xe_pin_fb_vma(to_intel_framebuffer(fb), false, pin_params);
 }
 
 void intel_fb_unpin_vma(struct i915_vma *vma, int fence_id)
@@ -483,7 +483,8 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
 	/* We reject creating !SCANOUT fb's, so this is weird.. */
 	drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_FORCE_WC));
 
-	vma = __xe_pin_fb_vma(intel_fb, &pin_params);
+	vma = __xe_pin_fb_vma(intel_fb, intel_fb_uses_dpt(&intel_fb->base),
+			      &pin_params);
 
 	if (IS_ERR(vma))
 		return PTR_ERR(vma);
-- 
2.52.0

Re: [PATCH 10/11] drm/xe: Eliminate intel_fb_uses_dpt() call from __xe_pin_fb_vma()

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move the intel_fb_uses_dpt() out from __xe_pin_fb_vma() into
> intel_plane_pin_fb() so the we don't any display stuff that deep
> in the pinning code.

Parse error. "so that we don't have"?

> And intel_fb_pin_to_ggtt() can just say "this does not need DPT"
> always since it's specifically about pinning the fb into GGTT.
> The previous logic here was kinda insane with the high level code
> assuming GGTT, and low level code potentially deciding otherwise.
> In practice it should have been fine because intel_fb_pin_to_ggtt()
> only gets used from the intiial_palne code, and there we are
> not supposed to be have a framebuffer that needs DPT.

*initial_plane

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/xe/display/xe_fb_pin.c | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index a4eb06cfa769..44562769fbc9 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -318,7 +318,7 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
>  	return ret;
>  }
>  
> -static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
> +static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, bool is_dpt,
>  					const struct intel_fb_pin_params *pin_params)
>  {
>  	struct drm_device *dev = fb->base.dev;
> @@ -375,7 +375,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
>  		goto err;
>  
>  	vma->bo = bo;
> -	if (intel_fb_uses_dpt(&fb->base))
> +	if (is_dpt)
>  		ret = __xe_pin_fb_vma_dpt(fb, pin_params, vma);
>  	else
>  		ret = __xe_pin_fb_vma_ggtt(fb, pin_params, vma);
> @@ -419,7 +419,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
>  	if (out_fence_id)
>  		*out_fence_id = -1;
>  
> -	return __xe_pin_fb_vma(to_intel_framebuffer(fb), pin_params);
> +	return __xe_pin_fb_vma(to_intel_framebuffer(fb), false, pin_params);
>  }
>  
>  void intel_fb_unpin_vma(struct i915_vma *vma, int fence_id)
> @@ -483,7 +483,8 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
>  	/* We reject creating !SCANOUT fb's, so this is weird.. */
>  	drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_FORCE_WC));
>  
> -	vma = __xe_pin_fb_vma(intel_fb, &pin_params);
> +	vma = __xe_pin_fb_vma(intel_fb, intel_fb_uses_dpt(&intel_fb->base),
> +			      &pin_params);
>  
>  	if (IS_ERR(vma))
>  		return PTR_ERR(vma);

-- 
Jani Nikula, Intel

[PATCH 11/11] drm/i915: Don't pass the framebuffer to low level pinning functions

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Now that we have the pin_params the low level pinning code no
longer needs the entire framebuffer structure. The gem object
alone (along with the pin_params) is enough.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb_pin.h   |  4 +--
 drivers/gpu/drm/i915/display/intel_fbdev.c    |  6 ++--
 drivers/gpu/drm/i915/i915_fb_pin.c            | 15 ++++------
 drivers/gpu/drm/xe/display/xe_fb_pin.c        | 28 ++++++++-----------
 drivers/gpu/drm/xe/display/xe_initial_plane.c |  2 +-
 5 files changed, 23 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
index 95f83bf7411f..5825503c38ea 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -8,7 +8,7 @@
 
 #include <linux/types.h>
 
-struct drm_framebuffer;
+struct drm_gem_object;
 struct i915_vma;
 struct intel_plane_state;
 struct i915_gtt_view;
@@ -26,7 +26,7 @@ struct intel_fb_pin_params {
 };
 
 struct i915_vma *
-intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
+intel_fb_pin_to_ggtt(struct drm_gem_object *obj,
 		     const struct intel_fb_pin_params *pin_params,
 		     int *out_fence_id);
 
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 4c3e54acde81..9ab0ac49abb7 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -306,6 +306,8 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
 		sizes->fb_height = fb->base.height;
 	}
 
+	obj = intel_fb_bo(&fb->base);
+
 	/* Pin the GGTT vma for our access via info->screen_base.
 	 * This also validates that any existing fb inherited from the
 	 * BIOS is suitable for own access.
@@ -317,7 +319,7 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
 						       DRM_MODE_ROTATE_0);
 	pin_params.needs_low_address = intel_plane_needs_low_address(display);
 
-	vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params, NULL);
+	vma = intel_fb_pin_to_ggtt(obj, &pin_params, NULL);
 	if (IS_ERR(vma)) {
 		ret = PTR_ERR(vma);
 		goto out_unlock;
@@ -328,8 +330,6 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
 
 	info->fbops = &intelfb_ops;
 
-	obj = intel_fb_bo(&fb->base);
-
 	ret = intel_bo_fbdev_fill_info(obj, info, vma);
 	if (ret)
 		goto out_unpin;
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index 5060ec8c76ca..b0e121462ca3 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -23,12 +23,10 @@
 #include "i915_vma.h"
 
 static struct i915_vma *
-intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
-		    struct intel_dpt *dpt,
+intel_fb_pin_to_dpt(struct drm_gem_object *_obj, struct intel_dpt *dpt,
 		    const struct intel_fb_pin_params *pin_params)
 {
-	struct drm_i915_private *i915 = to_i915(fb->dev);
-	struct drm_gem_object *_obj = intel_fb_bo(fb);
+	struct drm_i915_private *i915 = to_i915(_obj->dev);
 	struct drm_i915_gem_object *obj = to_intel_bo(_obj);
 	struct i915_address_space *vm = i915_dpt_to_vm(dpt);
 	struct i915_gem_ww_ctx ww;
@@ -108,12 +106,11 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
 }
 
 struct i915_vma *
-intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
+intel_fb_pin_to_ggtt(struct drm_gem_object *_obj,
 		     const struct intel_fb_pin_params *pin_params,
 		     int *out_fence_id)
 {
-	struct drm_i915_private *i915 = to_i915(fb->dev);
-	struct drm_gem_object *_obj = intel_fb_bo(fb);
+	struct drm_i915_private *i915 = to_i915(_obj->dev);
 	struct drm_i915_gem_object *obj = to_intel_bo(_obj);
 	intel_wakeref_t wakeref;
 	struct i915_gem_ww_ctx ww;
@@ -275,7 +272,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 		};
 		int fence_id = -1;
 
-		vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params,
+		vma = intel_fb_pin_to_ggtt(intel_fb_bo(&fb->base), &pin_params,
 					   intel_plane_uses_fence(plane_state) ? &fence_id : NULL);
 		if (IS_ERR(vma))
 			return PTR_ERR(vma);
@@ -295,7 +292,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
 
 		plane_state->ggtt_vma = vma;
 
-		vma = intel_fb_pin_to_dpt(&fb->base, fb->dpt, &pin_params);
+		vma = intel_fb_pin_to_dpt(intel_fb_bo(&fb->base), fb->dpt, &pin_params);
 		if (IS_ERR(vma)) {
 			i915_dpt_unpin_from_ggtt(fb->dpt);
 			plane_state->ggtt_vma = NULL;
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 44562769fbc9..5d7b30f62930 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -139,14 +139,13 @@ write_dpt_remapped(struct xe_bo *bo,
 	}
 }
 
-static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
+static int __xe_pin_fb_vma_dpt(struct drm_gem_object *obj,
 			       const struct intel_fb_pin_params *pin_params,
 			       struct i915_vma *vma)
 {
-	struct xe_device *xe = to_xe_device(fb->base.dev);
+	struct xe_device *xe = to_xe_device(obj->dev);
 	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
 	struct xe_ggtt *ggtt = tile0->mem.ggtt;
-	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
 	const struct i915_gtt_view *view = pin_params->view;
 	struct xe_bo *bo = gem_to_xe_bo(obj), *dpt;
 	u32 dpt_size, size = bo->ttm.base.size;
@@ -268,14 +267,13 @@ static void write_ggtt_rotated_node(struct xe_ggtt *ggtt, struct xe_ggtt_node *n
 				   rot_info->plane[i].dst_stride);
 }
 
-static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
+static int __xe_pin_fb_vma_ggtt(struct drm_gem_object *obj,
 				const struct intel_fb_pin_params *pin_params,
 				struct i915_vma *vma)
 {
-	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
 	const struct i915_gtt_view *view = pin_params->view;
 	struct xe_bo *bo = gem_to_xe_bo(obj);
-	struct xe_device *xe = to_xe_device(fb->base.dev);
+	struct xe_device *xe = to_xe_device(obj->dev);
 	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
 	struct xe_ggtt *ggtt = tile0->mem.ggtt;
 	u64 pte, size;
@@ -318,13 +316,11 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
 	return ret;
 }
 
-static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, bool is_dpt,
+static struct i915_vma *__xe_pin_fb_vma(struct drm_gem_object *obj, bool is_dpt,
 					const struct intel_fb_pin_params *pin_params)
 {
-	struct drm_device *dev = fb->base.dev;
-	struct xe_device *xe = to_xe_device(dev);
+	struct xe_device *xe = to_xe_device(obj->dev);
 	struct i915_vma *vma = kzalloc(sizeof(*vma), GFP_KERNEL);
-	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
 	struct xe_bo *bo = gem_to_xe_bo(obj);
 	struct xe_validation_ctx ctx;
 	struct drm_exec exec;
@@ -376,9 +372,9 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, bool
 
 	vma->bo = bo;
 	if (is_dpt)
-		ret = __xe_pin_fb_vma_dpt(fb, pin_params, vma);
+		ret = __xe_pin_fb_vma_dpt(obj, pin_params, vma);
 	else
-		ret = __xe_pin_fb_vma_ggtt(fb, pin_params, vma);
+		ret = __xe_pin_fb_vma_ggtt(obj, pin_params, vma);
 	if (ret)
 		goto err_unpin;
 
@@ -412,14 +408,14 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
 }
 
 struct i915_vma *
-intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
+intel_fb_pin_to_ggtt(struct drm_gem_object *obj,
 		     const struct intel_fb_pin_params *pin_params,
 		     int *out_fence_id)
 {
 	if (out_fence_id)
 		*out_fence_id = -1;
 
-	return __xe_pin_fb_vma(to_intel_framebuffer(fb), false, pin_params);
+	return __xe_pin_fb_vma(obj, false, pin_params);
 }
 
 void intel_fb_unpin_vma(struct i915_vma *vma, int fence_id)
@@ -469,7 +465,6 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
 	struct drm_gem_object *obj = intel_fb_bo(fb);
 	struct xe_bo *bo = gem_to_xe_bo(obj);
 	struct i915_vma *vma;
-	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
 	struct intel_fb_pin_params pin_params = {
 		.view = &new_plane_state->view.gtt,
@@ -483,8 +478,7 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
 	/* We reject creating !SCANOUT fb's, so this is weird.. */
 	drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_FORCE_WC));
 
-	vma = __xe_pin_fb_vma(intel_fb, intel_fb_uses_dpt(&intel_fb->base),
-			      &pin_params);
+	vma = __xe_pin_fb_vma(obj, intel_fb_uses_dpt(fb), &pin_params);
 
 	if (IS_ERR(vma))
 		return PTR_ERR(vma);
diff --git a/drivers/gpu/drm/xe/display/xe_initial_plane.c b/drivers/gpu/drm/xe/display/xe_initial_plane.c
index 4f0ad4692ed6..8e3c0c4b81fe 100644
--- a/drivers/gpu/drm/xe/display/xe_initial_plane.c
+++ b/drivers/gpu/drm/xe/display/xe_initial_plane.c
@@ -138,7 +138,7 @@ xe_initial_plane_setup(struct drm_plane_state *_plane_state,
 		.view = &plane_state->view.gtt,
 	};
 
-	vma = intel_fb_pin_to_ggtt(fb, &pin_params, NULL);
+	vma = intel_fb_pin_to_ggtt(intel_fb_bo(fb), &pin_params, NULL);
 	if (IS_ERR(vma))
 		return PTR_ERR(vma);
 
-- 
2.52.0

Re: [PATCH 11/11] drm/i915: Don't pass the framebuffer to low level pinning functions

[Jani Nikula]

On Thu, 16 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Now that we have the pin_params the low level pinning code no
> longer needs the entire framebuffer structure. The gem object
> alone (along with the pin_params) is enough.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fb_pin.h   |  4 +--
>  drivers/gpu/drm/i915/display/intel_fbdev.c    |  6 ++--
>  drivers/gpu/drm/i915/i915_fb_pin.c            | 15 ++++------
>  drivers/gpu/drm/xe/display/xe_fb_pin.c        | 28 ++++++++-----------
>  drivers/gpu/drm/xe/display/xe_initial_plane.c |  2 +-
>  5 files changed, 23 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> index 95f83bf7411f..5825503c38ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> @@ -8,7 +8,7 @@
>  
>  #include <linux/types.h>
>  
> -struct drm_framebuffer;
> +struct drm_gem_object;
>  struct i915_vma;
>  struct intel_plane_state;
>  struct i915_gtt_view;
> @@ -26,7 +26,7 @@ struct intel_fb_pin_params {
>  };
>  
>  struct i915_vma *
> -intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
> +intel_fb_pin_to_ggtt(struct drm_gem_object *obj,
>  		     const struct intel_fb_pin_params *pin_params,
>  		     int *out_fence_id);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index 4c3e54acde81..9ab0ac49abb7 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -306,6 +306,8 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
>  		sizes->fb_height = fb->base.height;
>  	}
>  
> +	obj = intel_fb_bo(&fb->base);
> +
>  	/* Pin the GGTT vma for our access via info->screen_base.
>  	 * This also validates that any existing fb inherited from the
>  	 * BIOS is suitable for own access.
> @@ -317,7 +319,7 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
>  						       DRM_MODE_ROTATE_0);
>  	pin_params.needs_low_address = intel_plane_needs_low_address(display);
>  
> -	vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params, NULL);
> +	vma = intel_fb_pin_to_ggtt(obj, &pin_params, NULL);
>  	if (IS_ERR(vma)) {
>  		ret = PTR_ERR(vma);
>  		goto out_unlock;
> @@ -328,8 +330,6 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
>  
>  	info->fbops = &intelfb_ops;
>  
> -	obj = intel_fb_bo(&fb->base);
> -
>  	ret = intel_bo_fbdev_fill_info(obj, info, vma);
>  	if (ret)
>  		goto out_unpin;
> diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
> index 5060ec8c76ca..b0e121462ca3 100644
> --- a/drivers/gpu/drm/i915/i915_fb_pin.c
> +++ b/drivers/gpu/drm/i915/i915_fb_pin.c
> @@ -23,12 +23,10 @@
>  #include "i915_vma.h"
>  
>  static struct i915_vma *
> -intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
> -		    struct intel_dpt *dpt,
> +intel_fb_pin_to_dpt(struct drm_gem_object *_obj, struct intel_dpt *dpt,
>  		    const struct intel_fb_pin_params *pin_params)
>  {
> -	struct drm_i915_private *i915 = to_i915(fb->dev);
> -	struct drm_gem_object *_obj = intel_fb_bo(fb);
> +	struct drm_i915_private *i915 = to_i915(_obj->dev);
>  	struct drm_i915_gem_object *obj = to_intel_bo(_obj);
>  	struct i915_address_space *vm = i915_dpt_to_vm(dpt);
>  	struct i915_gem_ww_ctx ww;
> @@ -108,12 +106,11 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
>  }
>  
>  struct i915_vma *
> -intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
> +intel_fb_pin_to_ggtt(struct drm_gem_object *_obj,
>  		     const struct intel_fb_pin_params *pin_params,
>  		     int *out_fence_id)
>  {
> -	struct drm_i915_private *i915 = to_i915(fb->dev);
> -	struct drm_gem_object *_obj = intel_fb_bo(fb);
> +	struct drm_i915_private *i915 = to_i915(_obj->dev);
>  	struct drm_i915_gem_object *obj = to_intel_bo(_obj);
>  	intel_wakeref_t wakeref;
>  	struct i915_gem_ww_ctx ww;
> @@ -275,7 +272,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  		};
>  		int fence_id = -1;
>  
> -		vma = intel_fb_pin_to_ggtt(&fb->base, &pin_params,
> +		vma = intel_fb_pin_to_ggtt(intel_fb_bo(&fb->base), &pin_params,
>  					   intel_plane_uses_fence(plane_state) ? &fence_id : NULL);
>  		if (IS_ERR(vma))
>  			return PTR_ERR(vma);
> @@ -295,7 +292,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state,
>  
>  		plane_state->ggtt_vma = vma;
>  
> -		vma = intel_fb_pin_to_dpt(&fb->base, fb->dpt, &pin_params);
> +		vma = intel_fb_pin_to_dpt(intel_fb_bo(&fb->base), fb->dpt, &pin_params);
>  		if (IS_ERR(vma)) {
>  			i915_dpt_unpin_from_ggtt(fb->dpt);
>  			plane_state->ggtt_vma = NULL;
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 44562769fbc9..5d7b30f62930 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -139,14 +139,13 @@ write_dpt_remapped(struct xe_bo *bo,
>  	}
>  }
>  
> -static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
> +static int __xe_pin_fb_vma_dpt(struct drm_gem_object *obj,
>  			       const struct intel_fb_pin_params *pin_params,
>  			       struct i915_vma *vma)
>  {
> -	struct xe_device *xe = to_xe_device(fb->base.dev);
> +	struct xe_device *xe = to_xe_device(obj->dev);
>  	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
>  	struct xe_ggtt *ggtt = tile0->mem.ggtt;
> -	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
>  	const struct i915_gtt_view *view = pin_params->view;
>  	struct xe_bo *bo = gem_to_xe_bo(obj), *dpt;
>  	u32 dpt_size, size = bo->ttm.base.size;
> @@ -268,14 +267,13 @@ static void write_ggtt_rotated_node(struct xe_ggtt *ggtt, struct xe_ggtt_node *n
>  				   rot_info->plane[i].dst_stride);
>  }
>  
> -static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
> +static int __xe_pin_fb_vma_ggtt(struct drm_gem_object *obj,
>  				const struct intel_fb_pin_params *pin_params,
>  				struct i915_vma *vma)
>  {
> -	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
>  	const struct i915_gtt_view *view = pin_params->view;
>  	struct xe_bo *bo = gem_to_xe_bo(obj);
> -	struct xe_device *xe = to_xe_device(fb->base.dev);
> +	struct xe_device *xe = to_xe_device(obj->dev);
>  	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
>  	struct xe_ggtt *ggtt = tile0->mem.ggtt;
>  	u64 pte, size;
> @@ -318,13 +316,11 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
>  	return ret;
>  }
>  
> -static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, bool is_dpt,
> +static struct i915_vma *__xe_pin_fb_vma(struct drm_gem_object *obj, bool is_dpt,
>  					const struct intel_fb_pin_params *pin_params)
>  {
> -	struct drm_device *dev = fb->base.dev;
> -	struct xe_device *xe = to_xe_device(dev);
> +	struct xe_device *xe = to_xe_device(obj->dev);
>  	struct i915_vma *vma = kzalloc(sizeof(*vma), GFP_KERNEL);
> -	struct drm_gem_object *obj = intel_fb_bo(&fb->base);
>  	struct xe_bo *bo = gem_to_xe_bo(obj);
>  	struct xe_validation_ctx ctx;
>  	struct drm_exec exec;
> @@ -376,9 +372,9 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, bool
>  
>  	vma->bo = bo;
>  	if (is_dpt)
> -		ret = __xe_pin_fb_vma_dpt(fb, pin_params, vma);
> +		ret = __xe_pin_fb_vma_dpt(obj, pin_params, vma);
>  	else
> -		ret = __xe_pin_fb_vma_ggtt(fb, pin_params, vma);
> +		ret = __xe_pin_fb_vma_ggtt(obj, pin_params, vma);
>  	if (ret)
>  		goto err_unpin;
>  
> @@ -412,14 +408,14 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
>  }
>  
>  struct i915_vma *
> -intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
> +intel_fb_pin_to_ggtt(struct drm_gem_object *obj,
>  		     const struct intel_fb_pin_params *pin_params,
>  		     int *out_fence_id)
>  {
>  	if (out_fence_id)
>  		*out_fence_id = -1;
>  
> -	return __xe_pin_fb_vma(to_intel_framebuffer(fb), false, pin_params);
> +	return __xe_pin_fb_vma(obj, false, pin_params);
>  }
>  
>  void intel_fb_unpin_vma(struct i915_vma *vma, int fence_id)
> @@ -469,7 +465,6 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
>  	struct drm_gem_object *obj = intel_fb_bo(fb);
>  	struct xe_bo *bo = gem_to_xe_bo(obj);
>  	struct i915_vma *vma;
> -	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
>  	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
>  	struct intel_fb_pin_params pin_params = {
>  		.view = &new_plane_state->view.gtt,
> @@ -483,8 +478,7 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
>  	/* We reject creating !SCANOUT fb's, so this is weird.. */
>  	drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_FORCE_WC));
>  
> -	vma = __xe_pin_fb_vma(intel_fb, intel_fb_uses_dpt(&intel_fb->base),
> -			      &pin_params);
> +	vma = __xe_pin_fb_vma(obj, intel_fb_uses_dpt(fb), &pin_params);
>  
>  	if (IS_ERR(vma))
>  		return PTR_ERR(vma);
> diff --git a/drivers/gpu/drm/xe/display/xe_initial_plane.c b/drivers/gpu/drm/xe/display/xe_initial_plane.c
> index 4f0ad4692ed6..8e3c0c4b81fe 100644
> --- a/drivers/gpu/drm/xe/display/xe_initial_plane.c
> +++ b/drivers/gpu/drm/xe/display/xe_initial_plane.c
> @@ -138,7 +138,7 @@ xe_initial_plane_setup(struct drm_plane_state *_plane_state,
>  		.view = &plane_state->view.gtt,
>  	};
>  
> -	vma = intel_fb_pin_to_ggtt(fb, &pin_params, NULL);
> +	vma = intel_fb_pin_to_ggtt(intel_fb_bo(fb), &pin_params, NULL);
>  	if (IS_ERR(vma))
>  		return PTR_ERR(vma);

-- 
Jani Nikula, Intel

✓ CI.KUnit: success for drm/i915: Eliminate FB usage from low level pinning code

[Patchwork]

== Series Details ==

Series: drm/i915: Eliminate FB usage from low level pinning code
URL   : https://patchwork.freedesktop.org/series/165014/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[17:51:06] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:51:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:51:41] Starting KUnit Kernel (1/1)...
[17:51:41] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:51:41] ================== guc_buf (11 subtests) ===================
[17:51:41] [PASSED] test_smallest
[17:51:41] [PASSED] test_largest
[17:51:41] [PASSED] test_granular
[17:51:41] [PASSED] test_unique
[17:51:41] [PASSED] test_overlap
[17:51:41] [PASSED] test_reusable
[17:51:41] [PASSED] test_too_big
[17:51:41] [PASSED] test_flush
[17:51:41] [PASSED] test_lookup
[17:51:41] [PASSED] test_data
[17:51:41] [PASSED] test_class
[17:51:41] ===================== [PASSED] guc_buf =====================
[17:51:41] =================== guc_dbm (7 subtests) ===================
[17:51:41] [PASSED] test_empty
[17:51:41] [PASSED] test_default
[17:51:41] ======================== test_size  ========================
[17:51:41] [PASSED] 4
[17:51:41] [PASSED] 8
[17:51:41] [PASSED] 32
[17:51:41] [PASSED] 256
[17:51:41] ==================== [PASSED] test_size ====================
[17:51:41] ======================= test_reuse  ========================
[17:51:41] [PASSED] 4
[17:51:41] [PASSED] 8
[17:51:41] [PASSED] 32
[17:51:41] [PASSED] 256
[17:51:41] =================== [PASSED] test_reuse ====================
[17:51:41] =================== test_range_overlap  ====================
[17:51:41] [PASSED] 4
[17:51:41] [PASSED] 8
[17:51:41] [PASSED] 32
[17:51:41] [PASSED] 256
[17:51:41] =============== [PASSED] test_range_overlap ================
[17:51:41] =================== test_range_compact  ====================
[17:51:41] [PASSED] 4
[17:51:41] [PASSED] 8
[17:51:41] [PASSED] 32
[17:51:41] [PASSED] 256
[17:51:41] =============== [PASSED] test_range_compact ================
[17:51:41] ==================== test_range_spare  =====================
[17:51:41] [PASSED] 4
[17:51:41] [PASSED] 8
[17:51:41] [PASSED] 32
[17:51:41] [PASSED] 256
[17:51:41] ================ [PASSED] test_range_spare =================
[17:51:41] ===================== [PASSED] guc_dbm =====================
[17:51:41] =================== guc_idm (6 subtests) ===================
[17:51:41] [PASSED] bad_init
[17:51:41] [PASSED] no_init
[17:51:41] [PASSED] init_fini
[17:51:41] [PASSED] check_used
[17:51:41] [PASSED] check_quota
[17:51:41] [PASSED] check_all
[17:51:41] ===================== [PASSED] guc_idm =====================
[17:51:41] ================== no_relay (3 subtests) ===================
[17:51:41] [PASSED] xe_drops_guc2pf_if_not_ready
[17:51:41] [PASSED] xe_drops_guc2vf_if_not_ready
[17:51:41] [PASSED] xe_rejects_send_if_not_ready
[17:51:41] ==================== [PASSED] no_relay =====================
[17:51:41] ================== pf_relay (14 subtests) ==================
[17:51:41] [PASSED] pf_rejects_guc2pf_too_short
[17:51:41] [PASSED] pf_rejects_guc2pf_too_long
[17:51:41] [PASSED] pf_rejects_guc2pf_no_payload
[17:51:41] [PASSED] pf_fails_no_payload
[17:51:41] [PASSED] pf_fails_bad_origin
[17:51:41] [PASSED] pf_fails_bad_type
[17:51:41] [PASSED] pf_txn_reports_error
[17:51:41] [PASSED] pf_txn_sends_pf2guc
[17:51:41] [PASSED] pf_sends_pf2guc
[17:51:41] [SKIPPED] pf_loopback_nop
[17:51:41] [SKIPPED] pf_loopback_echo
[17:51:41] [SKIPPED] pf_loopback_fail
[17:51:41] [SKIPPED] pf_loopback_busy
[17:51:41] [SKIPPED] pf_loopback_retry
[17:51:41] ==================== [PASSED] pf_relay =====================
[17:51:41] ================== vf_relay (3 subtests) ===================
[17:51:41] [PASSED] vf_rejects_guc2vf_too_short
[17:51:41] [PASSED] vf_rejects_guc2vf_too_long
[17:51:41] [PASSED] vf_rejects_guc2vf_no_payload
[17:51:41] ==================== [PASSED] vf_relay =====================
[17:51:41] ================ pf_gt_config (9 subtests) =================
[17:51:41] [PASSED] fair_contexts_1vf
[17:51:41] [PASSED] fair_doorbells_1vf
[17:51:41] [PASSED] fair_ggtt_1vf
[17:51:41] ====================== fair_vram_1vf  ======================
[17:51:41] [PASSED] 3.50 GiB
[17:51:41] [PASSED] 11.5 GiB
[17:51:41] [PASSED] 15.5 GiB
[17:51:41] [PASSED] 31.5 GiB
[17:51:41] [PASSED] 63.5 GiB
[17:51:41] [PASSED] 1.91 GiB
[17:51:41] ================== [PASSED] fair_vram_1vf ==================
[17:51:41] ================ fair_vram_1vf_admin_only  =================
[17:51:41] [PASSED] 3.50 GiB
[17:51:41] [PASSED] 11.5 GiB
[17:51:41] [PASSED] 15.5 GiB
[17:51:41] [PASSED] 31.5 GiB
[17:51:41] [PASSED] 63.5 GiB
[17:51:41] [PASSED] 1.91 GiB
[17:51:41] ============ [PASSED] fair_vram_1vf_admin_only =============
[17:51:41] ====================== fair_contexts  ======================
[17:51:41] [PASSED] 1 VF
[17:51:41] [PASSED] 2 VFs
[17:51:41] [PASSED] 3 VFs
[17:51:41] [PASSED] 4 VFs
[17:51:41] [PASSED] 5 VFs
[17:51:41] [PASSED] 6 VFs
[17:51:41] [PASSED] 7 VFs
[17:51:41] [PASSED] 8 VFs
[17:51:41] [PASSED] 9 VFs
[17:51:42] [PASSED] 10 VFs
[17:51:42] [PASSED] 11 VFs
[17:51:42] [PASSED] 12 VFs
[17:51:42] [PASSED] 13 VFs
[17:51:42] [PASSED] 14 VFs
[17:51:42] [PASSED] 15 VFs
[17:51:42] [PASSED] 16 VFs
[17:51:42] [PASSED] 17 VFs
[17:51:42] [PASSED] 18 VFs
[17:51:42] [PASSED] 19 VFs
[17:51:42] [PASSED] 20 VFs
[17:51:42] [PASSED] 21 VFs
[17:51:42] [PASSED] 22 VFs
[17:51:42] [PASSED] 23 VFs
[17:51:42] [PASSED] 24 VFs
[17:51:42] [PASSED] 25 VFs
[17:51:42] [PASSED] 26 VFs
[17:51:42] [PASSED] 27 VFs
[17:51:42] [PASSED] 28 VFs
[17:51:42] [PASSED] 29 VFs
[17:51:42] [PASSED] 30 VFs
[17:51:42] [PASSED] 31 VFs
[17:51:42] [PASSED] 32 VFs
[17:51:42] [PASSED] 33 VFs
[17:51:42] [PASSED] 34 VFs
[17:51:42] [PASSED] 35 VFs
[17:51:42] [PASSED] 36 VFs
[17:51:42] [PASSED] 37 VFs
[17:51:42] [PASSED] 38 VFs
[17:51:42] [PASSED] 39 VFs
[17:51:42] [PASSED] 40 VFs
[17:51:42] [PASSED] 41 VFs
[17:51:42] [PASSED] 42 VFs
[17:51:42] [PASSED] 43 VFs
[17:51:42] [PASSED] 44 VFs
[17:51:42] [PASSED] 45 VFs
[17:51:42] [PASSED] 46 VFs
[17:51:42] [PASSED] 47 VFs
[17:51:42] [PASSED] 48 VFs
[17:51:42] [PASSED] 49 VFs
[17:51:42] [PASSED] 50 VFs
[17:51:42] [PASSED] 51 VFs
[17:51:42] [PASSED] 52 VFs
[17:51:42] [PASSED] 53 VFs
[17:51:42] [PASSED] 54 VFs
[17:51:42] [PASSED] 55 VFs
[17:51:42] [PASSED] 56 VFs
[17:51:42] [PASSED] 57 VFs
[17:51:42] [PASSED] 58 VFs
[17:51:42] [PASSED] 59 VFs
[17:51:42] [PASSED] 60 VFs
[17:51:42] [PASSED] 61 VFs
[17:51:42] [PASSED] 62 VFs
[17:51:42] [PASSED] 63 VFs
[17:51:42] ================== [PASSED] fair_contexts ==================
[17:51:42] ===================== fair_doorbells  ======================
[17:51:42] [PASSED] 1 VF
[17:51:42] [PASSED] 2 VFs
[17:51:42] [PASSED] 3 VFs
[17:51:42] [PASSED] 4 VFs
[17:51:42] [PASSED] 5 VFs
[17:51:42] [PASSED] 6 VFs
[17:51:42] [PASSED] 7 VFs
[17:51:42] [PASSED] 8 VFs
[17:51:42] [PASSED] 9 VFs
[17:51:42] [PASSED] 10 VFs
[17:51:42] [PASSED] 11 VFs
[17:51:42] [PASSED] 12 VFs
[17:51:42] [PASSED] 13 VFs
[17:51:42] [PASSED] 14 VFs
[17:51:42] [PASSED] 15 VFs
[17:51:42] [PASSED] 16 VFs
[17:51:42] [PASSED] 17 VFs
[17:51:42] [PASSED] 18 VFs
[17:51:42] [PASSED] 19 VFs
[17:51:42] [PASSED] 20 VFs
[17:51:42] [PASSED] 21 VFs
[17:51:42] [PASSED] 22 VFs
[17:51:42] [PASSED] 23 VFs
[17:51:42] [PASSED] 24 VFs
[17:51:42] [PASSED] 25 VFs
[17:51:42] [PASSED] 26 VFs
[17:51:42] [PASSED] 27 VFs
[17:51:42] [PASSED] 28 VFs
[17:51:42] [PASSED] 29 VFs
[17:51:42] [PASSED] 30 VFs
[17:51:42] [PASSED] 31 VFs
[17:51:42] [PASSED] 32 VFs
[17:51:42] [PASSED] 33 VFs
[17:51:42] [PASSED] 34 VFs
[17:51:42] [PASSED] 35 VFs
[17:51:42] [PASSED] 36 VFs
[17:51:42] [PASSED] 37 VFs
[17:51:42] [PASSED] 38 VFs
[17:51:42] [PASSED] 39 VFs
[17:51:42] [PASSED] 40 VFs
[17:51:42] [PASSED] 41 VFs
[17:51:42] [PASSED] 42 VFs
[17:51:42] [PASSED] 43 VFs
[17:51:42] [PASSED] 44 VFs
[17:51:42] [PASSED] 45 VFs
[17:51:42] [PASSED] 46 VFs
[17:51:42] [PASSED] 47 VFs
[17:51:42] [PASSED] 48 VFs
[17:51:42] [PASSED] 49 VFs
[17:51:42] [PASSED] 50 VFs
[17:51:42] [PASSED] 51 VFs
[17:51:42] [PASSED] 52 VFs
[17:51:42] [PASSED] 53 VFs
[17:51:42] [PASSED] 54 VFs
[17:51:42] [PASSED] 55 VFs
[17:51:42] [PASSED] 56 VFs
[17:51:42] [PASSED] 57 VFs
[17:51:42] [PASSED] 58 VFs
[17:51:42] [PASSED] 59 VFs
[17:51:42] [PASSED] 60 VFs
[17:51:42] [PASSED] 61 VFs
[17:51:42] [PASSED] 62 VFs
[17:51:42] [PASSED] 63 VFs
[17:51:42] ================= [PASSED] fair_doorbells ==================
[17:51:42] ======================== fair_ggtt  ========================
[17:51:42] [PASSED] 1 VF
[17:51:42] [PASSED] 2 VFs
[17:51:42] [PASSED] 3 VFs
[17:51:42] [PASSED] 4 VFs
[17:51:42] [PASSED] 5 VFs
[17:51:42] [PASSED] 6 VFs
[17:51:42] [PASSED] 7 VFs
[17:51:42] [PASSED] 8 VFs
[17:51:42] [PASSED] 9 VFs
[17:51:42] [PASSED] 10 VFs
[17:51:42] [PASSED] 11 VFs
[17:51:42] [PASSED] 12 VFs
[17:51:42] [PASSED] 13 VFs
[17:51:42] [PASSED] 14 VFs
[17:51:42] [PASSED] 15 VFs
[17:51:42] [PASSED] 16 VFs
[17:51:42] [PASSED] 17 VFs
[17:51:42] [PASSED] 18 VFs
[17:51:42] [PASSED] 19 VFs
[17:51:42] [PASSED] 20 VFs
[17:51:42] [PASSED] 21 VFs
[17:51:42] [PASSED] 22 VFs
[17:51:42] [PASSED] 23 VFs
[17:51:42] [PASSED] 24 VFs
[17:51:42] [PASSED] 25 VFs
[17:51:42] [PASSED] 26 VFs
[17:51:42] [PASSED] 27 VFs
[17:51:42] [PASSED] 28 VFs
[17:51:42] [PASSED] 29 VFs
[17:51:42] [PASSED] 30 VFs
[17:51:42] [PASSED] 31 VFs
[17:51:42] [PASSED] 32 VFs
[17:51:42] [PASSED] 33 VFs
[17:51:42] [PASSED] 34 VFs
[17:51:42] [PASSED] 35 VFs
[17:51:42] [PASSED] 36 VFs
[17:51:42] [PASSED] 37 VFs
[17:51:42] [PASSED] 38 VFs
[17:51:42] [PASSED] 39 VFs
[17:51:42] [PASSED] 40 VFs
[17:51:42] [PASSED] 41 VFs
[17:51:42] [PASSED] 42 VFs
[17:51:42] [PASSED] 43 VFs
[17:51:42] [PASSED] 44 VFs
[17:51:42] [PASSED] 45 VFs
[17:51:42] [PASSED] 46 VFs
[17:51:42] [PASSED] 47 VFs
[17:51:42] [PASSED] 48 VFs
[17:51:42] [PASSED] 49 VFs
[17:51:42] [PASSED] 50 VFs
[17:51:42] [PASSED] 51 VFs
[17:51:42] [PASSED] 52 VFs
[17:51:42] [PASSED] 53 VFs
[17:51:42] [PASSED] 54 VFs
[17:51:42] [PASSED] 55 VFs
[17:51:42] [PASSED] 56 VFs
[17:51:42] [PASSED] 57 VFs
[17:51:42] [PASSED] 58 VFs
[17:51:42] [PASSED] 59 VFs
[17:51:42] [PASSED] 60 VFs
[17:51:42] [PASSED] 61 VFs
[17:51:42] [PASSED] 62 VFs
[17:51:42] [PASSED] 63 VFs
[17:51:42] ==================== [PASSED] fair_ggtt ====================
[17:51:42] ======================== fair_vram  ========================
[17:51:42] [PASSED] 1 VF
[17:51:42] [PASSED] 2 VFs
[17:51:42] [PASSED] 3 VFs
[17:51:42] [PASSED] 4 VFs
[17:51:42] [PASSED] 5 VFs
[17:51:42] [PASSED] 6 VFs
[17:51:42] [PASSED] 7 VFs
[17:51:42] [PASSED] 8 VFs
[17:51:42] [PASSED] 9 VFs
[17:51:42] [PASSED] 10 VFs
[17:51:42] [PASSED] 11 VFs
[17:51:42] [PASSED] 12 VFs
[17:51:42] [PASSED] 13 VFs
[17:51:42] [PASSED] 14 VFs
[17:51:42] [PASSED] 15 VFs
[17:51:42] [PASSED] 16 VFs
[17:51:42] [PASSED] 17 VFs
[17:51:42] [PASSED] 18 VFs
[17:51:42] [PASSED] 19 VFs
[17:51:42] [PASSED] 20 VFs
[17:51:42] [PASSED] 21 VFs
[17:51:42] [PASSED] 22 VFs
[17:51:42] [PASSED] 23 VFs
[17:51:42] [PASSED] 24 VFs
[17:51:42] [PASSED] 25 VFs
[17:51:42] [PASSED] 26 VFs
[17:51:42] [PASSED] 27 VFs
[17:51:42] [PASSED] 28 VFs
[17:51:42] [PASSED] 29 VFs
[17:51:42] [PASSED] 30 VFs
[17:51:42] [PASSED] 31 VFs
[17:51:42] [PASSED] 32 VFs
[17:51:42] [PASSED] 33 VFs
[17:51:42] [PASSED] 34 VFs
[17:51:42] [PASSED] 35 VFs
[17:51:42] [PASSED] 36 VFs
[17:51:42] [PASSED] 37 VFs
[17:51:42] [PASSED] 38 VFs
[17:51:42] [PASSED] 39 VFs
[17:51:42] [PASSED] 40 VFs
[17:51:42] [PASSED] 41 VFs
[17:51:42] [PASSED] 42 VFs
[17:51:42] [PASSED] 43 VFs
[17:51:42] [PASSED] 44 VFs
[17:51:42] [PASSED] 45 VFs
[17:51:42] [PASSED] 46 VFs
[17:51:42] [PASSED] 47 VFs
[17:51:42] [PASSED] 48 VFs
[17:51:42] [PASSED] 49 VFs
[17:51:42] [PASSED] 50 VFs
[17:51:42] [PASSED] 51 VFs
[17:51:42] [PASSED] 52 VFs
[17:51:42] [PASSED] 53 VFs
[17:51:42] [PASSED] 54 VFs
[17:51:42] [PASSED] 55 VFs
[17:51:42] [PASSED] 56 VFs
[17:51:42] [PASSED] 57 VFs
[17:51:42] [PASSED] 58 VFs
[17:51:42] [PASSED] 59 VFs
[17:51:42] [PASSED] 60 VFs
[17:51:42] [PASSED] 61 VFs
[17:51:42] [PASSED] 62 VFs
[17:51:42] [PASSED] 63 VFs
[17:51:42] ==================== [PASSED] fair_vram ====================
[17:51:42] ================== [PASSED] pf_gt_config ===================
[17:51:42] ===================== lmtt (1 subtest) =====================
[17:51:42] ======================== test_ops  =========================
[17:51:42] [PASSED] 2-level
[17:51:42] [PASSED] multi-level
[17:51:42] ==================== [PASSED] test_ops =====================
[17:51:42] ====================== [PASSED] lmtt =======================
[17:51:42] ================= pf_service (11 subtests) =================
[17:51:42] [PASSED] pf_negotiate_any
[17:51:42] [PASSED] pf_negotiate_base_match
[17:51:42] [PASSED] pf_negotiate_base_newer
[17:51:42] [PASSED] pf_negotiate_base_next
[17:51:42] [SKIPPED] pf_negotiate_base_older
[17:51:42] [PASSED] pf_negotiate_base_prev
[17:51:42] [PASSED] pf_negotiate_latest_match
[17:51:42] [PASSED] pf_negotiate_latest_newer
[17:51:42] [PASSED] pf_negotiate_latest_next
[17:51:42] [SKIPPED] pf_negotiate_latest_older
[17:51:42] [SKIPPED] pf_negotiate_latest_prev
[17:51:42] =================== [PASSED] pf_service ====================
[17:51:42] ================= xe_guc_g2g (2 subtests) ==================
[17:51:42] ============== xe_live_guc_g2g_kunit_default  ==============
[17:51:42] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[17:51:42] ============== xe_live_guc_g2g_kunit_allmem  ===============
[17:51:42] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[17:51:42] =================== [SKIPPED] xe_guc_g2g ===================
[17:51:42] =================== xe_mocs (2 subtests) ===================
[17:51:42] ================ xe_live_mocs_kernel_kunit  ================
[17:51:42] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[17:51:42] ================ xe_live_mocs_reset_kunit  =================
[17:51:42] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[17:51:42] ==================== [SKIPPED] xe_mocs =====================
[17:51:42] ================= xe_migrate (2 subtests) ==================
[17:51:42] ================= xe_migrate_sanity_kunit  =================
[17:51:42] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[17:51:42] ================== xe_validate_ccs_kunit  ==================
[17:51:42] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[17:51:42] =================== [SKIPPED] xe_migrate ===================
[17:51:42] ================== xe_dma_buf (1 subtest) ==================
[17:51:42] ==================== xe_dma_buf_kunit  =====================
[17:51:42] ================ [SKIPPED] xe_dma_buf_kunit ================
[17:51:42] =================== [SKIPPED] xe_dma_buf ===================
[17:51:42] ================= xe_bo_shrink (1 subtest) =================
[17:51:42] =================== xe_bo_shrink_kunit  ====================
[17:51:42] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[17:51:42] ================== [SKIPPED] xe_bo_shrink ==================
[17:51:42] ==================== xe_bo (2 subtests) ====================
[17:51:42] ================== xe_ccs_migrate_kunit  ===================
[17:51:42] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[17:51:42] ==================== xe_bo_evict_kunit  ====================
[17:51:42] =============== [SKIPPED] xe_bo_evict_kunit ================
[17:51:42] ===================== [SKIPPED] xe_bo ======================
[17:51:42] ==================== args (13 subtests) ====================
[17:51:42] [PASSED] count_args_test
[17:51:42] [PASSED] call_args_example
[17:51:42] [PASSED] call_args_test
[17:51:42] [PASSED] drop_first_arg_example
[17:51:42] [PASSED] drop_first_arg_test
[17:51:42] [PASSED] first_arg_example
[17:51:42] [PASSED] first_arg_test
[17:51:42] [PASSED] last_arg_example
[17:51:42] [PASSED] last_arg_test
[17:51:42] [PASSED] pick_arg_example
[17:51:42] [PASSED] if_args_example
[17:51:42] [PASSED] if_args_test
[17:51:42] [PASSED] sep_comma_example
[17:51:42] ====================== [PASSED] args =======================
[17:51:42] =================== xe_pci (3 subtests) ====================
[17:51:42] ==================== check_graphics_ip  ====================
[17:51:42] [PASSED] 12.00 Xe_LP
[17:51:42] [PASSED] 12.10 Xe_LP+
[17:51:42] [PASSED] 12.55 Xe_HPG
[17:51:42] [PASSED] 12.60 Xe_HPC
[17:51:42] [PASSED] 12.70 Xe_LPG
[17:51:42] [PASSED] 12.71 Xe_LPG
[17:51:42] [PASSED] 12.74 Xe_LPG+
[17:51:42] [PASSED] 20.01 Xe2_HPG
[17:51:42] [PASSED] 20.02 Xe2_HPG
[17:51:42] [PASSED] 20.04 Xe2_LPG
[17:51:42] [PASSED] 30.00 Xe3_LPG
[17:51:42] [PASSED] 30.01 Xe3_LPG
[17:51:42] [PASSED] 30.03 Xe3_LPG
[17:51:42] [PASSED] 30.04 Xe3_LPG
[17:51:42] [PASSED] 30.05 Xe3_LPG
[17:51:42] [PASSED] 35.10 Xe3p_LPG
[17:51:42] [PASSED] 35.11 Xe3p_XPC
[17:51:42] ================ [PASSED] check_graphics_ip ================
[17:51:42] ===================== check_media_ip  ======================
[17:51:42] [PASSED] 12.00 Xe_M
[17:51:42] [PASSED] 12.55 Xe_HPM
[17:51:42] [PASSED] 13.00 Xe_LPM+
[17:51:42] [PASSED] 13.01 Xe2_HPM
[17:51:42] [PASSED] 20.00 Xe2_LPM
[17:51:42] [PASSED] 30.00 Xe3_LPM
[17:51:42] [PASSED] 30.02 Xe3_LPM
[17:51:42] [PASSED] 35.00 Xe3p_LPM
[17:51:42] [PASSED] 35.03 Xe3p_HPM
[17:51:42] ================= [PASSED] check_media_ip ==================
[17:51:42] =================== check_platform_desc  ===================
[17:51:42] [PASSED] 0x9A60 (TIGERLAKE)
[17:51:42] [PASSED] 0x9A68 (TIGERLAKE)
[17:51:42] [PASSED] 0x9A70 (TIGERLAKE)
[17:51:42] [PASSED] 0x9A40 (TIGERLAKE)
[17:51:42] [PASSED] 0x9A49 (TIGERLAKE)
[17:51:42] [PASSED] 0x9A59 (TIGERLAKE)
[17:51:42] [PASSED] 0x9A78 (TIGERLAKE)
[17:51:42] [PASSED] 0x9AC0 (TIGERLAKE)
[17:51:42] [PASSED] 0x9AC9 (TIGERLAKE)
[17:51:42] [PASSED] 0x9AD9 (TIGERLAKE)
[17:51:42] [PASSED] 0x9AF8 (TIGERLAKE)
[17:51:42] [PASSED] 0x4C80 (ROCKETLAKE)
[17:51:42] [PASSED] 0x4C8A (ROCKETLAKE)
[17:51:42] [PASSED] 0x4C8B (ROCKETLAKE)
[17:51:42] [PASSED] 0x4C8C (ROCKETLAKE)
[17:51:42] [PASSED] 0x4C90 (ROCKETLAKE)
[17:51:42] [PASSED] 0x4C9A (ROCKETLAKE)
[17:51:42] [PASSED] 0x4680 (ALDERLAKE_S)
[17:51:42] [PASSED] 0x4682 (ALDERLAKE_S)
[17:51:42] [PASSED] 0x4688 (ALDERLAKE_S)
[17:51:42] [PASSED] 0x468A (ALDERLAKE_S)
[17:51:42] [PASSED] 0x468B (ALDERLAKE_S)
[17:51:42] [PASSED] 0x4690 (ALDERLAKE_S)
[17:51:42] [PASSED] 0x4692 (ALDERLAKE_S)
[17:51:42] [PASSED] 0x4693 (ALDERLAKE_S)
[17:51:42] [PASSED] 0x46A0 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46A1 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46A2 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46A3 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46A6 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46A8 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46AA (ALDERLAKE_P)
[17:51:42] [PASSED] 0x462A (ALDERLAKE_P)
[17:51:42] [PASSED] 0x4626 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x4628 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46B0 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46B1 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46B2 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46B3 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46C0 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46C1 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46C2 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46C3 (ALDERLAKE_P)
[17:51:42] [PASSED] 0x46D0 (ALDERLAKE_N)
[17:51:42] [PASSED] 0x46D1 (ALDERLAKE_N)
[17:51:42] [PASSED] 0x46D2 (ALDERLAKE_N)
[17:51:42] [PASSED] 0x46D3 (ALDERLAKE_N)
[17:51:42] [PASSED] 0x46D4 (ALDERLAKE_N)
[17:51:42] [PASSED] 0xA721 (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA7A1 (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA7A9 (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA7AC (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA7AD (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA720 (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA7A0 (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA7A8 (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA7AA (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA7AB (ALDERLAKE_P)
[17:51:42] [PASSED] 0xA780 (ALDERLAKE_S)
[17:51:42] [PASSED] 0xA781 (ALDERLAKE_S)
[17:51:42] [PASSED] 0xA782 (ALDERLAKE_S)
[17:51:42] [PASSED] 0xA783 (ALDERLAKE_S)
[17:51:42] [PASSED] 0xA788 (ALDERLAKE_S)
[17:51:42] [PASSED] 0xA789 (ALDERLAKE_S)
[17:51:42] [PASSED] 0xA78A (ALDERLAKE_S)
[17:51:42] [PASSED] 0xA78B (ALDERLAKE_S)
[17:51:42] [PASSED] 0x4905 (DG1)
[17:51:42] [PASSED] 0x4906 (DG1)
[17:51:42] [PASSED] 0x4907 (DG1)
[17:51:42] [PASSED] 0x4908 (DG1)
[17:51:42] [PASSED] 0x4909 (DG1)
[17:51:42] [PASSED] 0x56C0 (DG2)
[17:51:42] [PASSED] 0x56C2 (DG2)
[17:51:42] [PASSED] 0x56C1 (DG2)
[17:51:42] [PASSED] 0x7D51 (METEORLAKE)
[17:51:42] [PASSED] 0x7DD1 (METEORLAKE)
[17:51:42] [PASSED] 0x7D41 (METEORLAKE)
[17:51:42] [PASSED] 0x7D67 (METEORLAKE)
[17:51:42] [PASSED] 0xB640 (METEORLAKE)
[17:51:42] [PASSED] 0x56A0 (DG2)
[17:51:42] [PASSED] 0x56A1 (DG2)
[17:51:42] [PASSED] 0x56A2 (DG2)
[17:51:42] [PASSED] 0x56BE (DG2)
[17:51:42] [PASSED] 0x56BF (DG2)
[17:51:42] [PASSED] 0x5690 (DG2)
[17:51:42] [PASSED] 0x5691 (DG2)
[17:51:42] [PASSED] 0x5692 (DG2)
[17:51:42] [PASSED] 0x56A5 (DG2)
[17:51:42] [PASSED] 0x56A6 (DG2)
[17:51:42] [PASSED] 0x56B0 (DG2)
[17:51:42] [PASSED] 0x56B1 (DG2)
[17:51:42] [PASSED] 0x56BA (DG2)
[17:51:42] [PASSED] 0x56BB (DG2)
[17:51:42] [PASSED] 0x56BC (DG2)
[17:51:42] [PASSED] 0x56BD (DG2)
[17:51:42] [PASSED] 0x5693 (DG2)
[17:51:42] [PASSED] 0x5694 (DG2)
[17:51:42] [PASSED] 0x5695 (DG2)
[17:51:42] [PASSED] 0x56A3 (DG2)
[17:51:42] [PASSED] 0x56A4 (DG2)
[17:51:42] [PASSED] 0x56B2 (DG2)
[17:51:42] [PASSED] 0x56B3 (DG2)
[17:51:42] [PASSED] 0x5696 (DG2)
[17:51:42] [PASSED] 0x5697 (DG2)
[17:51:42] [PASSED] 0xB69 (PVC)
[17:51:42] [PASSED] 0xB6E (PVC)
[17:51:42] [PASSED] 0xBD4 (PVC)
[17:51:42] [PASSED] 0xBD5 (PVC)
[17:51:42] [PASSED] 0xBD6 (PVC)
[17:51:42] [PASSED] 0xBD7 (PVC)
[17:51:42] [PASSED] 0xBD8 (PVC)
[17:51:42] [PASSED] 0xBD9 (PVC)
[17:51:42] [PASSED] 0xBDA (PVC)
[17:51:42] [PASSED] 0xBDB (PVC)
[17:51:42] [PASSED] 0xBE0 (PVC)
[17:51:42] [PASSED] 0xBE1 (PVC)
[17:51:42] [PASSED] 0xBE5 (PVC)
[17:51:42] [PASSED] 0x7D40 (METEORLAKE)
[17:51:42] [PASSED] 0x7D45 (METEORLAKE)
[17:51:42] [PASSED] 0x7D55 (METEORLAKE)
[17:51:42] [PASSED] 0x7D60 (METEORLAKE)
[17:51:42] [PASSED] 0x7DD5 (METEORLAKE)
[17:51:42] [PASSED] 0x6420 (LUNARLAKE)
[17:51:42] [PASSED] 0x64A0 (LUNARLAKE)
[17:51:42] [PASSED] 0x64B0 (LUNARLAKE)
[17:51:42] [PASSED] 0xE202 (BATTLEMAGE)
[17:51:42] [PASSED] 0xE209 (BATTLEMAGE)
[17:51:42] [PASSED] 0xE20B (BATTLEMAGE)
[17:51:42] [PASSED] 0xE20C (BATTLEMAGE)
[17:51:42] [PASSED] 0xE20D (BATTLEMAGE)
[17:51:42] [PASSED] 0xE210 (BATTLEMAGE)
[17:51:42] [PASSED] 0xE211 (BATTLEMAGE)
[17:51:42] [PASSED] 0xE212 (BATTLEMAGE)
[17:51:42] [PASSED] 0xE216 (BATTLEMAGE)
[17:51:42] [PASSED] 0xE220 (BATTLEMAGE)
[17:51:42] [PASSED] 0xE221 (BATTLEMAGE)
[17:51:42] [PASSED] 0xE222 (BATTLEMAGE)
[17:51:42] [PASSED] 0xE223 (BATTLEMAGE)
[17:51:42] [PASSED] 0xB080 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB081 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB082 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB083 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB084 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB085 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB086 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB087 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB08F (PANTHERLAKE)
[17:51:42] [PASSED] 0xB090 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB0A0 (PANTHERLAKE)
[17:51:42] [PASSED] 0xB0B0 (PANTHERLAKE)
[17:51:42] [PASSED] 0xFD80 (PANTHERLAKE)
[17:51:42] [PASSED] 0xFD81 (PANTHERLAKE)
[17:51:42] [PASSED] 0xD740 (NOVALAKE_S)
[17:51:42] [PASSED] 0xD741 (NOVALAKE_S)
[17:51:42] [PASSED] 0xD742 (NOVALAKE_S)
[17:51:42] [PASSED] 0xD743 (NOVALAKE_S)
[17:51:42] [PASSED] 0xD744 (NOVALAKE_S)
[17:51:42] [PASSED] 0xD745 (NOVALAKE_S)
[17:51:42] [PASSED] 0x674C (CRESCENTISLAND)
[17:51:42] [PASSED] 0xD750 (NOVALAKE_P)
[17:51:42] [PASSED] 0xD751 (NOVALAKE_P)
[17:51:42] [PASSED] 0xD752 (NOVALAKE_P)
[17:51:42] [PASSED] 0xD753 (NOVALAKE_P)
[17:51:42] [PASSED] 0xD754 (NOVALAKE_P)
[17:51:42] [PASSED] 0xD755 (NOVALAKE_P)
[17:51:42] [PASSED] 0xD756 (NOVALAKE_P)
[17:51:42] [PASSED] 0xD757 (NOVALAKE_P)
[17:51:42] [PASSED] 0xD75F (NOVALAKE_P)
[17:51:42] =============== [PASSED] check_platform_desc ===============
[17:51:42] ===================== [PASSED] xe_pci ======================
[17:51:42] =================== xe_rtp (2 subtests) ====================
[17:51:42] =============== xe_rtp_process_to_sr_tests  ================
[17:51:42] [PASSED] coalesce-same-reg
[17:51:42] [PASSED] no-match-no-add
[17:51:42] [PASSED] match-or
[17:51:42] [PASSED] match-or-xfail
[17:51:42] [PASSED] no-match-no-add-multiple-rules
[17:51:42] [PASSED] two-regs-two-entries
[17:51:42] [PASSED] clr-one-set-other
[17:51:42] [PASSED] set-field
[17:51:42] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[17:51:42] [PASSED] conflict-not-disjoint
[17:51:42] [PASSED] conflict-reg-type
[17:51:42] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[17:51:42] ================== xe_rtp_process_tests  ===================
[17:51:42] [PASSED] active1
[17:51:42] [PASSED] active2
[17:51:42] [PASSED] active-inactive
[17:51:42] [PASSED] inactive-active
[17:51:42] [PASSED] inactive-1st_or_active-inactive
[17:51:42] [PASSED] inactive-2nd_or_active-inactive
[17:51:42] [PASSED] inactive-last_or_active-inactive
[17:51:42] [PASSED] inactive-no_or_active-inactive
[17:51:42] ============== [PASSED] xe_rtp_process_tests ===============
[17:51:42] ===================== [PASSED] xe_rtp ======================
[17:51:42] ==================== xe_wa (1 subtest) =====================
[17:51:42] ======================== xe_wa_gt  =========================
[17:51:42] [PASSED] TIGERLAKE B0
[17:51:42] [PASSED] DG1 A0
[17:51:42] [PASSED] DG1 B0
[17:51:42] [PASSED] ALDERLAKE_S A0
[17:51:42] [PASSED] ALDERLAKE_S B0
[17:51:42] [PASSED] ALDERLAKE_S C0
[17:51:42] [PASSED] ALDERLAKE_S D0
[17:51:42] [PASSED] ALDERLAKE_P A0
[17:51:42] [PASSED] ALDERLAKE_P B0
[17:51:42] [PASSED] ALDERLAKE_P C0
[17:51:42] [PASSED] ALDERLAKE_S RPLS D0
[17:51:42] [PASSED] ALDERLAKE_P RPLU E0
[17:51:42] [PASSED] DG2 G10 C0
[17:51:42] [PASSED] DG2 G11 B1
[17:51:42] [PASSED] DG2 G12 A1
[17:51:42] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:51:42] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:51:42] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[17:51:42] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[17:51:42] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[17:51:42] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[17:51:42] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[17:51:42] ==================== [PASSED] xe_wa_gt =====================
[17:51:42] ====================== [PASSED] xe_wa ======================
[17:51:42] ============================================================
[17:51:42] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[17:51:42] Elapsed time: 36.269s total, 4.243s configuring, 31.409s building, 0.594s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[17:51:42] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:51:44] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:52:08] Starting KUnit Kernel (1/1)...
[17:52:08] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:52:08] ============ drm_test_pick_cmdline (2 subtests) ============
[17:52:08] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[17:52:08] =============== drm_test_pick_cmdline_named  ===============
[17:52:08] [PASSED] NTSC
[17:52:08] [PASSED] NTSC-J
[17:52:08] [PASSED] PAL
[17:52:08] [PASSED] PAL-M
[17:52:08] =========== [PASSED] drm_test_pick_cmdline_named ===========
[17:52:08] ============== [PASSED] drm_test_pick_cmdline ==============
[17:52:08] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[17:52:08] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[17:52:08] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[17:52:08] =========== drm_validate_clone_mode (2 subtests) ===========
[17:52:08] ============== drm_test_check_in_clone_mode  ===============
[17:52:08] [PASSED] in_clone_mode
[17:52:08] [PASSED] not_in_clone_mode
[17:52:08] ========== [PASSED] drm_test_check_in_clone_mode ===========
[17:52:08] =============== drm_test_check_valid_clones  ===============
[17:52:08] [PASSED] not_in_clone_mode
[17:52:08] [PASSED] valid_clone
[17:52:08] [PASSED] invalid_clone
[17:52:08] =========== [PASSED] drm_test_check_valid_clones ===========
[17:52:08] ============= [PASSED] drm_validate_clone_mode =============
[17:52:08] ============= drm_validate_modeset (1 subtest) =============
[17:52:08] [PASSED] drm_test_check_connector_changed_modeset
[17:52:08] ============== [PASSED] drm_validate_modeset ===============
[17:52:08] ====== drm_test_bridge_get_current_state (2 subtests) ======
[17:52:08] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[17:52:08] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[17:52:08] ======== [PASSED] drm_test_bridge_get_current_state ========
[17:52:08] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[17:52:08] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[17:52:08] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[17:52:08] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[17:52:08] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[17:52:08] ============== drm_bridge_alloc (2 subtests) ===============
[17:52:08] [PASSED] drm_test_drm_bridge_alloc_basic
[17:52:08] [PASSED] drm_test_drm_bridge_alloc_get_put
[17:52:08] ================ [PASSED] drm_bridge_alloc =================
[17:52:08] ============= drm_cmdline_parser (40 subtests) =============
[17:52:08] [PASSED] drm_test_cmdline_force_d_only
[17:52:08] [PASSED] drm_test_cmdline_force_D_only_dvi
[17:52:08] [PASSED] drm_test_cmdline_force_D_only_hdmi
[17:52:08] [PASSED] drm_test_cmdline_force_D_only_not_digital
[17:52:08] [PASSED] drm_test_cmdline_force_e_only
[17:52:08] [PASSED] drm_test_cmdline_res
[17:52:08] [PASSED] drm_test_cmdline_res_vesa
[17:52:08] [PASSED] drm_test_cmdline_res_vesa_rblank
[17:52:08] [PASSED] drm_test_cmdline_res_rblank
[17:52:08] [PASSED] drm_test_cmdline_res_bpp
[17:52:08] [PASSED] drm_test_cmdline_res_refresh
[17:52:08] [PASSED] drm_test_cmdline_res_bpp_refresh
[17:52:08] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[17:52:08] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[17:52:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[17:52:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[17:52:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[17:52:08] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[17:52:08] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[17:52:08] [PASSED] drm_test_cmdline_res_margins_force_on
[17:52:08] [PASSED] drm_test_cmdline_res_vesa_margins
[17:52:08] [PASSED] drm_test_cmdline_name
[17:52:08] [PASSED] drm_test_cmdline_name_bpp
[17:52:08] [PASSED] drm_test_cmdline_name_option
[17:52:08] [PASSED] drm_test_cmdline_name_bpp_option
[17:52:08] [PASSED] drm_test_cmdline_rotate_0
[17:52:08] [PASSED] drm_test_cmdline_rotate_90
[17:52:08] [PASSED] drm_test_cmdline_rotate_180
[17:52:08] [PASSED] drm_test_cmdline_rotate_270
[17:52:08] [PASSED] drm_test_cmdline_hmirror
[17:52:08] [PASSED] drm_test_cmdline_vmirror
[17:52:08] [PASSED] drm_test_cmdline_margin_options
[17:52:08] [PASSED] drm_test_cmdline_multiple_options
[17:52:08] [PASSED] drm_test_cmdline_bpp_extra_and_option
[17:52:08] [PASSED] drm_test_cmdline_extra_and_option
[17:52:08] [PASSED] drm_test_cmdline_freestanding_options
[17:52:08] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[17:52:08] [PASSED] drm_test_cmdline_panel_orientation
[17:52:08] ================ drm_test_cmdline_invalid  =================
[17:52:08] [PASSED] margin_only
[17:52:08] [PASSED] interlace_only
[17:52:08] [PASSED] res_missing_x
[17:52:08] [PASSED] res_missing_y
[17:52:08] [PASSED] res_bad_y
[17:52:08] [PASSED] res_missing_y_bpp
[17:52:08] [PASSED] res_bad_bpp
[17:52:08] [PASSED] res_bad_refresh
[17:52:08] [PASSED] res_bpp_refresh_force_on_off
[17:52:08] [PASSED] res_invalid_mode
[17:52:08] [PASSED] res_bpp_wrong_place_mode
[17:52:08] [PASSED] name_bpp_refresh
[17:52:08] [PASSED] name_refresh
[17:52:08] [PASSED] name_refresh_wrong_mode
[17:52:08] [PASSED] name_refresh_invalid_mode
[17:52:08] [PASSED] rotate_multiple
[17:52:08] [PASSED] rotate_invalid_val
[17:52:08] [PASSED] rotate_truncated
[17:52:08] [PASSED] invalid_option
[17:52:08] [PASSED] invalid_tv_option
[17:52:08] [PASSED] truncated_tv_option
[17:52:08] ============ [PASSED] drm_test_cmdline_invalid =============
[17:52:08] =============== drm_test_cmdline_tv_options  ===============
[17:52:08] [PASSED] NTSC
[17:52:08] [PASSED] NTSC_443
[17:52:08] [PASSED] NTSC_J
[17:52:08] [PASSED] PAL
[17:52:08] [PASSED] PAL_M
[17:52:08] [PASSED] PAL_N
[17:52:08] [PASSED] SECAM
[17:52:08] [PASSED] MONO_525
[17:52:08] [PASSED] MONO_625
[17:52:08] =========== [PASSED] drm_test_cmdline_tv_options ===========
[17:52:08] =============== [PASSED] drm_cmdline_parser ================
[17:52:08] ========== drmm_connector_hdmi_init (20 subtests) ==========
[17:52:08] [PASSED] drm_test_connector_hdmi_init_valid
[17:52:08] [PASSED] drm_test_connector_hdmi_init_bpc_8
[17:52:08] [PASSED] drm_test_connector_hdmi_init_bpc_10
[17:52:08] [PASSED] drm_test_connector_hdmi_init_bpc_12
[17:52:08] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[17:52:08] [PASSED] drm_test_connector_hdmi_init_bpc_null
[17:52:08] [PASSED] drm_test_connector_hdmi_init_formats_empty
[17:52:08] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[17:52:08] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[17:52:08] [PASSED] supported_formats=0x9 yuv420_allowed=1
[17:52:08] [PASSED] supported_formats=0x9 yuv420_allowed=0
[17:52:08] [PASSED] supported_formats=0x5 yuv420_allowed=1
[17:52:08] [PASSED] supported_formats=0x5 yuv420_allowed=0
[17:52:08] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[17:52:08] [PASSED] drm_test_connector_hdmi_init_null_ddc
[17:52:08] [PASSED] drm_test_connector_hdmi_init_null_product
[17:52:08] [PASSED] drm_test_connector_hdmi_init_null_vendor
[17:52:08] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[17:52:08] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[17:52:08] [PASSED] drm_test_connector_hdmi_init_product_valid
[17:52:08] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[17:52:08] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[17:52:08] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[17:52:08] ========= drm_test_connector_hdmi_init_type_valid  =========
[17:52:08] [PASSED] HDMI-A
[17:52:08] [PASSED] HDMI-B
[17:52:08] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[17:52:08] ======== drm_test_connector_hdmi_init_type_invalid  ========
[17:52:08] [PASSED] Unknown
[17:52:08] [PASSED] VGA
[17:52:08] [PASSED] DVI-I
[17:52:08] [PASSED] DVI-D
[17:52:08] [PASSED] DVI-A
[17:52:08] [PASSED] Composite
[17:52:08] [PASSED] SVIDEO
[17:52:08] [PASSED] LVDS
[17:52:08] [PASSED] Component
[17:52:08] [PASSED] DIN
[17:52:08] [PASSED] DP
[17:52:08] [PASSED] TV
[17:52:08] [PASSED] eDP
[17:52:08] [PASSED] Virtual
[17:52:08] [PASSED] DSI
[17:52:08] [PASSED] DPI
[17:52:08] [PASSED] Writeback
[17:52:08] [PASSED] SPI
[17:52:08] [PASSED] USB
[17:52:08] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[17:52:08] ============ [PASSED] drmm_connector_hdmi_init =============
[17:52:08] ============= drmm_connector_init (3 subtests) =============
[17:52:08] [PASSED] drm_test_drmm_connector_init
[17:52:08] [PASSED] drm_test_drmm_connector_init_null_ddc
[17:52:08] ========= drm_test_drmm_connector_init_type_valid  =========
[17:52:08] [PASSED] Unknown
[17:52:08] [PASSED] VGA
[17:52:08] [PASSED] DVI-I
[17:52:08] [PASSED] DVI-D
[17:52:08] [PASSED] DVI-A
[17:52:08] [PASSED] Composite
[17:52:08] [PASSED] SVIDEO
[17:52:08] [PASSED] LVDS
[17:52:08] [PASSED] Component
[17:52:08] [PASSED] DIN
[17:52:08] [PASSED] DP
[17:52:08] [PASSED] HDMI-A
[17:52:08] [PASSED] HDMI-B
[17:52:08] [PASSED] TV
[17:52:08] [PASSED] eDP
[17:52:08] [PASSED] Virtual
[17:52:08] [PASSED] DSI
[17:52:08] [PASSED] DPI
[17:52:08] [PASSED] Writeback
[17:52:08] [PASSED] SPI
[17:52:08] [PASSED] USB
[17:52:08] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[17:52:08] =============== [PASSED] drmm_connector_init ===============
[17:52:08] ========= drm_connector_dynamic_init (6 subtests) ==========
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_init
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_init_properties
[17:52:08] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[17:52:08] [PASSED] Unknown
[17:52:08] [PASSED] VGA
[17:52:08] [PASSED] DVI-I
[17:52:08] [PASSED] DVI-D
[17:52:08] [PASSED] DVI-A
[17:52:08] [PASSED] Composite
[17:52:08] [PASSED] SVIDEO
[17:52:08] [PASSED] LVDS
[17:52:08] [PASSED] Component
[17:52:08] [PASSED] DIN
[17:52:08] [PASSED] DP
[17:52:08] [PASSED] HDMI-A
[17:52:08] [PASSED] HDMI-B
[17:52:08] [PASSED] TV
[17:52:08] [PASSED] eDP
[17:52:08] [PASSED] Virtual
[17:52:08] [PASSED] DSI
[17:52:08] [PASSED] DPI
[17:52:08] [PASSED] Writeback
[17:52:08] [PASSED] SPI
[17:52:08] [PASSED] USB
[17:52:08] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[17:52:08] ======== drm_test_drm_connector_dynamic_init_name  =========
[17:52:08] [PASSED] Unknown
[17:52:08] [PASSED] VGA
[17:52:08] [PASSED] DVI-I
[17:52:08] [PASSED] DVI-D
[17:52:08] [PASSED] DVI-A
[17:52:08] [PASSED] Composite
[17:52:08] [PASSED] SVIDEO
[17:52:08] [PASSED] LVDS
[17:52:08] [PASSED] Component
[17:52:08] [PASSED] DIN
[17:52:08] [PASSED] DP
[17:52:08] [PASSED] HDMI-A
[17:52:08] [PASSED] HDMI-B
[17:52:08] [PASSED] TV
[17:52:08] [PASSED] eDP
[17:52:08] [PASSED] Virtual
[17:52:08] [PASSED] DSI
[17:52:08] [PASSED] DPI
[17:52:08] [PASSED] Writeback
[17:52:08] [PASSED] SPI
[17:52:08] [PASSED] USB
[17:52:08] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[17:52:08] =========== [PASSED] drm_connector_dynamic_init ============
[17:52:08] ==== drm_connector_dynamic_register_early (4 subtests) =====
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[17:52:08] ====== [PASSED] drm_connector_dynamic_register_early =======
[17:52:08] ======= drm_connector_dynamic_register (7 subtests) ========
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[17:52:08] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[17:52:08] ========= [PASSED] drm_connector_dynamic_register ==========
[17:52:08] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[17:52:08] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[17:52:08] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[17:52:08] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[17:52:08] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[17:52:08] ========== drm_test_get_tv_mode_from_name_valid  ===========
[17:52:08] [PASSED] NTSC
[17:52:08] [PASSED] NTSC-443
[17:52:08] [PASSED] NTSC-J
[17:52:08] [PASSED] PAL
[17:52:08] [PASSED] PAL-M
[17:52:08] [PASSED] PAL-N
[17:52:08] [PASSED] SECAM
[17:52:08] [PASSED] Mono
[17:52:08] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[17:52:08] [PASSED] drm_test_get_tv_mode_from_name_truncated
[17:52:08] ============ [PASSED] drm_get_tv_mode_from_name ============
[17:52:08] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[17:52:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[17:52:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[17:52:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[17:52:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[17:52:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[17:52:08] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[17:52:08] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[17:52:08] [PASSED] VIC 96
[17:52:08] [PASSED] VIC 97
[17:52:08] [PASSED] VIC 101
[17:52:08] [PASSED] VIC 102
[17:52:08] [PASSED] VIC 106
[17:52:08] [PASSED] VIC 107
[17:52:08] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[17:52:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[17:52:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[17:52:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[17:52:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[17:52:08] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[17:52:08] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[17:52:08] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[17:52:08] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[17:52:08] [PASSED] Automatic
[17:52:08] [PASSED] Full
[17:52:08] [PASSED] Limited 16:235
[17:52:08] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[17:52:08] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[17:52:08] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[17:52:08] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[17:52:08] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[17:52:08] [PASSED] RGB
[17:52:08] [PASSED] YUV 4:2:0
[17:52:08] [PASSED] YUV 4:2:2
[17:52:08] [PASSED] YUV 4:4:4
[17:52:08] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[17:52:08] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[17:52:08] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[17:52:08] ============= drm_damage_helper (21 subtests) ==============
[17:52:08] [PASSED] drm_test_damage_iter_no_damage
[17:52:08] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[17:52:08] [PASSED] drm_test_damage_iter_no_damage_src_moved
[17:52:08] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[17:52:08] [PASSED] drm_test_damage_iter_no_damage_not_visible
[17:52:08] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[17:52:08] [PASSED] drm_test_damage_iter_no_damage_no_fb
[17:52:08] [PASSED] drm_test_damage_iter_simple_damage
[17:52:08] [PASSED] drm_test_damage_iter_single_damage
[17:52:08] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[17:52:08] [PASSED] drm_test_damage_iter_single_damage_outside_src
[17:52:08] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[17:52:08] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[17:52:08] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[17:52:08] [PASSED] drm_test_damage_iter_single_damage_src_moved
[17:52:08] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[17:52:08] [PASSED] drm_test_damage_iter_damage
[17:52:08] [PASSED] drm_test_damage_iter_damage_one_intersect
[17:52:08] [PASSED] drm_test_damage_iter_damage_one_outside
[17:52:08] [PASSED] drm_test_damage_iter_damage_src_moved
[17:52:08] [PASSED] drm_test_damage_iter_damage_not_visible
[17:52:08] ================ [PASSED] drm_damage_helper ================
[17:52:08] ============== drm_dp_mst_helper (3 subtests) ==============
[17:52:08] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[17:52:08] [PASSED] Clock 154000 BPP 30 DSC disabled
[17:52:08] [PASSED] Clock 234000 BPP 30 DSC disabled
[17:52:08] [PASSED] Clock 297000 BPP 24 DSC disabled
[17:52:08] [PASSED] Clock 332880 BPP 24 DSC enabled
[17:52:08] [PASSED] Clock 324540 BPP 24 DSC enabled
[17:52:08] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[17:52:08] ============== drm_test_dp_mst_calc_pbn_div  ===============
[17:52:08] [PASSED] Link rate 2000000 lane count 4
[17:52:08] [PASSED] Link rate 2000000 lane count 2
[17:52:08] [PASSED] Link rate 2000000 lane count 1
[17:52:08] [PASSED] Link rate 1350000 lane count 4
[17:52:08] [PASSED] Link rate 1350000 lane count 2
[17:52:08] [PASSED] Link rate 1350000 lane count 1
[17:52:08] [PASSED] Link rate 1000000 lane count 4
[17:52:08] [PASSED] Link rate 1000000 lane count 2
[17:52:08] [PASSED] Link rate 1000000 lane count 1
[17:52:08] [PASSED] Link rate 810000 lane count 4
[17:52:08] [PASSED] Link rate 810000 lane count 2
[17:52:08] [PASSED] Link rate 810000 lane count 1
[17:52:08] [PASSED] Link rate 540000 lane count 4
[17:52:08] [PASSED] Link rate 540000 lane count 2
[17:52:08] [PASSED] Link rate 540000 lane count 1
[17:52:08] [PASSED] Link rate 270000 lane count 4
[17:52:08] [PASSED] Link rate 270000 lane count 2
[17:52:08] [PASSED] Link rate 270000 lane count 1
[17:52:08] [PASSED] Link rate 162000 lane count 4
[17:52:08] [PASSED] Link rate 162000 lane count 2
[17:52:08] [PASSED] Link rate 162000 lane count 1
[17:52:08] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[17:52:08] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[17:52:08] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[17:52:08] [PASSED] DP_POWER_UP_PHY with port number
[17:52:08] [PASSED] DP_POWER_DOWN_PHY with port number
[17:52:08] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[17:52:08] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[17:52:08] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[17:52:08] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[17:52:08] [PASSED] DP_QUERY_PAYLOAD with port number
[17:52:08] [PASSED] DP_QUERY_PAYLOAD with VCPI
[17:52:08] [PASSED] DP_REMOTE_DPCD_READ with port number
[17:52:08] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[17:52:08] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[17:52:08] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[17:52:08] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[17:52:08] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[17:52:08] [PASSED] DP_REMOTE_I2C_READ with port number
[17:52:08] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[17:52:08] [PASSED] DP_REMOTE_I2C_READ with transactions array
[17:52:08] [PASSED] DP_REMOTE_I2C_WRITE with port number
[17:52:08] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[17:52:08] [PASSED] DP_REMOTE_I2C_WRITE with data array
[17:52:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[17:52:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[17:52:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[17:52:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[17:52:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[17:52:08] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[17:52:08] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[17:52:08] ================ [PASSED] drm_dp_mst_helper ================
[17:52:08] ================== drm_exec (7 subtests) ===================
[17:52:08] [PASSED] sanitycheck
[17:52:08] [PASSED] test_lock
[17:52:08] [PASSED] test_lock_unlock
[17:52:08] [PASSED] test_duplicates
[17:52:08] [PASSED] test_prepare
[17:52:08] [PASSED] test_prepare_array
[17:52:08] [PASSED] test_multiple_loops
[17:52:08] ==================== [PASSED] drm_exec =====================
[17:52:08] =========== drm_format_helper_test (17 subtests) ===========
[17:52:08] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[17:52:08] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[17:52:08] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[17:52:08] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[17:52:08] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[17:52:08] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[17:52:08] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[17:52:08] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[17:52:08] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[17:52:08] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[17:52:08] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[17:52:08] ============== drm_test_fb_xrgb8888_to_mono  ===============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[17:52:08] ==================== drm_test_fb_swab  =====================
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ================ [PASSED] drm_test_fb_swab =================
[17:52:08] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[17:52:08] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[17:52:08] [PASSED] single_pixel_source_buffer
[17:52:08] [PASSED] single_pixel_clip_rectangle
[17:52:08] [PASSED] well_known_colors
[17:52:08] [PASSED] destination_pitch
[17:52:08] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[17:52:08] ================= drm_test_fb_clip_offset  =================
[17:52:08] [PASSED] pass through
[17:52:08] [PASSED] horizontal offset
[17:52:08] [PASSED] vertical offset
[17:52:08] [PASSED] horizontal and vertical offset
[17:52:08] [PASSED] horizontal offset (custom pitch)
[17:52:08] [PASSED] vertical offset (custom pitch)
[17:52:08] [PASSED] horizontal and vertical offset (custom pitch)
[17:52:08] ============= [PASSED] drm_test_fb_clip_offset =============
[17:52:08] =================== drm_test_fb_memcpy  ====================
[17:52:08] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[17:52:08] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[17:52:08] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[17:52:08] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[17:52:08] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[17:52:08] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[17:52:08] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[17:52:08] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[17:52:08] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[17:52:08] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[17:52:08] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[17:52:08] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[17:52:08] =============== [PASSED] drm_test_fb_memcpy ================
[17:52:08] ============= [PASSED] drm_format_helper_test ==============
[17:52:08] ================= drm_format (18 subtests) =================
[17:52:08] [PASSED] drm_test_format_block_width_invalid
[17:52:08] [PASSED] drm_test_format_block_width_one_plane
[17:52:08] [PASSED] drm_test_format_block_width_two_plane
[17:52:08] [PASSED] drm_test_format_block_width_three_plane
[17:52:08] [PASSED] drm_test_format_block_width_tiled
[17:52:08] [PASSED] drm_test_format_block_height_invalid
[17:52:08] [PASSED] drm_test_format_block_height_one_plane
[17:52:08] [PASSED] drm_test_format_block_height_two_plane
[17:52:08] [PASSED] drm_test_format_block_height_three_plane
[17:52:08] [PASSED] drm_test_format_block_height_tiled
[17:52:08] [PASSED] drm_test_format_min_pitch_invalid
[17:52:08] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[17:52:08] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[17:52:08] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[17:52:08] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[17:52:08] [PASSED] drm_test_format_min_pitch_two_plane
[17:52:08] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[17:52:08] [PASSED] drm_test_format_min_pitch_tiled
[17:52:08] =================== [PASSED] drm_format ====================
[17:52:08] ============== drm_framebuffer (10 subtests) ===============
[17:52:08] ========== drm_test_framebuffer_check_src_coords  ==========
[17:52:08] [PASSED] Success: source fits into fb
[17:52:08] [PASSED] Fail: overflowing fb with x-axis coordinate
[17:52:08] [PASSED] Fail: overflowing fb with y-axis coordinate
[17:52:08] [PASSED] Fail: overflowing fb with source width
[17:52:08] [PASSED] Fail: overflowing fb with source height
[17:52:08] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[17:52:08] [PASSED] drm_test_framebuffer_cleanup
[17:52:08] =============== drm_test_framebuffer_create  ===============
[17:52:08] [PASSED] ABGR8888 normal sizes
[17:52:08] [PASSED] ABGR8888 max sizes
[17:52:08] [PASSED] ABGR8888 pitch greater than min required
[17:52:08] [PASSED] ABGR8888 pitch less than min required
[17:52:08] [PASSED] ABGR8888 Invalid width
[17:52:08] [PASSED] ABGR8888 Invalid buffer handle
[17:52:08] [PASSED] No pixel format
[17:52:08] [PASSED] ABGR8888 Width 0
[17:52:08] [PASSED] ABGR8888 Height 0
[17:52:08] [PASSED] ABGR8888 Out of bound height * pitch combination
[17:52:08] [PASSED] ABGR8888 Large buffer offset
[17:52:08] [PASSED] ABGR8888 Buffer offset for inexistent plane
[17:52:08] [PASSED] ABGR8888 Invalid flag
[17:52:08] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[17:52:08] [PASSED] ABGR8888 Valid buffer modifier
[17:52:08] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[17:52:08] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[17:52:08] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[17:52:08] [PASSED] NV12 Normal sizes
[17:52:08] [PASSED] NV12 Max sizes
[17:52:08] [PASSED] NV12 Invalid pitch
[17:52:08] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[17:52:08] [PASSED] NV12 different  modifier per-plane
[17:52:08] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[17:52:08] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[17:52:08] [PASSED] NV12 Modifier for inexistent plane
[17:52:08] [PASSED] NV12 Handle for inexistent plane
[17:52:08] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[17:52:08] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[17:52:08] [PASSED] YVU420 Normal sizes
[17:52:08] [PASSED] YVU420 Max sizes
[17:52:08] [PASSED] YVU420 Invalid pitch
[17:52:08] [PASSED] YVU420 Different pitches
[17:52:08] [PASSED] YVU420 Different buffer offsets/pitches
[17:52:08] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[17:52:08] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[17:52:08] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[17:52:08] [PASSED] YVU420 Valid modifier
[17:52:08] [PASSED] YVU420 Different modifiers per plane
[17:52:08] [PASSED] YVU420 Modifier for inexistent plane
[17:52:08] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[17:52:08] [PASSED] X0L2 Normal sizes
[17:52:08] [PASSED] X0L2 Max sizes
[17:52:08] [PASSED] X0L2 Invalid pitch
[17:52:08] [PASSED] X0L2 Pitch greater than minimum required
[17:52:08] [PASSED] X0L2 Handle for inexistent plane
[17:52:08] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[17:52:08] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[17:52:08] [PASSED] X0L2 Valid modifier
[17:52:08] [PASSED] X0L2 Modifier for inexistent plane
[17:52:08] =========== [PASSED] drm_test_framebuffer_create ===========
[17:52:08] [PASSED] drm_test_framebuffer_free
[17:52:08] [PASSED] drm_test_framebuffer_init
[17:52:08] [PASSED] drm_test_framebuffer_init_bad_format
[17:52:08] [PASSED] drm_test_framebuffer_init_dev_mismatch
[17:52:08] [PASSED] drm_test_framebuffer_lookup
[17:52:08] [PASSED] drm_test_framebuffer_lookup_inexistent
[17:52:08] [PASSED] drm_test_framebuffer_modifiers_not_supported
[17:52:08] ================= [PASSED] drm_framebuffer =================
[17:52:08] ================ drm_gem_shmem (8 subtests) ================
[17:52:08] [PASSED] drm_gem_shmem_test_obj_create
[17:52:08] [PASSED] drm_gem_shmem_test_obj_create_private
[17:52:08] [PASSED] drm_gem_shmem_test_pin_pages
[17:52:08] [PASSED] drm_gem_shmem_test_vmap
[17:52:08] [PASSED] drm_gem_shmem_test_get_sg_table
[17:52:08] [PASSED] drm_gem_shmem_test_get_pages_sgt
[17:52:08] [PASSED] drm_gem_shmem_test_madvise
[17:52:08] [PASSED] drm_gem_shmem_test_purge
[17:52:08] ================== [PASSED] drm_gem_shmem ==================
[17:52:08] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[17:52:08] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[17:52:08] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[17:52:08] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[17:52:08] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[17:52:08] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[17:52:08] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[17:52:08] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[17:52:08] [PASSED] Automatic
[17:52:08] [PASSED] Full
[17:52:08] [PASSED] Limited 16:235
[17:52:08] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[17:52:08] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[17:52:08] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[17:52:08] [PASSED] drm_test_check_disable_connector
[17:52:08] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[17:52:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[17:52:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[17:52:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[17:52:08] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[17:52:08] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[17:52:08] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[17:52:08] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[17:52:08] [PASSED] drm_test_check_output_bpc_dvi
[17:52:08] [PASSED] drm_test_check_output_bpc_format_vic_1
[17:52:08] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[17:52:08] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[17:52:08] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[17:52:08] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[17:52:08] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[17:52:08] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[17:52:08] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[17:52:08] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[17:52:08] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[17:52:08] [PASSED] drm_test_check_broadcast_rgb_value
[17:52:08] [PASSED] drm_test_check_bpc_8_value
[17:52:08] [PASSED] drm_test_check_bpc_10_value
[17:52:08] [PASSED] drm_test_check_bpc_12_value
[17:52:08] [PASSED] drm_test_check_format_value
[17:52:08] [PASSED] drm_test_check_tmds_char_value
[17:52:08] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[17:52:08] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[17:52:08] [PASSED] drm_test_check_mode_valid
[17:52:08] [PASSED] drm_test_check_mode_valid_reject
[17:52:08] [PASSED] drm_test_check_mode_valid_reject_rate
[17:52:08] [PASSED] drm_test_check_mode_valid_reject_max_clock
[17:52:08] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[17:52:08] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[17:52:08] [PASSED] drm_test_check_infoframes
[17:52:08] [PASSED] drm_test_check_reject_avi_infoframe
[17:52:08] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[17:52:08] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[17:52:08] [PASSED] drm_test_check_reject_audio_infoframe
[17:52:08] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[17:52:08] ================= drm_managed (2 subtests) =================
[17:52:08] [PASSED] drm_test_managed_release_action
[17:52:08] [PASSED] drm_test_managed_run_action
[17:52:08] =================== [PASSED] drm_managed ===================
[17:52:08] =================== drm_mm (6 subtests) ====================
[17:52:08] [PASSED] drm_test_mm_init
[17:52:08] [PASSED] drm_test_mm_debug
[17:52:08] [PASSED] drm_test_mm_align32
[17:52:08] [PASSED] drm_test_mm_align64
[17:52:08] [PASSED] drm_test_mm_lowest
[17:52:08] [PASSED] drm_test_mm_highest
[17:52:08] ===================== [PASSED] drm_mm ======================
[17:52:08] ============= drm_modes_analog_tv (5 subtests) =============
[17:52:08] [PASSED] drm_test_modes_analog_tv_mono_576i
[17:52:08] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[17:52:08] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[17:52:08] [PASSED] drm_test_modes_analog_tv_pal_576i
[17:52:08] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[17:52:08] =============== [PASSED] drm_modes_analog_tv ===============
[17:52:08] ============== drm_plane_helper (2 subtests) ===============
[17:52:08] =============== drm_test_check_plane_state  ================
[17:52:08] [PASSED] clipping_simple
[17:52:08] [PASSED] clipping_rotate_reflect
[17:52:08] [PASSED] positioning_simple
[17:52:08] [PASSED] upscaling
[17:52:08] [PASSED] downscaling
[17:52:08] [PASSED] rounding1
[17:52:08] [PASSED] rounding2
[17:52:08] [PASSED] rounding3
[17:52:08] [PASSED] rounding4
[17:52:08] =========== [PASSED] drm_test_check_plane_state ============
[17:52:08] =========== drm_test_check_invalid_plane_state  ============
[17:52:08] [PASSED] positioning_invalid
[17:52:08] [PASSED] upscaling_invalid
[17:52:08] [PASSED] downscaling_invalid
[17:52:08] ======= [PASSED] drm_test_check_invalid_plane_state ========
[17:52:08] ================ [PASSED] drm_plane_helper =================
[17:52:08] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[17:52:08] ====== drm_test_connector_helper_tv_get_modes_check  =======
[17:52:08] [PASSED] None
[17:52:08] [PASSED] PAL
[17:52:08] [PASSED] NTSC
[17:52:08] [PASSED] Both, NTSC Default
[17:52:08] [PASSED] Both, PAL Default
[17:52:08] [PASSED] Both, NTSC Default, with PAL on command-line
[17:52:08] [PASSED] Both, PAL Default, with NTSC on command-line
[17:52:08] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[17:52:08] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[17:52:08] ================== drm_rect (9 subtests) ===================
[17:52:08] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[17:52:08] [PASSED] drm_test_rect_clip_scaled_not_clipped
[17:52:08] [PASSED] drm_test_rect_clip_scaled_clipped
[17:52:08] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[17:52:08] ================= drm_test_rect_intersect  =================
[17:52:08] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[17:52:08] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[17:52:08] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[17:52:08] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[17:52:08] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[17:52:08] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[17:52:08] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[17:52:08] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[17:52:08] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[17:52:08] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[17:52:08] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[17:52:08] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[17:52:08] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[17:52:08] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[17:52:08] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[17:52:08] ============= [PASSED] drm_test_rect_intersect =============
[17:52:08] ================ drm_test_rect_calc_hscale  ================
[17:52:08] [PASSED] normal use
[17:52:08] [PASSED] out of max range
[17:52:08] [PASSED] out of min range
[17:52:08] [PASSED] zero dst
[17:52:08] [PASSED] negative src
[17:52:08] [PASSED] negative dst
[17:52:08] ============ [PASSED] drm_test_rect_calc_hscale ============
[17:52:08] ================ drm_test_rect_calc_vscale  ================
[17:52:08] [PASSED] normal use
[17:52:08] [PASSED] out of max range
[17:52:08] [PASSED] out of min range
[17:52:08] [PASSED] zero dst
[17:52:08] [PASSED] negative src
[17:52:08] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[17:52:08] ============ [PASSED] drm_test_rect_calc_vscale ============
[17:52:08] ================== drm_test_rect_rotate  ===================
[17:52:08] [PASSED] reflect-x
[17:52:08] [PASSED] reflect-y
[17:52:08] [PASSED] rotate-0
[17:52:08] [PASSED] rotate-90
[17:52:08] [PASSED] rotate-180
[17:52:08] [PASSED] rotate-270
[17:52:08] ============== [PASSED] drm_test_rect_rotate ===============
[17:52:08] ================ drm_test_rect_rotate_inv  =================
[17:52:08] [PASSED] reflect-x
[17:52:08] [PASSED] reflect-y
[17:52:08] [PASSED] rotate-0
[17:52:08] [PASSED] rotate-90
[17:52:08] [PASSED] rotate-180
[17:52:08] [PASSED] rotate-270
[17:52:08] ============ [PASSED] drm_test_rect_rotate_inv =============
[17:52:08] ==================== [PASSED] drm_rect =====================
[17:52:08] ============ drm_sysfb_modeset_test (1 subtest) ============
[17:52:08] ============ drm_test_sysfb_build_fourcc_list  =============
[17:52:08] [PASSED] no native formats
[17:52:08] [PASSED] XRGB8888 as native format
[17:52:08] [PASSED] remove duplicates
[17:52:08] [PASSED] convert alpha formats
[17:52:08] [PASSED] random formats
[17:52:08] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[17:52:08] ============= [PASSED] drm_sysfb_modeset_test ==============
[17:52:08] ================== drm_fixp (2 subtests) ===================
[17:52:09] [PASSED] drm_test_int2fixp
[17:52:09] [PASSED] drm_test_sm2fixp
[17:52:09] ==================== [PASSED] drm_fixp =====================
[17:52:09] ============================================================
[17:52:09] Testing complete. Ran 621 tests: passed: 621
[17:52:09] Elapsed time: 26.630s total, 1.765s configuring, 24.698s building, 0.133s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[17:52:09] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:52:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:52:20] Starting KUnit Kernel (1/1)...
[17:52:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:52:20] ================= ttm_device (5 subtests) ==================
[17:52:20] [PASSED] ttm_device_init_basic
[17:52:20] [PASSED] ttm_device_init_multiple
[17:52:20] [PASSED] ttm_device_fini_basic
[17:52:20] [PASSED] ttm_device_init_no_vma_man
[17:52:20] ================== ttm_device_init_pools  ==================
[17:52:20] [PASSED] No DMA allocations, no DMA32 required
[17:52:20] [PASSED] DMA allocations, DMA32 required
[17:52:20] [PASSED] No DMA allocations, DMA32 required
[17:52:20] [PASSED] DMA allocations, no DMA32 required
[17:52:20] ============== [PASSED] ttm_device_init_pools ==============
[17:52:20] =================== [PASSED] ttm_device ====================
[17:52:20] ================== ttm_pool (8 subtests) ===================
[17:52:20] ================== ttm_pool_alloc_basic  ===================
[17:52:20] [PASSED] One page
[17:52:20] [PASSED] More than one page
[17:52:20] [PASSED] Above the allocation limit
[17:52:20] [PASSED] One page, with coherent DMA mappings enabled
[17:52:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:52:20] ============== [PASSED] ttm_pool_alloc_basic ===============
[17:52:20] ============== ttm_pool_alloc_basic_dma_addr  ==============
[17:52:20] [PASSED] One page
[17:52:20] [PASSED] More than one page
[17:52:20] [PASSED] Above the allocation limit
[17:52:20] [PASSED] One page, with coherent DMA mappings enabled
[17:52:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:52:20] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[17:52:20] [PASSED] ttm_pool_alloc_order_caching_match
[17:52:20] [PASSED] ttm_pool_alloc_caching_mismatch
[17:52:20] [PASSED] ttm_pool_alloc_order_mismatch
[17:52:20] [PASSED] ttm_pool_free_dma_alloc
[17:52:20] [PASSED] ttm_pool_free_no_dma_alloc
[17:52:20] [PASSED] ttm_pool_fini_basic
[17:52:20] ==================== [PASSED] ttm_pool =====================
[17:52:20] ================ ttm_resource (8 subtests) =================
[17:52:20] ================= ttm_resource_init_basic  =================
[17:52:20] [PASSED] Init resource in TTM_PL_SYSTEM
[17:52:20] [PASSED] Init resource in TTM_PL_VRAM
[17:52:20] [PASSED] Init resource in a private placement
[17:52:20] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[17:52:20] ============= [PASSED] ttm_resource_init_basic =============
[17:52:20] [PASSED] ttm_resource_init_pinned
[17:52:20] [PASSED] ttm_resource_fini_basic
[17:52:20] [PASSED] ttm_resource_manager_init_basic
[17:52:20] [PASSED] ttm_resource_manager_usage_basic
[17:52:20] [PASSED] ttm_resource_manager_set_used_basic
[17:52:20] [PASSED] ttm_sys_man_alloc_basic
[17:52:20] [PASSED] ttm_sys_man_free_basic
[17:52:20] ================== [PASSED] ttm_resource ===================
[17:52:20] =================== ttm_tt (15 subtests) ===================
[17:52:20] ==================== ttm_tt_init_basic  ====================
[17:52:20] [PASSED] Page-aligned size
[17:52:20] [PASSED] Extra pages requested
[17:52:20] ================ [PASSED] ttm_tt_init_basic ================
[17:52:20] [PASSED] ttm_tt_init_misaligned
[17:52:20] [PASSED] ttm_tt_fini_basic
[17:52:20] [PASSED] ttm_tt_fini_sg
[17:52:20] [PASSED] ttm_tt_fini_shmem
[17:52:20] [PASSED] ttm_tt_create_basic
[17:52:20] [PASSED] ttm_tt_create_invalid_bo_type
[17:52:20] [PASSED] ttm_tt_create_ttm_exists
[17:52:20] [PASSED] ttm_tt_create_failed
[17:52:20] [PASSED] ttm_tt_destroy_basic
[17:52:20] [PASSED] ttm_tt_populate_null_ttm
[17:52:20] [PASSED] ttm_tt_populate_populated_ttm
[17:52:20] [PASSED] ttm_tt_unpopulate_basic
[17:52:20] [PASSED] ttm_tt_unpopulate_empty_ttm
[17:52:20] [PASSED] ttm_tt_swapin_basic
[17:52:20] ===================== [PASSED] ttm_tt ======================
[17:52:20] =================== ttm_bo (14 subtests) ===================
[17:52:20] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[17:52:20] [PASSED] Cannot be interrupted and sleeps
[17:52:20] [PASSED] Cannot be interrupted, locks straight away
[17:52:20] [PASSED] Can be interrupted, sleeps
[17:52:20] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[17:52:20] [PASSED] ttm_bo_reserve_locked_no_sleep
[17:52:20] [PASSED] ttm_bo_reserve_no_wait_ticket
[17:52:20] [PASSED] ttm_bo_reserve_double_resv
[17:52:20] [PASSED] ttm_bo_reserve_interrupted
[17:52:20] [PASSED] ttm_bo_reserve_deadlock
[17:52:20] [PASSED] ttm_bo_unreserve_basic
[17:52:20] [PASSED] ttm_bo_unreserve_pinned
[17:52:20] [PASSED] ttm_bo_unreserve_bulk
[17:52:20] [PASSED] ttm_bo_fini_basic
[17:52:20] [PASSED] ttm_bo_fini_shared_resv
[17:52:20] [PASSED] ttm_bo_pin_basic
[17:52:20] [PASSED] ttm_bo_pin_unpin_resource
[17:52:20] [PASSED] ttm_bo_multiple_pin_one_unpin
[17:52:20] ===================== [PASSED] ttm_bo ======================
[17:52:20] ============== ttm_bo_validate (22 subtests) ===============
[17:52:20] ============== ttm_bo_init_reserved_sys_man  ===============
[17:52:20] [PASSED] Buffer object for userspace
[17:52:20] [PASSED] Kernel buffer object
[17:52:20] [PASSED] Shared buffer object
[17:52:20] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[17:52:20] ============== ttm_bo_init_reserved_mock_man  ==============
[17:52:20] [PASSED] Buffer object for userspace
[17:52:20] [PASSED] Kernel buffer object
[17:52:20] [PASSED] Shared buffer object
[17:52:20] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[17:52:20] [PASSED] ttm_bo_init_reserved_resv
[17:52:20] ================== ttm_bo_validate_basic  ==================
[17:52:20] [PASSED] Buffer object for userspace
[17:52:20] [PASSED] Kernel buffer object
[17:52:20] [PASSED] Shared buffer object
[17:52:20] ============== [PASSED] ttm_bo_validate_basic ==============
[17:52:20] [PASSED] ttm_bo_validate_invalid_placement
[17:52:20] ============= ttm_bo_validate_same_placement  ==============
[17:52:20] [PASSED] System manager
[17:52:20] [PASSED] VRAM manager
[17:52:20] ========= [PASSED] ttm_bo_validate_same_placement ==========
[17:52:20] [PASSED] ttm_bo_validate_failed_alloc
[17:52:20] [PASSED] ttm_bo_validate_pinned
[17:52:20] [PASSED] ttm_bo_validate_busy_placement
[17:52:20] ================ ttm_bo_validate_multihop  =================
[17:52:20] [PASSED] Buffer object for userspace
[17:52:20] [PASSED] Kernel buffer object
[17:52:20] [PASSED] Shared buffer object
[17:52:20] ============ [PASSED] ttm_bo_validate_multihop =============
[17:52:20] ========== ttm_bo_validate_no_placement_signaled  ==========
[17:52:20] [PASSED] Buffer object in system domain, no page vector
[17:52:20] [PASSED] Buffer object in system domain with an existing page vector
[17:52:20] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[17:52:20] ======== ttm_bo_validate_no_placement_not_signaled  ========
[17:52:20] [PASSED] Buffer object for userspace
[17:52:20] [PASSED] Kernel buffer object
[17:52:20] [PASSED] Shared buffer object
[17:52:20] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[17:52:20] [PASSED] ttm_bo_validate_move_fence_signaled
[17:52:20] ========= ttm_bo_validate_move_fence_not_signaled  =========
[17:52:20] [PASSED] Waits for GPU
[17:52:20] [PASSED] Tries to lock straight away
[17:52:20] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[17:52:20] [PASSED] ttm_bo_validate_swapout
[17:52:20] [PASSED] ttm_bo_validate_happy_evict
[17:52:20] [PASSED] ttm_bo_validate_all_pinned_evict
[17:52:20] [PASSED] ttm_bo_validate_allowed_only_evict
[17:52:20] [PASSED] ttm_bo_validate_deleted_evict
[17:52:20] [PASSED] ttm_bo_validate_busy_domain_evict
[17:52:20] [PASSED] ttm_bo_validate_evict_gutting
[17:52:20] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[17:52:20] ================= [PASSED] ttm_bo_validate =================
[17:52:20] ============================================================
[17:52:20] Testing complete. Ran 102 tests: passed: 102
[17:52:20] Elapsed time: 11.480s total, 1.717s configuring, 9.546s building, 0.182s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915: Eliminate FB usage from low level pinning code

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 970 bytes --]

== Series Details ==

Series: drm/i915: Eliminate FB usage from low level pinning code
URL   : https://patchwork.freedesktop.org/series/165014/
State : success

== Summary ==

CI Bug Log - changes from xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3_BAT -> xe-pw-165014v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3 -> xe-pw-165014v1

  IGT_8862: 9b95600c4ae2cb683a8a19ad2a7c006263811a8f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3: 0898052c06eacd13f9fcbc2728072017274d7af3
  xe-pw-165014v1: 165014v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/index.html

[-- Attachment #2: Type: text/html, Size: 1518 bytes --]

✗ Xe.CI.FULL: failure for drm/i915: Eliminate FB usage from low level pinning code

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 57354 bytes --]

== Series Details ==

Series: drm/i915: Eliminate FB usage from low level pinning code
URL   : https://patchwork.freedesktop.org/series/165014/
State : failure

== Summary ==

CI Bug Log - changes from xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3_FULL -> xe-pw-165014v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-165014v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-165014v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-165014v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@device_reset@unbind-reset-rebind:
    - shard-bmg:          [PASS][1] -> [SKIP][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@device_reset@unbind-reset-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@device_reset@unbind-reset-rebind.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-dp-2:
    - shard-bmg:          [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-5/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-dp-2.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-dp-2.html

  
Known issues
------------

  Here are the changes found in xe-pw-165014v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@hotrebind-lateclose:
    - shard-bmg:          [PASS][5] -> [SKIP][6] ([Intel XE#6779])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@core_hotunplug@hotrebind-lateclose.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@core_hotunplug@hotrebind-lateclose.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2233])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2370])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@linear-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2327]) +4 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_big_fb@linear-8bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#7059] / [Intel XE#7085])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#1124]) +11 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2328] / [Intel XE#7367])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#610] / [Intel XE#7387]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-10/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_bw@connected-linear-tiling-1-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#7621])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@kms_bw@connected-linear-tiling-1-displays-2160x1440p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#7679]) +3 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-2-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#367] / [Intel XE#7354]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#3432]) +2 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2887]) +21 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2724] / [Intel XE#7449]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_color@degamma:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2325] / [Intel XE#7358])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2252]) +11 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][22] ([Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@kms_content_protection@atomic-dpms-hdcp14@pipe-a-dp-2.html

  * igt@kms_content_protection@content-type-change:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#7642])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2390] / [Intel XE#6974])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][25] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +3 other tests fail
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2320]) +4 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_cursor_crc@cursor-offscreen-256x85.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          NOTRUN -> [FAIL][28] ([Intel XE#7571])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2286] / [Intel XE#6035]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#4354] / [Intel XE#5870])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#4422] / [Intel XE#7442])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#4156] / [Intel XE#7425])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_feature_discovery@display-3x:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2373] / [Intel XE#7448])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@psr1:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2374] / [Intel XE#6127])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#7179])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2311]) +46 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#4141]) +20 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2313]) +44 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#6911] / [Intel XE#7466])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12:
    - shard-bmg:          [PASS][42] -> [ABORT][43] ([Intel XE#5545])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-5/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-b-hdmi-a-3:
    - shard-bmg:          [PASS][44] -> [DMESG-FAIL][45] ([Intel XE#5545])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-5/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-b-hdmi-a-3.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-b-hdmi-a-3.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#7283]) +5 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#5021] / [Intel XE#7377])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-b:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-b.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#7376] / [Intel XE#870])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#2391] / [Intel XE#6927])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2392] / [Intel XE#6927]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-10/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2499])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#1489]) +11 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2387] / [Intel XE#7429])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-psr2-cursor-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#2234] / [Intel XE#2850]) +17 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@kms_psr@fbc-psr2-cursor-plane-move.html

  * igt@kms_psr@psr2-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#2234])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_psr@psr2-primary-render.html

  * igt@kms_rotation_crc@bad-pixel-format:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#3904] / [Intel XE#7342]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_rotation_crc@bad-pixel-format.html

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-lnl:          [PASS][59] -> [FAIL][60] ([Intel XE#1874] / [Intel XE#6946] / [Intel XE#7305])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-lnl-6/igt@kms_rotation_crc@multiplane-rotation.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-lnl-2/igt@kms_rotation_crc@multiplane-rotation.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2330] / [Intel XE#5813])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html

  * igt@kms_scaling_modes@scaling-mode-full:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#2413])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@kms_scaling_modes@scaling-mode-full.html

  * igt@kms_sharpness_filter@filter-rotations:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#6503])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_sharpness_filter@filter-rotations.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#1499]) +1 other test skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-10/igt@kms_vrr@flip-suspend.html

  * igt@xe_compute@ccs-mode-basic:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#6599]) +1 other test skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@xe_compute@ccs-mode-basic.html

  * igt@xe_eudebug_online@set-breakpoint-faultable:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#7636]) +21 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@xe_eudebug_online@set-breakpoint-faultable.html

  * igt@xe_evict@evict-mixed-threads-small-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#7140]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@xe_evict@evict-mixed-threads-small-multi-queue.html

  * igt@xe_exec_balancer@many-parallel-userptr-invalidate-race:
    - shard-bmg:          [PASS][68] -> [SKIP][69] ([Intel XE#6557] / [Intel XE#6703]) +2 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_exec_balancer@many-parallel-userptr-invalidate-race.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_exec_balancer@many-parallel-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#2322] / [Intel XE#7372]) +14 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-rebind-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#7136]) +13 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@xe_exec_fault_mode@twice-multi-queue-userptr-rebind-prefetch.html

  * igt@xe_exec_multi_queue@one-queue-priority-smem:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#6874]) +42 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@xe_exec_multi_queue@one-queue-priority-smem.html

  * igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset:
    - shard-bmg:          [PASS][73] -> [SKIP][74] ([Intel XE#6703]) +81 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
    - shard-lnl:          [PASS][75] -> [FAIL][76] ([Intel XE#5625])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-lnl-8/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html

  * igt@xe_exec_system_allocator@twice-new-nomemset:
    - shard-bmg:          [PASS][77] -> [DMESG-FAIL][78] ([Intel XE#5545] / [Intel XE#6652])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_exec_system_allocator@twice-new-nomemset.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_exec_system_allocator@twice-new-nomemset.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#7138]) +14 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init:
    - shard-bmg:          [PASS][80] -> [ABORT][81] ([Intel XE#7578])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#2229])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#6964]) +3 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-10/igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          NOTRUN -> [SKIP][84] ([Intel XE#2245] / [Intel XE#7590])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@xa-app-transient-media-off:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#7590])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@xe_pat@xa-app-transient-media-off.html

  * igt@xe_pm@d3cold-basic:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#2284] / [Intel XE#7370])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@xe_pm@d3cold-basic.html

  * igt@xe_pm@d3hot-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#5742] / [Intel XE#7328] / [Intel XE#7400])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@xe_pm@d3hot-i2c.html

  * igt@xe_pm@s3-basic-exec:
    - shard-bmg:          [PASS][88] -> [DMESG-WARN][89] ([Intel XE#7725])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-4/igt@xe_pm@s3-basic-exec.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@xe_pm@s3-basic-exec.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][90] ([Intel XE#7599]) +1 other test skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_pxp@display-black-pxp-fb:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#4733] / [Intel XE#7417]) +3 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@xe_pxp@display-black-pxp-fb.html

  * igt@xe_query@multigpu-query-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][92] ([Intel XE#944]) +1 other test skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@xe_query@multigpu-query-cs-cycles.html

  
#### Possible fixes ####

  * igt@core_hotunplug@hotunplug-rescan:
    - shard-bmg:          [DMESG-FAIL][93] -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-2/igt@core_hotunplug@hotunplug-rescan.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-1/igt@core_hotunplug@hotunplug-rescan.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][95] ([Intel XE#7084]) -> [PASS][96] +1 other test pass
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-c-edp-1:
    - shard-lnl:          [INCOMPLETE][97] -> [PASS][98] +1 other test pass
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-lnl-4/igt@kms_cursor_crc@cursor-suspend@pipe-c-edp-1.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-lnl-6/igt@kms_cursor_crc@cursor-suspend@pipe-c-edp-1.html

  * igt@kms_flip@2x-absolute-wf_vblank-interruptible:
    - shard-bmg:          [FAIL][99] -> [PASS][100] +1 other test pass
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-3/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][101] ([Intel XE#1503]) -> [PASS][102]
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-2/igt@kms_hdr@invalid-hdr.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-1/igt@kms_hdr@invalid-hdr.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][103] ([Intel XE#6321]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-5/igt@xe_evict@evict-mixed-many-threads-small.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset:
    - shard-lnl:          [FAIL][105] -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-lnl-6/igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-lnl-7/igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset.html

  * igt@xe_pm@s3-basic:
    - shard-bmg:          [DMESG-WARN][107] ([Intel XE#7725]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-3/igt@xe_pm@s3-basic.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@xe_pm@s3-basic.html

  
#### Warnings ####

  * igt@kms_big_fb@4-tiled-16bpp-rotate-270:
    - shard-bmg:          [SKIP][109] ([Intel XE#2327]) -> [SKIP][110] ([Intel XE#6703])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-bmg:          [SKIP][111] ([Intel XE#1124]) -> [SKIP][112] ([Intel XE#6703]) +1 other test skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_bw@linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          [SKIP][113] ([Intel XE#367] / [Intel XE#7354]) -> [SKIP][114] ([Intel XE#6703]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs:
    - shard-bmg:          [SKIP][115] ([Intel XE#2887]) -> [SKIP][116] ([Intel XE#6703]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs.html

  * igt@kms_chamelium_hpd@dp-hpd-after-hibernate:
    - shard-bmg:          [SKIP][117] ([Intel XE#2252]) -> [SKIP][118] ([Intel XE#6703])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-bmg:          [SKIP][119] ([Intel XE#2321] / [Intel XE#7355]) -> [SKIP][120] ([Intel XE#6703]) +1 other test skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_cursor_crc@cursor-offscreen-512x512.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-bmg:          [SKIP][121] ([Intel XE#1508]) -> [SKIP][122] ([Intel XE#6703])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
    - shard-bmg:          [SKIP][123] ([Intel XE#7178] / [Intel XE#7351]) -> [SKIP][124] ([Intel XE#6703])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][125] ([Intel XE#2312]) -> [SKIP][126] ([Intel XE#2311])
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-mmap-wc.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][127] ([Intel XE#4141]) -> [SKIP][128] ([Intel XE#6703]) +3 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-render:
    - shard-bmg:          [SKIP][129] ([Intel XE#7061] / [Intel XE#7356]) -> [SKIP][130] ([Intel XE#6703]) +1 other test skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-render.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt:
    - shard-bmg:          [SKIP][131] ([Intel XE#2311]) -> [SKIP][132] ([Intel XE#6703]) +3 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
    - shard-bmg:          [SKIP][133] ([Intel XE#2313]) -> [SKIP][134] ([Intel XE#6703]) +2 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          [SKIP][135] ([Intel XE#5020] / [Intel XE#7348]) -> [SKIP][136] ([Intel XE#6703])
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_plane_multiple@tiling-y.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf:
    - shard-bmg:          [SKIP][137] ([Intel XE#1489]) -> [SKIP][138] ([Intel XE#6703]) +1 other test skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr@pr-sprite-render:
    - shard-bmg:          [SKIP][139] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][140] ([Intel XE#6703]) +1 other test skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_psr@pr-sprite-render.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_psr@pr-sprite-render.html

  * igt@kms_sharpness_filter@filter-strength:
    - shard-bmg:          [SKIP][141] ([Intel XE#6503]) -> [SKIP][142] ([Intel XE#6703])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@kms_sharpness_filter@filter-strength.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@kms_sharpness_filter@filter-strength.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][143] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][144] ([Intel XE#1729] / [Intel XE#7424])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern.html

  * igt@xe_eudebug_online@resume-one:
    - shard-bmg:          [SKIP][145] ([Intel XE#7636]) -> [SKIP][146] ([Intel XE#6703]) +1 other test skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_eudebug_online@resume-one.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_eudebug_online@resume-one.html

  * igt@xe_evict@evict-small-multi-queue:
    - shard-bmg:          [SKIP][147] ([Intel XE#7140]) -> [SKIP][148] ([Intel XE#6703])
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_evict@evict-small-multi-queue.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_evict@evict-small-multi-queue.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm:
    - shard-bmg:          [SKIP][149] ([Intel XE#7136]) -> [SKIP][150] ([Intel XE#6703]) +1 other test skip
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm.html

  * igt@xe_exec_multi_queue@many-execs-basic-smem:
    - shard-bmg:          [SKIP][151] ([Intel XE#6874]) -> [SKIP][152] ([Intel XE#6703]) +5 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_exec_multi_queue@many-execs-basic-smem.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_exec_multi_queue@many-execs-basic-smem.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-basic:
    - shard-bmg:          [SKIP][153] ([Intel XE#7138]) -> [SKIP][154] ([Intel XE#6703]) +1 other test skip
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html

  * igt@xe_media_fill@media-fill:
    - shard-bmg:          [SKIP][155] ([Intel XE#2459] / [Intel XE#2596] / [Intel XE#7321] / [Intel XE#7453]) -> [SKIP][156] ([Intel XE#6703])
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_media_fill@media-fill.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_media_fill@media-fill.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [DMESG-WARN][165], [DMESG-WARN][166], [DMESG-WARN][167], [DMESG-WARN][168], [DMESG-WARN][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179], [PASS][180], [PASS][181]) ([Intel XE#7725]) -> ([SKIP][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [DMESG-WARN][195], [PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207]) ([Intel XE#2457] / [Intel XE#7405] / [Intel XE#7725])
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-5/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-2/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-2/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-2/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-9/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-9/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-7/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-7/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-6/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-6/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-6/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-6/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-6/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-3/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-3/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-1/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-1/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_module_load@load.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-8/igt@xe_module_load@load.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-8/igt@xe_module_load@load.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-4/igt@xe_module_load@load.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-5/igt@xe_module_load@load.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-4/igt@xe_module_load@load.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@xe_module_load@load.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-10/igt@xe_module_load@load.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-10/igt@xe_module_load@load.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_module_load@load.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-1/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-1/igt@xe_module_load@load.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-7/igt@xe_module_load@load.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@xe_module_load@load.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-8/igt@xe_module_load@load.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-6/igt@xe_module_load@load.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-5/igt@xe_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-5/igt@xe_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-4/igt@xe_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-6/igt@xe_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-6/igt@xe_module_load@load.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@xe_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-3/igt@xe_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@xe_module_load@load.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_module_load@load.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@xe_module_load@load.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-9/igt@xe_module_load@load.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_module_load@load.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-bmg:          [SKIP][208] ([Intel XE#4733] / [Intel XE#7417]) -> [SKIP][209] ([Intel XE#6703])
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_query@multigpu-query-invalid-extension:
    - shard-bmg:          [SKIP][210] ([Intel XE#944]) -> [SKIP][211] ([Intel XE#6703])
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3/shard-bmg-10/igt@xe_query@multigpu-query-invalid-extension.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/shard-bmg-2/igt@xe_query@multigpu-query-invalid-extension.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391
  [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5870
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6127
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6779]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6779
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6927
  [Intel XE#6946]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6946
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7305]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7305
  [Intel XE#7321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7321
  [Intel XE#7328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7328
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7400
  [Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7448]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7448
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7453
  [Intel XE#7466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7466
  [Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
  [Intel XE#7578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7578
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7621]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7621
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7725
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3 -> xe-pw-165014v1

  IGT_8862: 9b95600c4ae2cb683a8a19ad2a7c006263811a8f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4914-0898052c06eacd13f9fcbc2728072017274d7af3: 0898052c06eacd13f9fcbc2728072017274d7af3
  xe-pw-165014v1: 165014v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165014v1/index.html

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