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* [PATCH v4 0/8] Handle non-fatal errors routed via IRQ
@ 2026-11-06  7:19 Riana Tauro
  2026-11-06  7:19 ` [PATCH v4 1/8] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
                   ` (11 more replies)
  0 siblings, 12 replies; 32+ messages in thread
From: Riana Tauro @ 2026-11-06  7:19 UTC (permalink / raw)
  To: intel-xe
  Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	raag.jadav, mallesh.koujalagi, badal.nilawar

Implement wa_14028434957 on platform CRI

Process, log and recover non-fatal errors routed via direct IRQ.
Double-bit ECC errors are also reported as non-fatal errors. Process and 
offline pages for user bos. Critical Bo's require a SBR to recover.
Wedge the device with bus reset.

Race Case Handling:

There is a potential race between errors reported via AER that require
an SBR (Secondary Bus Reset) and non-fatal errors still being processed
by the worker. Since a reset is imminent once AER reports such an
error, the worker processing non-fatal errors is flushed and disabled.

There is also a possibility of the AER handler running first, in which
case firmware reports all pending errors including non-fatal ones as a
single response, since it maintains a single queue for all error types. 
Skip handling of double-bit ECC errors in that case, since the SBR already
clears the offlined pages on reload and firmware drops them from its queue
once read, so offlining them here would be unnecessary and could leave the 
queue and the soft-offlined pages list out of sync.

Rev2: Handle Race between AER
      Use WA number

Rev3: Reorder patches to fix sashiko comments
      squash all WA patches
      remove delayed worker

Rev4: fix survivability issue on unload
      disable worker before wedged check

Raag Jadav (2):
  drm/xe/hw_error: Reuse CSC worker for generic error handling
  drm/xe/hw_error: Initialize hw_error_work per tile

Riana Tauro (6):
  drm/xe/survivability: Guard runtime survivability enable against
    unbind
  drm/xe/ras: Treat non-fatal PCIe errors as recovered
  drm/xe/pci: Add upstream switch port lookup helper
  drm/xe/xe_ras: Add a flag for uncorrectable internal error
  drm/xe: Add support for wa_14028434957
  drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path

 drivers/gpu/drm/xe/xe_device_wa_oob.rules  |  1 +
 drivers/gpu/drm/xe/xe_hw_error.c           | 65 +++++++++++++++---
 drivers/gpu/drm/xe/xe_hw_error.h           |  1 +
 drivers/gpu/drm/xe/xe_pci.c                | 23 +++++++
 drivers/gpu/drm/xe/xe_pci.h                |  1 +
 drivers/gpu/drm/xe/xe_pci_error.c          | 43 +++++++++++-
 drivers/gpu/drm/xe/xe_ras.c                | 78 ++++++++++++++++------
 drivers/gpu/drm/xe/xe_ras.h                |  2 +
 drivers/gpu/drm/xe/xe_ras_types.h          |  2 +
 drivers/gpu/drm/xe/xe_survivability_mode.c | 10 +++
 drivers/gpu/drm/xe/xe_tile_types.h         |  4 +-
 11 files changed, 196 insertions(+), 34 deletions(-)

-- 
2.47.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH v4 1/8] drm/xe/hw_error: Reuse CSC worker for generic error handling
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
@ 2026-11-06  7:19 ` Riana Tauro
  2026-11-06  7:19 ` [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
                   ` (10 subsequent siblings)
  11 siblings, 0 replies; 32+ messages in thread
From: Riana Tauro @ 2026-11-06  7:19 UTC (permalink / raw)
  To: intel-xe
  Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	raag.jadav, mallesh.koujalagi, badal.nilawar

From: Raag Jadav <raag.jadav@intel.com>

We have upcoming usecases which require defering work during error
handling. Since we already have CSC worker in place, prepare it to
be reused generically.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: Remove delayed work
---
 drivers/gpu/drm/xe/xe_hw_error.c   | 10 +++++-----
 drivers/gpu/drm/xe/xe_tile_types.h |  4 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index ac720710c8e8..a934b649575c 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -166,9 +166,9 @@ static_assert(ARRAY_SIZE(pvc_master_local_nonfatal_err_reg) == XE_RAS_REG_SIZE);
 						 pvc_master_local_fatal_err_reg : \
 						 pvc_master_local_nonfatal_err_reg)
 
-static void csc_hw_error_work(struct work_struct *work)
+static void hw_error_work(struct work_struct *work)
 {
-	struct xe_tile *tile = container_of(work, typeof(*tile), csc_hw_error_work);
+	struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
 	struct xe_device *xe = tile_to_xe(tile);
 
 	guard(xe_pm_runtime)(xe);
@@ -204,7 +204,7 @@ static void csc_hw_error_handler(struct xe_tile *tile, const enum hardware_error
 					     hec_uncorrected_fw_errors[err_bit], severity_str,
 					     err_bit);
 
-			schedule_work(&tile->csc_hw_error_work);
+			schedule_work(&tile->hw_error_work);
 		}
 	}
 
@@ -513,7 +513,7 @@ void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl)
 	enum hardware_error hw_err;
 
 	if (xe_fault_csc_hw_error())
-		schedule_work(&tile->csc_hw_error_work);
+		schedule_work(&tile->hw_error_work);
 
 	for (hw_err = 0; hw_err < HARDWARE_ERROR_MAX; hw_err++) {
 		if (master_ctl & ERROR_IRQ(hw_err))
@@ -551,7 +551,7 @@ void xe_hw_error_init(struct xe_device *xe)
 	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
 		return;
 
-	INIT_WORK(&tile->csc_hw_error_work, csc_hw_error_work);
+	INIT_WORK(&tile->hw_error_work, hw_error_work);
 
 	process_hw_errors(xe);
 }
diff --git a/drivers/gpu/drm/xe/xe_tile_types.h b/drivers/gpu/drm/xe/xe_tile_types.h
index e1368c04846a..3dc011f111a4 100644
--- a/drivers/gpu/drm/xe/xe_tile_types.h
+++ b/drivers/gpu/drm/xe/xe_tile_types.h
@@ -118,8 +118,8 @@ struct xe_tile {
 	/** @memirq: Memory Based Interrupts. */
 	struct xe_memirq memirq;
 
-	/** @csc_hw_error_work: worker to report CSC HW errors */
-	struct work_struct csc_hw_error_work;
+	/** @hw_error_work: worker to handle HW errors */
+	struct work_struct hw_error_work;
 
 	/** @pcode: tile's PCODE */
 	struct {
-- 
2.47.1


^ permalink raw reply related	[flat|nested] 32+ messages in thread

* [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
  2026-11-06  7:19 ` [PATCH v4 1/8] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
@ 2026-11-06  7:19 ` Riana Tauro
  2026-11-10  5:48   ` Mallesh, Koujalagi
  2026-11-10 12:40   ` Raag Jadav
  2026-11-06  7:19 ` [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind Riana Tauro
                   ` (9 subsequent siblings)
  11 siblings, 2 replies; 32+ messages in thread
From: Riana Tauro @ 2026-11-06  7:19 UTC (permalink / raw)
  To: intel-xe
  Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	raag.jadav, mallesh.koujalagi, badal.nilawar

From: Raag Jadav <raag.jadav@intel.com>

Since hw_error_work is now being reused generically, initialize it per tile
so that we don't hit uninitialized work for non-root tile. While at it,
disable hw_error_work on fini to prevent UAF during unwind.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add dgfx and sriov check (Sashiko)

v3: retain original patch and fix unload issue in later patches
---
 drivers/gpu/drm/xe/xe_hw_error.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index a934b649575c..f7031b341ce0 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -537,6 +537,19 @@ static void process_hw_errors(struct xe_device *xe)
 	}
 }
 
+static void hw_error_fini(void *arg)
+{
+	struct xe_device *xe = arg;
+	struct xe_tile *tile;
+	u8 id;
+
+	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
+		return;
+
+	for_each_tile(tile, xe, id)
+		disable_work_sync(&tile->hw_error_work);
+}
+
 /**
  * xe_hw_error_init - Initialize hw errors
  * @xe: xe device instance
@@ -546,12 +559,15 @@ static void process_hw_errors(struct xe_device *xe)
  */
 void xe_hw_error_init(struct xe_device *xe)
 {
-	struct xe_tile *tile = xe_device_get_root_tile(xe);
+	struct xe_tile *tile;
+	u8 id;
 
 	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
 		return;
 
-	INIT_WORK(&tile->hw_error_work, hw_error_work);
+	for_each_tile(tile, xe, id)
+		INIT_WORK(&tile->hw_error_work, hw_error_work);
 
 	process_hw_errors(xe);
+	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
 }
-- 
2.47.1


^ permalink raw reply related	[flat|nested] 32+ messages in thread

* [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
  2026-11-06  7:19 ` [PATCH v4 1/8] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
  2026-11-06  7:19 ` [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
@ 2026-11-06  7:19 ` Riana Tauro
  2026-11-10  6:19   ` Mallesh, Koujalagi
  2026-11-10 12:51   ` Raag Jadav
  2026-11-06  7:19 ` [PATCH v4 4/8] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
                   ` (8 subsequent siblings)
  11 siblings, 2 replies; 32+ messages in thread
From: Riana Tauro @ 2026-11-06  7:19 UTC (permalink / raw)
  To: intel-xe
  Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	raag.jadav, mallesh.koujalagi, badal.nilawar

Runtime surivability mode creates sysfs and declares the device as
wedged in a worker thread. This can race with unbind.

During unbind, devres actions such as disabling the worker run as part of
teardown. A runtime survivability enable that is still in flight or gets
scheduled in that window can create the survivability sysfs entries while
the device is being removed. This is incorrect, as runtime survivability mode 
must not be entered once during devres teardown.

Use the DRM device enter/exit protection so that the enable path
synchronizes with device unplug and returns early if the device is
already being unbound.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_survivability_mode.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index d73cdad0b3a9..e8d618b47322 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -10,6 +10,8 @@
 #include <linux/pci.h>
 #include <linux/sysfs.h>
 
+#include <drm/drm_drv.h>
+
 #include "xe_configfs.h"
 #include "xe_device.h"
 #include "xe_heci_gsc.h"
@@ -435,12 +437,18 @@ void xe_survivability_mode_runtime_enable(struct xe_device *xe)
 {
 	struct xe_survivability *survivability = &xe->survivability;
 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	int idx;
+
 
 	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform < XE_BATTLEMAGE) {
 		xe_log_err(xe, SURVIVABILITY, -EOPNOTSUPP, "Runtime Mode not supported!\n");
 		return;
 	}
 
+	/* Synchronize with unbind, do not enter runtime survivability mode during unbind */
+	if (!drm_dev_enter(&xe->drm, &idx))
+		return;
+
 	populate_survivability_info(xe);
 	create_survivability_sysfs(pdev);
 
@@ -452,6 +460,8 @@ void xe_survivability_mode_runtime_enable(struct xe_device *xe)
 	xe_log_err(xe, SURVIVABILITY, 0, "Firmware flash required!\n");
 	xe_info(xe, "Please refer to the userspace documentation for more details how to flash the firmware on %s!\n",
 		xe->info.platform_name);
+
+	drm_dev_exit(idx);
 }
 
 /**
-- 
2.47.1


^ permalink raw reply related	[flat|nested] 32+ messages in thread

* [PATCH v4 4/8] drm/xe/ras: Treat non-fatal PCIe errors as recovered
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
                   ` (2 preceding siblings ...)
  2026-11-06  7:19 ` [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind Riana Tauro
@ 2026-11-06  7:19 ` Riana Tauro
  2026-11-06  7:19 ` [PATCH v4 5/8] drm/xe/pci: Add upstream switch port lookup helper Riana Tauro
                   ` (7 subsequent siblings)
  11 siblings, 0 replies; 32+ messages in thread
From: Riana Tauro @ 2026-11-06  7:19 UTC (permalink / raw)
  To: intel-xe
  Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	raag.jadav, mallesh.koujalagi, badal.nilawar

On systems lacking RAS capability, only PCIe errors are reported, via
AER, not device errors. Non-fatal PCIe errors reported at the Upstream
Switch Port (USP) have no impact on link or device state, so treat
them as recovered without requiring a secondary bus reset (SBR).

Fixes: 25913a062cd4 ("drm/xe/xe_ras: Add support for uncorrectable core-compute errors")
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/xe_ras.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 2c01c183d02b..cd753c82b0ff 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -830,7 +830,7 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 	}
 
 	if (!xe->info.has_sysctrl)
-		return XE_RAS_RECOVERY_ACTION_RESET;
+		return XE_RAS_RECOVERY_ACTION_RECOVERED;
 
 	BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
 	/* Default action */
-- 
2.47.1


^ permalink raw reply related	[flat|nested] 32+ messages in thread

* [PATCH v4 5/8] drm/xe/pci: Add upstream switch port lookup helper
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
                   ` (3 preceding siblings ...)
  2026-11-06  7:19 ` [PATCH v4 4/8] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
@ 2026-11-06  7:19 ` Riana Tauro
  2026-11-06  7:19 ` [PATCH v4 6/8] drm/xe/xe_ras: Add a flag for uncorrectable internal error Riana Tauro
                   ` (6 subsequent siblings)
  11 siblings, 0 replies; 32+ messages in thread
From: Riana Tauro @ 2026-11-06  7:19 UTC (permalink / raw)
  To: intel-xe
  Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	raag.jadav, mallesh.koujalagi, badal.nilawar, Andi Shyti

Move the USP lookup logic out of RAS code and into the PCI
layer so it can be reused by other callers.

No functional change.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 23 +++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_pci.h |  1 +
 drivers/gpu/drm/xe/xe_ras.c | 19 ++-----------------
 3 files changed, 26 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index ba23ec60477b..c4dca113c947 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1526,6 +1526,29 @@ struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev)
 	return to_xe_device(drm);
 }
 
+/**
+ * xe_pci_get_usp_dev() - Get the upstream switch port device.
+ * @pdev: pci device of SGunit
+ *
+ * Device Hierarchy:
+ * Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit (GPU endpoint)
+ *
+ * The function traverses the PCI device hierarchy to find the upstream switch port
+ * device.
+ *
+ * Return: pointer to USP &pci_dev, NULL otherwise.
+ */
+struct pci_dev *xe_pci_get_usp_dev(struct pci_dev *pdev)
+{
+	struct pci_dev *vsp;
+
+	vsp = pci_upstream_bridge(pdev);
+	if (!vsp)
+		return NULL;
+
+	return pci_upstream_bridge(vsp);
+}
+
 int xe_register_pci_driver(void)
 {
 	return pci_register_driver(&xe_pci_driver);
diff --git a/drivers/gpu/drm/xe/xe_pci.h b/drivers/gpu/drm/xe/xe_pci.h
index 11bcc5fe2c5b..3dc3539c3970 100644
--- a/drivers/gpu/drm/xe/xe_pci.h
+++ b/drivers/gpu/drm/xe/xe_pci.h
@@ -11,5 +11,6 @@ struct pci_dev;
 int xe_register_pci_driver(void);
 void xe_unregister_pci_driver(void);
 struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev);
+struct pci_dev *xe_pci_get_usp_dev(struct pci_dev *pdev);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index cd753c82b0ff..3aea4969af13 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -13,6 +13,7 @@
 #include "xe_device.h"
 #include "xe_drm_ras.h"
 #include "xe_log.h"
+#include "xe_pci.h"
 #include "xe_pm.h"
 #include "xe_printk.h"
 #include "xe_ras.h"
@@ -504,22 +505,6 @@ static void get_offline_list(struct xe_device *xe)
 			      &response, sizeof(response), &response.common, false);
 }
 
-static struct pci_dev *find_usp_dev(struct pci_dev *pdev)
-{
-	struct pci_dev *vsp;
-
-	/*
-	 * Device Hierarchy:
-	 *
-	 * Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit (GPU endpoint)
-	 */
-	vsp = pci_upstream_bridge(pdev);
-	if (!vsp)
-		return NULL;
-
-	return pci_upstream_bridge(vsp);
-}
-
 static void ras_usp_aer_init(struct xe_device *xe)
 {
 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
@@ -527,7 +512,7 @@ static void ras_usp_aer_init(struct xe_device *xe)
 	u16 aer_cap;
 	u32 status;
 
-	usp = find_usp_dev(pdev);
+	usp = xe_pci_get_usp_dev(pdev);
 	if (!usp)
 		return;
 
-- 
2.47.1


^ permalink raw reply related	[flat|nested] 32+ messages in thread

* [PATCH v4 6/8] drm/xe/xe_ras: Add a flag for uncorrectable internal error
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
                   ` (4 preceding siblings ...)
  2026-11-06  7:19 ` [PATCH v4 5/8] drm/xe/pci: Add upstream switch port lookup helper Riana Tauro
@ 2026-11-06  7:19 ` Riana Tauro
  2026-11-10 13:07   ` Raag Jadav
  2026-11-06  7:19 ` [PATCH v4 7/8] drm/xe: Add support for wa_14028434957 Riana Tauro
                   ` (5 subsequent siblings)
  11 siblings, 1 reply; 32+ messages in thread
From: Riana Tauro @ 2026-11-06  7:19 UTC (permalink / raw)
  To: intel-xe
  Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	raag.jadav, mallesh.koujalagi, badal.nilawar

Introduce a flag with get/set accessors to record when an
uncorrectable internal error was reported via AER.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: add PCI_POSSIBLE_ERROR
    fix kernel-doc
    rename aer_path to internal error
---
 drivers/gpu/drm/xe/xe_pci_error.c | 26 ++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.c       | 20 ++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h       |  2 ++
 drivers/gpu/drm/xe/xe_ras_types.h |  2 ++
 4 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 03a9f295d077..472b85d0ccc3 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -55,6 +55,29 @@ static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action
 	}
 }
 
+static bool is_aer_internal_error(struct pci_dev *pdev)
+{
+	struct pci_dev *usp;
+	u16 aer_cap;
+	u32 status;
+
+	usp = xe_pci_get_usp_dev(pdev);
+	if (!usp)
+		return false;
+
+	aer_cap = pci_find_ext_capability(usp, PCI_EXT_CAP_ID_ERR);
+	if (!aer_cap) {
+		dev_warn_once(&usp->dev, "AER capability unavailable\n");
+		return false;
+	}
+
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &status);
+	if (PCI_POSSIBLE_ERROR(status))
+		return false;
+
+	return status & PCI_ERR_UNC_INTN;
+}
+
 static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
 {
 	struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -68,6 +91,9 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
 	if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
 		return PCI_ERS_RESULT_DISCONNECT;
 
+	if (is_aer_internal_error(pdev))
+		xe_ras_set_aer_internal_error(xe);
+
 	switch (state) {
 	case pci_channel_io_normal:
 		return PCI_ERS_RESULT_CAN_RECOVER;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 3aea4969af13..58a0b5fa676d 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -1253,6 +1253,26 @@ u32 xe_ras_get_max_pages(struct xe_device *xe)
 	return xe->ras.state.max_pages;
 }
 
+/**
+ * xe_ras_is_aer_internal_error() - Check if an uncorrectable internal error was reported via AER
+ * @xe: xe device instance
+ *
+ * Return: true if an uncorrectable internal error was reported via AER, false otherwise.
+ */
+bool xe_ras_is_aer_internal_error(struct xe_device *xe)
+{
+	return xe->ras.state.aer_internal_error;
+}
+
+/**
+ * xe_ras_set_aer_internal_error() - Set if an uncorrectable internal error is reported via AER
+ * @xe: xe device instance
+ */
+void xe_ras_set_aer_internal_error(struct xe_device *xe)
+{
+	xe->ras.state.aer_internal_error = true;
+}
+
 /**
  * xe_ras_init - Initialize Xe RAS
  * @xe: xe device instance
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index c44fa172011f..f7b587ac84e3 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -25,5 +25,7 @@ bool xe_ras_get_disable_vram_page_offline(struct xe_device *xe);
 u32 xe_ras_get_max_pages(struct xe_device *xe);
 int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
 				struct xe_ras_get_counter_response *response);
+bool xe_ras_is_aer_internal_error(struct xe_device *xe);
+void xe_ras_set_aer_internal_error(struct xe_device *xe);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index a86f9d2b8c92..0ff5803d495b 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -414,6 +414,8 @@ struct xe_ras_set_health_response {
  * struct xe_ras_state - RAS device and firmware state
  */
 struct xe_ras_state {
+	/** @aer_internal_error: true if an uncorrectable internal error was reported via AER */
+	bool aer_internal_error;
 	/** @disable_vram_page_offline: cached configfs policy, immutable after init */
 	bool disable_vram_page_offline;
 	/** @max_pages: Total number of pages that can be stored by firmware */
-- 
2.47.1


^ permalink raw reply related	[flat|nested] 32+ messages in thread

* [PATCH v4 7/8] drm/xe: Add support for wa_14028434957
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
                   ` (5 preceding siblings ...)
  2026-11-06  7:19 ` [PATCH v4 6/8] drm/xe/xe_ras: Add a flag for uncorrectable internal error Riana Tauro
@ 2026-11-06  7:19 ` Riana Tauro
  2026-11-10  6:41   ` Mallesh, Koujalagi
  2026-11-10 13:18   ` Raag Jadav
  2026-11-06  7:19 ` [PATCH v4 8/8] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path Riana Tauro
                   ` (4 subsequent siblings)
  11 siblings, 2 replies; 32+ messages in thread
From: Riana Tauro @ 2026-11-06  7:19 UTC (permalink / raw)
  To: intel-xe
  Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	raag.jadav, mallesh.koujalagi, badal.nilawar, Andi Shyti

Add support for wa_14028434957 on platform CRI.

Non-fatal device errors are reported via a direct IRQ, while fatal
device errors are downgraded to non-fatal uncorrectable internal
errors and reported via AER.

Add support to process and log non-fatal errors routed via the direct
IRQ path. Most non-fatal errors require no reset, except double-bit
ECC errors affecting a critical BO, for which the device is wedged
with a bus reset as the recovery action.

For uncorrectable internal errors reported via AER, request a
secondary bus reset to recover. To avoid a race between the two
paths, if non-fatal error processing is in progress when an
uncorrectable internal error occurs, flush and disable the worker
to prevent further processing, since a reset is
imminent.

Cc: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: use platform instead of graphics version (Gustavo)
    combine patches (Tejas, Mallesh)
    remove 1sec delayed worker (Andi)

v3: re-order disable hw error worker before wedged check (Sashiko)
---
 drivers/gpu/drm/xe/xe_device_wa_oob.rules |  1 +
 drivers/gpu/drm/xe/xe_hw_error.c          | 41 +++++++++++++++++++----
 drivers/gpu/drm/xe/xe_hw_error.h          |  1 +
 drivers/gpu/drm/xe/xe_pci_error.c         | 19 +++++++++--
 drivers/gpu/drm/xe/xe_ras.c               | 21 ++++++++++--
 5 files changed, 72 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
index 753b2a4a1006..300207596893 100644
--- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
@@ -7,3 +7,4 @@
 14026746987	PLATFORM(CRESCENTISLAND)
 14026779378	PLATFORM(CRESCENTISLAND)
 14028586678	PLATFORM(CRESCENTISLAND)
+14028434957	PLATFORM(CRESCENTISLAND)
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index f7031b341ce0..86b29f282837 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -5,6 +5,8 @@
 
 #include <linux/bitmap.h>
 
+#include <generated/xe_device_wa_oob.h>
+
 #include "regs/xe_gsc_regs.h"
 #include "regs/xe_hw_error_regs.h"
 #include "regs/xe_irq_regs.h"
@@ -15,7 +17,11 @@
 #include "xe_hw_error.h"
 #include "xe_mmio.h"
 #include "xe_pm.h"
+#include "xe_ras.h"
 #include "xe_survivability_mode.h"
+#include "xe_wa.h"
+#include "xe_wedge.h"
+
 
 #define GT_HW_ERROR_MAX_ERR_BITS		16
 #define HEC_UNCORR_FW_ERR_BITS			4
@@ -171,7 +177,24 @@ static void hw_error_work(struct work_struct *work)
 	struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
 	struct xe_device *xe = tile_to_xe(tile);
 
+	/* Skip hw error processing if device is already wedged */
+	if (xe_wedged(xe))
+		return;
+
 	guard(xe_pm_runtime)(xe);
+
+	if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
+		/*
+		 * Skip handling if an uncorrectable internal error is reported as
+		 * reset is imminent
+		 */
+		if (xe_ras_is_aer_internal_error(xe))
+			return;
+
+		xe_ras_process_errors(xe);
+		return;
+	}
+
 	xe_survivability_mode_runtime_enable(xe);
 }
 
@@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
 		return;
 
 	/*
-	 * Hardware errors are reported through System Controller on the platforms that
-	 * support it, and never routed as direct IRQ to SGUnit. So we should never be
-	 * here for those platforms.
+	 * Non-fatal errors are routed as a direct IRQ on platforms that support
+	 * system controller.
 	 */
 	if (xe->info.has_sysctrl) {
-		drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
+		drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
+		schedule_work(&tile->hw_error_work);
 		return;
 	}
 
@@ -537,7 +560,13 @@ static void process_hw_errors(struct xe_device *xe)
 	}
 }
 
-static void hw_error_fini(void *arg)
+/**
+ * xe_hw_error_work_disable - Disable hw error work
+ * @arg: xe device instance
+ *
+ * This function disables work for hardware error handling for all tiles.
+ */
+void xe_hw_error_work_disable(void *arg)
 {
 	struct xe_device *xe = arg;
 	struct xe_tile *tile;
@@ -569,5 +598,5 @@ void xe_hw_error_init(struct xe_device *xe)
 		INIT_WORK(&tile->hw_error_work, hw_error_work);
 
 	process_hw_errors(xe);
-	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
+	devm_add_action_or_reset(xe->drm.dev, xe_hw_error_work_disable, xe);
 }
diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
index 5e3a11424108..c2c0bfa6d9f9 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.h
+++ b/drivers/gpu/drm/xe/xe_hw_error.h
@@ -12,4 +12,5 @@ struct xe_device;
 
 void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
 void xe_hw_error_init(struct xe_device *xe);
+void xe_hw_error_work_disable(void *arg);
 #endif
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 472b85d0ccc3..67920751ecf1 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -5,8 +5,11 @@
 
 #include <linux/pci.h>
 
+#include <generated/xe_device_wa_oob.h>
+
 #include "xe_device.h"
 #include "xe_gt.h"
+#include "xe_hw_error.h"
 #include "xe_log.h"
 #include "xe_pci.h"
 #include "xe_pcode.h"
@@ -14,6 +17,7 @@
 #include "xe_printk.h"
 #include "xe_ras.h"
 #include "xe_survivability_mode.h"
+#include "xe_wa.h"
 #include "xe_wedge.h"
 
 static void prepare_device_for_reset(struct pci_dev *pdev)
@@ -87,12 +91,21 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
 	if (state == pci_channel_io_perm_failure)
 		return PCI_ERS_RESULT_DISCONNECT;
 
-	/* If the device is already wedged or in survivability mode, do not attempt recovery */
-	if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
+	/* If the device is already in survivability mode, do not attempt recovery */
+	if (xe_survivability_mode_is_boot_enabled(xe))
 		return PCI_ERS_RESULT_DISCONNECT;
 
-	if (is_aer_internal_error(pdev))
+	/*
+	 * If non-fatal error processing is in progress when uncorrectable internal error occurs,
+	 * flush and disable the worker to prevent further processing, as a reset is imminent.
+	 */
+	if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
 		xe_ras_set_aer_internal_error(xe);
+		xe_hw_error_work_disable(xe);
+	}
+
+	if (xe_wedged(xe))
+		return PCI_ERS_RESULT_DISCONNECT;
 
 	switch (state) {
 	case pci_channel_io_normal:
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 58a0b5fa676d..1809c3c893de 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -5,6 +5,8 @@
 
 #include <linux/bitfield.h>
 
+#include <generated/xe_device_wa_oob.h>
+
 #include "xe_assert.h"
 #include "xe_bo.h"
 #include "xe_configfs.h"
@@ -23,6 +25,7 @@
 #include "xe_sysctrl_mailbox.h"
 #include "xe_sysctrl_mailbox_types.h"
 #include "xe_ttm_vram_mgr.h"
+#include "xe_wa.h"
 #include "xe_wedge.h"
 
 /* Any non-null entry marks the page as offlined by firmware */
@@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
 			    DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
 			    "Double-bit ECC error detected at sw address 0x%llx\n",
 			    info->sw_address);
-		if (ret)
+		/*
+		 * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
+		 * Wedge the device with a bus reset for errors that require SBR to recover.
+		 * TODO: Trigger SBR using pci_reset_bus
+		 */
+		if (ret) {
+			xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
 			return XE_RAS_RECOVERY_ACTION_RESET;
+		}
 		break;
 	default:
 		xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
@@ -818,9 +828,16 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 		return XE_RAS_RECOVERY_ACTION_RECOVERED;
 
 	BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
-	/* Default action */
+	/* Default action for PCIe bus errors */
 	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
 
+	/*
+	 * Device fatal errors are downgraded to non-fatal and reported as an uncorrectable
+	 * internal error. Set the default action to reset.
+	 */
+	if (XE_DEVICE_WA(xe, 14028434957) && xe_ras_is_aer_internal_error(xe))
+		final_action = XE_RAS_RECOVERY_ACTION_RESET;
+
 	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
 				  NULL, 0, &response, sizeof(response));
 
-- 
2.47.1


^ permalink raw reply related	[flat|nested] 32+ messages in thread

* [PATCH v4 8/8] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
                   ` (6 preceding siblings ...)
  2026-11-06  7:19 ` [PATCH v4 7/8] drm/xe: Add support for wa_14028434957 Riana Tauro
@ 2026-11-06  7:19 ` Riana Tauro
  2026-11-06  7:27 ` ✗ CI.checkpatch: warning for Handle non-fatal errors routed via IRQ (rev4) Patchwork
                   ` (3 subsequent siblings)
  11 siblings, 0 replies; 32+ messages in thread
From: Riana Tauro @ 2026-11-06  7:19 UTC (permalink / raw)
  To: intel-xe
  Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	raag.jadav, mallesh.koujalagi, badal.nilawar, Andi Shyti

Device fatal errors trigger AER, which can race with non-fatal
double-bit ECC errors reported via IRQ. If the AER PCI error handler
runs first, it receives all errors as a single response from the
system controller firmware, which can include the double-bit ECC errors.

Handling these on the AER path leads to unnecessary page offlining,
since an SBR clears the offlined pages on reload and firmware drops them
from its queue once read. Skip double-bit ECC handling when on the AER
path to avoid this.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: fix duplicate handling issue due to rebase (Sashiko)
---
 drivers/gpu/drm/xe/xe_ras.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 1809c3c893de..0fb891d00b36 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -669,13 +669,29 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
 				 "Data parity error detected\n");
 		break;
 	case XE_RAS_MEMORY_DB_ECC:
+		/*
+		 * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
+		 * On a race between AER for device fatal errors and non-fatal double-bit ECC
+		 * errors, if AER pci error handlers execute first it will get all errors as
+		 * a single response from system controller, which can include the double-bit
+		 * ECC errors. This leads to unnecessary offlining of pages, since an SBR clears
+		 * them on reload and firmware drops them from its queue once read.
+		 * Skip handling of double-bit ECC errors on the AER path to avoid this.
+		 *
+		 * TODO: Remove this check once AER handling is optimized to retain soft
+		 * offlined pages.
+		 */
+		if (xe_ras_is_aer_internal_error(xe)) {
+			xe_info(xe, "[RAS]: Skipping double-bit ECC error handling on AER path\n");
+			break;
+		}
+
 		ret = handle_page_offline(xe, info->sw_address, true);
 		xe_log_comp(xe, ret ? cper_sev : CPER_SEV_INFORMATIONAL,
 			    DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
 			    "Double-bit ECC error detected at sw address 0x%llx\n",
 			    info->sw_address);
 		/*
-		 * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
 		 * Wedge the device with a bus reset for errors that require SBR to recover.
 		 * TODO: Trigger SBR using pci_reset_bus
 		 */
-- 
2.47.1


^ permalink raw reply related	[flat|nested] 32+ messages in thread

* ✗ CI.checkpatch: warning for Handle non-fatal errors routed via IRQ (rev4)
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
                   ` (7 preceding siblings ...)
  2026-11-06  7:19 ` [PATCH v4 8/8] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path Riana Tauro
@ 2026-11-06  7:27 ` Patchwork
  2026-11-06  7:29 ` ✓ CI.KUnit: success " Patchwork
                   ` (2 subsequent siblings)
  11 siblings, 0 replies; 32+ messages in thread
From: Patchwork @ 2026-11-06  7:27 UTC (permalink / raw)
  To: Riana Tauro; +Cc: intel-xe

== Series Details ==

Series: Handle non-fatal errors routed via IRQ (rev4)
URL   : https://patchwork.freedesktop.org/series/173001/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
3009867cd31863246e4afc138520a7a8bd37bb11
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 52c84590cc44ccd28237bd035d19dab14d63c434
Author: Riana Tauro <riana.tauro@intel.com>
Date:   Fri Nov 6 12:49:53 2026 +0530

    drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path
    
    Device fatal errors trigger AER, which can race with non-fatal
    double-bit ECC errors reported via IRQ. If the AER PCI error handler
    runs first, it receives all errors as a single response from the
    system controller firmware, which can include the double-bit ECC errors.
    
    Handling these on the AER path leads to unnecessary page offlining,
    since an SBR clears the offlined pages on reload and firmware drops them
    from its queue once read. Skip double-bit ECC handling when on the AER
    path to avoid this.
    
    Signed-off-by: Riana Tauro <riana.tauro@intel.com>
    Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
    Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
+ /mt/dim checkpatch a3e19d73c21539b24a45ced208247913ae622bab drm-intel
c2e0ea6f8b8b drm/xe/hw_error: Reuse CSC worker for generic error handling
7cda931b8507 drm/xe/hw_error: Initialize hw_error_work per tile
fb1128d80424 drm/xe/survivability: Guard runtime survivability enable against unbind
-:13: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#13: 
the device is being removed. This is incorrect, as runtime survivability mode

total: 0 errors, 1 warnings, 0 checks, 34 lines checked
81308e4553a1 drm/xe/ras: Treat non-fatal PCIe errors as recovered
4544f080663a drm/xe/pci: Add upstream switch port lookup helper
d210bc9e4a07 drm/xe/xe_ras: Add a flag for uncorrectable internal error
2c9ae91ae583 drm/xe: Add support for wa_14028434957
52c84590cc44 drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path



^ permalink raw reply	[flat|nested] 32+ messages in thread

* ✓ CI.KUnit: success for Handle non-fatal errors routed via IRQ (rev4)
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
                   ` (8 preceding siblings ...)
  2026-11-06  7:27 ` ✗ CI.checkpatch: warning for Handle non-fatal errors routed via IRQ (rev4) Patchwork
@ 2026-11-06  7:29 ` Patchwork
  2026-11-06  8:13 ` ✓ Xe.CI.BAT: " Patchwork
  2026-11-07  7:38 ` ✗ Xe.CI.FULL: failure " Patchwork
  11 siblings, 0 replies; 32+ messages in thread
From: Patchwork @ 2026-11-06  7:29 UTC (permalink / raw)
  To: Riana Tauro; +Cc: intel-xe

== Series Details ==

Series: Handle non-fatal errors routed via IRQ (rev4)
URL   : https://patchwork.freedesktop.org/series/173001/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[07:27:06] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:27:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:27:31] Starting KUnit Kernel (1/1)...
[07:27:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:27:31] ================= gpu_buddy (14 subtests) ==================
[07:27:31] [PASSED] gpu_test_buddy_alloc_limit
[07:27:31] [PASSED] gpu_test_buddy_alloc_optimistic
[07:27:31] [PASSED] gpu_test_buddy_alloc_pessimistic
[07:27:31] [PASSED] gpu_test_buddy_alloc_pathological
[07:27:31] [PASSED] gpu_test_buddy_alloc_contiguous
[07:27:31] [PASSED] gpu_test_buddy_alloc_clear
[07:27:31] [PASSED] gpu_test_buddy_alloc_range
[07:27:32] [PASSED] gpu_test_buddy_alloc_range_bias
[07:27:33] [PASSED] gpu_test_buddy_fragmentation_performance
[07:27:33] [PASSED] gpu_test_buddy_dirty_tracker_performance
[07:27:33] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[07:27:33] [PASSED] gpu_test_buddy_offset_aligned_allocation
[07:27:33] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[07:27:33] [PASSED] gpu_test_buddy_addr_to_block
[07:27:33] ==================== [PASSED] gpu_buddy ====================
[07:27:33] ============================================================
[07:27:33] Testing complete. Ran 14 tests: passed: 14
[07:27:33] Elapsed time: 27.402s total, 5.073s configuring, 20.461s building, 1.816s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[07:27:33] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:27:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:28:14] Starting KUnit Kernel (1/1)...
[07:28:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:28:15] ================== guc_buf (11 subtests) ===================
[07:28:15] [PASSED] test_smallest
[07:28:15] [PASSED] test_largest
[07:28:15] [PASSED] test_granular
[07:28:15] [PASSED] test_unique
[07:28:15] [PASSED] test_overlap
[07:28:15] [PASSED] test_reusable
[07:28:15] [PASSED] test_too_big
[07:28:15] [PASSED] test_flush
[07:28:15] [PASSED] test_lookup
[07:28:15] [PASSED] test_data
[07:28:15] [PASSED] test_class
[07:28:15] ===================== [PASSED] guc_buf =====================
[07:28:15] =================== guc_dbm (7 subtests) ===================
[07:28:15] [PASSED] test_empty
[07:28:15] [PASSED] test_default
[07:28:15] ======================== test_size  ========================
[07:28:15] [PASSED] 4
[07:28:15] [PASSED] 8
[07:28:15] [PASSED] 32
[07:28:15] [PASSED] 256
[07:28:15] ==================== [PASSED] test_size ====================
[07:28:15] ======================= test_reuse  ========================
[07:28:15] [PASSED] 4
[07:28:15] [PASSED] 8
[07:28:15] [PASSED] 32
[07:28:15] [PASSED] 256
[07:28:15] =================== [PASSED] test_reuse ====================
[07:28:15] =================== test_range_overlap  ====================
[07:28:15] [PASSED] 4
[07:28:15] [PASSED] 8
[07:28:15] [PASSED] 32
[07:28:15] [PASSED] 256
[07:28:15] =============== [PASSED] test_range_overlap ================
[07:28:15] =================== test_range_compact  ====================
[07:28:15] [PASSED] 4
[07:28:15] [PASSED] 8
[07:28:15] [PASSED] 32
[07:28:15] [PASSED] 256
[07:28:15] =============== [PASSED] test_range_compact ================
[07:28:15] ==================== test_range_spare  =====================
[07:28:15] [PASSED] 4
[07:28:15] [PASSED] 8
[07:28:15] [PASSED] 32
[07:28:15] [PASSED] 256
[07:28:15] ================ [PASSED] test_range_spare =================
[07:28:15] ===================== [PASSED] guc_dbm =====================
[07:28:15] ================== guc_idm (22 subtests) ===================
[07:28:15] [PASSED] bad_init
[07:28:15] [PASSED] no_init
[07:28:15] [PASSED] init_fini
[07:28:15] [PASSED] check_init_small
[07:28:15] [PASSED] check_init_shared
[07:28:15] [PASSED] check_used
[07:28:15] [PASSED] check_quota
[07:28:15] [PASSED] check_all
[07:28:15] [PASSED] check_limits
[07:28:15] [PASSED] check_overlap
[07:28:15] [PASSED] check_overlap_alloc
[07:28:15] [PASSED] check_overlap_release
[07:28:15] [PASSED] check_overlap_partial_init
[07:28:15] [PASSED] check_overlap_partial_shared_range_blocking
[07:28:15] [PASSED] check_used_usable
[07:28:15] [PASSED] check_used_shareable
[07:28:15] [PASSED] check_used_mixed
[07:28:15] [PASSED] check_release_usable_range
[07:28:15] [PASSED] check_release_shareable_range
[07:28:15] [PASSED] check_split_boundaries
[07:28:15] [PASSED] check_shareable_spare
[07:28:15] [PASSED] check_shareable_spare_fragmented_tail
[07:28:15] ===================== [PASSED] guc_idm =====================
[07:28:15] ============== guc_klv_helpers (13 subtests) ===============
[07:28:15] [PASSED] test_count
[07:28:15] [PASSED] test_encode_u32
[07:28:15] [PASSED] test_encode_u64
[07:28:15] [PASSED] test_encode_string
[07:28:15] [PASSED] test_encode_object_raw
[07:28:15] [PASSED] test_encode_object_klv
[07:28:15] [PASSED] test_encode_object_nested
[07:28:15] [PASSED] test_encode_object_basic
[07:28:15] ===================== test_decode_u16  =====================
[07:28:15] [PASSED] empty
[07:28:15] [PASSED] valid
[07:28:15] [PASSED] max
[07:28:15] [PASSED] big
[07:28:15] [PASSED] long
[07:28:15] ================= [PASSED] test_decode_u16 =================
[07:28:15] ===================== test_decode_u32  =====================
[07:28:15] [PASSED] empty
[07:28:15] [PASSED] valid
[07:28:15] [PASSED] max
[07:28:15] [PASSED] long
[07:28:15] ================= [PASSED] test_decode_u32 =================
[07:28:15] ===================== test_decode_u64  =====================
[07:28:15] [PASSED] empty
[07:28:15] [PASSED] short
[07:28:15] [PASSED] valid
[07:28:15] [PASSED] max
[07:28:15] [PASSED] long
[07:28:15] ================= [PASSED] test_decode_u64 =================
[07:28:15] ===================== test_decode_str  =====================
[07:28:15] [PASSED] empty
[07:28:15] [PASSED] one
[07:28:15] [PASSED] one_trash
[07:28:15] [PASSED] two
[07:28:15] [PASSED] two_trash
[07:28:15] [PASSED] three
[07:28:15] [PASSED] dword
[07:28:15] [PASSED] four
[07:28:15] [PASSED] five
[07:28:15] [PASSED] six
[07:28:15] [PASSED] seven
[07:28:15] [PASSED] qword
[07:28:15] ================= [PASSED] test_decode_str =================
[07:28:15] [PASSED] test_print
[07:28:15] ================= [PASSED] guc_klv_helpers =================
[07:28:15] =================== xe_log (4 subtests) ====================
[07:28:15] [PASSED] demo_cper
[07:28:15] [PASSED] demo_dmesg
[07:28:15] ======================= test_dmesg  ========================
[07:28:15] [PASSED] test_fatal
[07:28:15] [PASSED] test_fatal_tile
[07:28:15] [PASSED] test_fatal_gt
[07:28:15] [PASSED] test_fatal_comp
[07:28:15] [PASSED] test_fatal_comp_tile
[07:28:15] [PASSED] test_fatal_comp_gt
[07:28:15] [PASSED] test_fatal_all
[07:28:15] [PASSED] test_recoverable
[07:28:15] [PASSED] test_recoverable_tile
[07:28:15] [PASSED] test_recoverable_gt
[07:28:15] [PASSED] test_recoverable_comp
[07:28:15] [PASSED] test_recoverable_comp_tile
[07:28:15] [PASSED] test_recoverable_comp_gt
[07:28:15] [PASSED] test_recoverable_all
[07:28:15] [PASSED] test_info
[07:28:15] [PASSED] test_info_tile
[07:28:15] [PASSED] test_info_gt
[07:28:15] [PASSED] test_info_err
[07:28:15] [PASSED] test_info_comp
[07:28:15] [PASSED] test_info_comp_tile
[07:28:15] [PASSED] test_info_comp_gt
[07:28:15] [PASSED] test_info_all
[07:28:15] [PASSED] test_hw_fatal
[07:28:15] [PASSED] test_hw_recoverable
[07:28:15] [PASSED] test_hw_corrected
[07:28:15] [PASSED] test_hw_informational
[07:28:15] =================== [PASSED] test_dmesg ====================
[07:28:15] ====================== test_invalid  =======================
[07:28:15] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[07:28:15] ================== [SKIPPED] test_invalid ==================
[07:28:15] ===================== [PASSED] xe_log ======================
[07:28:15] ================== no_relay (3 subtests) ===================
[07:28:15] [PASSED] xe_drops_guc2pf_if_not_ready
[07:28:15] [PASSED] xe_drops_guc2vf_if_not_ready
[07:28:15] [PASSED] xe_rejects_send_if_not_ready
[07:28:15] ==================== [PASSED] no_relay =====================
[07:28:15] ================== pf_relay (14 subtests) ==================
[07:28:15] [PASSED] pf_rejects_guc2pf_too_short
[07:28:15] [PASSED] pf_rejects_guc2pf_too_long
[07:28:15] [PASSED] pf_rejects_guc2pf_no_payload
[07:28:15] [PASSED] pf_fails_no_payload
[07:28:15] [PASSED] pf_fails_bad_origin
[07:28:15] [PASSED] pf_fails_bad_type
[07:28:15] [PASSED] pf_txn_reports_error
[07:28:15] [PASSED] pf_txn_sends_pf2guc
[07:28:15] [PASSED] pf_sends_pf2guc
[07:28:15] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:28:15] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:28:15] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:28:15] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:28:15] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[07:28:15] ==================== [PASSED] pf_relay =====================
[07:28:15] ================== vf_relay (3 subtests) ===================
[07:28:15] [PASSED] vf_rejects_guc2vf_too_short
[07:28:15] [PASSED] vf_rejects_guc2vf_too_long
[07:28:15] [PASSED] vf_rejects_guc2vf_no_payload
[07:28:15] ==================== [PASSED] vf_relay =====================
[07:28:15] ================ pf_gt_config (9 subtests) =================
[07:28:15] [PASSED] fair_contexts_1vf
[07:28:15] [PASSED] fair_doorbells_1vf
[07:28:15] [PASSED] fair_ggtt_1vf
[07:28:15] ====================== fair_vram_1vf  ======================
[07:28:15] [PASSED] 3.50 GiB
[07:28:15] [PASSED] 11.5 GiB
[07:28:15] [PASSED] 15.5 GiB
[07:28:15] [PASSED] 31.5 GiB
[07:28:15] [PASSED] 63.5 GiB
[07:28:15] [PASSED] 1.91 GiB
[07:28:15] ================== [PASSED] fair_vram_1vf ==================
[07:28:15] ================ fair_vram_1vf_admin_only  =================
[07:28:15] [PASSED] 3.50 GiB
[07:28:15] [PASSED] 11.5 GiB
[07:28:15] [PASSED] 15.5 GiB
[07:28:15] [PASSED] 31.5 GiB
[07:28:15] [PASSED] 63.5 GiB
[07:28:15] [PASSED] 1.91 GiB
[07:28:15] ============ [PASSED] fair_vram_1vf_admin_only =============
[07:28:15] ====================== fair_contexts  ======================
[07:28:15] [PASSED] 1 VF
[07:28:15] [PASSED] 2 VFs
[07:28:15] [PASSED] 3 VFs
[07:28:15] [PASSED] 4 VFs
[07:28:15] [PASSED] 5 VFs
[07:28:15] [PASSED] 6 VFs
[07:28:15] [PASSED] 7 VFs
[07:28:15] [PASSED] 8 VFs
[07:28:15] [PASSED] 9 VFs
[07:28:15] [PASSED] 10 VFs
[07:28:15] [PASSED] 11 VFs
[07:28:15] [PASSED] 12 VFs
[07:28:15] [PASSED] 13 VFs
[07:28:15] [PASSED] 14 VFs
[07:28:15] [PASSED] 15 VFs
[07:28:15] [PASSED] 16 VFs
[07:28:15] [PASSED] 17 VFs
[07:28:15] [PASSED] 18 VFs
[07:28:15] [PASSED] 19 VFs
[07:28:15] [PASSED] 20 VFs
[07:28:15] [PASSED] 21 VFs
[07:28:15] [PASSED] 22 VFs
[07:28:15] [PASSED] 23 VFs
[07:28:15] [PASSED] 24 VFs
[07:28:15] [PASSED] 25 VFs
[07:28:15] [PASSED] 26 VFs
[07:28:15] [PASSED] 27 VFs
[07:28:15] [PASSED] 28 VFs
[07:28:15] [PASSED] 29 VFs
[07:28:15] [PASSED] 30 VFs
[07:28:15] [PASSED] 31 VFs
[07:28:15] [PASSED] 32 VFs
[07:28:15] [PASSED] 33 VFs
[07:28:15] [PASSED] 34 VFs
[07:28:15] [PASSED] 35 VFs
[07:28:15] [PASSED] 36 VFs
[07:28:15] [PASSED] 37 VFs
[07:28:15] [PASSED] 38 VFs
[07:28:15] [PASSED] 39 VFs
[07:28:15] [PASSED] 40 VFs
[07:28:15] [PASSED] 41 VFs
[07:28:15] [PASSED] 42 VFs
[07:28:15] [PASSED] 43 VFs
[07:28:15] [PASSED] 44 VFs
[07:28:15] [PASSED] 45 VFs
[07:28:15] [PASSED] 46 VFs
[07:28:15] [PASSED] 47 VFs
[07:28:15] [PASSED] 48 VFs
[07:28:15] [PASSED] 49 VFs
[07:28:15] [PASSED] 50 VFs
[07:28:15] [PASSED] 51 VFs
[07:28:15] [PASSED] 52 VFs
[07:28:15] [PASSED] 53 VFs
[07:28:15] [PASSED] 54 VFs
[07:28:15] [PASSED] 55 VFs
[07:28:15] [PASSED] 56 VFs
[07:28:15] [PASSED] 57 VFs
[07:28:15] [PASSED] 58 VFs
[07:28:15] [PASSED] 59 VFs
[07:28:15] [PASSED] 60 VFs
[07:28:15] [PASSED] 61 VFs
[07:28:15] [PASSED] 62 VFs
[07:28:15] [PASSED] 63 VFs
[07:28:15] ================== [PASSED] fair_contexts ==================
[07:28:15] ===================== fair_doorbells  ======================
[07:28:15] [PASSED] 1 VF
[07:28:15] [PASSED] 2 VFs
[07:28:15] [PASSED] 3 VFs
[07:28:15] [PASSED] 4 VFs
[07:28:15] [PASSED] 5 VFs
[07:28:15] [PASSED] 6 VFs
[07:28:15] [PASSED] 7 VFs
[07:28:15] [PASSED] 8 VFs
[07:28:15] [PASSED] 9 VFs
[07:28:15] [PASSED] 10 VFs
[07:28:15] [PASSED] 11 VFs
[07:28:15] [PASSED] 12 VFs
[07:28:15] [PASSED] 13 VFs
[07:28:15] [PASSED] 14 VFs
[07:28:15] [PASSED] 15 VFs
[07:28:15] [PASSED] 16 VFs
[07:28:15] [PASSED] 17 VFs
[07:28:15] [PASSED] 18 VFs
[07:28:15] [PASSED] 19 VFs
[07:28:15] [PASSED] 20 VFs
[07:28:15] [PASSED] 21 VFs
[07:28:15] [PASSED] 22 VFs
[07:28:15] [PASSED] 23 VFs
[07:28:15] [PASSED] 24 VFs
[07:28:15] [PASSED] 25 VFs
[07:28:15] [PASSED] 26 VFs
[07:28:15] [PASSED] 27 VFs
[07:28:15] [PASSED] 28 VFs
[07:28:15] [PASSED] 29 VFs
[07:28:15] [PASSED] 30 VFs
[07:28:15] [PASSED] 31 VFs
[07:28:15] [PASSED] 32 VFs
[07:28:15] [PASSED] 33 VFs
[07:28:15] [PASSED] 34 VFs
[07:28:15] [PASSED] 35 VFs
[07:28:15] [PASSED] 36 VFs
[07:28:15] [PASSED] 37 VFs
[07:28:15] [PASSED] 38 VFs
[07:28:15] [PASSED] 39 VFs
[07:28:15] [PASSED] 40 VFs
[07:28:15] [PASSED] 41 VFs
[07:28:15] [PASSED] 42 VFs
[07:28:15] [PASSED] 43 VFs
[07:28:15] [PASSED] 44 VFs
[07:28:15] [PASSED] 45 VFs
[07:28:15] [PASSED] 46 VFs
[07:28:15] [PASSED] 47 VFs
[07:28:15] [PASSED] 48 VFs
[07:28:15] [PASSED] 49 VFs
[07:28:15] [PASSED] 50 VFs
[07:28:15] [PASSED] 51 VFs
[07:28:15] [PASSED] 52 VFs
[07:28:15] [PASSED] 53 VFs
[07:28:15] [PASSED] 54 VFs
[07:28:15] [PASSED] 55 VFs
[07:28:15] [PASSED] 56 VFs
[07:28:15] [PASSED] 57 VFs
[07:28:15] [PASSED] 58 VFs
[07:28:15] [PASSED] 59 VFs
[07:28:15] [PASSED] 60 VFs
[07:28:15] [PASSED] 61 VFs
[07:28:15] [PASSED] 62 VFs
[07:28:15] [PASSED] 63 VFs
[07:28:15] ================= [PASSED] fair_doorbells ==================
[07:28:15] ======================== fair_ggtt  ========================
[07:28:15] [PASSED] 1 VF
[07:28:15] [PASSED] 2 VFs
[07:28:15] [PASSED] 3 VFs
[07:28:15] [PASSED] 4 VFs
[07:28:15] [PASSED] 5 VFs
[07:28:15] [PASSED] 6 VFs
[07:28:15] [PASSED] 7 VFs
[07:28:15] [PASSED] 8 VFs
[07:28:15] [PASSED] 9 VFs
[07:28:15] [PASSED] 10 VFs
[07:28:15] [PASSED] 11 VFs
[07:28:15] [PASSED] 12 VFs
[07:28:15] [PASSED] 13 VFs
[07:28:15] [PASSED] 14 VFs
[07:28:15] [PASSED] 15 VFs
[07:28:15] [PASSED] 16 VFs
[07:28:15] [PASSED] 17 VFs
[07:28:15] [PASSED] 18 VFs
[07:28:15] [PASSED] 19 VFs
[07:28:15] [PASSED] 20 VFs
[07:28:15] [PASSED] 21 VFs
[07:28:15] [PASSED] 22 VFs
[07:28:15] [PASSED] 23 VFs
[07:28:15] [PASSED] 24 VFs
[07:28:15] [PASSED] 25 VFs
[07:28:15] [PASSED] 26 VFs
[07:28:15] [PASSED] 27 VFs
[07:28:15] [PASSED] 28 VFs
[07:28:15] [PASSED] 29 VFs
[07:28:15] [PASSED] 30 VFs
[07:28:15] [PASSED] 31 VFs
[07:28:15] [PASSED] 32 VFs
[07:28:15] [PASSED] 33 VFs
[07:28:15] [PASSED] 34 VFs
[07:28:15] [PASSED] 35 VFs
[07:28:15] [PASSED] 36 VFs
[07:28:15] [PASSED] 37 VFs
[07:28:15] [PASSED] 38 VFs
[07:28:15] [PASSED] 39 VFs
[07:28:15] [PASSED] 40 VFs
[07:28:15] [PASSED] 41 VFs
[07:28:15] [PASSED] 42 VFs
[07:28:15] [PASSED] 43 VFs
[07:28:15] [PASSED] 44 VFs
[07:28:15] [PASSED] 45 VFs
[07:28:15] [PASSED] 46 VFs
[07:28:15] [PASSED] 47 VFs
[07:28:15] [PASSED] 48 VFs
[07:28:15] [PASSED] 49 VFs
[07:28:15] [PASSED] 50 VFs
[07:28:15] [PASSED] 51 VFs
[07:28:15] [PASSED] 52 VFs
[07:28:15] [PASSED] 53 VFs
[07:28:15] [PASSED] 54 VFs
[07:28:15] [PASSED] 55 VFs
[07:28:15] [PASSED] 56 VFs
[07:28:15] [PASSED] 57 VFs
[07:28:15] [PASSED] 58 VFs
[07:28:15] [PASSED] 59 VFs
[07:28:15] [PASSED] 60 VFs
[07:28:15] [PASSED] 61 VFs
[07:28:15] [PASSED] 62 VFs
[07:28:15] [PASSED] 63 VFs
[07:28:15] ==================== [PASSED] fair_ggtt ====================
[07:28:15] ======================== fair_vram  ========================
[07:28:15] [PASSED] 1 VF
[07:28:15] [PASSED] 2 VFs
[07:28:15] [PASSED] 3 VFs
[07:28:15] [PASSED] 4 VFs
[07:28:15] [PASSED] 5 VFs
[07:28:15] [PASSED] 6 VFs
[07:28:15] [PASSED] 7 VFs
[07:28:15] [PASSED] 8 VFs
[07:28:15] [PASSED] 9 VFs
[07:28:15] [PASSED] 10 VFs
[07:28:15] [PASSED] 11 VFs
[07:28:15] [PASSED] 12 VFs
[07:28:15] [PASSED] 13 VFs
[07:28:15] [PASSED] 14 VFs
[07:28:15] [PASSED] 15 VFs
[07:28:15] [PASSED] 16 VFs
[07:28:15] [PASSED] 17 VFs
[07:28:15] [PASSED] 18 VFs
[07:28:15] [PASSED] 19 VFs
[07:28:15] [PASSED] 20 VFs
[07:28:15] [PASSED] 21 VFs
[07:28:15] [PASSED] 22 VFs
[07:28:15] [PASSED] 23 VFs
[07:28:15] [PASSED] 24 VFs
[07:28:15] [PASSED] 25 VFs
[07:28:15] [PASSED] 26 VFs
[07:28:15] [PASSED] 27 VFs
[07:28:15] [PASSED] 28 VFs
[07:28:15] [PASSED] 29 VFs
[07:28:15] [PASSED] 30 VFs
[07:28:15] [PASSED] 31 VFs
[07:28:15] [PASSED] 32 VFs
[07:28:15] [PASSED] 33 VFs
[07:28:15] [PASSED] 34 VFs
[07:28:15] [PASSED] 35 VFs
[07:28:15] [PASSED] 36 VFs
[07:28:15] [PASSED] 37 VFs
[07:28:15] [PASSED] 38 VFs
[07:28:15] [PASSED] 39 VFs
[07:28:15] [PASSED] 40 VFs
[07:28:15] [PASSED] 41 VFs
[07:28:15] [PASSED] 42 VFs
[07:28:15] [PASSED] 43 VFs
[07:28:15] [PASSED] 44 VFs
[07:28:15] [PASSED] 45 VFs
[07:28:15] [PASSED] 46 VFs
[07:28:15] [PASSED] 47 VFs
[07:28:15] [PASSED] 48 VFs
[07:28:15] [PASSED] 49 VFs
[07:28:15] [PASSED] 50 VFs
[07:28:15] [PASSED] 51 VFs
[07:28:15] [PASSED] 52 VFs
[07:28:15] [PASSED] 53 VFs
[07:28:15] [PASSED] 54 VFs
[07:28:15] [PASSED] 55 VFs
[07:28:15] [PASSED] 56 VFs
[07:28:15] [PASSED] 57 VFs
[07:28:15] [PASSED] 58 VFs
[07:28:15] [PASSED] 59 VFs
[07:28:15] [PASSED] 60 VFs
[07:28:15] [PASSED] 61 VFs
[07:28:15] [PASSED] 62 VFs
[07:28:15] [PASSED] 63 VFs
[07:28:15] ==================== [PASSED] fair_vram ====================
[07:28:15] ================== [PASSED] pf_gt_config ===================
[07:28:15] ===================== lmtt (1 subtest) =====================
[07:28:15] ======================== test_ops  =========================
[07:28:15] [PASSED] 2-level
[07:28:15] [PASSED] multi-level
[07:28:15] ==================== [PASSED] test_ops =====================
[07:28:15] ====================== [PASSED] lmtt =======================
[07:28:15] ================= sriov_packet (1 subtest) =================
[07:28:15] [PASSED] test_descriptor_init
[07:28:15] ================== [PASSED] sriov_packet ===================
[07:28:15] ================= pf_service (11 subtests) =================
[07:28:15] [PASSED] pf_negotiate_any
[07:28:15] [PASSED] pf_negotiate_base_match
[07:28:15] [PASSED] pf_negotiate_base_newer
[07:28:15] [PASSED] pf_negotiate_base_next
[07:28:15] [SKIPPED] pf_negotiate_base_older (no older minor)
[07:28:15] [PASSED] pf_negotiate_base_prev
[07:28:15] [PASSED] pf_negotiate_latest_match
[07:28:15] [PASSED] pf_negotiate_latest_newer
[07:28:15] [PASSED] pf_negotiate_latest_next
[07:28:15] [SKIPPED] pf_negotiate_latest_older (no older minor)
[07:28:15] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[07:28:15] =================== [PASSED] pf_service ====================
[07:28:15] ================= xe_guc_g2g (2 subtests) ==================
[07:28:15] ============== xe_live_guc_g2g_kunit_default  ==============
[07:28:15] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[07:28:15] ============== xe_live_guc_g2g_kunit_allmem  ===============
[07:28:15] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[07:28:15] =================== [SKIPPED] xe_guc_g2g ===================
[07:28:15] =================== xe_mocs (2 subtests) ===================
[07:28:15] ================ xe_live_mocs_kernel_kunit  ================
[07:28:15] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[07:28:15] ================ xe_live_mocs_reset_kunit  =================
[07:28:15] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[07:28:15] ==================== [SKIPPED] xe_mocs =====================
[07:28:15] ================= xe_migrate (3 subtests) ==================
[07:28:15] ================= xe_migrate_sanity_kunit  =================
[07:28:15] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[07:28:15] ================== xe_validate_ccs_kunit  ==================
[07:28:15] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[07:28:15] ============= xe_migrate_access_memory_kunit  ==============
[07:28:15] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[07:28:15] =================== [SKIPPED] xe_migrate ===================
[07:28:15] ================== xe_dma_buf (1 subtest) ==================
[07:28:15] ==================== xe_dma_buf_kunit  =====================
[07:28:15] ================ [SKIPPED] xe_dma_buf_kunit ================
[07:28:15] =================== [SKIPPED] xe_dma_buf ===================
[07:28:15] ================= xe_bo_shrink (1 subtest) =================
[07:28:15] =================== xe_bo_shrink_kunit  ====================
[07:28:15] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[07:28:15] ================== [SKIPPED] xe_bo_shrink ==================
[07:28:15] ==================== xe_bo (2 subtests) ====================
[07:28:15] ================== xe_ccs_migrate_kunit  ===================
[07:28:15] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[07:28:15] ==================== xe_bo_evict_kunit  ====================
[07:28:15] =============== [SKIPPED] xe_bo_evict_kunit ================
[07:28:15] ===================== [SKIPPED] xe_bo ======================
[07:28:15] =================== xe_any (9 subtests) ====================
[07:28:15] [PASSED] test_to_xe
[07:28:15] [PASSED] test_to_dev
[07:28:15] [PASSED] test_to_pdev
[07:28:15] [PASSED] test_to_drm
[07:28:15] [PASSED] test_if_pdev
[07:28:15] [PASSED] test_if_xe
[07:28:15] [PASSED] test_if_tile
[07:28:15] [PASSED] test_if_gt
[07:28:15] [PASSED] test_to_id
[07:28:15] ===================== [PASSED] xe_any ======================
[07:28:15] ==================== args (13 subtests) ====================
[07:28:15] [PASSED] count_args_test
[07:28:15] [PASSED] call_args_example
[07:28:15] [PASSED] call_args_test
[07:28:15] [PASSED] drop_first_arg_example
[07:28:15] [PASSED] drop_first_arg_test
[07:28:15] [PASSED] first_arg_example
[07:28:15] [PASSED] first_arg_test
[07:28:15] [PASSED] last_arg_example
[07:28:15] [PASSED] last_arg_test
[07:28:15] [PASSED] pick_arg_example
[07:28:15] [PASSED] if_args_example
[07:28:15] [PASSED] if_args_test
[07:28:15] [PASSED] sep_comma_example
[07:28:15] ====================== [PASSED] args =======================
[07:28:15] =================== xe_pci (3 subtests) ====================
[07:28:15] ==================== check_graphics_ip  ====================
[07:28:15] [PASSED] 12.00 Xe_LP
[07:28:15] [PASSED] 12.10 Xe_LP+
[07:28:15] [PASSED] 12.55 Xe_HPG
[07:28:15] [PASSED] 12.60 Xe_HPC
[07:28:15] [PASSED] 12.70 Xe_LPG
[07:28:15] [PASSED] 12.71 Xe_LPG
[07:28:15] [PASSED] 12.74 Xe_LPG+
[07:28:15] [PASSED] 20.01 Xe2_HPG
[07:28:15] [PASSED] 20.02 Xe2_HPG
[07:28:15] [PASSED] 20.04 Xe2_LPG
[07:28:15] [PASSED] 30.00 Xe3_LPG
[07:28:15] [PASSED] 30.01 Xe3_LPG
[07:28:15] [PASSED] 30.03 Xe3_LPG
[07:28:15] [PASSED] 30.04 Xe3_LPG
[07:28:15] [PASSED] 30.05 Xe3_LPG
[07:28:15] [PASSED] 35.10 Xe3p_LPG
[07:28:15] [PASSED] 35.11 Xe3p_XPC
[07:28:15] ================ [PASSED] check_graphics_ip ================
[07:28:15] ===================== check_media_ip  ======================
[07:28:15] [PASSED] 12.00 Xe_M
[07:28:15] [PASSED] 12.55 Xe_HPM
[07:28:15] [PASSED] 13.00 Xe_LPM+
[07:28:15] [PASSED] 13.01 Xe2_HPM
[07:28:15] [PASSED] 20.00 Xe2_LPM
[07:28:15] [PASSED] 30.00 Xe3_LPM
[07:28:15] [PASSED] 30.02 Xe3_LPM
[07:28:15] [PASSED] 35.00 Xe3p_LPM
[07:28:15] [PASSED] 35.03 Xe3p_HPM
[07:28:15] ================= [PASSED] check_media_ip ==================
[07:28:15] =================== check_platform_desc  ===================
[07:28:15] [PASSED] 0x9A60 (TIGERLAKE)
[07:28:15] [PASSED] 0x9A68 (TIGERLAKE)
[07:28:15] [PASSED] 0x9A70 (TIGERLAKE)
[07:28:15] [PASSED] 0x9A40 (TIGERLAKE)
[07:28:15] [PASSED] 0x9A49 (TIGERLAKE)
[07:28:15] [PASSED] 0x9A59 (TIGERLAKE)
[07:28:15] [PASSED] 0x9A78 (TIGERLAKE)
[07:28:15] [PASSED] 0x9AC0 (TIGERLAKE)
[07:28:15] [PASSED] 0x9AC9 (TIGERLAKE)
[07:28:15] [PASSED] 0x9AD9 (TIGERLAKE)
[07:28:15] [PASSED] 0x9AF8 (TIGERLAKE)
[07:28:15] [PASSED] 0x4C80 (ROCKETLAKE)
[07:28:15] [PASSED] 0x4C8A (ROCKETLAKE)
[07:28:15] [PASSED] 0x4C8B (ROCKETLAKE)
[07:28:15] [PASSED] 0x4C8C (ROCKETLAKE)
[07:28:15] [PASSED] 0x4C90 (ROCKETLAKE)
[07:28:15] [PASSED] 0x4C9A (ROCKETLAKE)
[07:28:15] [PASSED] 0x4680 (ALDERLAKE_S)
[07:28:15] [PASSED] 0x4682 (ALDERLAKE_S)
[07:28:15] [PASSED] 0x4688 (ALDERLAKE_S)
[07:28:15] [PASSED] 0x468A (ALDERLAKE_S)
[07:28:15] [PASSED] 0x468B (ALDERLAKE_S)
[07:28:15] [PASSED] 0x4690 (ALDERLAKE_S)
[07:28:15] [PASSED] 0x4692 (ALDERLAKE_S)
[07:28:15] [PASSED] 0x4693 (ALDERLAKE_S)
[07:28:15] [PASSED] 0x46A0 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46A1 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46A2 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46A3 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46A6 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46A8 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46AA (ALDERLAKE_P)
[07:28:15] [PASSED] 0x462A (ALDERLAKE_P)
[07:28:15] [PASSED] 0x4626 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x4628 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46B0 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46B1 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46B2 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46B3 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46C0 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46C1 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46C2 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46C3 (ALDERLAKE_P)
[07:28:15] [PASSED] 0x46D0 (ALDERLAKE_N)
[07:28:15] [PASSED] 0x46D1 (ALDERLAKE_N)
[07:28:15] [PASSED] 0x46D2 (ALDERLAKE_N)
[07:28:15] [PASSED] 0x46D3 (ALDERLAKE_N)
[07:28:15] [PASSED] 0x46D4 (ALDERLAKE_N)
[07:28:15] [PASSED] 0xA721 (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA7A1 (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA7A9 (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA7AC (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA7AD (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA720 (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA7A0 (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA7A8 (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA7AA (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA7AB (ALDERLAKE_P)
[07:28:15] [PASSED] 0xA780 (ALDERLAKE_S)
[07:28:15] [PASSED] 0xA781 (ALDERLAKE_S)
[07:28:15] [PASSED] 0xA782 (ALDERLAKE_S)
[07:28:15] [PASSED] 0xA783 (ALDERLAKE_S)
[07:28:15] [PASSED] 0xA788 (ALDERLAKE_S)
[07:28:15] [PASSED] 0xA789 (ALDERLAKE_S)
[07:28:15] [PASSED] 0xA78A (ALDERLAKE_S)
[07:28:15] [PASSED] 0xA78B (ALDERLAKE_S)
[07:28:15] [PASSED] 0x4905 (DG1)
[07:28:15] [PASSED] 0x4906 (DG1)
[07:28:15] [PASSED] 0x4907 (DG1)
[07:28:15] [PASSED] 0x4908 (DG1)
[07:28:15] [PASSED] 0x4909 (DG1)
[07:28:15] [PASSED] 0x56C0 (DG2)
[07:28:15] [PASSED] 0x56C2 (DG2)
[07:28:15] [PASSED] 0x56C1 (DG2)
[07:28:15] [PASSED] 0x7D51 (METEORLAKE)
[07:28:15] [PASSED] 0x7DD1 (METEORLAKE)
[07:28:15] [PASSED] 0x7D41 (METEORLAKE)
[07:28:15] [PASSED] 0x7D67 (METEORLAKE)
[07:28:15] [PASSED] 0xB640 (METEORLAKE)
[07:28:15] [PASSED] 0x56A0 (DG2)
[07:28:15] [PASSED] 0x56A1 (DG2)
[07:28:15] [PASSED] 0x56A2 (DG2)
[07:28:15] [PASSED] 0x56BE (DG2)
[07:28:15] [PASSED] 0x56BF (DG2)
[07:28:15] [PASSED] 0x5690 (DG2)
[07:28:15] [PASSED] 0x5691 (DG2)
[07:28:15] [PASSED] 0x5692 (DG2)
[07:28:15] [PASSED] 0x56A5 (DG2)
[07:28:15] [PASSED] 0x56A6 (DG2)
[07:28:15] [PASSED] 0x56B0 (DG2)
[07:28:15] [PASSED] 0x56B1 (DG2)
[07:28:15] [PASSED] 0x56BA (DG2)
[07:28:15] [PASSED] 0x56BB (DG2)
[07:28:15] [PASSED] 0x56BC (DG2)
[07:28:15] [PASSED] 0x56BD (DG2)
[07:28:15] [PASSED] 0x5693 (DG2)
[07:28:15] [PASSED] 0x5694 (DG2)
[07:28:15] [PASSED] 0x5695 (DG2)
[07:28:15] [PASSED] 0x56A3 (DG2)
[07:28:15] [PASSED] 0x56A4 (DG2)
[07:28:15] [PASSED] 0x56B2 (DG2)
[07:28:15] [PASSED] 0x56B3 (DG2)
[07:28:15] [PASSED] 0x5696 (DG2)
[07:28:15] [PASSED] 0x5697 (DG2)
[07:28:15] [PASSED] 0xB69 (PVC)
[07:28:15] [PASSED] 0xB6E (PVC)
[07:28:15] [PASSED] 0xBD4 (PVC)
[07:28:15] [PASSED] 0xBD5 (PVC)
[07:28:15] [PASSED] 0xBD6 (PVC)
[07:28:15] [PASSED] 0xBD7 (PVC)
[07:28:15] [PASSED] 0xBD8 (PVC)
[07:28:15] [PASSED] 0xBD9 (PVC)
[07:28:15] [PASSED] 0xBDA (PVC)
[07:28:15] [PASSED] 0xBDB (PVC)
[07:28:15] [PASSED] 0xBE0 (PVC)
[07:28:15] [PASSED] 0xBE1 (PVC)
[07:28:15] [PASSED] 0xBE5 (PVC)
[07:28:15] [PASSED] 0x7D40 (METEORLAKE)
[07:28:15] [PASSED] 0x7D45 (METEORLAKE)
[07:28:15] [PASSED] 0x7D55 (METEORLAKE)
[07:28:15] [PASSED] 0x7D60 (METEORLAKE)
[07:28:15] [PASSED] 0x7DD5 (METEORLAKE)
[07:28:15] [PASSED] 0x6420 (LUNARLAKE)
[07:28:15] [PASSED] 0x64A0 (LUNARLAKE)
[07:28:15] [PASSED] 0x64B0 (LUNARLAKE)
[07:28:15] [PASSED] 0xE202 (BATTLEMAGE)
[07:28:15] [PASSED] 0xE209 (BATTLEMAGE)
[07:28:15] [PASSED] 0xE20B (BATTLEMAGE)
[07:28:15] [PASSED] 0xE20C (BATTLEMAGE)
[07:28:15] [PASSED] 0xE20D (BATTLEMAGE)
[07:28:15] [PASSED] 0xE210 (BATTLEMAGE)
[07:28:15] [PASSED] 0xE211 (BATTLEMAGE)
[07:28:15] [PASSED] 0xE212 (BATTLEMAGE)
[07:28:15] [PASSED] 0xE216 (BATTLEMAGE)
[07:28:15] [PASSED] 0xE220 (BATTLEMAGE)
[07:28:15] [PASSED] 0xE221 (BATTLEMAGE)
[07:28:15] [PASSED] 0xE222 (BATTLEMAGE)
[07:28:15] [PASSED] 0xE223 (BATTLEMAGE)
[07:28:15] [PASSED] 0xB080 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB081 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB082 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB083 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB084 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB085 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB086 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB087 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB08F (PANTHERLAKE)
[07:28:15] [PASSED] 0xB090 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB0A0 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB0A1 (PANTHERLAKE)
[07:28:15] [PASSED] 0xB0B0 (PANTHERLAKE)
[07:28:15] [PASSED] 0xFD80 (PANTHERLAKE)
[07:28:15] [PASSED] 0xFD81 (PANTHERLAKE)
[07:28:15] [PASSED] 0xD740 (NOVALAKE_S)
[07:28:15] [PASSED] 0xD741 (NOVALAKE_S)
[07:28:15] [PASSED] 0xD742 (NOVALAKE_S)
[07:28:15] [PASSED] 0xD743 (NOVALAKE_S)
[07:28:15] [PASSED] 0xD745 (NOVALAKE_S)
[07:28:15] [PASSED] 0xD74A (NOVALAKE_S)
[07:28:15] [PASSED] 0xD74B (NOVALAKE_S)
[07:28:15] [PASSED] 0x674C (CRESCENTISLAND)
[07:28:15] [PASSED] 0x674D (CRESCENTISLAND)
[07:28:15] [PASSED] 0x674E (CRESCENTISLAND)
[07:28:15] [PASSED] 0x674F (CRESCENTISLAND)
[07:28:15] [PASSED] 0x6750 (CRESCENTISLAND)
[07:28:15] [PASSED] 0x6751 (CRESCENTISLAND)
[07:28:15] [PASSED] 0x6752 (CRESCENTISLAND)
[07:28:15] [PASSED] 0xD750 (NOVALAKE_P)
[07:28:15] [PASSED] 0xD751 (NOVALAKE_P)
[07:28:15] [PASSED] 0xD752 (NOVALAKE_P)
[07:28:15] [PASSED] 0xD753 (NOVALAKE_P)
[07:28:15] [PASSED] 0xD754 (NOVALAKE_P)
[07:28:15] [PASSED] 0xD755 (NOVALAKE_P)
[07:28:15] [PASSED] 0xD756 (NOVALAKE_P)
[07:28:15] [PASSED] 0xD757 (NOVALAKE_P)
[07:28:15] [PASSED] 0xD75F (NOVALAKE_P)
[07:28:15] =============== [PASSED] check_platform_desc ===============
[07:28:15] ===================== [PASSED] xe_pci ======================
[07:28:15] ============= xe_rtp_tables_test (5 subtests) ==============
[07:28:15] ================== xe_rtp_table_gt_test  ===================
[07:28:15] [PASSED] gt_was/14011060649
[07:28:15] [PASSED] gt_was/14011059788
[07:28:15] [PASSED] gt_was/14015795083
[07:28:15] [PASSED] gt_was/16021867713
[07:28:15] [PASSED] gt_was/14019449301
[07:28:15] [PASSED] gt_was/16028005424
[07:28:15] [PASSED] gt_was/14026578760
[07:28:15] [PASSED] gt_was/1409420604
[07:28:15] [PASSED] gt_was/1408615072
[07:28:15] [PASSED] gt_was/22010523718
[07:28:15] [PASSED] gt_was/14011006942
[07:28:15] [PASSED] gt_was/14014830051
[07:28:15] [PASSED] gt_was/18018781329
[07:28:15] [PASSED] gt_was/1509235366
[07:28:15] [PASSED] gt_was/18018781329
[07:28:15] [PASSED] gt_was/16016694945
[07:28:15] [PASSED] gt_was/14018575942
[07:28:15] [PASSED] gt_was/22016670082
[07:28:15] [PASSED] gt_was/22016670082
[07:28:15] [PASSED] gt_was/14017421178
[07:28:15] [PASSED] gt_was/16025250150
[07:28:15] [PASSED] gt_was/14021871409
[07:28:15] [PASSED] gt_was/16021865536
[07:28:15] [PASSED] gt_was/14021486841
[07:28:15] [PASSED] gt_was/14025160223
[07:28:15] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[07:28:15] [PASSED] gt_was/14025635424
[07:28:15] [PASSED] gt_was/16028005424
[07:28:15] ============== [PASSED] xe_rtp_table_gt_test ===============
[07:28:15] ================== xe_rtp_table_gt_test  ===================
[07:28:15] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[07:28:15] [PASSED] gt_tunings/Tuning: 32B Access Enable
[07:28:15] [PASSED] gt_tunings/Tuning: L3 cache
[07:28:15] [PASSED] gt_tunings/Tuning: L3 cache - media
[07:28:15] [PASSED] gt_tunings/Tuning: Compression Overfetch
[07:28:15] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[07:28:15] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[07:28:15] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[07:28:15] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[07:28:15] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[07:28:15] [PASSED] gt_tunings/Tuning: Stateless compression control
[07:28:15] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[07:28:15] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[07:28:15] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[07:28:15] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[07:28:15] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[07:28:15] ============== [PASSED] xe_rtp_table_gt_test ===============
[07:28:15] ================== xe_rtp_table_oob_test  ==================
[07:28:15] [PASSED] oob_was/1607983814
[07:28:15] [PASSED] oob_was/16010904313
[07:28:15] [PASSED] oob_was/18022495364
[07:28:15] [PASSED] oob_was/22012773006
[07:28:15] [PASSED] oob_was/14014475959
[07:28:15] [PASSED] oob_was/22011391025
[07:28:15] [PASSED] oob_was/22012727170
[07:28:15] [PASSED] oob_was/22012727685
[07:28:15] [PASSED] oob_was/22016596838
[07:28:15] [PASSED] oob_was/18020744125
[07:28:15] [PASSED] oob_was/1409600907
[07:28:15] [PASSED] oob_was/22014953428
[07:28:15] [PASSED] oob_was/16017236439
[07:28:15] [PASSED] oob_was/14019821291
[07:28:15] [PASSED] oob_was/14015076503
[07:28:15] [PASSED] oob_was/22016122933
[07:28:15] [PASSED] oob_was/14018913170
[07:28:15] [PASSED] oob_was/14018094691
[07:28:15] [PASSED] oob_was/18024947630
[07:28:15] [PASSED] oob_was/16022287689
[07:28:15] [PASSED] oob_was/13011645652
[07:28:15] [PASSED] oob_was/14022293748
[07:28:15] [PASSED] oob_was/22019794406
[07:28:15] [PASSED] oob_was/22019338487
[07:28:15] [PASSED] oob_was/16023588340
[07:28:15] [PASSED] oob_was/14019789679
[07:28:15] [PASSED] oob_was/14022866841
[07:28:15] [PASSED] oob_was/16021333562
[07:28:15] [PASSED] oob_was/14016712196
[07:28:15] [PASSED] oob_was/14015568240
[07:28:15] [PASSED] oob_was/18013179988
[07:28:15] [PASSED] oob_was/1508761755
[07:28:15] [PASSED] oob_was/16023105232
[07:28:15] [PASSED] oob_was/16026508708
[07:28:15] [PASSED] oob_was/14020001231
[07:28:15] [PASSED] oob_was/16023683509
[07:28:15] [PASSED] oob_was/14025515070
[07:28:15] [PASSED] oob_was/15015404425_disable
[07:28:15] [PASSED] oob_was/16026007364
[07:28:15] [PASSED] oob_was/14020316580
[07:28:15] [PASSED] oob_was/14025883347
[07:28:15] [PASSED] oob_was/16029380221
[07:28:15] [PASSED] oob_was/22022079272
[07:28:15] [PASSED] oob_was/16029897822
[07:28:15] [PASSED] oob_was/14026539277
[07:28:15] [PASSED] oob_was/14027054324
[07:28:15] [PASSED] oob_was/14025941587
[07:28:15] [PASSED] oob_was/16030224309
[07:28:15] [PASSED] oob_was/14028709524
[07:28:15] ============== [PASSED] xe_rtp_table_oob_test ==============
[07:28:15] ================ xe_rtp_table_dev_oob_test  ================
[07:28:15] [PASSED] device_oob_was/22010954014
[07:28:15] [PASSED] device_oob_was/15015404425
[07:28:15] [PASSED] device_oob_was/22019338487_display
[07:28:15] [PASSED] device_oob_was/14022085890
[07:28:15] [PASSED] device_oob_was/14026633728
[07:28:15] [PASSED] device_oob_was/14026746987
[07:28:15] [PASSED] device_oob_was/14026779378
[07:28:15] [PASSED] device_oob_was/14028586678
[07:28:15] [PASSED] device_oob_was/14028434957
[07:28:15] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[07:28:15] ========== xe_rtp_table_missing_upper_bound_test  ==========
[07:28:15] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[07:28:15] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[07:28:15] [PASSED] register_whitelist/1806527549
[07:28:15] [PASSED] register_whitelist/allow_read_ctx_timestamp
[07:28:15] [PASSED] register_whitelist/allow_read_queue_timestamp
[07:28:15] [PASSED] register_whitelist/16014440446
[07:28:15] [PASSED] register_whitelist/16017236439
[07:28:15] [PASSED] register_whitelist/16020183090
[07:28:15] [PASSED] register_whitelist/14024997852
[07:28:15] [PASSED] register_whitelist/14024997852
[07:28:15] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[07:28:15] =============== [PASSED] xe_rtp_tables_test ================
[07:28:15] =================== xe_rtp (3 subtests) ====================
[07:28:15] =================== xe_rtp_rules_tests  ====================
[07:28:15] [PASSED] no
[07:28:15] [PASSED] yes
[07:28:15] [PASSED] no-and-no
[07:28:15] [PASSED] no-and-yes
[07:28:15] [PASSED] yes-and-no
[07:28:15] [PASSED] yes-and-yes
[07:28:15] [PASSED] no-or-no
[07:28:15] [PASSED] no-or-yes
[07:28:15] [PASSED] yes-or-no
[07:28:15] [PASSED] yes-or-yes
[07:28:15] [PASSED] no-yes-or-yes-no
[07:28:15] [PASSED] no-yes-or-yes-yes
[07:28:15] [PASSED] yes-yes-or-no-yes
[07:28:15] [PASSED] yes-yes-or-yes-yes
[07:28:15] [PASSED] no-no-or-yes-or-no
[07:28:15] [PASSED] or
[07:28:15] [PASSED] or-yes
[07:28:15] [PASSED] or-no
[07:28:15] [PASSED] yes-or
[07:28:15] [PASSED] no-or
[07:28:15] [PASSED] no-or-or-yes
[07:28:15] [PASSED] yes-or-or-no
[07:28:15] [PASSED] no-or-or-no
[07:28:15] [PASSED] missing-context-engine-class
[07:28:15] [PASSED] missing-context-engine-class-or-yes
[07:28:15] [PASSED] missing-context-engine-class-or-or-yes
[07:28:15] =============== [PASSED] xe_rtp_rules_tests ================
[07:28:15] =============== xe_rtp_process_to_sr_tests  ================
[07:28:15] [PASSED] coalesce-same-reg
[07:28:15] [PASSED] coalesce-same-reg-literal-and-func
[07:28:15] [PASSED] no-match-no-add
[07:28:15] [PASSED] two-regs-two-entries
[07:28:15] [PASSED] clr-one-set-other
[07:28:15] [PASSED] set-field
[07:28:15] [PASSED] conflict-duplicate
[07:28:15] [PASSED] conflict-not-disjoint
[07:28:15] [PASSED] conflict-not-disjoint-literal-and-func
[07:28:15] [PASSED] conflict-reg-type
[07:28:15] [PASSED] bad-mcr-reg-forced-to-regular
[07:28:15] [PASSED] bad-regular-reg-forced-to-mcr
[07:28:15] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[07:28:15] ================== xe_rtp_process_tests  ===================
[07:28:15] [PASSED] active1
[07:28:15] [PASSED] active2
[07:28:15] [PASSED] active-inactive
[07:28:15] [PASSED] inactive-active
[07:28:15] [PASSED] inactive-active-inactive
[07:28:15] [PASSED] inactive-inactive-inactive
[07:28:15] ============== [PASSED] xe_rtp_process_tests ===============
[07:28:15] ===================== [PASSED] xe_rtp ======================
[07:28:15] ==================== xe_wa (1 subtest) =====================
[07:28:15] ======================== xe_wa_gt  =========================
[07:28:15] [PASSED] TIGERLAKE B0
[07:28:15] [PASSED] DG1 A0
[07:28:15] [PASSED] DG1 B0
[07:28:15] [PASSED] ALDERLAKE_S A0
[07:28:15] [PASSED] ALDERLAKE_S B0
[07:28:15] [PASSED] ALDERLAKE_S C0
[07:28:15] [PASSED] ALDERLAKE_S D0
[07:28:15] [PASSED] ALDERLAKE_P A0
[07:28:15] [PASSED] ALDERLAKE_P B0
[07:28:15] [PASSED] ALDERLAKE_P C0
[07:28:15] [PASSED] ALDERLAKE_S RPLS D0
[07:28:15] [PASSED] ALDERLAKE_P RPLU E0
[07:28:15] [PASSED] DG2 G10 C0
[07:28:15] [PASSED] DG2 G11 B1
[07:28:15] [PASSED] DG2 G12 A1
[07:28:15] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:28:15] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:28:15] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[07:28:15] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[07:28:15] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[07:28:15] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[07:28:15] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[07:28:15] ==================== [PASSED] xe_wa_gt =====================
[07:28:15] ====================== [PASSED] xe_wa ======================
[07:28:15] ============================================================
[07:28:15] Testing complete. Ran 842 tests: passed: 813, skipped: 29
[07:28:15] Elapsed time: 41.730s total, 2.526s configuring, 38.438s building, 0.712s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[07:28:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:28:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:28:43] Starting KUnit Kernel (1/1)...
[07:28:43] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:28:43] ============ drm_test_pick_cmdline (2 subtests) ============
[07:28:43] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[07:28:43] =============== drm_test_pick_cmdline_named  ===============
[07:28:43] [PASSED] NTSC
[07:28:43] [PASSED] NTSC-J
[07:28:43] [PASSED] PAL
[07:28:43] [PASSED] PAL-M
[07:28:43] =========== [PASSED] drm_test_pick_cmdline_named ===========
[07:28:43] ============== [PASSED] drm_test_pick_cmdline ==============
[07:28:43] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[07:28:43] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[07:28:43] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[07:28:43] =========== drm_validate_clone_mode (2 subtests) ===========
[07:28:43] ============== drm_test_check_in_clone_mode  ===============
[07:28:43] [PASSED] in_clone_mode
[07:28:43] [PASSED] not_in_clone_mode
[07:28:43] ========== [PASSED] drm_test_check_in_clone_mode ===========
[07:28:43] =============== drm_test_check_valid_clones  ===============
[07:28:43] [PASSED] not_in_clone_mode
[07:28:43] [PASSED] valid_clone
[07:28:43] [PASSED] invalid_clone
[07:28:43] =========== [PASSED] drm_test_check_valid_clones ===========
[07:28:43] ============= [PASSED] drm_validate_clone_mode =============
[07:28:43] ============= drm_validate_modeset (1 subtest) =============
[07:28:43] [PASSED] drm_test_check_connector_changed_modeset
[07:28:43] ============== [PASSED] drm_validate_modeset ===============
[07:28:43] ====== drm_test_bridge_get_current_state (1 subtest) =======
[07:28:43] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[07:28:43] ======== [PASSED] drm_test_bridge_get_current_state ========
[07:28:43] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[07:28:43] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[07:28:43] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[07:28:43] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[07:28:43] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[07:28:43] ============== drm_bridge_alloc (2 subtests) ===============
[07:28:43] [PASSED] drm_test_drm_bridge_alloc_basic
[07:28:43] [PASSED] drm_test_drm_bridge_alloc_get_put
[07:28:43] ================ [PASSED] drm_bridge_alloc =================
[07:28:43] ============= drm_bridge_bus_fmt (5 subtests) ==============
[07:28:43] [PASSED] drm_test_bridge_rgb_yuv_rgb
[07:28:43] [PASSED] drm_test_bridge_must_convert_to_yuv444
[07:28:43] [PASSED] drm_test_bridge_hdmi_auto_rgb
[07:28:43] [PASSED] drm_test_bridge_auto_first
[07:28:43] [PASSED] drm_test_bridge_rgb_yuv_no_path
[07:28:43] =============== [PASSED] drm_bridge_bus_fmt ================
[07:28:43] ============= drm_cmdline_parser (40 subtests) =============
[07:28:43] [PASSED] drm_test_cmdline_force_d_only
[07:28:43] [PASSED] drm_test_cmdline_force_D_only_dvi
[07:28:43] [PASSED] drm_test_cmdline_force_D_only_hdmi
[07:28:43] [PASSED] drm_test_cmdline_force_D_only_not_digital
[07:28:43] [PASSED] drm_test_cmdline_force_e_only
[07:28:43] [PASSED] drm_test_cmdline_res
[07:28:43] [PASSED] drm_test_cmdline_res_vesa
[07:28:43] [PASSED] drm_test_cmdline_res_vesa_rblank
[07:28:43] [PASSED] drm_test_cmdline_res_rblank
[07:28:43] [PASSED] drm_test_cmdline_res_bpp
[07:28:43] [PASSED] drm_test_cmdline_res_refresh
[07:28:43] [PASSED] drm_test_cmdline_res_bpp_refresh
[07:28:43] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[07:28:43] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[07:28:43] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[07:28:43] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[07:28:43] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[07:28:43] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[07:28:43] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[07:28:43] [PASSED] drm_test_cmdline_res_margins_force_on
[07:28:43] [PASSED] drm_test_cmdline_res_vesa_margins
[07:28:43] [PASSED] drm_test_cmdline_name
[07:28:43] [PASSED] drm_test_cmdline_name_bpp
[07:28:43] [PASSED] drm_test_cmdline_name_option
[07:28:43] [PASSED] drm_test_cmdline_name_bpp_option
[07:28:43] [PASSED] drm_test_cmdline_rotate_0
[07:28:43] [PASSED] drm_test_cmdline_rotate_90
[07:28:43] [PASSED] drm_test_cmdline_rotate_180
[07:28:43] [PASSED] drm_test_cmdline_rotate_270
[07:28:43] [PASSED] drm_test_cmdline_hmirror
[07:28:43] [PASSED] drm_test_cmdline_vmirror
[07:28:43] [PASSED] drm_test_cmdline_margin_options
[07:28:43] [PASSED] drm_test_cmdline_multiple_options
[07:28:43] [PASSED] drm_test_cmdline_bpp_extra_and_option
[07:28:43] [PASSED] drm_test_cmdline_extra_and_option
[07:28:43] [PASSED] drm_test_cmdline_freestanding_options
[07:28:43] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[07:28:43] [PASSED] drm_test_cmdline_panel_orientation
[07:28:43] ================ drm_test_cmdline_invalid  =================
[07:28:43] [PASSED] margin_only
[07:28:43] [PASSED] interlace_only
[07:28:43] [PASSED] res_missing_x
[07:28:43] [PASSED] res_missing_y
[07:28:43] [PASSED] res_bad_y
[07:28:43] [PASSED] res_missing_y_bpp
[07:28:43] [PASSED] res_bad_bpp
[07:28:43] [PASSED] res_bad_refresh
[07:28:43] [PASSED] res_bpp_refresh_force_on_off
[07:28:43] [PASSED] res_invalid_mode
[07:28:43] [PASSED] res_bpp_wrong_place_mode
[07:28:43] [PASSED] name_bpp_refresh
[07:28:43] [PASSED] name_refresh
[07:28:43] [PASSED] name_refresh_wrong_mode
[07:28:43] [PASSED] name_refresh_invalid_mode
[07:28:43] [PASSED] rotate_multiple
[07:28:43] [PASSED] rotate_invalid_val
[07:28:43] [PASSED] rotate_truncated
[07:28:43] [PASSED] invalid_option
[07:28:43] [PASSED] invalid_tv_option
[07:28:43] [PASSED] truncated_tv_option
[07:28:43] ============ [PASSED] drm_test_cmdline_invalid =============
[07:28:43] =============== drm_test_cmdline_tv_options  ===============
[07:28:43] [PASSED] NTSC
[07:28:43] [PASSED] NTSC_443
[07:28:43] [PASSED] NTSC_J
[07:28:43] [PASSED] PAL
[07:28:43] [PASSED] PAL_M
[07:28:43] [PASSED] PAL_N
[07:28:43] [PASSED] SECAM
[07:28:43] [PASSED] MONO_525
[07:28:43] [PASSED] MONO_625
[07:28:43] =========== [PASSED] drm_test_cmdline_tv_options ===========
[07:28:43] =============== [PASSED] drm_cmdline_parser ================
[07:28:43] ========== drmm_connector_hdmi_init (20 subtests) ==========
[07:28:43] [PASSED] drm_test_connector_hdmi_init_valid
[07:28:43] [PASSED] drm_test_connector_hdmi_init_bpc_8
[07:28:43] [PASSED] drm_test_connector_hdmi_init_bpc_10
[07:28:43] [PASSED] drm_test_connector_hdmi_init_bpc_12
[07:28:43] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[07:28:43] [PASSED] drm_test_connector_hdmi_init_bpc_null
[07:28:43] [PASSED] drm_test_connector_hdmi_init_formats_empty
[07:28:43] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[07:28:43] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[07:28:43] [PASSED] supported_formats=0x9 yuv420_allowed=1
[07:28:43] [PASSED] supported_formats=0x9 yuv420_allowed=0
[07:28:43] [PASSED] supported_formats=0x5 yuv420_allowed=1
[07:28:43] [PASSED] supported_formats=0x5 yuv420_allowed=0
[07:28:43] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:28:43] [PASSED] drm_test_connector_hdmi_init_null_ddc
[07:28:43] [PASSED] drm_test_connector_hdmi_init_null_product
[07:28:43] [PASSED] drm_test_connector_hdmi_init_null_vendor
[07:28:43] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[07:28:43] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[07:28:43] [PASSED] drm_test_connector_hdmi_init_product_valid
[07:28:43] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[07:28:43] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[07:28:43] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[07:28:43] ========= drm_test_connector_hdmi_init_type_valid  =========
[07:28:43] [PASSED] HDMI-A
[07:28:43] [PASSED] HDMI-B
[07:28:43] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[07:28:43] ======== drm_test_connector_hdmi_init_type_invalid  ========
[07:28:43] [PASSED] Unknown
[07:28:43] [PASSED] VGA
[07:28:43] [PASSED] DVI-I
[07:28:43] [PASSED] DVI-D
[07:28:43] [PASSED] DVI-A
[07:28:43] [PASSED] Composite
[07:28:43] [PASSED] SVIDEO
[07:28:43] [PASSED] LVDS
[07:28:43] [PASSED] Component
[07:28:43] [PASSED] DIN
[07:28:43] [PASSED] DP
[07:28:43] [PASSED] TV
[07:28:43] [PASSED] eDP
[07:28:43] [PASSED] Virtual
[07:28:43] [PASSED] DSI
[07:28:43] [PASSED] DPI
[07:28:43] [PASSED] Writeback
[07:28:43] [PASSED] SPI
[07:28:43] [PASSED] USB
[07:28:43] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[07:28:43] ============ [PASSED] drmm_connector_hdmi_init =============
[07:28:43] ============= drmm_connector_init (3 subtests) =============
[07:28:43] [PASSED] drm_test_drmm_connector_init
[07:28:43] [PASSED] drm_test_drmm_connector_init_null_ddc
[07:28:43] ========= drm_test_drmm_connector_init_type_valid  =========
[07:28:43] [PASSED] Unknown
[07:28:43] [PASSED] VGA
[07:28:43] [PASSED] DVI-I
[07:28:43] [PASSED] DVI-D
[07:28:43] [PASSED] DVI-A
[07:28:43] [PASSED] Composite
[07:28:43] [PASSED] SVIDEO
[07:28:43] [PASSED] LVDS
[07:28:43] [PASSED] Component
[07:28:43] [PASSED] DIN
[07:28:43] [PASSED] DP
[07:28:43] [PASSED] HDMI-A
[07:28:43] [PASSED] HDMI-B
[07:28:43] [PASSED] TV
[07:28:43] [PASSED] eDP
[07:28:43] [PASSED] Virtual
[07:28:43] [PASSED] DSI
[07:28:43] [PASSED] DPI
[07:28:43] [PASSED] Writeback
[07:28:43] [PASSED] SPI
[07:28:43] [PASSED] USB
[07:28:43] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[07:28:43] =============== [PASSED] drmm_connector_init ===============
[07:28:43] ========= drm_connector_dynamic_init (6 subtests) ==========
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_init
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_init_properties
[07:28:43] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[07:28:43] [PASSED] Unknown
[07:28:43] [PASSED] VGA
[07:28:43] [PASSED] DVI-I
[07:28:43] [PASSED] DVI-D
[07:28:43] [PASSED] DVI-A
[07:28:43] [PASSED] Composite
[07:28:43] [PASSED] SVIDEO
[07:28:43] [PASSED] LVDS
[07:28:43] [PASSED] Component
[07:28:43] [PASSED] DIN
[07:28:43] [PASSED] DP
[07:28:43] [PASSED] HDMI-A
[07:28:43] [PASSED] HDMI-B
[07:28:43] [PASSED] TV
[07:28:43] [PASSED] eDP
[07:28:43] [PASSED] Virtual
[07:28:43] [PASSED] DSI
[07:28:43] [PASSED] DPI
[07:28:43] [PASSED] Writeback
[07:28:43] [PASSED] SPI
[07:28:43] [PASSED] USB
[07:28:43] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[07:28:43] ======== drm_test_drm_connector_dynamic_init_name  =========
[07:28:43] [PASSED] Unknown
[07:28:43] [PASSED] VGA
[07:28:43] [PASSED] DVI-I
[07:28:43] [PASSED] DVI-D
[07:28:43] [PASSED] DVI-A
[07:28:43] [PASSED] Composite
[07:28:43] [PASSED] SVIDEO
[07:28:43] [PASSED] LVDS
[07:28:43] [PASSED] Component
[07:28:43] [PASSED] DIN
[07:28:43] [PASSED] DP
[07:28:43] [PASSED] HDMI-A
[07:28:43] [PASSED] HDMI-B
[07:28:43] [PASSED] TV
[07:28:43] [PASSED] eDP
[07:28:43] [PASSED] Virtual
[07:28:43] [PASSED] DSI
[07:28:43] [PASSED] DPI
[07:28:43] [PASSED] Writeback
[07:28:43] [PASSED] SPI
[07:28:43] [PASSED] USB
[07:28:43] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[07:28:43] =========== [PASSED] drm_connector_dynamic_init ============
[07:28:43] ==== drm_connector_dynamic_register_early (4 subtests) =====
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[07:28:43] ====== [PASSED] drm_connector_dynamic_register_early =======
[07:28:43] ======= drm_connector_dynamic_register (7 subtests) ========
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[07:28:43] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[07:28:43] ========= [PASSED] drm_connector_dynamic_register ==========
[07:28:43] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[07:28:43] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[07:28:43] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[07:28:43] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[07:28:43] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[07:28:43] ========== drm_test_get_tv_mode_from_name_valid  ===========
[07:28:43] [PASSED] NTSC
[07:28:43] [PASSED] NTSC-443
[07:28:43] [PASSED] NTSC-J
[07:28:43] [PASSED] PAL
[07:28:43] [PASSED] PAL-M
[07:28:43] [PASSED] PAL-N
[07:28:43] [PASSED] SECAM
[07:28:43] [PASSED] Mono
[07:28:43] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[07:28:43] [PASSED] drm_test_get_tv_mode_from_name_truncated
[07:28:43] ============ [PASSED] drm_get_tv_mode_from_name ============
[07:28:43] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[07:28:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[07:28:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[07:28:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[07:28:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[07:28:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[07:28:43] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[07:28:43] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[07:28:43] [PASSED] VIC 96
[07:28:43] [PASSED] VIC 97
[07:28:43] [PASSED] VIC 101
[07:28:43] [PASSED] VIC 102
[07:28:43] [PASSED] VIC 106
[07:28:43] [PASSED] VIC 107
[07:28:43] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[07:28:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[07:28:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[07:28:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[07:28:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[07:28:43] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[07:28:43] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[07:28:43] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[07:28:43] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[07:28:43] [PASSED] Automatic
[07:28:43] [PASSED] Full
[07:28:43] [PASSED] Limited 16:235
[07:28:43] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[07:28:43] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[07:28:43] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[07:28:43] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[07:28:43] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[07:28:43] [PASSED] RGB
[07:28:43] [PASSED] YUV 4:2:0
[07:28:43] [PASSED] YUV 4:2:2
[07:28:43] [PASSED] YUV 4:4:4
[07:28:43] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[07:28:43] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[07:28:43] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[07:28:43] ============= drm_damage_helper (21 subtests) ==============
[07:28:43] [PASSED] drm_test_damage_iter_no_damage
[07:28:43] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[07:28:43] [PASSED] drm_test_damage_iter_no_damage_src_moved
[07:28:43] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[07:28:43] [PASSED] drm_test_damage_iter_no_damage_not_visible
[07:28:43] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[07:28:43] [PASSED] drm_test_damage_iter_no_damage_no_fb
[07:28:43] [PASSED] drm_test_damage_iter_simple_damage
[07:28:43] [PASSED] drm_test_damage_iter_single_damage
[07:28:43] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[07:28:43] [PASSED] drm_test_damage_iter_single_damage_outside_src
[07:28:43] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[07:28:43] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[07:28:43] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[07:28:43] [PASSED] drm_test_damage_iter_single_damage_src_moved
[07:28:43] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[07:28:43] [PASSED] drm_test_damage_iter_damage
[07:28:43] [PASSED] drm_test_damage_iter_damage_one_intersect
[07:28:43] [PASSED] drm_test_damage_iter_damage_one_outside
[07:28:43] [PASSED] drm_test_damage_iter_damage_src_moved
[07:28:43] [PASSED] drm_test_damage_iter_damage_not_visible
[07:28:43] ================ [PASSED] drm_damage_helper ================
[07:28:43] ============== drm_dp_mst_helper (3 subtests) ==============
[07:28:43] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[07:28:43] [PASSED] Clock 154000 BPP 30 DSC disabled
[07:28:43] [PASSED] Clock 234000 BPP 30 DSC disabled
[07:28:43] [PASSED] Clock 297000 BPP 24 DSC disabled
[07:28:43] [PASSED] Clock 332880 BPP 24 DSC enabled
[07:28:43] [PASSED] Clock 324540 BPP 24 DSC enabled
[07:28:43] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[07:28:43] ============== drm_test_dp_mst_calc_pbn_div  ===============
[07:28:43] [PASSED] Link rate 2000000 lane count 4
[07:28:43] [PASSED] Link rate 2000000 lane count 2
[07:28:43] [PASSED] Link rate 2000000 lane count 1
[07:28:43] [PASSED] Link rate 1350000 lane count 4
[07:28:43] [PASSED] Link rate 1350000 lane count 2
[07:28:43] [PASSED] Link rate 1350000 lane count 1
[07:28:43] [PASSED] Link rate 1000000 lane count 4
[07:28:43] [PASSED] Link rate 1000000 lane count 2
[07:28:43] [PASSED] Link rate 1000000 lane count 1
[07:28:43] [PASSED] Link rate 810000 lane count 4
[07:28:43] [PASSED] Link rate 810000 lane count 2
[07:28:43] [PASSED] Link rate 810000 lane count 1
[07:28:43] [PASSED] Link rate 540000 lane count 4
[07:28:43] [PASSED] Link rate 540000 lane count 2
[07:28:43] [PASSED] Link rate 540000 lane count 1
[07:28:43] [PASSED] Link rate 270000 lane count 4
[07:28:43] [PASSED] Link rate 270000 lane count 2
[07:28:43] [PASSED] Link rate 270000 lane count 1
[07:28:43] [PASSED] Link rate 162000 lane count 4
[07:28:43] [PASSED] Link rate 162000 lane count 2
[07:28:43] [PASSED] Link rate 162000 lane count 1
[07:28:43] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[07:28:43] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[07:28:43] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[07:28:43] [PASSED] DP_POWER_UP_PHY with port number
[07:28:43] [PASSED] DP_POWER_DOWN_PHY with port number
[07:28:43] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[07:28:43] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[07:28:43] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[07:28:43] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[07:28:43] [PASSED] DP_QUERY_PAYLOAD with port number
[07:28:43] [PASSED] DP_QUERY_PAYLOAD with VCPI
[07:28:43] [PASSED] DP_REMOTE_DPCD_READ with port number
[07:28:43] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[07:28:43] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[07:28:43] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[07:28:43] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[07:28:43] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[07:28:43] [PASSED] DP_REMOTE_I2C_READ with port number
[07:28:43] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[07:28:43] [PASSED] DP_REMOTE_I2C_READ with transactions array
[07:28:43] [PASSED] DP_REMOTE_I2C_WRITE with port number
[07:28:43] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[07:28:43] [PASSED] DP_REMOTE_I2C_WRITE with data array
[07:28:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[07:28:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[07:28:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[07:28:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[07:28:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[07:28:43] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[07:28:43] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[07:28:43] ================ [PASSED] drm_dp_mst_helper ================
[07:28:43] ================== drm_exec (7 subtests) ===================
[07:28:43] [PASSED] sanitycheck
[07:28:43] [PASSED] test_lock
[07:28:43] [PASSED] test_lock_unlock
[07:28:43] [PASSED] test_duplicates
[07:28:43] [PASSED] test_prepare
[07:28:43] [PASSED] test_prepare_array
[07:28:43] [PASSED] test_multiple_loops
[07:28:43] ==================== [PASSED] drm_exec =====================
[07:28:43] =========== drm_format_helper_test (17 subtests) ===========
[07:28:43] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[07:28:43] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[07:28:43] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[07:28:43] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[07:28:43] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[07:28:43] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[07:28:43] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[07:28:43] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[07:28:43] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[07:28:43] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[07:28:43] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[07:28:43] ============== drm_test_fb_xrgb8888_to_mono  ===============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[07:28:43] ==================== drm_test_fb_swab  =====================
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ================ [PASSED] drm_test_fb_swab =================
[07:28:43] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[07:28:43] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[07:28:43] [PASSED] single_pixel_source_buffer
[07:28:43] [PASSED] single_pixel_clip_rectangle
[07:28:43] [PASSED] well_known_colors
[07:28:43] [PASSED] destination_pitch
[07:28:43] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[07:28:43] ================= drm_test_fb_clip_offset  =================
[07:28:43] [PASSED] pass through
[07:28:43] [PASSED] horizontal offset
[07:28:43] [PASSED] vertical offset
[07:28:43] [PASSED] horizontal and vertical offset
[07:28:43] [PASSED] horizontal offset (custom pitch)
[07:28:43] [PASSED] vertical offset (custom pitch)
[07:28:43] [PASSED] horizontal and vertical offset (custom pitch)
[07:28:43] ============= [PASSED] drm_test_fb_clip_offset =============
[07:28:43] =================== drm_test_fb_memcpy  ====================
[07:28:43] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[07:28:43] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[07:28:43] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[07:28:43] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[07:28:43] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[07:28:43] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[07:28:43] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[07:28:43] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[07:28:43] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[07:28:43] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[07:28:43] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[07:28:43] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[07:28:43] =============== [PASSED] drm_test_fb_memcpy ================
[07:28:43] ============= [PASSED] drm_format_helper_test ==============
[07:28:43] ================= drm_format (18 subtests) =================
[07:28:43] [PASSED] drm_test_format_block_width_invalid
[07:28:43] [PASSED] drm_test_format_block_width_one_plane
[07:28:43] [PASSED] drm_test_format_block_width_two_plane
[07:28:43] [PASSED] drm_test_format_block_width_three_plane
[07:28:43] [PASSED] drm_test_format_block_width_tiled
[07:28:43] [PASSED] drm_test_format_block_height_invalid
[07:28:43] [PASSED] drm_test_format_block_height_one_plane
[07:28:43] [PASSED] drm_test_format_block_height_two_plane
[07:28:43] [PASSED] drm_test_format_block_height_three_plane
[07:28:43] [PASSED] drm_test_format_block_height_tiled
[07:28:43] [PASSED] drm_test_format_min_pitch_invalid
[07:28:43] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[07:28:43] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[07:28:43] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[07:28:43] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[07:28:43] [PASSED] drm_test_format_min_pitch_two_plane
[07:28:43] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[07:28:43] [PASSED] drm_test_format_min_pitch_tiled
[07:28:43] =================== [PASSED] drm_format ====================
[07:28:43] ============== drm_framebuffer (10 subtests) ===============
[07:28:43] ========== drm_test_framebuffer_check_src_coords  ==========
[07:28:43] [PASSED] Success: source fits into fb
[07:28:43] [PASSED] Fail: overflowing fb with x-axis coordinate
[07:28:43] [PASSED] Fail: overflowing fb with y-axis coordinate
[07:28:43] [PASSED] Fail: overflowing fb with source width
[07:28:43] [PASSED] Fail: overflowing fb with source height
[07:28:43] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[07:28:43] [PASSED] drm_test_framebuffer_cleanup
[07:28:43] =============== drm_test_framebuffer_create  ===============
[07:28:43] [PASSED] ABGR8888 normal sizes
[07:28:43] [PASSED] ABGR8888 max sizes
[07:28:43] [PASSED] ABGR8888 pitch greater than min required
[07:28:43] [PASSED] ABGR8888 pitch less than min required
[07:28:43] [PASSED] ABGR8888 Invalid width
[07:28:43] [PASSED] ABGR8888 Invalid buffer handle
[07:28:43] [PASSED] No pixel format
[07:28:43] [PASSED] ABGR8888 Width 0
[07:28:43] [PASSED] ABGR8888 Height 0
[07:28:43] [PASSED] ABGR8888 Out of bound height * pitch combination
[07:28:43] [PASSED] ABGR8888 Large buffer offset
[07:28:43] [PASSED] ABGR8888 Buffer offset for inexistent plane
[07:28:43] [PASSED] ABGR8888 Invalid flag
[07:28:43] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[07:28:43] [PASSED] ABGR8888 Valid buffer modifier
[07:28:43] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[07:28:43] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[07:28:43] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[07:28:43] [PASSED] NV12 Normal sizes
[07:28:43] [PASSED] NV12 Max sizes
[07:28:43] [PASSED] NV12 Invalid pitch
[07:28:43] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[07:28:43] [PASSED] NV12 different  modifier per-plane
[07:28:43] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[07:28:43] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[07:28:43] [PASSED] NV12 Modifier for inexistent plane
[07:28:43] [PASSED] NV12 Handle for inexistent plane
[07:28:43] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[07:28:43] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[07:28:43] [PASSED] YVU420 Normal sizes
[07:28:43] [PASSED] YVU420 Max sizes
[07:28:43] [PASSED] YVU420 Invalid pitch
[07:28:43] [PASSED] YVU420 Different pitches
[07:28:43] [PASSED] YVU420 Different buffer offsets/pitches
[07:28:43] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[07:28:43] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[07:28:43] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[07:28:43] [PASSED] YVU420 Valid modifier
[07:28:43] [PASSED] YVU420 Different modifiers per plane
[07:28:43] [PASSED] YVU420 Modifier for inexistent plane
[07:28:43] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[07:28:43] [PASSED] X0L2 Normal sizes
[07:28:43] [PASSED] X0L2 Max sizes
[07:28:43] [PASSED] X0L2 Invalid pitch
[07:28:43] [PASSED] X0L2 Pitch greater than minimum required
[07:28:43] [PASSED] X0L2 Handle for inexistent plane
[07:28:43] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[07:28:43] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[07:28:43] [PASSED] X0L2 Valid modifier
[07:28:43] [PASSED] X0L2 Modifier for inexistent plane
[07:28:43] =========== [PASSED] drm_test_framebuffer_create ===========
[07:28:43] [PASSED] drm_test_framebuffer_free
[07:28:43] [PASSED] drm_test_framebuffer_init
[07:28:43] [PASSED] drm_test_framebuffer_init_bad_format
[07:28:43] [PASSED] drm_test_framebuffer_init_dev_mismatch
[07:28:43] [PASSED] drm_test_framebuffer_lookup
[07:28:43] [PASSED] drm_test_framebuffer_lookup_inexistent
[07:28:43] [PASSED] drm_test_framebuffer_modifiers_not_supported
[07:28:43] ================= [PASSED] drm_framebuffer =================
[07:28:43] ================ drm_gem_shmem (8 subtests) ================
[07:28:43] [PASSED] drm_gem_shmem_test_obj_create
[07:28:43] [PASSED] drm_gem_shmem_test_obj_create_private
[07:28:43] [PASSED] drm_gem_shmem_test_pin_pages
[07:28:43] [PASSED] drm_gem_shmem_test_vmap
[07:28:43] [PASSED] drm_gem_shmem_test_get_sg_table
[07:28:43] [PASSED] drm_gem_shmem_test_get_pages_sgt
[07:28:43] [PASSED] drm_gem_shmem_test_madvise
[07:28:43] [PASSED] drm_gem_shmem_test_purge
[07:28:43] ================== [PASSED] drm_gem_shmem ==================
[07:28:43] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[07:28:43] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[07:28:43] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[07:28:43] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[07:28:43] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[07:28:43] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[07:28:43] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[07:28:43] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[07:28:43] [PASSED] Automatic
[07:28:43] [PASSED] Full
[07:28:43] [PASSED] Limited 16:235
[07:28:43] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[07:28:43] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[07:28:43] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[07:28:43] [PASSED] drm_test_check_disable_connector
[07:28:43] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[07:28:43] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[07:28:43] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[07:28:43] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[07:28:43] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[07:28:43] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[07:28:43] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[07:28:43] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[07:28:43] [PASSED] drm_test_check_output_bpc_dvi
[07:28:43] [PASSED] drm_test_check_output_bpc_format_vic_1
[07:28:43] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[07:28:43] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[07:28:43] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[07:28:43] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[07:28:43] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[07:28:43] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[07:28:43] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[07:28:43] ============ drm_test_check_hdmi_color_format  =============
[07:28:43] [PASSED] AUTO -> RGB
[07:28:43] [PASSED] YCBCR422 -> YUV422
[07:28:43] [PASSED] YCBCR420 -> YUV420
[07:28:43] [PASSED] YCBCR444 -> YUV444
[07:28:43] [PASSED] RGB -> RGB
[07:28:43] ======== [PASSED] drm_test_check_hdmi_color_format =========
[07:28:43] ======== drm_test_check_hdmi_color_format_420_only  ========
[07:28:43] [PASSED] RGB should fail
[07:28:43] [PASSED] YUV444 should fail
[07:28:43] [PASSED] YUV422 should fail
[07:28:43] [PASSED] YUV420 should work
[07:28:43] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[07:28:43] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[07:28:43] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[07:28:43] [PASSED] drm_test_check_broadcast_rgb_value
[07:28:43] [PASSED] drm_test_check_bpc_8_value
[07:28:43] [PASSED] drm_test_check_bpc_10_value
[07:28:43] [PASSED] drm_test_check_bpc_12_value
[07:28:43] [PASSED] drm_test_check_format_value
[07:28:43] [PASSED] drm_test_check_tmds_char_value
[07:28:43] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[07:28:43] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[07:28:43] [PASSED] drm_test_check_mode_valid
[07:28:43] [PASSED] drm_test_check_mode_valid_reject
[07:28:43] [PASSED] drm_test_check_mode_valid_reject_rate
[07:28:43] [PASSED] drm_test_check_mode_valid_reject_max_clock
[07:28:43] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[07:28:43] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[07:28:43] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[07:28:43] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[07:28:43] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[07:28:43] [PASSED] drm_test_check_infoframes
[07:28:43] [PASSED] drm_test_check_reject_avi_infoframe
[07:28:43] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[07:28:43] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[07:28:43] [PASSED] drm_test_check_reject_audio_infoframe
[07:28:43] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[07:28:43] ================= drm_managed (2 subtests) =================
[07:28:43] [PASSED] drm_test_managed_release_action
[07:28:43] [PASSED] drm_test_managed_run_action
[07:28:43] =================== [PASSED] drm_managed ===================
[07:28:43] =================== drm_mm (6 subtests) ====================
[07:28:43] [PASSED] drm_test_mm_init
[07:28:43] [PASSED] drm_test_mm_debug
[07:28:43] [PASSED] drm_test_mm_align32
[07:28:43] [PASSED] drm_test_mm_align64
[07:28:43] [PASSED] drm_test_mm_lowest
[07:28:43] [PASSED] drm_test_mm_highest
[07:28:43] ===================== [PASSED] drm_mm ======================
[07:28:43] ============= drm_modes_analog_tv (5 subtests) =============
[07:28:43] [PASSED] drm_test_modes_analog_tv_mono_576i
[07:28:43] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[07:28:43] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[07:28:43] [PASSED] drm_test_modes_analog_tv_pal_576i
[07:28:43] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[07:28:43] =============== [PASSED] drm_modes_analog_tv ===============
[07:28:43] ============== drm_panic_helper (3 subtests) ===============
[07:28:43] ============= drm_test_panic_screen_user_map  ==============
[07:28:43] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[07:28:43] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[07:28:43] ========= [PASSED] drm_test_panic_screen_user_map ==========
[07:28:43] ============= drm_test_panic_screen_user_page  =============
[07:28:43] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[07:28:43] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[07:28:43] ========= [PASSED] drm_test_panic_screen_user_page =========
[07:28:43] ========== drm_test_panic_screen_user_set_pixel  ===========
[07:28:43] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[07:28:43] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[07:28:43] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[07:28:43] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[07:28:43] ================ [PASSED] drm_panic_helper =================
[07:28:43] ============== drm_plane_helper (2 subtests) ===============
[07:28:43] =============== drm_test_check_plane_state  ================
[07:28:43] [PASSED] clipping_simple
[07:28:43] [PASSED] clipping_rotate_reflect
[07:28:43] [PASSED] positioning_simple
[07:28:43] [PASSED] upscaling
[07:28:43] [PASSED] downscaling
[07:28:43] [PASSED] rounding1
[07:28:43] [PASSED] rounding2
[07:28:43] [PASSED] rounding3
[07:28:43] [PASSED] rounding4
[07:28:43] =========== [PASSED] drm_test_check_plane_state ============
[07:28:43] =========== drm_test_check_invalid_plane_state  ============
[07:28:43] [PASSED] positioning_invalid
[07:28:43] [PASSED] upscaling_invalid
[07:28:43] [PASSED] downscaling_invalid
[07:28:43] ======= [PASSED] drm_test_check_invalid_plane_state ========
[07:28:43] ================ [PASSED] drm_plane_helper =================
[07:28:43] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[07:28:43] ====== drm_test_connector_helper_tv_get_modes_check  =======
[07:28:43] [PASSED] None
[07:28:43] [PASSED] PAL
[07:28:43] [PASSED] NTSC
[07:28:43] [PASSED] Both, NTSC Default
[07:28:43] [PASSED] Both, PAL Default
[07:28:43] [PASSED] Both, NTSC Default, with PAL on command-line
[07:28:43] [PASSED] Both, PAL Default, with NTSC on command-line
[07:28:43] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[07:28:43] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[07:28:43] ================== drm_rect (9 subtests) ===================
[07:28:43] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[07:28:43] [PASSED] drm_test_rect_clip_scaled_not_clipped
[07:28:43] [PASSED] drm_test_rect_clip_scaled_clipped
[07:28:43] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[07:28:43] ================= drm_test_rect_intersect  =================
[07:28:43] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[07:28:43] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[07:28:43] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[07:28:43] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[07:28:43] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[07:28:43] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[07:28:43] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[07:28:43] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[07:28:43] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[07:28:43] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[07:28:43] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[07:28:43] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[07:28:43] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[07:28:43] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[07:28:43] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[07:28:43] ============= [PASSED] drm_test_rect_intersect =============
[07:28:43] ================ drm_test_rect_calc_hscale  ================
[07:28:43] [PASSED] normal use
[07:28:43] [PASSED] out of max range
[07:28:43] [PASSED] out of min range
[07:28:43] [PASSED] zero dst
[07:28:43] [PASSED] negative src
[07:28:43] [PASSED] negative dst
[07:28:43] ============ [PASSED] drm_test_rect_calc_hscale ============
[07:28:43] ================ drm_test_rect_calc_vscale  ================
[07:28:43] [PASSED] normal use
[07:28:43] [PASSED] out of max range
[07:28:43] [PASSED] out of min range
[07:28:43] [PASSED] zero dst
[07:28:43] [PASSED] negative src
[07:28:43] [PASSED] negative dst
[07:28:43] ============ [PASSED] drm_test_rect_calc_vscale ============
[07:28:43] ================== drm_test_rect_rotate  ===================
[07:28:43] [PASSED] reflect-x
[07:28:43] [PASSED] reflect-y
[07:28:43] [PASSED] rotate-0
[07:28:43] [PASSED] rotate-90
[07:28:43] [PASSED] rotate-180
[07:28:43] [PASSED] rotate-270
[07:28:43] ============== [PASSED] drm_test_rect_rotate ===============
[07:28:43] ================ drm_test_rect_rotate_inv  =================
[07:28:43] [PASSED] reflect-x
[07:28:43] [PASSED] reflect-y
[07:28:43] [PASSED] rotate-0
[07:28:43] [PASSED] rotate-90
[07:28:43] [PASSED] rotate-180
[07:28:43] [PASSED] rotate-270
[07:28:43] ============ [PASSED] drm_test_rect_rotate_inv =============
[07:28:43] ==================== [PASSED] drm_rect =====================
[07:28:43] ============ drm_sysfb_modeset_test (1 subtest) ============
[07:28:43] ============ drm_test_sysfb_build_fourcc_list  =============
[07:28:43] [PASSED] no native formats
[07:28:43] [PASSED] XRGB8888 as native format
[07:28:43] [PASSED] remove duplicates
[07:28:43] [PASSED] convert alpha formats
[07:28:43] [PASSED] random formats
[07:28:43] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[07:28:43] ============= [PASSED] drm_sysfb_modeset_test ==============
[07:28:43] ================== drm_fixp (2 subtests) ===================
[07:28:43] [PASSED] drm_test_int2fixp
[07:28:43] [PASSED] drm_test_sm2fixp
[07:28:43] ==================== [PASSED] drm_fixp =====================
[07:28:43] ============================================================
[07:28:43] Testing complete. Ran 667 tests: passed: 667
[07:28:43] Elapsed time: 28.021s total, 2.553s configuring, 25.051s building, 0.410s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[07:28:43] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:28:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:28:56] Starting KUnit Kernel (1/1)...
[07:28:56] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:28:56] ================= ttm_device (5 subtests) ==================
[07:28:56] [PASSED] ttm_device_init_basic
[07:28:56] [PASSED] ttm_device_init_multiple
[07:28:56] [PASSED] ttm_device_fini_basic
[07:28:56] [PASSED] ttm_device_init_no_vma_man
[07:28:56] ================== ttm_device_init_pools  ==================
[07:28:56] [PASSED] No DMA allocations, no DMA32 required
[07:28:56] [PASSED] DMA allocations, DMA32 required
[07:28:56] [PASSED] No DMA allocations, DMA32 required
[07:28:56] [PASSED] DMA allocations, no DMA32 required
[07:28:56] ============== [PASSED] ttm_device_init_pools ==============
[07:28:56] =================== [PASSED] ttm_device ====================
[07:28:56] ================== ttm_pool (8 subtests) ===================
[07:28:56] ================== ttm_pool_alloc_basic  ===================
[07:28:56] [PASSED] One page
[07:28:56] [PASSED] More than one page
[07:28:56] [PASSED] Above the allocation limit
[07:28:56] [PASSED] One page, with coherent DMA mappings enabled
[07:28:56] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:28:56] ============== [PASSED] ttm_pool_alloc_basic ===============
[07:28:56] ============== ttm_pool_alloc_basic_dma_addr  ==============
[07:28:56] [PASSED] One page
[07:28:56] [PASSED] More than one page
[07:28:56] [PASSED] Above the allocation limit
[07:28:56] [PASSED] One page, with coherent DMA mappings enabled
[07:28:56] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:28:56] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[07:28:56] [PASSED] ttm_pool_alloc_order_caching_match
[07:28:56] [PASSED] ttm_pool_alloc_caching_mismatch
[07:28:56] [PASSED] ttm_pool_alloc_order_mismatch
[07:28:56] [PASSED] ttm_pool_free_dma_alloc
[07:28:56] [PASSED] ttm_pool_free_no_dma_alloc
[07:28:56] [PASSED] ttm_pool_fini_basic
[07:28:56] ==================== [PASSED] ttm_pool =====================
[07:28:56] ================ ttm_resource (8 subtests) =================
[07:28:56] ================= ttm_resource_init_basic  =================
[07:28:56] [PASSED] Init resource in TTM_PL_SYSTEM
[07:28:56] [PASSED] Init resource in TTM_PL_VRAM
[07:28:56] [PASSED] Init resource in a private placement
[07:28:56] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[07:28:56] ============= [PASSED] ttm_resource_init_basic =============
[07:28:56] [PASSED] ttm_resource_init_pinned
[07:28:56] [PASSED] ttm_resource_fini_basic
[07:28:56] [PASSED] ttm_resource_manager_init_basic
[07:28:56] [PASSED] ttm_resource_manager_usage_basic
[07:28:56] [PASSED] ttm_resource_manager_set_used_basic
[07:28:56] [PASSED] ttm_sys_man_alloc_basic
[07:28:56] [PASSED] ttm_sys_man_free_basic
[07:28:56] ================== [PASSED] ttm_resource ===================
[07:28:56] =================== ttm_tt (15 subtests) ===================
[07:28:56] ==================== ttm_tt_init_basic  ====================
[07:28:56] [PASSED] Page-aligned size
[07:28:56] [PASSED] Extra pages requested
[07:28:56] ================ [PASSED] ttm_tt_init_basic ================
[07:28:56] [PASSED] ttm_tt_init_misaligned
[07:28:56] [PASSED] ttm_tt_fini_basic
[07:28:56] [PASSED] ttm_tt_fini_sg
[07:28:56] [PASSED] ttm_tt_fini_shmem
[07:28:56] [PASSED] ttm_tt_create_basic
[07:28:56] [PASSED] ttm_tt_create_invalid_bo_type
[07:28:56] [PASSED] ttm_tt_create_ttm_exists
[07:28:56] [PASSED] ttm_tt_create_failed
[07:28:56] [PASSED] ttm_tt_destroy_basic
[07:28:56] [PASSED] ttm_tt_populate_null_ttm
[07:28:56] [PASSED] ttm_tt_populate_populated_ttm
[07:28:56] [PASSED] ttm_tt_unpopulate_basic
[07:28:56] [PASSED] ttm_tt_unpopulate_empty_ttm
[07:28:56] [PASSED] ttm_tt_swapin_basic
[07:28:56] ===================== [PASSED] ttm_tt ======================
[07:28:56] =================== ttm_bo (14 subtests) ===================
[07:28:56] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[07:28:56] [PASSED] Cannot be interrupted and sleeps
[07:28:56] [PASSED] Cannot be interrupted, locks straight away
[07:28:56] [PASSED] Can be interrupted, sleeps
[07:28:56] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[07:28:56] [PASSED] ttm_bo_reserve_locked_no_sleep
[07:28:56] [PASSED] ttm_bo_reserve_no_wait_ticket
[07:28:56] [PASSED] ttm_bo_reserve_double_resv
[07:28:56] [PASSED] ttm_bo_reserve_interrupted
[07:28:56] [PASSED] ttm_bo_reserve_deadlock
[07:28:56] [PASSED] ttm_bo_unreserve_basic
[07:28:56] [PASSED] ttm_bo_unreserve_pinned
[07:28:56] [PASSED] ttm_bo_unreserve_bulk
[07:28:56] [PASSED] ttm_bo_fini_basic
[07:28:56] [PASSED] ttm_bo_fini_shared_resv
[07:28:56] [PASSED] ttm_bo_pin_basic
[07:28:56] [PASSED] ttm_bo_pin_unpin_resource
[07:28:56] [PASSED] ttm_bo_multiple_pin_one_unpin
[07:28:56] ===================== [PASSED] ttm_bo ======================
[07:28:56] ============== ttm_bo_validate (22 subtests) ===============
[07:28:56] ============== ttm_bo_init_reserved_sys_man  ===============
[07:28:56] [PASSED] Buffer object for userspace
[07:28:56] [PASSED] Kernel buffer object
[07:28:56] [PASSED] Shared buffer object
[07:28:56] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[07:28:56] ============== ttm_bo_init_reserved_mock_man  ==============
[07:28:56] [PASSED] Buffer object for userspace
[07:28:56] [PASSED] Kernel buffer object
[07:28:56] [PASSED] Shared buffer object
[07:28:56] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[07:28:56] [PASSED] ttm_bo_init_reserved_resv
[07:28:56] ================== ttm_bo_validate_basic  ==================
[07:28:56] [PASSED] Buffer object for userspace
[07:28:56] [PASSED] Kernel buffer object
[07:28:56] [PASSED] Shared buffer object
[07:28:56] ============== [PASSED] ttm_bo_validate_basic ==============
[07:28:56] [PASSED] ttm_bo_validate_invalid_placement
[07:28:56] ============= ttm_bo_validate_same_placement  ==============
[07:28:56] [PASSED] System manager
[07:28:56] [PASSED] VRAM manager
[07:28:56] ========= [PASSED] ttm_bo_validate_same_placement ==========
[07:28:56] [PASSED] ttm_bo_validate_failed_alloc
[07:28:56] [PASSED] ttm_bo_validate_pinned
[07:28:56] [PASSED] ttm_bo_validate_busy_placement
[07:28:56] ================ ttm_bo_validate_multihop  =================
[07:28:56] [PASSED] Buffer object for userspace
[07:28:56] [PASSED] Kernel buffer object
[07:28:56] [PASSED] Shared buffer object
[07:28:56] ============ [PASSED] ttm_bo_validate_multihop =============
[07:28:56] ========== ttm_bo_validate_no_placement_signaled  ==========
[07:28:56] [PASSED] Buffer object in system domain, no page vector
[07:28:56] [PASSED] Buffer object in system domain with an existing page vector
[07:28:56] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[07:28:56] ======== ttm_bo_validate_no_placement_not_signaled  ========
[07:28:56] [PASSED] Buffer object for userspace
[07:28:56] [PASSED] Kernel buffer object
[07:28:56] [PASSED] Shared buffer object
[07:28:56] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[07:28:56] [PASSED] ttm_bo_validate_move_fence_signaled
[07:28:56] ========= ttm_bo_validate_move_fence_not_signaled  =========
[07:28:56] [PASSED] Waits for GPU
[07:28:56] [PASSED] Tries to lock straight away
[07:28:56] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[07:28:56] [PASSED] ttm_bo_validate_swapout
[07:28:56] [PASSED] ttm_bo_validate_happy_evict
[07:28:56] [PASSED] ttm_bo_validate_all_pinned_evict
[07:28:56] [PASSED] ttm_bo_validate_allowed_only_evict
[07:28:56] [PASSED] ttm_bo_validate_deleted_evict
[07:28:56] [PASSED] ttm_bo_validate_busy_domain_evict
[07:28:56] [PASSED] ttm_bo_validate_evict_gutting
[07:28:56] [PASSED] ttm_bo_validate_recrusive_evict
[07:28:56] ================= [PASSED] ttm_bo_validate =================
[07:28:56] ============================================================
[07:28:56] Testing complete. Ran 102 tests: passed: 102
[07:28:56] Elapsed time: 12.788s total, 2.512s configuring, 10.061s building, 0.181s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[07:28:56] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:28:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:29:08] Starting KUnit Kernel (1/1)...
[07:29:08] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:29:08] =============== dma-buf-fence (12 subtests) ================
[07:29:08] [PASSED] test_sanitycheck
[07:29:08] [PASSED] test_signaling
[07:29:08] [PASSED] test_add_callback
[07:29:08] [PASSED] test_late_add_callback
[07:29:08] [PASSED] test_rm_callback
[07:29:08] [PASSED] test_late_rm_callback
[07:29:08] [PASSED] test_status
[07:29:08] [PASSED] test_error
[07:29:08] [PASSED] test_wait
[07:29:08] [PASSED] test_wait_timeout
[07:29:08] [PASSED] test_stub
[07:29:08] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[07:29:08] ================== [PASSED] dma-buf-fence ==================
[07:29:08] ============ dma-buf-fence-chain (11 subtests) =============
[07:29:08] [PASSED] test_sanitycheck
[07:29:08] [PASSED] test_find_seqno
[07:29:08] [PASSED] test_find_signaled
[07:29:08] [PASSED] test_find_out_of_order
[07:29:13] [PASSED] test_find_gap
[07:29:13] [PASSED] test_find_race
[07:29:13] [PASSED] test_signal_forward
[07:29:13] [PASSED] test_signal_backward
[07:29:13] [PASSED] test_wait_forward
[07:29:13] [PASSED] test_wait_backward
[07:29:13] [PASSED] test_wait_random
[07:29:13] =============== [PASSED] dma-buf-fence-chain ===============
[07:29:13] ============ dma-buf-fence-unwrap (11 subtests) ============
[07:29:13] [PASSED] test_sanitycheck
[07:29:13] [PASSED] test_unwrap_array
[07:29:13] [PASSED] test_unwrap_chain
[07:29:13] [PASSED] test_unwrap_chain_array
[07:29:13] [PASSED] test_unwrap_merge
[07:29:13] [PASSED] test_unwrap_merge_duplicate
[07:29:13] [PASSED] test_unwrap_merge_seqno
[07:29:13] [PASSED] test_unwrap_merge_order
[07:29:13] [PASSED] test_unwrap_merge_complex
[07:29:13] [PASSED] test_unwrap_merge_complex_seqno
[07:29:13] [PASSED] test_dedup_empty
[07:29:13] ============== [PASSED] dma-buf-fence-unwrap ===============
[07:29:13] ================ dma-buf-resv (5 subtests) =================
[07:29:13] [PASSED] test_sanitycheck
[07:29:13] ===================== test_signaling  ======================
[07:29:13] [PASSED] kernel
[07:29:13] [PASSED] write
[07:29:13] [PASSED] read
[07:29:13] [PASSED] bookkeep
[07:29:13] ================= [PASSED] test_signaling ==================
[07:29:13] ====================== test_for_each  ======================
[07:29:13] [PASSED] kernel
[07:29:13] [PASSED] write
[07:29:13] [PASSED] read
[07:29:13] [PASSED] bookkeep
[07:29:13] ================== [PASSED] test_for_each ==================
[07:29:13] ================= test_for_each_unlocked  ==================
[07:29:13] [PASSED] kernel
[07:29:13] [PASSED] write
[07:29:13] [PASSED] read
[07:29:13] [PASSED] bookkeep
[07:29:13] ============= [PASSED] test_for_each_unlocked ==============
[07:29:13] ===================== test_get_fences  =====================
[07:29:13] [PASSED] kernel
[07:29:13] [PASSED] write
[07:29:13] [PASSED] read
[07:29:13] [PASSED] bookkeep
[07:29:13] ================= [PASSED] test_get_fences =================
[07:29:13] ================== [PASSED] dma-buf-resv ===================
[07:29:13] ============================================================
[07:29:13] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[07:29:13] Elapsed time: 16.667s total, 2.482s configuring, 8.814s building, 5.360s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 32+ messages in thread

* ✓ Xe.CI.BAT: success for Handle non-fatal errors routed via IRQ (rev4)
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
                   ` (9 preceding siblings ...)
  2026-11-06  7:29 ` ✓ CI.KUnit: success " Patchwork
@ 2026-11-06  8:13 ` Patchwork
  2026-11-07  7:38 ` ✗ Xe.CI.FULL: failure " Patchwork
  11 siblings, 0 replies; 32+ messages in thread
From: Patchwork @ 2026-11-06  8:13 UTC (permalink / raw)
  To: Riana Tauro; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 868 bytes --]

== Series Details ==

Series: Handle non-fatal errors routed via IRQ (rev4)
URL   : https://patchwork.freedesktop.org/series/173001/
State : success

== Summary ==

CI Bug Log - changes from xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1_BAT -> xe-pw-173001v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1 -> xe-pw-173001v4

  IGT_9180: 9180
  xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1: 0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1
  xe-pw-173001v4: 173001v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/index.html

[-- Attachment #2: Type: text/html, Size: 1416 bytes --]

^ permalink raw reply	[flat|nested] 32+ messages in thread

* ✗ Xe.CI.FULL: failure for Handle non-fatal errors routed via IRQ (rev4)
  2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
                   ` (10 preceding siblings ...)
  2026-11-06  8:13 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-11-07  7:38 ` Patchwork
  11 siblings, 0 replies; 32+ messages in thread
From: Patchwork @ 2026-11-07  7:38 UTC (permalink / raw)
  To: Tauro, Riana; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 48366 bytes --]

== Series Details ==

Series: Handle non-fatal errors routed via IRQ (rev4)
URL   : https://patchwork.freedesktop.org/series/173001/
State : failure

== Summary ==

CI Bug Log - changes from xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1_FULL -> xe-pw-173001v4_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-173001v4_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-173001v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-173001v4_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_flip@flip-vs-suspend:
    - shard-ptl:          [PASS][1] -> [DMESG-WARN][2] +1 other test dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-ptl-3/igt@kms_flip@flip-vs-suspend.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-5/igt@kms_flip@flip-vs-suspend.html

  
Known issues
------------

  Here are the changes found in xe-pw-173001v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-ptl:          NOTRUN -> [SKIP][3] ([Intel XE#3157])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-bmg:          [PASS][4] -> [FAIL][5] ([Intel XE#3718] / [Intel XE#6078])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2:
    - shard-bmg:          [PASS][6] -> [FAIL][7] ([Intel XE#6078])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#1407]) +1 other test skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#1124]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-target-1920x1080p:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#7679])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_bw@connected-linear-tiling-2-displays-target-1920x1080p.html

  * igt@kms_bw@linear-tiling-1-displays-target-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#367])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@kms_bw@linear-tiling-1-displays-target-2560x1440p.html

  * igt@kms_bw@linear-tiling-2-displays-target-3840x2160p:
    - shard-ptl:          NOTRUN -> [SKIP][12] ([Intel XE#367])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_bw@linear-tiling-2-displays-target-3840x2160p.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#2887]) +2 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-d-dp-1:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2652]) +3 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-7/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-d-dp-1.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs:
    - shard-ptl:          NOTRUN -> [SKIP][15] ([Intel XE#5822])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2887])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#3432])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-lnl:          NOTRUN -> [SKIP][18] ([Intel XE#306] / [Intel XE#7358])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-post-ctm3x4:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#7358])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_chamelium_color_pipeline@plane-lut1d-post-ctm3x4.html

  * igt@kms_chamelium_frames@hdmi-crc-multiple:
    - shard-ptl:          NOTRUN -> [SKIP][20] ([Intel XE#2252])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_chamelium_frames@hdmi-crc-multiple.html

  * igt@kms_chamelium_hpd@dp-hpd-after-hibernate:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#373])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html

  * igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-4:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#6969]) +5 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-4.html

  * igt@kms_content_protection@atomic-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][23] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-10/igt@kms_content_protection@atomic-hdcp14@pipe-a-dp-2.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-lnl:          NOTRUN -> [SKIP][24] ([Intel XE#307] / [Intel XE#6974])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-ptl:          NOTRUN -> [SKIP][25] ([Intel XE#5832] / [Intel XE#6974])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#7642])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@suspend-resume@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][27] ([Intel XE#3304]) +2 other tests fail
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-7/igt@kms_content_protection@suspend-resume@pipe-a-dp-1.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-offscreen-64x21:
    - shard-ptl:          NOTRUN -> [SKIP][29] ([Intel XE#5900]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_cursor_crc@cursor-offscreen-64x21.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#309] / [Intel XE#7343])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-ptl:          NOTRUN -> [SKIP][31] ([Intel XE#5962])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#8265]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_flip@2x-absolute-wf_vblank-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#1421]) +2 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-bmg:          [PASS][34] -> [INCOMPLETE][35] ([Intel XE#8155]) +1 other test incomplete
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@modeset-vs-vblank-race-interruptible:
    - shard-bmg:          [PASS][36] -> [DMESG-FAIL][37] ([Intel XE#7774]) +1 other test dmesg-fail
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_flip@modeset-vs-vblank-race-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#7178] / [Intel XE#7349])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][39] ([Intel XE#6312] / [Intel XE#651]) +2 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2311]) +3 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-cur-indfb-onoff:
    - shard-ptl:          NOTRUN -> [SKIP][41] ([Intel XE#6312])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#4141]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt:
    - shard-ptl:          NOTRUN -> [SKIP][43] ([Intel XE#5812]) +11 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][44] ([Intel XE#7061] / [Intel XE#7356])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#7061] / [Intel XE#7356])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-linear:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#6312]) +4 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-linear.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2313]) +5 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#656] / [Intel XE#7905]) +9 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-indfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#7865]) +7 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@hdr-1p-primscrn-cur-indfb-move:
    - shard-ptl:          NOTRUN -> [SKIP][50] ([Intel XE#7865]) +2 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#7061])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#7061] / [Intel XE#7356])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-indfb-pgflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#7905]) +10 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_hdmi_inject@inject-4k:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#1470])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_hdmi_inject@inject-4k.html

  * igt@kms_hdr@static-toggle:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#1503])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_hdr@static-toggle.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#6900] / [Intel XE#7362])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping:
    - shard-ptl:          NOTRUN -> [SKIP][57] ([Intel XE#7283])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-b:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-b.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#2893] / [Intel XE#7304]) +1 other test skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-ptl:          NOTRUN -> [SKIP][60] ([Intel XE#7413])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@pr-sprite-plane-move:
    - shard-lnl:          NOTRUN -> [SKIP][61] ([Intel XE#1406]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@kms_psr@pr-sprite-plane-move.html

  * igt@xe_compute@eu-busy-10s:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#6599])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@xe_compute@eu-busy-10s.html

  * igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#6540] / [Intel XE#688]) +2 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd.html

  * igt@xe_exec_balancer@once-virtual-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#7482]) +4 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_exec_balancer@once-virtual-rebind.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
    - shard-lnl:          NOTRUN -> [SKIP][66] ([Intel XE#1392]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#8374]) +4 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#8374])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm.html

  * igt@xe_exec_fault_mode@many-multi-queue-prefetch:
    - shard-ptl:          NOTRUN -> [SKIP][69] ([Intel XE#8374])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@xe_exec_fault_mode@many-multi-queue-prefetch.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-dyn-priority:
    - shard-lnl:          NOTRUN -> [SKIP][70] ([Intel XE#8364]) +6 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_exec_multi_queue@one-queue-preempt-mode-dyn-priority.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-userptr:
    - shard-ptl:          NOTRUN -> [SKIP][71] ([Intel XE#8364])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-userptr.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-priority:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#8364]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@xe_exec_multi_queue@two-queues-preempt-mode-priority.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma:
    - shard-lnl:          NOTRUN -> [SKIP][73] ([Intel XE#6196])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-remap-ro-dontunmap:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#8589]) +32 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-remap-ro-dontunmap.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#8378]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html

  * igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#8378])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-invalidate.html

  * igt@xe_oa@oa-tlb-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#2248] / [Intel XE#7325] / [Intel XE#7393])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@xe_oa@oa-tlb-invalidate.html

  * igt@xe_pm@s4-vm-bind-unbind-all:
    - shard-ptl:          [PASS][78] -> [ABORT][79] ([Intel XE#9362]) +2 other tests abort
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-ptl-2/igt@xe_pm@s4-vm-bind-unbind-all.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-4/igt@xe_pm@s4-vm-bind-unbind-all.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
    - shard-ptl:          [PASS][80] -> [DMESG-WARN][81] ([Intel XE#9391])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-ptl-5/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-2/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-ptl:          NOTRUN -> [SKIP][82] ([Intel XE#6019])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@xe_query@multigpu-query-pxp-status.html

  * igt@xe_sriov_scheduling@equal-throughput-low-priority:
    - shard-lnl:          NOTRUN -> [SKIP][83] ([Intel XE#8339])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_sriov_scheduling@equal-throughput-low-priority.html

  * igt@xe_survivability@runtime-survivability:
    - shard-bmg:          [PASS][84] -> [DMESG-WARN][85] ([Intel XE#9365])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-9/igt@xe_survivability@runtime-survivability.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@xe_survivability@runtime-survivability.html

  * igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout:
    - shard-bmg:          [PASS][86] -> [SKIP][87] ([Intel XE#8589]) +75 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html

  
#### Possible fixes ####

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-ptl:          [FAIL][88] ([Intel XE#8628]) -> [PASS][89]
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-ptl-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_bw@linear-tiling-1-displays-target-2160x1440p:
    - shard-bmg:          [SKIP][90] ([Intel XE#367]) -> [PASS][91]
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-target-2160x1440p.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-target-2160x1440p.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-bmg:          [FAIL][92] ([Intel XE#7809]) -> [PASS][93]
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [FAIL][94] ([Intel XE#301]) -> [PASS][95] +1 other test pass
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-ptl:          [FAIL][96] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][97] +2 other tests pass
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-ptl-1/igt@kms_vrr@flip-basic-fastset.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1:
    - shard-ptl:          [FAIL][98] ([Intel XE#6293] / [Intel XE#7397]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-ptl-1/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html

  * igt@xe_pm@s4-exec-after:
    - shard-ptl:          [ABORT][100] ([Intel XE#9362]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-ptl-5/igt@xe_pm@s4-exec-after.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-ptl-3/igt@xe_pm@s4-exec-after.html

  * igt@xe_pm@s4-mocs:
    - shard-lnl:          [DMESG-WARN][102] ([Intel XE#9513]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-lnl-2/igt@xe_pm@s4-mocs.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_pm@s4-mocs.html

  * igt@xe_pm@s4-vm-bind-prefetch:
    - shard-bmg:          [ABORT][104] ([Intel XE#9399]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-9/igt@xe_pm@s4-vm-bind-prefetch.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-3/igt@xe_pm@s4-vm-bind-prefetch.html

  * igt@xe_pm@s4-vm-bind-unbind-all:
    - shard-lnl:          [ABORT][106] ([Intel XE#9362]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-lnl-2/igt@xe_pm@s4-vm-bind-unbind-all.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-lnl-6/igt@xe_pm@s4-vm-bind-unbind-all.html

  
#### Warnings ####

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-bmg:          [SKIP][108] ([Intel XE#1124]) -> [SKIP][109] ([Intel XE#8589])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-bmg:          [SKIP][110] ([Intel XE#2325] / [Intel XE#7358]) -> [SKIP][111] ([Intel XE#8589])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_chamelium_color@ctm-max.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim:
    - shard-bmg:          [SKIP][112] ([Intel XE#7358]) -> [SKIP][113] ([Intel XE#8589])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim.html

  * igt@kms_chamelium_frames@dp-crc-multiple:
    - shard-bmg:          [SKIP][114] ([Intel XE#2252]) -> [SKIP][115] ([Intel XE#8589])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_chamelium_frames@dp-crc-multiple.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_chamelium_frames@dp-crc-multiple.html

  * igt@kms_content_protection@atomic-dpms-hdcp14:
    - shard-bmg:          [FAIL][116] ([Intel XE#3304] / [Intel XE#7374]) -> [SKIP][117] ([Intel XE#8589])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_content_protection@atomic-dpms-hdcp14.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_content_protection@atomic-dpms-hdcp14.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-bmg:          [SKIP][118] ([Intel XE#2320]) -> [SKIP][119] ([Intel XE#8589]) +1 other test skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-bmg:          [SKIP][120] ([Intel XE#9535]) -> [SKIP][121] ([Intel XE#8589])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_dp_link_training@uhbr-sst.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-bmg:          [SKIP][122] ([Intel XE#2375]) -> [SKIP][123] ([Intel XE#8589])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_feature_discovery@dp-mst.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff:
    - shard-bmg:          [SKIP][124] ([Intel XE#4141]) -> [SKIP][125] ([Intel XE#8589])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-pri-indfb-draw-blt:
    - shard-bmg:          [SKIP][126] ([Intel XE#2311]) -> [SKIP][127] ([Intel XE#8589]) +6 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-pri-indfb-draw-blt.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][128] ([Intel XE#2313]) -> [SKIP][129] ([Intel XE#8589]) +8 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][130] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][131] ([Intel XE#3544])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          [SKIP][132] ([Intel XE#5020] / [Intel XE#7348]) -> [SKIP][133] ([Intel XE#8589])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_plane_multiple@tiling-y.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          [SKIP][134] ([Intel XE#1489]) -> [SKIP][135] ([Intel XE#8589])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@pr-primary-render:
    - shard-bmg:          [SKIP][136] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][137] ([Intel XE#8589])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@kms_psr@pr-primary-render.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@kms_psr@pr-primary-render.html

  * igt@sriov_basic@pf-unbind-with-vf-probed:
    - shard-bmg:          [ABORT][138] ([Intel XE#8868]) -> [SKIP][139] ([Intel XE#8589])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@sriov_basic@pf-unbind-with-vf-probed.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@sriov_basic@pf-unbind-with-vf-probed.html

  * igt@xe_exec_basic@multigpu-no-exec-null:
    - shard-bmg:          [SKIP][140] ([Intel XE#2322] / [Intel XE#7372]) -> [SKIP][141] ([Intel XE#8589])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_exec_basic@multigpu-no-exec-null.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_exec_basic@multigpu-no-exec-null.html

  * igt@xe_exec_fault_mode@twice-multi-queue-imm:
    - shard-bmg:          [SKIP][142] ([Intel XE#8374]) -> [SKIP][143] ([Intel XE#8589]) +1 other test skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_exec_fault_mode@twice-multi-queue-imm.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_exec_fault_mode@twice-multi-queue-imm.html

  * igt@xe_exec_multi_queue@many-queues-close-fd-smem:
    - shard-bmg:          [SKIP][144] ([Intel XE#8364]) -> [SKIP][145] ([Intel XE#8589]) +1 other test skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_exec_multi_queue@many-queues-close-fd-smem.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_exec_multi_queue@many-queues-close-fd-smem.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-invalidate-race:
    - shard-bmg:          [SKIP][146] ([Intel XE#8378]) -> [SKIP][147] ([Intel XE#8589])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-invalidate-race.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr-invalidate-race.html

  * igt@xe_page_reclaim@pat-index-xd:
    - shard-bmg:          [SKIP][148] ([Intel XE#7793]) -> [SKIP][149] ([Intel XE#8589])
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_page_reclaim@pat-index-xd.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_page_reclaim@pat-index-xd.html

  * igt@xe_pm@d3cold-mmap-vram:
    - shard-bmg:          [SKIP][150] ([Intel XE#2284] / [Intel XE#7370]) -> [SKIP][151] ([Intel XE#8589])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_pm@d3cold-mmap-vram.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_pm@d3cold-mmap-vram.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-bmg:          [SKIP][152] ([Intel XE#579] / [Intel XE#7329] / [Intel XE#7517]) -> [SKIP][153] ([Intel XE#8589])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_pm@vram-d3cold-threshold.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_pm_residency@gt-c6-freeze:
    - shard-bmg:          [FAIL][154] ([Intel XE#9254]) -> [SKIP][155] ([Intel XE#8589])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_pm_residency@gt-c6-freeze.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_pm_residency@gt-c6-freeze.html

  * igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy:
    - shard-bmg:          [SKIP][156] ([Intel XE#4733] / [Intel XE#7417]) -> [SKIP][157] ([Intel XE#8589])
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html

  * igt@xe_query@multigpu-query-invalid-size:
    - shard-bmg:          [SKIP][158] ([Intel XE#944]) -> [SKIP][159] ([Intel XE#8589])
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1/shard-bmg-10/igt@xe_query@multigpu-query-invalid-size.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/shard-bmg-5/igt@xe_query@multigpu-query-invalid-size.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3157]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3157
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5832]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5832
  [Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
  [Intel XE#5962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5962
  [Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
  [Intel XE#6293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6293
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6900
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7325
  [Intel XE#7329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7329
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7362
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7393
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7517]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7517
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7774
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#8155]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8155
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8339
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8589]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8589
  [Intel XE#8628]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8628
  [Intel XE#8868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8868
  [Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
  [Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
  [Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
  [Intel XE#9391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9391
  [Intel XE#9399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9399
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#9513]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9513
  [Intel XE#9535]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9535


Build changes
-------------

  * Linux: xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1 -> xe-pw-173001v4

  IGT_9180: 9180
  xe-6077-0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1: 0ab021ad358e391fc2f0b2f0d37d10cf3b8cf1e1
  xe-pw-173001v4: 173001v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-173001v4/index.html

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile
  2026-11-06  7:19 ` [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
@ 2026-11-10  5:48   ` Mallesh, Koujalagi
  2026-11-10 12:40   ` Raag Jadav
  1 sibling, 0 replies; 32+ messages in thread
From: Mallesh, Koujalagi @ 2026-11-10  5:48 UTC (permalink / raw)
  To: Riana Tauro, intel-xe
  Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
	badal.nilawar


On 06-11-2026 12:49 pm, Riana Tauro wrote:
> From: Raag Jadav <raag.jadav@intel.com>
>
> Since hw_error_work is now being reused generically, initialize it per tile
> so that we don't hit uninitialized work for non-root tile. While at it,
> disable hw_error_work on fini to prevent UAF during unwind.
>
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
LGTM,
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v2: add dgfx and sriov check (Sashiko)
>
> v3: retain original patch and fix unload issue in later patches
> ---
>   drivers/gpu/drm/xe/xe_hw_error.c | 20 ++++++++++++++++++--
>   1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index a934b649575c..f7031b341ce0 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -537,6 +537,19 @@ static void process_hw_errors(struct xe_device *xe)
>   	}
>   }
>   
> +static void hw_error_fini(void *arg)
> +{
> +	struct xe_device *xe = arg;
> +	struct xe_tile *tile;
> +	u8 id;
> +
> +	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
> +		return;
> +
> +	for_each_tile(tile, xe, id)
> +		disable_work_sync(&tile->hw_error_work);
> +}
> +
>   /**
>    * xe_hw_error_init - Initialize hw errors
>    * @xe: xe device instance
> @@ -546,12 +559,15 @@ static void process_hw_errors(struct xe_device *xe)
>    */
>   void xe_hw_error_init(struct xe_device *xe)
>   {
> -	struct xe_tile *tile = xe_device_get_root_tile(xe);
> +	struct xe_tile *tile;
> +	u8 id;
>   
>   	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
>   		return;
>   
> -	INIT_WORK(&tile->hw_error_work, hw_error_work);
> +	for_each_tile(tile, xe, id)
> +		INIT_WORK(&tile->hw_error_work, hw_error_work);
>   
>   	process_hw_errors(xe);
> +	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
>   }

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind
  2026-11-06  7:19 ` [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind Riana Tauro
@ 2026-11-10  6:19   ` Mallesh, Koujalagi
  2026-11-10 12:51   ` Raag Jadav
  1 sibling, 0 replies; 32+ messages in thread
From: Mallesh, Koujalagi @ 2026-11-10  6:19 UTC (permalink / raw)
  To: Riana Tauro, intel-xe
  Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
	badal.nilawar

[-- Attachment #1: Type: text/plain, Size: 2397 bytes --]


On 06-11-2026 12:49 pm, Riana Tauro wrote:
> Runtime surivability mode creates sysfs and declares the device as
nit: Fix typo (survivability).
> wedged in a worker thread. This can race with unbind.
>
> During unbind, devres actions such as disabling the worker run as part of
> teardown. A runtime survivability enable that is still in flight or gets
> scheduled in that window can create the survivability sysfs entries while
> the device is being removed. This is incorrect, as runtime survivability mode
> must not be entered once during devres teardown.
>
> Use the DRM device enter/exit protection so that the enable path
> synchronizes with device unplug and returns early if the device is
> already being unbound.
>
> Signed-off-by: Riana Tauro<riana.tauro@intel.com>
LGTM,
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_survivability_mode.c | 10 ++++++++++
>   1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
> index d73cdad0b3a9..e8d618b47322 100644
> --- a/drivers/gpu/drm/xe/xe_survivability_mode.c
> +++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
> @@ -10,6 +10,8 @@
>   #include <linux/pci.h>
>   #include <linux/sysfs.h>
>   
> +#include <drm/drm_drv.h>
> +
>   #include "xe_configfs.h"
>   #include "xe_device.h"
>   #include "xe_heci_gsc.h"
> @@ -435,12 +437,18 @@ void xe_survivability_mode_runtime_enable(struct xe_device *xe)
>   {
>   	struct xe_survivability *survivability = &xe->survivability;
>   	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +	int idx;
> +
>   
>   	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform < XE_BATTLEMAGE) {
>   		xe_log_err(xe, SURVIVABILITY, -EOPNOTSUPP, "Runtime Mode not supported!\n");
>   		return;
>   	}
>   
> +	/* Synchronize with unbind, do not enter runtime survivability mode during unbind */
> +	if (!drm_dev_enter(&xe->drm, &idx))
> +		return;
> +
>   	populate_survivability_info(xe);
>   	create_survivability_sysfs(pdev);
>   
> @@ -452,6 +460,8 @@ void xe_survivability_mode_runtime_enable(struct xe_device *xe)
>   	xe_log_err(xe, SURVIVABILITY, 0, "Firmware flash required!\n");
>   	xe_info(xe, "Please refer to the userspace documentation for more details how to flash the firmware on %s!\n",
>   		xe->info.platform_name);
> +
> +	drm_dev_exit(idx);
>   }
>   
>   /**

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 7/8] drm/xe: Add support for wa_14028434957
  2026-11-06  7:19 ` [PATCH v4 7/8] drm/xe: Add support for wa_14028434957 Riana Tauro
@ 2026-11-10  6:41   ` Mallesh, Koujalagi
  2026-11-10 13:18   ` Raag Jadav
  1 sibling, 0 replies; 32+ messages in thread
From: Mallesh, Koujalagi @ 2026-11-10  6:41 UTC (permalink / raw)
  To: Riana Tauro, intel-xe
  Cc: anshuman.gupta, rodrigo.vivi, aravind.iddamsetty, raag.jadav,
	badal.nilawar, Andi Shyti


On 06-11-2026 12:49 pm, Riana Tauro wrote:
> Add support for wa_14028434957 on platform CRI.
>
> Non-fatal device errors are reported via a direct IRQ, while fatal
> device errors are downgraded to non-fatal uncorrectable internal
> errors and reported via AER.
>
> Add support to process and log non-fatal errors routed via the direct
> IRQ path. Most non-fatal errors require no reset, except double-bit
> ECC errors affecting a critical BO, for which the device is wedged
> with a bus reset as the recovery action.
>
> For uncorrectable internal errors reported via AER, request a
> secondary bus reset to recover. To avoid a race between the two
> paths, if non-fatal error processing is in progress when an
> uncorrectable internal error occurs, flush and disable the worker
> to prevent further processing, since a reset is
> imminent.
>
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
LGTM,
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v2: use platform instead of graphics version (Gustavo)
>      combine patches (Tejas, Mallesh)
>      remove 1sec delayed worker (Andi)
>
> v3: re-order disable hw error worker before wedged check (Sashiko)
> ---
>   drivers/gpu/drm/xe/xe_device_wa_oob.rules |  1 +
>   drivers/gpu/drm/xe/xe_hw_error.c          | 41 +++++++++++++++++++----
>   drivers/gpu/drm/xe/xe_hw_error.h          |  1 +
>   drivers/gpu/drm/xe/xe_pci_error.c         | 19 +++++++++--
>   drivers/gpu/drm/xe/xe_ras.c               | 21 ++++++++++--
>   5 files changed, 72 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> index 753b2a4a1006..300207596893 100644
> --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> @@ -7,3 +7,4 @@
>   14026746987	PLATFORM(CRESCENTISLAND)
>   14026779378	PLATFORM(CRESCENTISLAND)
>   14028586678	PLATFORM(CRESCENTISLAND)
> +14028434957	PLATFORM(CRESCENTISLAND)
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index f7031b341ce0..86b29f282837 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -5,6 +5,8 @@
>   
>   #include <linux/bitmap.h>
>   
> +#include <generated/xe_device_wa_oob.h>
> +
>   #include "regs/xe_gsc_regs.h"
>   #include "regs/xe_hw_error_regs.h"
>   #include "regs/xe_irq_regs.h"
> @@ -15,7 +17,11 @@
>   #include "xe_hw_error.h"
>   #include "xe_mmio.h"
>   #include "xe_pm.h"
> +#include "xe_ras.h"
>   #include "xe_survivability_mode.h"
> +#include "xe_wa.h"
> +#include "xe_wedge.h"
> +
>   
>   #define GT_HW_ERROR_MAX_ERR_BITS		16
>   #define HEC_UNCORR_FW_ERR_BITS			4
> @@ -171,7 +177,24 @@ static void hw_error_work(struct work_struct *work)
>   	struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
>   	struct xe_device *xe = tile_to_xe(tile);
>   
> +	/* Skip hw error processing if device is already wedged */
> +	if (xe_wedged(xe))
> +		return;
> +
>   	guard(xe_pm_runtime)(xe);
> +
> +	if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
> +		/*
> +		 * Skip handling if an uncorrectable internal error is reported as
> +		 * reset is imminent
> +		 */
> +		if (xe_ras_is_aer_internal_error(xe))
> +			return;
> +
> +		xe_ras_process_errors(xe);
> +		return;
> +	}
> +
>   	xe_survivability_mode_runtime_enable(xe);
>   }
>   
> @@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
>   		return;
>   
>   	/*
> -	 * Hardware errors are reported through System Controller on the platforms that
> -	 * support it, and never routed as direct IRQ to SGUnit. So we should never be
> -	 * here for those platforms.
> +	 * Non-fatal errors are routed as a direct IRQ on platforms that support
> +	 * system controller.
>   	 */
>   	if (xe->info.has_sysctrl) {
> -		drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
> +		drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
> +		schedule_work(&tile->hw_error_work);
>   		return;
>   	}
>   
> @@ -537,7 +560,13 @@ static void process_hw_errors(struct xe_device *xe)
>   	}
>   }
>   
> -static void hw_error_fini(void *arg)
> +/**
> + * xe_hw_error_work_disable - Disable hw error work
> + * @arg: xe device instance
> + *
> + * This function disables work for hardware error handling for all tiles.
> + */
> +void xe_hw_error_work_disable(void *arg)
>   {
>   	struct xe_device *xe = arg;
>   	struct xe_tile *tile;
> @@ -569,5 +598,5 @@ void xe_hw_error_init(struct xe_device *xe)
>   		INIT_WORK(&tile->hw_error_work, hw_error_work);
>   
>   	process_hw_errors(xe);
> -	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
> +	devm_add_action_or_reset(xe->drm.dev, xe_hw_error_work_disable, xe);
>   }
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
> index 5e3a11424108..c2c0bfa6d9f9 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.h
> +++ b/drivers/gpu/drm/xe/xe_hw_error.h
> @@ -12,4 +12,5 @@ struct xe_device;
>   
>   void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
>   void xe_hw_error_init(struct xe_device *xe);
> +void xe_hw_error_work_disable(void *arg);
>   #endif
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 472b85d0ccc3..67920751ecf1 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -5,8 +5,11 @@
>   
>   #include <linux/pci.h>
>   
> +#include <generated/xe_device_wa_oob.h>
> +
>   #include "xe_device.h"
>   #include "xe_gt.h"
> +#include "xe_hw_error.h"
>   #include "xe_log.h"
>   #include "xe_pci.h"
>   #include "xe_pcode.h"
> @@ -14,6 +17,7 @@
>   #include "xe_printk.h"
>   #include "xe_ras.h"
>   #include "xe_survivability_mode.h"
> +#include "xe_wa.h"
>   #include "xe_wedge.h"
>   
>   static void prepare_device_for_reset(struct pci_dev *pdev)
> @@ -87,12 +91,21 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
>   	if (state == pci_channel_io_perm_failure)
>   		return PCI_ERS_RESULT_DISCONNECT;
>   
> -	/* If the device is already wedged or in survivability mode, do not attempt recovery */
> -	if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
> +	/* If the device is already in survivability mode, do not attempt recovery */
> +	if (xe_survivability_mode_is_boot_enabled(xe))
>   		return PCI_ERS_RESULT_DISCONNECT;
>   
> -	if (is_aer_internal_error(pdev))
> +	/*
> +	 * If non-fatal error processing is in progress when uncorrectable internal error occurs,
> +	 * flush and disable the worker to prevent further processing, as a reset is imminent.
> +	 */
> +	if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
>   		xe_ras_set_aer_internal_error(xe);
> +		xe_hw_error_work_disable(xe);
> +	}
> +
> +	if (xe_wedged(xe))
> +		return PCI_ERS_RESULT_DISCONNECT;
>   
>   	switch (state) {
>   	case pci_channel_io_normal:
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 58a0b5fa676d..1809c3c893de 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -5,6 +5,8 @@
>   
>   #include <linux/bitfield.h>
>   
> +#include <generated/xe_device_wa_oob.h>
> +
>   #include "xe_assert.h"
>   #include "xe_bo.h"
>   #include "xe_configfs.h"
> @@ -23,6 +25,7 @@
>   #include "xe_sysctrl_mailbox.h"
>   #include "xe_sysctrl_mailbox_types.h"
>   #include "xe_ttm_vram_mgr.h"
> +#include "xe_wa.h"
>   #include "xe_wedge.h"
>   
>   /* Any non-null entry marks the page as offlined by firmware */
> @@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
>   			    DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
>   			    "Double-bit ECC error detected at sw address 0x%llx\n",
>   			    info->sw_address);
> -		if (ret)
> +		/*
> +		 * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
> +		 * Wedge the device with a bus reset for errors that require SBR to recover.
> +		 * TODO: Trigger SBR using pci_reset_bus
> +		 */
> +		if (ret) {
> +			xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
>   			return XE_RAS_RECOVERY_ACTION_RESET;
> +		}
>   		break;
>   	default:
>   		xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
> @@ -818,9 +828,16 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
>   		return XE_RAS_RECOVERY_ACTION_RECOVERED;
>   
>   	BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
> -	/* Default action */
> +	/* Default action for PCIe bus errors */
>   	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
>   
> +	/*
> +	 * Device fatal errors are downgraded to non-fatal and reported as an uncorrectable
> +	 * internal error. Set the default action to reset.
> +	 */
> +	if (XE_DEVICE_WA(xe, 14028434957) && xe_ras_is_aer_internal_error(xe))
> +		final_action = XE_RAS_RECOVERY_ACTION_RESET;
> +
>   	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
>   				  NULL, 0, &response, sizeof(response));
>   

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile
  2026-11-06  7:19 ` [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
  2026-11-10  5:48   ` Mallesh, Koujalagi
@ 2026-11-10 12:40   ` Raag Jadav
  2026-11-11  4:45     ` Tauro, Riana
  1 sibling, 1 reply; 32+ messages in thread
From: Raag Jadav @ 2026-11-10 12:40 UTC (permalink / raw)
  To: Riana Tauro
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar

On Fri, Nov 06, 2026 at 12:49:47PM +0530, Riana Tauro wrote:
> From: Raag Jadav <raag.jadav@intel.com>
> 
> Since hw_error_work is now being reused generically, initialize it per tile
> so that we don't hit uninitialized work for non-root tile. While at it,
> disable hw_error_work on fini to prevent UAF during unwind.
> 
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: add dgfx and sriov check (Sashiko)
> 
> v3: retain original patch and fix unload issue in later patches
> ---
>  drivers/gpu/drm/xe/xe_hw_error.c | 20 ++++++++++++++++++--
>  1 file changed, 18 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index a934b649575c..f7031b341ce0 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -537,6 +537,19 @@ static void process_hw_errors(struct xe_device *xe)
>  	}
>  }
>  
> +static void hw_error_fini(void *arg)
> +{
> +	struct xe_device *xe = arg;
> +	struct xe_tile *tile;
> +	u8 id;
> +
> +	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))

Why is this needed? fini is not even registered for these cases.
Not everything is a bug because AI says so :)

Raag

> +		return;
> +
> +	for_each_tile(tile, xe, id)
> +		disable_work_sync(&tile->hw_error_work);
> +}
> +
>  /**
>   * xe_hw_error_init - Initialize hw errors
>   * @xe: xe device instance
> @@ -546,12 +559,15 @@ static void process_hw_errors(struct xe_device *xe)
>   */
>  void xe_hw_error_init(struct xe_device *xe)
>  {
> -	struct xe_tile *tile = xe_device_get_root_tile(xe);
> +	struct xe_tile *tile;
> +	u8 id;
>  
>  	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
>  		return;
>  
> -	INIT_WORK(&tile->hw_error_work, hw_error_work);
> +	for_each_tile(tile, xe, id)
> +		INIT_WORK(&tile->hw_error_work, hw_error_work);
>  
>  	process_hw_errors(xe);
> +	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
>  }
> -- 
> 2.47.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind
  2026-11-06  7:19 ` [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind Riana Tauro
  2026-11-10  6:19   ` Mallesh, Koujalagi
@ 2026-11-10 12:51   ` Raag Jadav
  2026-11-11  4:43     ` Tauro, Riana
  1 sibling, 1 reply; 32+ messages in thread
From: Raag Jadav @ 2026-11-10 12:51 UTC (permalink / raw)
  To: Riana Tauro
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar

On Fri, Nov 06, 2026 at 12:49:48PM +0530, Riana Tauro wrote:
> Runtime surivability mode creates sysfs and declares the device as
> wedged in a worker thread. This can race with unbind.
> 
> During unbind, devres actions such as disabling the worker run as part of
> teardown. A runtime survivability enable that is still in flight or gets
> scheduled in that window can create the survivability sysfs entries while
> the device is being removed. This is incorrect, as runtime survivability mode 
> must not be entered once during devres teardown.
> 
> Use the DRM device enter/exit protection so that the enable path
> synchronizes with device unplug and returns early if the device is
> already being unbound.

I'm a bit lost here. Doesn't disable_work_sync() already guarantee this?

Raag

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 6/8] drm/xe/xe_ras: Add a flag for uncorrectable internal error
  2026-11-06  7:19 ` [PATCH v4 6/8] drm/xe/xe_ras: Add a flag for uncorrectable internal error Riana Tauro
@ 2026-11-10 13:07   ` Raag Jadav
  2026-11-11  4:47     ` Tauro, Riana
  0 siblings, 1 reply; 32+ messages in thread
From: Raag Jadav @ 2026-11-10 13:07 UTC (permalink / raw)
  To: Riana Tauro
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar

On Fri, Nov 06, 2026 at 12:49:51PM +0530, Riana Tauro wrote:
> Introduce a flag with get/set accessors to record when an
> uncorrectable internal error was reported via AER.
> 
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v2: add PCI_POSSIBLE_ERROR
>     fix kernel-doc
>     rename aer_path to internal error
> ---
>  drivers/gpu/drm/xe/xe_pci_error.c | 26 ++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ras.c       | 20 ++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ras.h       |  2 ++
>  drivers/gpu/drm/xe/xe_ras_types.h |  2 ++
>  4 files changed, 50 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 03a9f295d077..472b85d0ccc3 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -55,6 +55,29 @@ static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action
>  	}
>  }
>  
> +static bool is_aer_internal_error(struct pci_dev *pdev)
> +{
> +	struct pci_dev *usp;
> +	u16 aer_cap;
> +	u32 status;
> +
> +	usp = xe_pci_get_usp_dev(pdev);
> +	if (!usp)
> +		return false;
> +
> +	aer_cap = pci_find_ext_capability(usp, PCI_EXT_CAP_ID_ERR);
> +	if (!aer_cap) {
> +		dev_warn_once(&usp->dev, "AER capability unavailable\n");
> +		return false;
> +	}
> +
> +	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &status);

What clears this register? Does this guarantee atomicity with the writer?
Also, should you be doing this without native AER support?

Raag

> +	if (PCI_POSSIBLE_ERROR(status))
> +		return false;
> +
> +	return status & PCI_ERR_UNC_INTN;
> +}
> +
>  static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
>  {
>  	struct xe_device *xe = pdev_to_xe_device(pdev);
> @@ -68,6 +91,9 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
>  	if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
>  		return PCI_ERS_RESULT_DISCONNECT;
>  
> +	if (is_aer_internal_error(pdev))
> +		xe_ras_set_aer_internal_error(xe);
> +
>  	switch (state) {
>  	case pci_channel_io_normal:
>  		return PCI_ERS_RESULT_CAN_RECOVER;
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 3aea4969af13..58a0b5fa676d 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -1253,6 +1253,26 @@ u32 xe_ras_get_max_pages(struct xe_device *xe)
>  	return xe->ras.state.max_pages;
>  }
>  
> +/**
> + * xe_ras_is_aer_internal_error() - Check if an uncorrectable internal error was reported via AER
> + * @xe: xe device instance
> + *
> + * Return: true if an uncorrectable internal error was reported via AER, false otherwise.
> + */
> +bool xe_ras_is_aer_internal_error(struct xe_device *xe)
> +{
> +	return xe->ras.state.aer_internal_error;
> +}
> +
> +/**
> + * xe_ras_set_aer_internal_error() - Set if an uncorrectable internal error is reported via AER
> + * @xe: xe device instance
> + */
> +void xe_ras_set_aer_internal_error(struct xe_device *xe)
> +{
> +	xe->ras.state.aer_internal_error = true;
> +}
> +
>  /**
>   * xe_ras_init - Initialize Xe RAS
>   * @xe: xe device instance
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index c44fa172011f..f7b587ac84e3 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -25,5 +25,7 @@ bool xe_ras_get_disable_vram_page_offline(struct xe_device *xe);
>  u32 xe_ras_get_max_pages(struct xe_device *xe);
>  int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
>  				struct xe_ras_get_counter_response *response);
> +bool xe_ras_is_aer_internal_error(struct xe_device *xe);
> +void xe_ras_set_aer_internal_error(struct xe_device *xe);
>  
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
> index a86f9d2b8c92..0ff5803d495b 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -414,6 +414,8 @@ struct xe_ras_set_health_response {
>   * struct xe_ras_state - RAS device and firmware state
>   */
>  struct xe_ras_state {
> +	/** @aer_internal_error: true if an uncorrectable internal error was reported via AER */
> +	bool aer_internal_error;
>  	/** @disable_vram_page_offline: cached configfs policy, immutable after init */
>  	bool disable_vram_page_offline;
>  	/** @max_pages: Total number of pages that can be stored by firmware */
> -- 
> 2.47.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 7/8] drm/xe: Add support for wa_14028434957
  2026-11-06  7:19 ` [PATCH v4 7/8] drm/xe: Add support for wa_14028434957 Riana Tauro
  2026-11-10  6:41   ` Mallesh, Koujalagi
@ 2026-11-10 13:18   ` Raag Jadav
  2026-11-11  4:50     ` Tauro, Riana
  1 sibling, 1 reply; 32+ messages in thread
From: Raag Jadav @ 2026-11-10 13:18 UTC (permalink / raw)
  To: Riana Tauro
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar, Andi Shyti

On Fri, Nov 06, 2026 at 12:49:52PM +0530, Riana Tauro wrote:
> Add support for wa_14028434957 on platform CRI.
> 
> Non-fatal device errors are reported via a direct IRQ, while fatal
> device errors are downgraded to non-fatal uncorrectable internal
> errors and reported via AER.
> 
> Add support to process and log non-fatal errors routed via the direct
> IRQ path. Most non-fatal errors require no reset, except double-bit
> ECC errors affecting a critical BO, for which the device is wedged
> with a bus reset as the recovery action.
> 
> For uncorrectable internal errors reported via AER, request a
> secondary bus reset to recover. To avoid a race between the two
> paths, if non-fatal error processing is in progress when an
> uncorrectable internal error occurs, flush and disable the worker
> to prevent further processing, since a reset is
> imminent.
> 
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: use platform instead of graphics version (Gustavo)
>     combine patches (Tejas, Mallesh)
>     remove 1sec delayed worker (Andi)
> 
> v3: re-order disable hw error worker before wedged check (Sashiko)
> ---
>  drivers/gpu/drm/xe/xe_device_wa_oob.rules |  1 +
>  drivers/gpu/drm/xe/xe_hw_error.c          | 41 +++++++++++++++++++----
>  drivers/gpu/drm/xe/xe_hw_error.h          |  1 +
>  drivers/gpu/drm/xe/xe_pci_error.c         | 19 +++++++++--
>  drivers/gpu/drm/xe/xe_ras.c               | 21 ++++++++++--
>  5 files changed, 72 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> index 753b2a4a1006..300207596893 100644
> --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> @@ -7,3 +7,4 @@
>  14026746987	PLATFORM(CRESCENTISLAND)
>  14026779378	PLATFORM(CRESCENTISLAND)
>  14028586678	PLATFORM(CRESCENTISLAND)
> +14028434957	PLATFORM(CRESCENTISLAND)
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index f7031b341ce0..86b29f282837 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -5,6 +5,8 @@
>  
>  #include <linux/bitmap.h>
>  
> +#include <generated/xe_device_wa_oob.h>
> +
>  #include "regs/xe_gsc_regs.h"
>  #include "regs/xe_hw_error_regs.h"
>  #include "regs/xe_irq_regs.h"
> @@ -15,7 +17,11 @@
>  #include "xe_hw_error.h"
>  #include "xe_mmio.h"
>  #include "xe_pm.h"
> +#include "xe_ras.h"
>  #include "xe_survivability_mode.h"
> +#include "xe_wa.h"
> +#include "xe_wedge.h"
> +
>  
>  #define GT_HW_ERROR_MAX_ERR_BITS		16
>  #define HEC_UNCORR_FW_ERR_BITS			4
> @@ -171,7 +177,24 @@ static void hw_error_work(struct work_struct *work)
>  	struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
>  	struct xe_device *xe = tile_to_xe(tile);
>  
> +	/* Skip hw error processing if device is already wedged */
> +	if (xe_wedged(xe))

This is a weak check and actually doesn't achieve anything, i.e. the state
can change immediate after this check :)

> +		return;
> +
>  	guard(xe_pm_runtime)(xe);
> +
> +	if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
> +		/*
> +		 * Skip handling if an uncorrectable internal error is reported as
> +		 * reset is imminent
> +		 */
> +		if (xe_ras_is_aer_internal_error(xe))
> +			return;
> +
> +		xe_ras_process_errors(xe);
> +		return;
> +	}
> +
>  	xe_survivability_mode_runtime_enable(xe);
>  }
>  
> @@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
>  		return;
>  
>  	/*
> -	 * Hardware errors are reported through System Controller on the platforms that
> -	 * support it, and never routed as direct IRQ to SGUnit. So we should never be
> -	 * here for those platforms.
> +	 * Non-fatal errors are routed as a direct IRQ on platforms that support
> +	 * system controller.

How the turntables :D

I really hope (and I mean _really_) the required due diligence has been
done here before opening this can of worms.

Raag

>  	 */
>  	if (xe->info.has_sysctrl) {
> -		drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
> +		drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
> +		schedule_work(&tile->hw_error_work);
>  		return;
>  	}
>  
> @@ -537,7 +560,13 @@ static void process_hw_errors(struct xe_device *xe)
>  	}
>  }
>  
> -static void hw_error_fini(void *arg)
> +/**
> + * xe_hw_error_work_disable - Disable hw error work
> + * @arg: xe device instance
> + *
> + * This function disables work for hardware error handling for all tiles.
> + */
> +void xe_hw_error_work_disable(void *arg)
>  {
>  	struct xe_device *xe = arg;
>  	struct xe_tile *tile;
> @@ -569,5 +598,5 @@ void xe_hw_error_init(struct xe_device *xe)
>  		INIT_WORK(&tile->hw_error_work, hw_error_work);
>  
>  	process_hw_errors(xe);
> -	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
> +	devm_add_action_or_reset(xe->drm.dev, xe_hw_error_work_disable, xe);
>  }
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
> index 5e3a11424108..c2c0bfa6d9f9 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.h
> +++ b/drivers/gpu/drm/xe/xe_hw_error.h
> @@ -12,4 +12,5 @@ struct xe_device;
>  
>  void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
>  void xe_hw_error_init(struct xe_device *xe);
> +void xe_hw_error_work_disable(void *arg);
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 472b85d0ccc3..67920751ecf1 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -5,8 +5,11 @@
>  
>  #include <linux/pci.h>
>  
> +#include <generated/xe_device_wa_oob.h>
> +
>  #include "xe_device.h"
>  #include "xe_gt.h"
> +#include "xe_hw_error.h"
>  #include "xe_log.h"
>  #include "xe_pci.h"
>  #include "xe_pcode.h"
> @@ -14,6 +17,7 @@
>  #include "xe_printk.h"
>  #include "xe_ras.h"
>  #include "xe_survivability_mode.h"
> +#include "xe_wa.h"
>  #include "xe_wedge.h"
>  
>  static void prepare_device_for_reset(struct pci_dev *pdev)
> @@ -87,12 +91,21 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
>  	if (state == pci_channel_io_perm_failure)
>  		return PCI_ERS_RESULT_DISCONNECT;
>  
> -	/* If the device is already wedged or in survivability mode, do not attempt recovery */
> -	if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
> +	/* If the device is already in survivability mode, do not attempt recovery */
> +	if (xe_survivability_mode_is_boot_enabled(xe))
>  		return PCI_ERS_RESULT_DISCONNECT;
>  
> -	if (is_aer_internal_error(pdev))
> +	/*
> +	 * If non-fatal error processing is in progress when uncorrectable internal error occurs,
> +	 * flush and disable the worker to prevent further processing, as a reset is imminent.
> +	 */
> +	if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
>  		xe_ras_set_aer_internal_error(xe);
> +		xe_hw_error_work_disable(xe);
> +	}
> +
> +	if (xe_wedged(xe))
> +		return PCI_ERS_RESULT_DISCONNECT;
>  
>  	switch (state) {
>  	case pci_channel_io_normal:
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 58a0b5fa676d..1809c3c893de 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -5,6 +5,8 @@
>  
>  #include <linux/bitfield.h>
>  
> +#include <generated/xe_device_wa_oob.h>
> +
>  #include "xe_assert.h"
>  #include "xe_bo.h"
>  #include "xe_configfs.h"
> @@ -23,6 +25,7 @@
>  #include "xe_sysctrl_mailbox.h"
>  #include "xe_sysctrl_mailbox_types.h"
>  #include "xe_ttm_vram_mgr.h"
> +#include "xe_wa.h"
>  #include "xe_wedge.h"
>  
>  /* Any non-null entry marks the page as offlined by firmware */
> @@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
>  			    DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
>  			    "Double-bit ECC error detected at sw address 0x%llx\n",
>  			    info->sw_address);
> -		if (ret)
> +		/*
> +		 * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
> +		 * Wedge the device with a bus reset for errors that require SBR to recover.
> +		 * TODO: Trigger SBR using pci_reset_bus
> +		 */
> +		if (ret) {
> +			xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
>  			return XE_RAS_RECOVERY_ACTION_RESET;
> +		}
>  		break;
>  	default:
>  		xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
> @@ -818,9 +828,16 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
>  		return XE_RAS_RECOVERY_ACTION_RECOVERED;
>  
>  	BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
> -	/* Default action */
> +	/* Default action for PCIe bus errors */
>  	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
>  
> +	/*
> +	 * Device fatal errors are downgraded to non-fatal and reported as an uncorrectable
> +	 * internal error. Set the default action to reset.
> +	 */
> +	if (XE_DEVICE_WA(xe, 14028434957) && xe_ras_is_aer_internal_error(xe))
> +		final_action = XE_RAS_RECOVERY_ACTION_RESET;
> +
>  	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
>  				  NULL, 0, &response, sizeof(response));
>  
> -- 
> 2.47.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind
  2026-11-10 12:51   ` Raag Jadav
@ 2026-11-11  4:43     ` Tauro, Riana
  2026-11-11  5:39       ` Raag Jadav
  0 siblings, 1 reply; 32+ messages in thread
From: Tauro, Riana @ 2026-11-11  4:43 UTC (permalink / raw)
  To: Raag Jadav
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar


On 10-11-2026 18:21, Raag Jadav wrote:
> On Fri, Nov 06, 2026 at 12:49:48PM +0530, Riana Tauro wrote:
>> Runtime surivability mode creates sysfs and declares the device as
>> wedged in a worker thread. This can race with unbind.
>>
>> During unbind, devres actions such as disabling the worker run as part of
>> teardown. A runtime survivability enable that is still in flight or gets
>> scheduled in that window can create the survivability sysfs entries while
>> the device is being removed. This is incorrect, as runtime survivability mode
>> must not be entered once during devres teardown.
>>
>> Use the DRM device enter/exit protection so that the enable path
>> synchronizes with device unplug and returns early if the device is
>> already being unbound.
> I'm a bit lost here. Doesn't disable_work_sync() already guarantee this?

If the worker is already queued and there is a unbind in progress. The 
disable work sync from devm
action waits for the worker to complete. This causes the device to enter 
survivability mode during unbind
which is not intended.

Riana

>
> Raag

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile
  2026-11-10 12:40   ` Raag Jadav
@ 2026-11-11  4:45     ` Tauro, Riana
  2026-11-11  5:40       ` Raag Jadav
  0 siblings, 1 reply; 32+ messages in thread
From: Tauro, Riana @ 2026-11-11  4:45 UTC (permalink / raw)
  To: Raag Jadav
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar


On 10-11-2026 18:10, Raag Jadav wrote:
> On Fri, Nov 06, 2026 at 12:49:47PM +0530, Riana Tauro wrote:
>> From: Raag Jadav <raag.jadav@intel.com>
>>
>> Since hw_error_work is now being reused generically, initialize it per tile
>> so that we don't hit uninitialized work for non-root tile. While at it,
>> disable hw_error_work on fini to prevent UAF during unwind.
>>
>> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
>> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> v2: add dgfx and sriov check (Sashiko)
>>
>> v3: retain original patch and fix unload issue in later patches
>> ---
>>   drivers/gpu/drm/xe/xe_hw_error.c | 20 ++++++++++++++++++--
>>   1 file changed, 18 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
>> index a934b649575c..f7031b341ce0 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_error.c
>> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
>> @@ -537,6 +537,19 @@ static void process_hw_errors(struct xe_device *xe)
>>   	}
>>   }
>>   
>> +static void hw_error_fini(void *arg)
>> +{
>> +	struct xe_device *xe = arg;
>> +	struct xe_tile *tile;
>> +	u8 id;
>> +
>> +	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
> Why is this needed? fini is not even registered for these cases.
> Not everything is a bug because AI says so :)

This is added so that it can be re-used in error_detected in patch [7/8]

Riana

>
> Raag
>
>> +		return;
>> +
>> +	for_each_tile(tile, xe, id)
>> +		disable_work_sync(&tile->hw_error_work);
>> +}
>> +
>>   /**
>>    * xe_hw_error_init - Initialize hw errors
>>    * @xe: xe device instance
>> @@ -546,12 +559,15 @@ static void process_hw_errors(struct xe_device *xe)
>>    */
>>   void xe_hw_error_init(struct xe_device *xe)
>>   {
>> -	struct xe_tile *tile = xe_device_get_root_tile(xe);
>> +	struct xe_tile *tile;
>> +	u8 id;
>>   
>>   	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
>>   		return;
>>   
>> -	INIT_WORK(&tile->hw_error_work, hw_error_work);
>> +	for_each_tile(tile, xe, id)
>> +		INIT_WORK(&tile->hw_error_work, hw_error_work);
>>   
>>   	process_hw_errors(xe);
>> +	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
>>   }
>> -- 
>> 2.47.1
>>

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 6/8] drm/xe/xe_ras: Add a flag for uncorrectable internal error
  2026-11-10 13:07   ` Raag Jadav
@ 2026-11-11  4:47     ` Tauro, Riana
  0 siblings, 0 replies; 32+ messages in thread
From: Tauro, Riana @ 2026-11-11  4:47 UTC (permalink / raw)
  To: Raag Jadav
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar


On 10-11-2026 18:37, Raag Jadav wrote:
> On Fri, Nov 06, 2026 at 12:49:51PM +0530, Riana Tauro wrote:
>> Introduce a flag with get/set accessors to record when an
>> uncorrectable internal error was reported via AER.
>>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
>> ---
>> v2: add PCI_POSSIBLE_ERROR
>>      fix kernel-doc
>>      rename aer_path to internal error
>> ---
>>   drivers/gpu/drm/xe/xe_pci_error.c | 26 ++++++++++++++++++++++++++
>>   drivers/gpu/drm/xe/xe_ras.c       | 20 ++++++++++++++++++++
>>   drivers/gpu/drm/xe/xe_ras.h       |  2 ++
>>   drivers/gpu/drm/xe/xe_ras_types.h |  2 ++
>>   4 files changed, 50 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
>> index 03a9f295d077..472b85d0ccc3 100644
>> --- a/drivers/gpu/drm/xe/xe_pci_error.c
>> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
>> @@ -55,6 +55,29 @@ static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action
>>   	}
>>   }
>>   
>> +static bool is_aer_internal_error(struct pci_dev *pdev)
>> +{
>> +	struct pci_dev *usp;
>> +	u16 aer_cap;
>> +	u32 status;
>> +
>> +	usp = xe_pci_get_usp_dev(pdev);
>> +	if (!usp)
>> +		return false;
>> +
>> +	aer_cap = pci_find_ext_capability(usp, PCI_EXT_CAP_ID_ERR);
>> +	if (!aer_cap) {
>> +		dev_warn_once(&usp->dev, "AER capability unavailable\n");
>> +		return false;
>> +	}
>> +
>> +	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &status);
> What clears this register? Does this guarantee atomicity with the writer?

We are not setting any register. This is a read so we don't need native 
AER support.
This is cleared by PCI core once recovery is complete

Riana

> Also, should you be doing this without native AER support?
>
> Raag
>
>> +	if (PCI_POSSIBLE_ERROR(status))
>> +		return false;
>> +
>> +	return status & PCI_ERR_UNC_INTN;
>> +}
>> +
>>   static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
>>   {
>>   	struct xe_device *xe = pdev_to_xe_device(pdev);
>> @@ -68,6 +91,9 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
>>   	if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
>>   		return PCI_ERS_RESULT_DISCONNECT;
>>   
>> +	if (is_aer_internal_error(pdev))
>> +		xe_ras_set_aer_internal_error(xe);
>> +
>>   	switch (state) {
>>   	case pci_channel_io_normal:
>>   		return PCI_ERS_RESULT_CAN_RECOVER;
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 3aea4969af13..58a0b5fa676d 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
>> @@ -1253,6 +1253,26 @@ u32 xe_ras_get_max_pages(struct xe_device *xe)
>>   	return xe->ras.state.max_pages;
>>   }
>>   
>> +/**
>> + * xe_ras_is_aer_internal_error() - Check if an uncorrectable internal error was reported via AER
>> + * @xe: xe device instance
>> + *
>> + * Return: true if an uncorrectable internal error was reported via AER, false otherwise.
>> + */
>> +bool xe_ras_is_aer_internal_error(struct xe_device *xe)
>> +{
>> +	return xe->ras.state.aer_internal_error;
>> +}
>> +
>> +/**
>> + * xe_ras_set_aer_internal_error() - Set if an uncorrectable internal error is reported via AER
>> + * @xe: xe device instance
>> + */
>> +void xe_ras_set_aer_internal_error(struct xe_device *xe)
>> +{
>> +	xe->ras.state.aer_internal_error = true;
>> +}
>> +
>>   /**
>>    * xe_ras_init - Initialize Xe RAS
>>    * @xe: xe device instance
>> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
>> index c44fa172011f..f7b587ac84e3 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.h
>> +++ b/drivers/gpu/drm/xe/xe_ras.h
>> @@ -25,5 +25,7 @@ bool xe_ras_get_disable_vram_page_offline(struct xe_device *xe);
>>   u32 xe_ras_get_max_pages(struct xe_device *xe);
>>   int xe_ras_get_counter_response(struct xe_device *xe, const struct xe_ras_error_class *counter,
>>   				struct xe_ras_get_counter_response *response);
>> +bool xe_ras_is_aer_internal_error(struct xe_device *xe);
>> +void xe_ras_set_aer_internal_error(struct xe_device *xe);
>>   
>>   #endif
>> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
>> index a86f9d2b8c92..0ff5803d495b 100644
>> --- a/drivers/gpu/drm/xe/xe_ras_types.h
>> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
>> @@ -414,6 +414,8 @@ struct xe_ras_set_health_response {
>>    * struct xe_ras_state - RAS device and firmware state
>>    */
>>   struct xe_ras_state {
>> +	/** @aer_internal_error: true if an uncorrectable internal error was reported via AER */
>> +	bool aer_internal_error;
>>   	/** @disable_vram_page_offline: cached configfs policy, immutable after init */
>>   	bool disable_vram_page_offline;
>>   	/** @max_pages: Total number of pages that can be stored by firmware */
>> -- 
>> 2.47.1
>>

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 7/8] drm/xe: Add support for wa_14028434957
  2026-11-10 13:18   ` Raag Jadav
@ 2026-11-11  4:50     ` Tauro, Riana
  2026-11-11  6:15       ` Raag Jadav
  0 siblings, 1 reply; 32+ messages in thread
From: Tauro, Riana @ 2026-11-11  4:50 UTC (permalink / raw)
  To: Raag Jadav
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar, Andi Shyti


On 10-11-2026 18:48, Raag Jadav wrote:
> On Fri, Nov 06, 2026 at 12:49:52PM +0530, Riana Tauro wrote:
>> Add support for wa_14028434957 on platform CRI.
>>
>> Non-fatal device errors are reported via a direct IRQ, while fatal
>> device errors are downgraded to non-fatal uncorrectable internal
>> errors and reported via AER.
>>
>> Add support to process and log non-fatal errors routed via the direct
>> IRQ path. Most non-fatal errors require no reset, except double-bit
>> ECC errors affecting a critical BO, for which the device is wedged
>> with a bus reset as the recovery action.
>>
>> For uncorrectable internal errors reported via AER, request a
>> secondary bus reset to recover. To avoid a race between the two
>> paths, if non-fatal error processing is in progress when an
>> uncorrectable internal error occurs, flush and disable the worker
>> to prevent further processing, since a reset is
>> imminent.
>>
>> Cc: Andi Shyti <andi.shyti@linux.intel.com>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>> v2: use platform instead of graphics version (Gustavo)
>>      combine patches (Tejas, Mallesh)
>>      remove 1sec delayed worker (Andi)
>>
>> v3: re-order disable hw error worker before wedged check (Sashiko)
>> ---
>>   drivers/gpu/drm/xe/xe_device_wa_oob.rules |  1 +
>>   drivers/gpu/drm/xe/xe_hw_error.c          | 41 +++++++++++++++++++----
>>   drivers/gpu/drm/xe/xe_hw_error.h          |  1 +
>>   drivers/gpu/drm/xe/xe_pci_error.c         | 19 +++++++++--
>>   drivers/gpu/drm/xe/xe_ras.c               | 21 ++++++++++--
>>   5 files changed, 72 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
>> index 753b2a4a1006..300207596893 100644
>> --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
>> +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
>> @@ -7,3 +7,4 @@
>>   14026746987	PLATFORM(CRESCENTISLAND)
>>   14026779378	PLATFORM(CRESCENTISLAND)
>>   14028586678	PLATFORM(CRESCENTISLAND)
>> +14028434957	PLATFORM(CRESCENTISLAND)
>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
>> index f7031b341ce0..86b29f282837 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_error.c
>> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
>> @@ -5,6 +5,8 @@
>>   
>>   #include <linux/bitmap.h>
>>   
>> +#include <generated/xe_device_wa_oob.h>
>> +
>>   #include "regs/xe_gsc_regs.h"
>>   #include "regs/xe_hw_error_regs.h"
>>   #include "regs/xe_irq_regs.h"
>> @@ -15,7 +17,11 @@
>>   #include "xe_hw_error.h"
>>   #include "xe_mmio.h"
>>   #include "xe_pm.h"
>> +#include "xe_ras.h"
>>   #include "xe_survivability_mode.h"
>> +#include "xe_wa.h"
>> +#include "xe_wedge.h"
>> +
>>   
>>   #define GT_HW_ERROR_MAX_ERR_BITS		16
>>   #define HEC_UNCORR_FW_ERR_BITS			4
>> @@ -171,7 +177,24 @@ static void hw_error_work(struct work_struct *work)
>>   	struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
>>   	struct xe_device *xe = tile_to_xe(tile);
>>   
>> +	/* Skip hw error processing if device is already wedged */
>> +	if (xe_wedged(xe))
> This is a weak check and actually doesn't achieve anything, i.e. the state
> can change immediate after this check :)

Helps if it is already wedged.

>
>> +		return;
>> +
>>   	guard(xe_pm_runtime)(xe);
>> +
>> +	if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
>> +		/*
>> +		 * Skip handling if an uncorrectable internal error is reported as
>> +		 * reset is imminent
>> +		 */
>> +		if (xe_ras_is_aer_internal_error(xe))
>> +			return;
>> +
>> +		xe_ras_process_errors(xe);
>> +		return;
>> +	}
>> +
>>   	xe_survivability_mode_runtime_enable(xe);
>>   }
>>   
>> @@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
>>   		return;
>>   
>>   	/*
>> -	 * Hardware errors are reported through System Controller on the platforms that
>> -	 * support it, and never routed as direct IRQ to SGUnit. So we should never be
>> -	 * here for those platforms.
>> +	 * Non-fatal errors are routed as a direct IRQ on platforms that support
>> +	 * system controller.
> How the turntables :D
>
> I really hope (and I mean _really_) the required due diligence has been
> done here before opening this can of worms.
>
> Raag

This is a hardware decision not from driver

Riana

>
>>   	 */
>>   	if (xe->info.has_sysctrl) {
>> -		drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
>> +		drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
>> +		schedule_work(&tile->hw_error_work);
>>   		return;
>>   	}
>>   
>> @@ -537,7 +560,13 @@ static void process_hw_errors(struct xe_device *xe)
>>   	}
>>   }
>>   
>> -static void hw_error_fini(void *arg)
>> +/**
>> + * xe_hw_error_work_disable - Disable hw error work
>> + * @arg: xe device instance
>> + *
>> + * This function disables work for hardware error handling for all tiles.
>> + */
>> +void xe_hw_error_work_disable(void *arg)
>>   {
>>   	struct xe_device *xe = arg;
>>   	struct xe_tile *tile;
>> @@ -569,5 +598,5 @@ void xe_hw_error_init(struct xe_device *xe)
>>   		INIT_WORK(&tile->hw_error_work, hw_error_work);
>>   
>>   	process_hw_errors(xe);
>> -	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
>> +	devm_add_action_or_reset(xe->drm.dev, xe_hw_error_work_disable, xe);
>>   }
>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
>> index 5e3a11424108..c2c0bfa6d9f9 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_error.h
>> +++ b/drivers/gpu/drm/xe/xe_hw_error.h
>> @@ -12,4 +12,5 @@ struct xe_device;
>>   
>>   void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
>>   void xe_hw_error_init(struct xe_device *xe);
>> +void xe_hw_error_work_disable(void *arg);
>>   #endif
>> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
>> index 472b85d0ccc3..67920751ecf1 100644
>> --- a/drivers/gpu/drm/xe/xe_pci_error.c
>> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
>> @@ -5,8 +5,11 @@
>>   
>>   #include <linux/pci.h>
>>   
>> +#include <generated/xe_device_wa_oob.h>
>> +
>>   #include "xe_device.h"
>>   #include "xe_gt.h"
>> +#include "xe_hw_error.h"
>>   #include "xe_log.h"
>>   #include "xe_pci.h"
>>   #include "xe_pcode.h"
>> @@ -14,6 +17,7 @@
>>   #include "xe_printk.h"
>>   #include "xe_ras.h"
>>   #include "xe_survivability_mode.h"
>> +#include "xe_wa.h"
>>   #include "xe_wedge.h"
>>   
>>   static void prepare_device_for_reset(struct pci_dev *pdev)
>> @@ -87,12 +91,21 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
>>   	if (state == pci_channel_io_perm_failure)
>>   		return PCI_ERS_RESULT_DISCONNECT;
>>   
>> -	/* If the device is already wedged or in survivability mode, do not attempt recovery */
>> -	if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
>> +	/* If the device is already in survivability mode, do not attempt recovery */
>> +	if (xe_survivability_mode_is_boot_enabled(xe))
>>   		return PCI_ERS_RESULT_DISCONNECT;
>>   
>> -	if (is_aer_internal_error(pdev))
>> +	/*
>> +	 * If non-fatal error processing is in progress when uncorrectable internal error occurs,
>> +	 * flush and disable the worker to prevent further processing, as a reset is imminent.
>> +	 */
>> +	if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
>>   		xe_ras_set_aer_internal_error(xe);
>> +		xe_hw_error_work_disable(xe);
>> +	}
>> +
>> +	if (xe_wedged(xe))
>> +		return PCI_ERS_RESULT_DISCONNECT;
>>   
>>   	switch (state) {
>>   	case pci_channel_io_normal:
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 58a0b5fa676d..1809c3c893de 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
>> @@ -5,6 +5,8 @@
>>   
>>   #include <linux/bitfield.h>
>>   
>> +#include <generated/xe_device_wa_oob.h>
>> +
>>   #include "xe_assert.h"
>>   #include "xe_bo.h"
>>   #include "xe_configfs.h"
>> @@ -23,6 +25,7 @@
>>   #include "xe_sysctrl_mailbox.h"
>>   #include "xe_sysctrl_mailbox_types.h"
>>   #include "xe_ttm_vram_mgr.h"
>> +#include "xe_wa.h"
>>   #include "xe_wedge.h"
>>   
>>   /* Any non-null entry marks the page as offlined by firmware */
>> @@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
>>   			    DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
>>   			    "Double-bit ECC error detected at sw address 0x%llx\n",
>>   			    info->sw_address);
>> -		if (ret)
>> +		/*
>> +		 * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
>> +		 * Wedge the device with a bus reset for errors that require SBR to recover.
>> +		 * TODO: Trigger SBR using pci_reset_bus
>> +		 */
>> +		if (ret) {
>> +			xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
>>   			return XE_RAS_RECOVERY_ACTION_RESET;
>> +		}
>>   		break;
>>   	default:
>>   		xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
>> @@ -818,9 +828,16 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
>>   		return XE_RAS_RECOVERY_ACTION_RECOVERED;
>>   
>>   	BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
>> -	/* Default action */
>> +	/* Default action for PCIe bus errors */
>>   	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
>>   
>> +	/*
>> +	 * Device fatal errors are downgraded to non-fatal and reported as an uncorrectable
>> +	 * internal error. Set the default action to reset.
>> +	 */
>> +	if (XE_DEVICE_WA(xe, 14028434957) && xe_ras_is_aer_internal_error(xe))
>> +		final_action = XE_RAS_RECOVERY_ACTION_RESET;
>> +
>>   	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
>>   				  NULL, 0, &response, sizeof(response));
>>   
>> -- 
>> 2.47.1
>>

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind
  2026-11-11  4:43     ` Tauro, Riana
@ 2026-11-11  5:39       ` Raag Jadav
  2026-11-11  5:50         ` Tauro, Riana
  0 siblings, 1 reply; 32+ messages in thread
From: Raag Jadav @ 2026-11-11  5:39 UTC (permalink / raw)
  To: Tauro, Riana
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar

On Wed, Nov 11, 2026 at 10:13:44AM +0530, Tauro, Riana wrote:
> On 10-11-2026 18:21, Raag Jadav wrote:
> > On Fri, Nov 06, 2026 at 12:49:48PM +0530, Riana Tauro wrote:
> > > Runtime surivability mode creates sysfs and declares the device as
> > > wedged in a worker thread. This can race with unbind.
> > > 
> > > During unbind, devres actions such as disabling the worker run as part of
> > > teardown. A runtime survivability enable that is still in flight or gets
> > > scheduled in that window can create the survivability sysfs entries while
> > > the device is being removed. This is incorrect, as runtime survivability mode
> > > must not be entered once during devres teardown.
> > > 
> > > Use the DRM device enter/exit protection so that the enable path
> > > synchronizes with device unplug and returns early if the device is
> > > already being unbound.
> > I'm a bit lost here. Doesn't disable_work_sync() already guarantee this?
> 
> If the worker is already queued and there is a unbind in progress. The
> disable work sync from devm
> action waits for the worker to complete. This causes the device to enter
> survivability mode during unbind
> which is not intended.

Wouldn't the survivability stuff still land on devres and get cleaned
up anyway?

Raag

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile
  2026-11-11  4:45     ` Tauro, Riana
@ 2026-11-11  5:40       ` Raag Jadav
  2026-11-11  5:51         ` Tauro, Riana
  0 siblings, 1 reply; 32+ messages in thread
From: Raag Jadav @ 2026-11-11  5:40 UTC (permalink / raw)
  To: Tauro, Riana
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar

On Wed, Nov 11, 2026 at 10:15:26AM +0530, Tauro, Riana wrote:
> On 10-11-2026 18:10, Raag Jadav wrote:
> > On Fri, Nov 06, 2026 at 12:49:47PM +0530, Riana Tauro wrote:
> > > From: Raag Jadav <raag.jadav@intel.com>
> > > 
> > > Since hw_error_work is now being reused generically, initialize it per tile
> > > so that we don't hit uninitialized work for non-root tile. While at it,
> > > disable hw_error_work on fini to prevent UAF during unwind.
> > > 
> > > Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> > > Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> > > Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> > > ---
> > > v2: add dgfx and sriov check (Sashiko)
> > > 
> > > v3: retain original patch and fix unload issue in later patches
> > > ---
> > >   drivers/gpu/drm/xe/xe_hw_error.c | 20 ++++++++++++++++++--
> > >   1 file changed, 18 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> > > index a934b649575c..f7031b341ce0 100644
> > > --- a/drivers/gpu/drm/xe/xe_hw_error.c
> > > +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> > > @@ -537,6 +537,19 @@ static void process_hw_errors(struct xe_device *xe)
> > >   	}
> > >   }
> > > +static void hw_error_fini(void *arg)
> > > +{
> > > +	struct xe_device *xe = arg;
> > > +	struct xe_tile *tile;
> > > +	u8 id;
> > > +
> > > +	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
> > Why is this needed? fini is not even registered for these cases.
> > Not everything is a bug because AI says so :)
> 
> This is added so that it can be re-used in error_detected in patch [7/8]

Which sounds like this should be introduced in the patch which reuses it.

Raag

> > > +		return;
> > > +
> > > +	for_each_tile(tile, xe, id)
> > > +		disable_work_sync(&tile->hw_error_work);
> > > +}
> > > +
> > >   /**
> > >    * xe_hw_error_init - Initialize hw errors
> > >    * @xe: xe device instance
> > > @@ -546,12 +559,15 @@ static void process_hw_errors(struct xe_device *xe)
> > >    */
> > >   void xe_hw_error_init(struct xe_device *xe)
> > >   {
> > > -	struct xe_tile *tile = xe_device_get_root_tile(xe);
> > > +	struct xe_tile *tile;
> > > +	u8 id;
> > >   	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
> > >   		return;
> > > -	INIT_WORK(&tile->hw_error_work, hw_error_work);
> > > +	for_each_tile(tile, xe, id)
> > > +		INIT_WORK(&tile->hw_error_work, hw_error_work);
> > >   	process_hw_errors(xe);
> > > +	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
> > >   }
> > > -- 
> > > 2.47.1
> > > 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind
  2026-11-11  5:39       ` Raag Jadav
@ 2026-11-11  5:50         ` Tauro, Riana
  2026-11-11  7:09           ` Raag Jadav
  0 siblings, 1 reply; 32+ messages in thread
From: Tauro, Riana @ 2026-11-11  5:50 UTC (permalink / raw)
  To: Raag Jadav
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar


On 11-11-2026 11:09, Raag Jadav wrote:
> On Wed, Nov 11, 2026 at 10:13:44AM +0530, Tauro, Riana wrote:
>> On 10-11-2026 18:21, Raag Jadav wrote:
>>> On Fri, Nov 06, 2026 at 12:49:48PM +0530, Riana Tauro wrote:
>>>> Runtime surivability mode creates sysfs and declares the device as
>>>> wedged in a worker thread. This can race with unbind.
>>>>
>>>> During unbind, devres actions such as disabling the worker run as part of
>>>> teardown. A runtime survivability enable that is still in flight or gets
>>>> scheduled in that window can create the survivability sysfs entries while
>>>> the device is being removed. This is incorrect, as runtime survivability mode
>>>> must not be entered once during devres teardown.
>>>>
>>>> Use the DRM device enter/exit protection so that the enable path
>>>> synchronizes with device unplug and returns early if the device is
>>>> already being unbound.
>>> I'm a bit lost here. Doesn't disable_work_sync() already guarantee this?
>> If the worker is already queued and there is a unbind in progress. The
>> disable work sync from devm
>> action waits for the worker to complete. This causes the device to enter
>> survivability mode during unbind
>> which is not intended.
> Wouldn't the survivability stuff still land on devres and get cleaned
> up anyway?

devres_release_all running as part of unbind copies all the devres nodes 
into a todo list and then
releases them. If during release, we add a new devres that will not be 
cleared during unbind
which can cause stale sysfs.

Riana

>
> Raag

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile
  2026-11-11  5:40       ` Raag Jadav
@ 2026-11-11  5:51         ` Tauro, Riana
  0 siblings, 0 replies; 32+ messages in thread
From: Tauro, Riana @ 2026-11-11  5:51 UTC (permalink / raw)
  To: Raag Jadav
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar


On 11-11-2026 11:10, Raag Jadav wrote:
> On Wed, Nov 11, 2026 at 10:15:26AM +0530, Tauro, Riana wrote:
>> On 10-11-2026 18:10, Raag Jadav wrote:
>>> On Fri, Nov 06, 2026 at 12:49:47PM +0530, Riana Tauro wrote:
>>>> From: Raag Jadav <raag.jadav@intel.com>
>>>>
>>>> Since hw_error_work is now being reused generically, initialize it per tile
>>>> so that we don't hit uninitialized work for non-root tile. While at it,
>>>> disable hw_error_work on fini to prevent UAF during unwind.
>>>>
>>>> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
>>>> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
>>>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>>>> ---
>>>> v2: add dgfx and sriov check (Sashiko)
>>>>
>>>> v3: retain original patch and fix unload issue in later patches
>>>> ---
>>>>    drivers/gpu/drm/xe/xe_hw_error.c | 20 ++++++++++++++++++--
>>>>    1 file changed, 18 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
>>>> index a934b649575c..f7031b341ce0 100644
>>>> --- a/drivers/gpu/drm/xe/xe_hw_error.c
>>>> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
>>>> @@ -537,6 +537,19 @@ static void process_hw_errors(struct xe_device *xe)
>>>>    	}
>>>>    }
>>>> +static void hw_error_fini(void *arg)
>>>> +{
>>>> +	struct xe_device *xe = arg;
>>>> +	struct xe_tile *tile;
>>>> +	u8 id;
>>>> +
>>>> +	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
>>> Why is this needed? fini is not even registered for these cases.
>>> Not everything is a bug because AI says so :)
>> This is added so that it can be re-used in error_detected in patch [7/8]
> Which sounds like this should be introduced in the patch which reuses it.

Thought was there is no harm adding it here as its just a extra check.
Sure will move it to Patch 7/8

Riana

>
> Raag
>
>>>> +		return;
>>>> +
>>>> +	for_each_tile(tile, xe, id)
>>>> +		disable_work_sync(&tile->hw_error_work);
>>>> +}
>>>> +
>>>>    /**
>>>>     * xe_hw_error_init - Initialize hw errors
>>>>     * @xe: xe device instance
>>>> @@ -546,12 +559,15 @@ static void process_hw_errors(struct xe_device *xe)
>>>>     */
>>>>    void xe_hw_error_init(struct xe_device *xe)
>>>>    {
>>>> -	struct xe_tile *tile = xe_device_get_root_tile(xe);
>>>> +	struct xe_tile *tile;
>>>> +	u8 id;
>>>>    	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
>>>>    		return;
>>>> -	INIT_WORK(&tile->hw_error_work, hw_error_work);
>>>> +	for_each_tile(tile, xe, id)
>>>> +		INIT_WORK(&tile->hw_error_work, hw_error_work);
>>>>    	process_hw_errors(xe);
>>>> +	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
>>>>    }
>>>> -- 
>>>> 2.47.1
>>>>

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 7/8] drm/xe: Add support for wa_14028434957
  2026-11-11  4:50     ` Tauro, Riana
@ 2026-11-11  6:15       ` Raag Jadav
  2026-11-11  6:22         ` Tauro, Riana
  0 siblings, 1 reply; 32+ messages in thread
From: Raag Jadav @ 2026-11-11  6:15 UTC (permalink / raw)
  To: Tauro, Riana
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar, Andi Shyti

On Wed, Nov 11, 2026 at 10:20:38AM +0530, Tauro, Riana wrote:
> On 10-11-2026 18:48, Raag Jadav wrote:
> > On Fri, Nov 06, 2026 at 12:49:52PM +0530, Riana Tauro wrote:
> > > Add support for wa_14028434957 on platform CRI.
> > > 
> > > Non-fatal device errors are reported via a direct IRQ, while fatal
> > > device errors are downgraded to non-fatal uncorrectable internal
> > > errors and reported via AER.
> > > 
> > > Add support to process and log non-fatal errors routed via the direct
> > > IRQ path. Most non-fatal errors require no reset, except double-bit
> > > ECC errors affecting a critical BO, for which the device is wedged
> > > with a bus reset as the recovery action.
> > > 
> > > For uncorrectable internal errors reported via AER, request a
> > > secondary bus reset to recover. To avoid a race between the two
> > > paths, if non-fatal error processing is in progress when an
> > > uncorrectable internal error occurs, flush and disable the worker
> > > to prevent further processing, since a reset is
> > > imminent.
> > > 
> > > Cc: Andi Shyti <andi.shyti@linux.intel.com>
> > > Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> > > ---
> > > v2: use platform instead of graphics version (Gustavo)
> > >      combine patches (Tejas, Mallesh)
> > >      remove 1sec delayed worker (Andi)
> > > 
> > > v3: re-order disable hw error worker before wedged check (Sashiko)
> > > ---
> > >   drivers/gpu/drm/xe/xe_device_wa_oob.rules |  1 +
> > >   drivers/gpu/drm/xe/xe_hw_error.c          | 41 +++++++++++++++++++----
> > >   drivers/gpu/drm/xe/xe_hw_error.h          |  1 +
> > >   drivers/gpu/drm/xe/xe_pci_error.c         | 19 +++++++++--
> > >   drivers/gpu/drm/xe/xe_ras.c               | 21 ++++++++++--
> > >   5 files changed, 72 insertions(+), 11 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> > > index 753b2a4a1006..300207596893 100644
> > > --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> > > +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> > > @@ -7,3 +7,4 @@
> > >   14026746987	PLATFORM(CRESCENTISLAND)
> > >   14026779378	PLATFORM(CRESCENTISLAND)
> > >   14028586678	PLATFORM(CRESCENTISLAND)
> > > +14028434957	PLATFORM(CRESCENTISLAND)
> > > diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> > > index f7031b341ce0..86b29f282837 100644
> > > --- a/drivers/gpu/drm/xe/xe_hw_error.c
> > > +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> > > @@ -5,6 +5,8 @@
> > >   #include <linux/bitmap.h>
> > > +#include <generated/xe_device_wa_oob.h>
> > > +
> > >   #include "regs/xe_gsc_regs.h"
> > >   #include "regs/xe_hw_error_regs.h"
> > >   #include "regs/xe_irq_regs.h"
> > > @@ -15,7 +17,11 @@
> > >   #include "xe_hw_error.h"
> > >   #include "xe_mmio.h"
> > >   #include "xe_pm.h"
> > > +#include "xe_ras.h"
> > >   #include "xe_survivability_mode.h"
> > > +#include "xe_wa.h"
> > > +#include "xe_wedge.h"
> > > +
> > >   #define GT_HW_ERROR_MAX_ERR_BITS		16
> > >   #define HEC_UNCORR_FW_ERR_BITS			4
> > > @@ -171,7 +177,24 @@ static void hw_error_work(struct work_struct *work)
> > >   	struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
> > >   	struct xe_device *xe = tile_to_xe(tile);
> > > +	/* Skip hw error processing if device is already wedged */
> > > +	if (xe_wedged(xe))
> > This is a weak check and actually doesn't achieve anything, i.e. the state
> > can change immediate after this check :)
> 
> Helps if it is already wedged.

Which is a problem for basically every single function in the driver ;)

I understand it's not the scope of this series but I hope it gets fixed
at some point.

> > > +		return;
> > > +
> > >   	guard(xe_pm_runtime)(xe);
> > > +
> > > +	if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
> > > +		/*
> > > +		 * Skip handling if an uncorrectable internal error is reported as
> > > +		 * reset is imminent
> > > +		 */
> > > +		if (xe_ras_is_aer_internal_error(xe))
> > > +			return;
> > > +
> > > +		xe_ras_process_errors(xe);
> > > +		return;
> > > +	}
> > > +
> > >   	xe_survivability_mode_runtime_enable(xe);
> > >   }
> > > @@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
> > >   		return;
> > >   	/*
> > > -	 * Hardware errors are reported through System Controller on the platforms that
> > > -	 * support it, and never routed as direct IRQ to SGUnit. So we should never be
> > > -	 * here for those platforms.
> > > +	 * Non-fatal errors are routed as a direct IRQ on platforms that support
> > > +	 * system controller.
> > How the turntables :D
> > 
> > I really hope (and I mean _really_) the required due diligence has been
> > done here before opening this can of worms.
> 
> This is a hardware decision not from driver

Documentation/process/submitting-patches.rst +458

"The Signed-off-by: tag indicates that the signer was involved in the
development of the patch, ..."

So you don't get a discount here ;)

Raag

> > >   	 */
> > >   	if (xe->info.has_sysctrl) {
> > > -		drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
> > > +		drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
> > > +		schedule_work(&tile->hw_error_work);
> > >   		return;
> > >   	}
> > > @@ -537,7 +560,13 @@ static void process_hw_errors(struct xe_device *xe)
> > >   	}
> > >   }
> > > -static void hw_error_fini(void *arg)
> > > +/**
> > > + * xe_hw_error_work_disable - Disable hw error work
> > > + * @arg: xe device instance
> > > + *
> > > + * This function disables work for hardware error handling for all tiles.
> > > + */
> > > +void xe_hw_error_work_disable(void *arg)
> > >   {
> > >   	struct xe_device *xe = arg;
> > >   	struct xe_tile *tile;
> > > @@ -569,5 +598,5 @@ void xe_hw_error_init(struct xe_device *xe)
> > >   		INIT_WORK(&tile->hw_error_work, hw_error_work);
> > >   	process_hw_errors(xe);
> > > -	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
> > > +	devm_add_action_or_reset(xe->drm.dev, xe_hw_error_work_disable, xe);
> > >   }
> > > diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
> > > index 5e3a11424108..c2c0bfa6d9f9 100644
> > > --- a/drivers/gpu/drm/xe/xe_hw_error.h
> > > +++ b/drivers/gpu/drm/xe/xe_hw_error.h
> > > @@ -12,4 +12,5 @@ struct xe_device;
> > >   void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
> > >   void xe_hw_error_init(struct xe_device *xe);
> > > +void xe_hw_error_work_disable(void *arg);
> > >   #endif
> > > diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> > > index 472b85d0ccc3..67920751ecf1 100644
> > > --- a/drivers/gpu/drm/xe/xe_pci_error.c
> > > +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> > > @@ -5,8 +5,11 @@
> > >   #include <linux/pci.h>
> > > +#include <generated/xe_device_wa_oob.h>
> > > +
> > >   #include "xe_device.h"
> > >   #include "xe_gt.h"
> > > +#include "xe_hw_error.h"
> > >   #include "xe_log.h"
> > >   #include "xe_pci.h"
> > >   #include "xe_pcode.h"
> > > @@ -14,6 +17,7 @@
> > >   #include "xe_printk.h"
> > >   #include "xe_ras.h"
> > >   #include "xe_survivability_mode.h"
> > > +#include "xe_wa.h"
> > >   #include "xe_wedge.h"
> > >   static void prepare_device_for_reset(struct pci_dev *pdev)
> > > @@ -87,12 +91,21 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
> > >   	if (state == pci_channel_io_perm_failure)
> > >   		return PCI_ERS_RESULT_DISCONNECT;
> > > -	/* If the device is already wedged or in survivability mode, do not attempt recovery */
> > > -	if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
> > > +	/* If the device is already in survivability mode, do not attempt recovery */
> > > +	if (xe_survivability_mode_is_boot_enabled(xe))
> > >   		return PCI_ERS_RESULT_DISCONNECT;
> > > -	if (is_aer_internal_error(pdev))
> > > +	/*
> > > +	 * If non-fatal error processing is in progress when uncorrectable internal error occurs,
> > > +	 * flush and disable the worker to prevent further processing, as a reset is imminent.
> > > +	 */
> > > +	if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
> > >   		xe_ras_set_aer_internal_error(xe);
> > > +		xe_hw_error_work_disable(xe);
> > > +	}
> > > +
> > > +	if (xe_wedged(xe))
> > > +		return PCI_ERS_RESULT_DISCONNECT;
> > >   	switch (state) {
> > >   	case pci_channel_io_normal:
> > > diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> > > index 58a0b5fa676d..1809c3c893de 100644
> > > --- a/drivers/gpu/drm/xe/xe_ras.c
> > > +++ b/drivers/gpu/drm/xe/xe_ras.c
> > > @@ -5,6 +5,8 @@
> > >   #include <linux/bitfield.h>
> > > +#include <generated/xe_device_wa_oob.h>
> > > +
> > >   #include "xe_assert.h"
> > >   #include "xe_bo.h"
> > >   #include "xe_configfs.h"
> > > @@ -23,6 +25,7 @@
> > >   #include "xe_sysctrl_mailbox.h"
> > >   #include "xe_sysctrl_mailbox_types.h"
> > >   #include "xe_ttm_vram_mgr.h"
> > > +#include "xe_wa.h"
> > >   #include "xe_wedge.h"
> > >   /* Any non-null entry marks the page as offlined by firmware */
> > > @@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
> > >   			    DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
> > >   			    "Double-bit ECC error detected at sw address 0x%llx\n",
> > >   			    info->sw_address);
> > > -		if (ret)
> > > +		/*
> > > +		 * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
> > > +		 * Wedge the device with a bus reset for errors that require SBR to recover.
> > > +		 * TODO: Trigger SBR using pci_reset_bus
> > > +		 */
> > > +		if (ret) {
> > > +			xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
> > >   			return XE_RAS_RECOVERY_ACTION_RESET;
> > > +		}
> > >   		break;
> > >   	default:
> > >   		xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
> > > @@ -818,9 +828,16 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
> > >   		return XE_RAS_RECOVERY_ACTION_RECOVERED;
> > >   	BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
> > > -	/* Default action */
> > > +	/* Default action for PCIe bus errors */
> > >   	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
> > > +	/*
> > > +	 * Device fatal errors are downgraded to non-fatal and reported as an uncorrectable
> > > +	 * internal error. Set the default action to reset.
> > > +	 */
> > > +	if (XE_DEVICE_WA(xe, 14028434957) && xe_ras_is_aer_internal_error(xe))
> > > +		final_action = XE_RAS_RECOVERY_ACTION_RESET;
> > > +
> > >   	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
> > >   				  NULL, 0, &response, sizeof(response));
> > > -- 
> > > 2.47.1
> > > 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 7/8] drm/xe: Add support for wa_14028434957
  2026-11-11  6:15       ` Raag Jadav
@ 2026-11-11  6:22         ` Tauro, Riana
  0 siblings, 0 replies; 32+ messages in thread
From: Tauro, Riana @ 2026-11-11  6:22 UTC (permalink / raw)
  To: Raag Jadav
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar, Andi Shyti


On 11-11-2026 11:45, Raag Jadav wrote:
> On Wed, Nov 11, 2026 at 10:20:38AM +0530, Tauro, Riana wrote:
>> On 10-11-2026 18:48, Raag Jadav wrote:
>>> On Fri, Nov 06, 2026 at 12:49:52PM +0530, Riana Tauro wrote:
>>>> Add support for wa_14028434957 on platform CRI.
>>>>
>>>> Non-fatal device errors are reported via a direct IRQ, while fatal
>>>> device errors are downgraded to non-fatal uncorrectable internal
>>>> errors and reported via AER.
>>>>
>>>> Add support to process and log non-fatal errors routed via the direct
>>>> IRQ path. Most non-fatal errors require no reset, except double-bit
>>>> ECC errors affecting a critical BO, for which the device is wedged
>>>> with a bus reset as the recovery action.
>>>>
>>>> For uncorrectable internal errors reported via AER, request a
>>>> secondary bus reset to recover. To avoid a race between the two
>>>> paths, if non-fatal error processing is in progress when an
>>>> uncorrectable internal error occurs, flush and disable the worker
>>>> to prevent further processing, since a reset is
>>>> imminent.
>>>>
>>>> Cc: Andi Shyti <andi.shyti@linux.intel.com>
>>>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>>>> ---
>>>> v2: use platform instead of graphics version (Gustavo)
>>>>       combine patches (Tejas, Mallesh)
>>>>       remove 1sec delayed worker (Andi)
>>>>
>>>> v3: re-order disable hw error worker before wedged check (Sashiko)
>>>> ---
>>>>    drivers/gpu/drm/xe/xe_device_wa_oob.rules |  1 +
>>>>    drivers/gpu/drm/xe/xe_hw_error.c          | 41 +++++++++++++++++++----
>>>>    drivers/gpu/drm/xe/xe_hw_error.h          |  1 +
>>>>    drivers/gpu/drm/xe/xe_pci_error.c         | 19 +++++++++--
>>>>    drivers/gpu/drm/xe/xe_ras.c               | 21 ++++++++++--
>>>>    5 files changed, 72 insertions(+), 11 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
>>>> index 753b2a4a1006..300207596893 100644
>>>> --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
>>>> +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
>>>> @@ -7,3 +7,4 @@
>>>>    14026746987	PLATFORM(CRESCENTISLAND)
>>>>    14026779378	PLATFORM(CRESCENTISLAND)
>>>>    14028586678	PLATFORM(CRESCENTISLAND)
>>>> +14028434957	PLATFORM(CRESCENTISLAND)
>>>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
>>>> index f7031b341ce0..86b29f282837 100644
>>>> --- a/drivers/gpu/drm/xe/xe_hw_error.c
>>>> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
>>>> @@ -5,6 +5,8 @@
>>>>    #include <linux/bitmap.h>
>>>> +#include <generated/xe_device_wa_oob.h>
>>>> +
>>>>    #include "regs/xe_gsc_regs.h"
>>>>    #include "regs/xe_hw_error_regs.h"
>>>>    #include "regs/xe_irq_regs.h"
>>>> @@ -15,7 +17,11 @@
>>>>    #include "xe_hw_error.h"
>>>>    #include "xe_mmio.h"
>>>>    #include "xe_pm.h"
>>>> +#include "xe_ras.h"
>>>>    #include "xe_survivability_mode.h"
>>>> +#include "xe_wa.h"
>>>> +#include "xe_wedge.h"
>>>> +
>>>>    #define GT_HW_ERROR_MAX_ERR_BITS		16
>>>>    #define HEC_UNCORR_FW_ERR_BITS			4
>>>> @@ -171,7 +177,24 @@ static void hw_error_work(struct work_struct *work)
>>>>    	struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
>>>>    	struct xe_device *xe = tile_to_xe(tile);
>>>> +	/* Skip hw error processing if device is already wedged */
>>>> +	if (xe_wedged(xe))
>>> This is a weak check and actually doesn't achieve anything, i.e. the state
>>> can change immediate after this check :)
>> Helps if it is already wedged.
> Which is a problem for basically every single function in the driver ;)
>
> I understand it's not the scope of this series but I hope it gets fixed
> at some point.
>
>>>> +		return;
>>>> +
>>>>    	guard(xe_pm_runtime)(xe);
>>>> +
>>>> +	if (xe->info.has_sysctrl && XE_DEVICE_WA(xe, 14028434957)) {
>>>> +		/*
>>>> +		 * Skip handling if an uncorrectable internal error is reported as
>>>> +		 * reset is imminent
>>>> +		 */
>>>> +		if (xe_ras_is_aer_internal_error(xe))
>>>> +			return;
>>>> +
>>>> +		xe_ras_process_errors(xe);
>>>> +		return;
>>>> +	}
>>>> +
>>>>    	xe_survivability_mode_runtime_enable(xe);
>>>>    }
>>>> @@ -433,12 +456,12 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
>>>>    		return;
>>>>    	/*
>>>> -	 * Hardware errors are reported through System Controller on the platforms that
>>>> -	 * support it, and never routed as direct IRQ to SGUnit. So we should never be
>>>> -	 * here for those platforms.
>>>> +	 * Non-fatal errors are routed as a direct IRQ on platforms that support
>>>> +	 * system controller.
>>> How the turntables :D
>>>
>>> I really hope (and I mean _really_) the required due diligence has been
>>> done here before opening this can of worms.
>> This is a hardware decision not from driver
> Documentation/process/submitting-patches.rst +458

I meant the routing of the non-fatal errors is decided by hardware.
Since the routing is not controlled by the driver, we need to handle the 
errors routed via
irq

Riana

>
> "The Signed-off-by: tag indicates that the signer was involved in the
> development of the patch, ..."
>
> So you don't get a discount here ;)
>
> Raag
>
>>>>    	 */
>>>>    	if (xe->info.has_sysctrl) {
>>>> -		drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
>>>> +		drm_err_ratelimited(&xe->drm, HW_ERR "Non-fatal %s reported\n", severity_str);
>>>> +		schedule_work(&tile->hw_error_work);
>>>>    		return;
>>>>    	}
>>>> @@ -537,7 +560,13 @@ static void process_hw_errors(struct xe_device *xe)
>>>>    	}
>>>>    }
>>>> -static void hw_error_fini(void *arg)
>>>> +/**
>>>> + * xe_hw_error_work_disable - Disable hw error work
>>>> + * @arg: xe device instance
>>>> + *
>>>> + * This function disables work for hardware error handling for all tiles.
>>>> + */
>>>> +void xe_hw_error_work_disable(void *arg)
>>>>    {
>>>>    	struct xe_device *xe = arg;
>>>>    	struct xe_tile *tile;
>>>> @@ -569,5 +598,5 @@ void xe_hw_error_init(struct xe_device *xe)
>>>>    		INIT_WORK(&tile->hw_error_work, hw_error_work);
>>>>    	process_hw_errors(xe);
>>>> -	devm_add_action_or_reset(xe->drm.dev, hw_error_fini, xe);
>>>> +	devm_add_action_or_reset(xe->drm.dev, xe_hw_error_work_disable, xe);
>>>>    }
>>>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
>>>> index 5e3a11424108..c2c0bfa6d9f9 100644
>>>> --- a/drivers/gpu/drm/xe/xe_hw_error.h
>>>> +++ b/drivers/gpu/drm/xe/xe_hw_error.h
>>>> @@ -12,4 +12,5 @@ struct xe_device;
>>>>    void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
>>>>    void xe_hw_error_init(struct xe_device *xe);
>>>> +void xe_hw_error_work_disable(void *arg);
>>>>    #endif
>>>> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
>>>> index 472b85d0ccc3..67920751ecf1 100644
>>>> --- a/drivers/gpu/drm/xe/xe_pci_error.c
>>>> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
>>>> @@ -5,8 +5,11 @@
>>>>    #include <linux/pci.h>
>>>> +#include <generated/xe_device_wa_oob.h>
>>>> +
>>>>    #include "xe_device.h"
>>>>    #include "xe_gt.h"
>>>> +#include "xe_hw_error.h"
>>>>    #include "xe_log.h"
>>>>    #include "xe_pci.h"
>>>>    #include "xe_pcode.h"
>>>> @@ -14,6 +17,7 @@
>>>>    #include "xe_printk.h"
>>>>    #include "xe_ras.h"
>>>>    #include "xe_survivability_mode.h"
>>>> +#include "xe_wa.h"
>>>>    #include "xe_wedge.h"
>>>>    static void prepare_device_for_reset(struct pci_dev *pdev)
>>>> @@ -87,12 +91,21 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
>>>>    	if (state == pci_channel_io_perm_failure)
>>>>    		return PCI_ERS_RESULT_DISCONNECT;
>>>> -	/* If the device is already wedged or in survivability mode, do not attempt recovery */
>>>> -	if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
>>>> +	/* If the device is already in survivability mode, do not attempt recovery */
>>>> +	if (xe_survivability_mode_is_boot_enabled(xe))
>>>>    		return PCI_ERS_RESULT_DISCONNECT;
>>>> -	if (is_aer_internal_error(pdev))
>>>> +	/*
>>>> +	 * If non-fatal error processing is in progress when uncorrectable internal error occurs,
>>>> +	 * flush and disable the worker to prevent further processing, as a reset is imminent.
>>>> +	 */
>>>> +	if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
>>>>    		xe_ras_set_aer_internal_error(xe);
>>>> +		xe_hw_error_work_disable(xe);
>>>> +	}
>>>> +
>>>> +	if (xe_wedged(xe))
>>>> +		return PCI_ERS_RESULT_DISCONNECT;
>>>>    	switch (state) {
>>>>    	case pci_channel_io_normal:
>>>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>>>> index 58a0b5fa676d..1809c3c893de 100644
>>>> --- a/drivers/gpu/drm/xe/xe_ras.c
>>>> +++ b/drivers/gpu/drm/xe/xe_ras.c
>>>> @@ -5,6 +5,8 @@
>>>>    #include <linux/bitfield.h>
>>>> +#include <generated/xe_device_wa_oob.h>
>>>> +
>>>>    #include "xe_assert.h"
>>>>    #include "xe_bo.h"
>>>>    #include "xe_configfs.h"
>>>> @@ -23,6 +25,7 @@
>>>>    #include "xe_sysctrl_mailbox.h"
>>>>    #include "xe_sysctrl_mailbox_types.h"
>>>>    #include "xe_ttm_vram_mgr.h"
>>>> +#include "xe_wa.h"
>>>>    #include "xe_wedge.h"
>>>>    /* Any non-null entry marks the page as offlined by firmware */
>>>> @@ -671,8 +674,15 @@ static u8 handle_device_memory_errors(struct xe_device *xe, struct xe_ras_error_
>>>>    			    DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
>>>>    			    "Double-bit ECC error detected at sw address 0x%llx\n",
>>>>    			    info->sw_address);
>>>> -		if (ret)
>>>> +		/*
>>>> +		 * Double-bit ECC errors are non-fatal errors and are reported via IRQ.
>>>> +		 * Wedge the device with a bus reset for errors that require SBR to recover.
>>>> +		 * TODO: Trigger SBR using pci_reset_bus
>>>> +		 */
>>>> +		if (ret) {
>>>> +			xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
>>>>    			return XE_RAS_RECOVERY_ACTION_RESET;
>>>> +		}
>>>>    		break;
>>>>    	default:
>>>>    		xe_log_comp(xe, cper_sev, DEVICE_MEMORY, &arr->counter, sizeof(arr->counter),
>>>> @@ -818,9 +828,16 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
>>>>    		return XE_RAS_RECOVERY_ACTION_RECOVERED;
>>>>    	BUILD_BUG_ON(BITS_PER_TYPE(sent) < XE_RAS_COMP_MAX);
>>>> -	/* Default action */
>>>> +	/* Default action for PCIe bus errors */
>>>>    	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
>>>> +	/*
>>>> +	 * Device fatal errors are downgraded to non-fatal and reported as an uncorrectable
>>>> +	 * internal error. Set the default action to reset.
>>>> +	 */
>>>> +	if (XE_DEVICE_WA(xe, 14028434957) && xe_ras_is_aer_internal_error(xe))
>>>> +		final_action = XE_RAS_RECOVERY_ACTION_RESET;
>>>> +
>>>>    	xe_sysctrl_create_command(&command, XE_SYSCTRL_GROUP_GFSP, XE_SYSCTRL_CMD_GET_SOC_ERROR,
>>>>    				  NULL, 0, &response, sizeof(response));
>>>> -- 
>>>> 2.47.1
>>>>

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind
  2026-11-11  5:50         ` Tauro, Riana
@ 2026-11-11  7:09           ` Raag Jadav
  2026-11-11  7:17             ` Tauro, Riana
  0 siblings, 1 reply; 32+ messages in thread
From: Raag Jadav @ 2026-11-11  7:09 UTC (permalink / raw)
  To: Tauro, Riana
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar

On Wed, Nov 11, 2026 at 11:20:02AM +0530, Tauro, Riana wrote:
> On 11-11-2026 11:09, Raag Jadav wrote:
> > On Wed, Nov 11, 2026 at 10:13:44AM +0530, Tauro, Riana wrote:
> > > On 10-11-2026 18:21, Raag Jadav wrote:
> > > > On Fri, Nov 06, 2026 at 12:49:48PM +0530, Riana Tauro wrote:
> > > > > Runtime surivability mode creates sysfs and declares the device as
> > > > > wedged in a worker thread. This can race with unbind.
> > > > > 
> > > > > During unbind, devres actions such as disabling the worker run as part of
> > > > > teardown. A runtime survivability enable that is still in flight or gets
> > > > > scheduled in that window can create the survivability sysfs entries while
> > > > > the device is being removed. This is incorrect, as runtime survivability mode
> > > > > must not be entered once during devres teardown.
> > > > > 
> > > > > Use the DRM device enter/exit protection so that the enable path
> > > > > synchronizes with device unplug and returns early if the device is
> > > > > already being unbound.
> > > > I'm a bit lost here. Doesn't disable_work_sync() already guarantee this?
> > > If the worker is already queued and there is a unbind in progress. The
> > > disable work sync from devm
> > > action waits for the worker to complete. This causes the device to enter
> > > survivability mode during unbind
> > > which is not intended.
> > Wouldn't the survivability stuff still land on devres and get cleaned
> > up anyway?
> 
> devres_release_all running as part of unbind copies all the devres nodes
> into a todo list and then
> releases them. If during release, we add a new devres that will not be
> cleared during unbind
> which can cause stale sysfs.

Hm, I thought all the devm actions are protected by devres_lock but
you're right.

A more robust fix would be to disable all the workers in ->remove()
callback itself and avoid such races to begin with, but I'll leave it
upto you.

Raag

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind
  2026-11-11  7:09           ` Raag Jadav
@ 2026-11-11  7:17             ` Tauro, Riana
  0 siblings, 0 replies; 32+ messages in thread
From: Tauro, Riana @ 2026-11-11  7:17 UTC (permalink / raw)
  To: Raag Jadav
  Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
	mallesh.koujalagi, badal.nilawar


On 11-11-2026 12:39, Raag Jadav wrote:
> On Wed, Nov 11, 2026 at 11:20:02AM +0530, Tauro, Riana wrote:
>> On 11-11-2026 11:09, Raag Jadav wrote:
>>> On Wed, Nov 11, 2026 at 10:13:44AM +0530, Tauro, Riana wrote:
>>>> On 10-11-2026 18:21, Raag Jadav wrote:
>>>>> On Fri, Nov 06, 2026 at 12:49:48PM +0530, Riana Tauro wrote:
>>>>>> Runtime surivability mode creates sysfs and declares the device as
>>>>>> wedged in a worker thread. This can race with unbind.
>>>>>>
>>>>>> During unbind, devres actions such as disabling the worker run as part of
>>>>>> teardown. A runtime survivability enable that is still in flight or gets
>>>>>> scheduled in that window can create the survivability sysfs entries while
>>>>>> the device is being removed. This is incorrect, as runtime survivability mode
>>>>>> must not be entered once during devres teardown.
>>>>>>
>>>>>> Use the DRM device enter/exit protection so that the enable path
>>>>>> synchronizes with device unplug and returns early if the device is
>>>>>> already being unbound.
>>>>> I'm a bit lost here. Doesn't disable_work_sync() already guarantee this?
>>>> If the worker is already queued and there is a unbind in progress. The
>>>> disable work sync from devm
>>>> action waits for the worker to complete. This causes the device to enter
>>>> survivability mode during unbind
>>>> which is not intended.
>>> Wouldn't the survivability stuff still land on devres and get cleaned
>>> up anyway?
>> devres_release_all running as part of unbind copies all the devres nodes
>> into a todo list and then
>> releases them. If during release, we add a new devres that will not be
>> cleared during unbind
>> which can cause stale sysfs.
> Hm, I thought all the devm actions are protected by devres_lock but
> you're right.
>
> A more robust fix would be to disable all the workers in ->remove()
> callback itself and avoid such races to begin with, but I'll leave it
> upto you.

yeah tried that in previous series. But there are a lot of corner cases 
to be handled.
Will keep this for now as we really don't need survivability mode in 
unbind case.

I do see some other workers using the same checks to fix race with unbind.
We have to refactor the probe path for this and other workers.

Thanks
Riana

>
> Raag

^ permalink raw reply	[flat|nested] 32+ messages in thread

end of thread, other threads:[~2026-11-11  7:17 UTC | newest]

Thread overview: 32+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-11-06  7:19 [PATCH v4 0/8] Handle non-fatal errors routed via IRQ Riana Tauro
2026-11-06  7:19 ` [PATCH v4 1/8] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
2026-11-06  7:19 ` [PATCH v4 2/8] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
2026-11-10  5:48   ` Mallesh, Koujalagi
2026-11-10 12:40   ` Raag Jadav
2026-11-11  4:45     ` Tauro, Riana
2026-11-11  5:40       ` Raag Jadav
2026-11-11  5:51         ` Tauro, Riana
2026-11-06  7:19 ` [PATCH v4 3/8] drm/xe/survivability: Guard runtime survivability enable against unbind Riana Tauro
2026-11-10  6:19   ` Mallesh, Koujalagi
2026-11-10 12:51   ` Raag Jadav
2026-11-11  4:43     ` Tauro, Riana
2026-11-11  5:39       ` Raag Jadav
2026-11-11  5:50         ` Tauro, Riana
2026-11-11  7:09           ` Raag Jadav
2026-11-11  7:17             ` Tauro, Riana
2026-11-06  7:19 ` [PATCH v4 4/8] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
2026-11-06  7:19 ` [PATCH v4 5/8] drm/xe/pci: Add upstream switch port lookup helper Riana Tauro
2026-11-06  7:19 ` [PATCH v4 6/8] drm/xe/xe_ras: Add a flag for uncorrectable internal error Riana Tauro
2026-11-10 13:07   ` Raag Jadav
2026-11-11  4:47     ` Tauro, Riana
2026-11-06  7:19 ` [PATCH v4 7/8] drm/xe: Add support for wa_14028434957 Riana Tauro
2026-11-10  6:41   ` Mallesh, Koujalagi
2026-11-10 13:18   ` Raag Jadav
2026-11-11  4:50     ` Tauro, Riana
2026-11-11  6:15       ` Raag Jadav
2026-11-11  6:22         ` Tauro, Riana
2026-11-06  7:19 ` [PATCH v4 8/8] drm/xe/xe_ras: Skip double-bit ECC page offlining on AER path Riana Tauro
2026-11-06  7:27 ` ✗ CI.checkpatch: warning for Handle non-fatal errors routed via IRQ (rev4) Patchwork
2026-11-06  7:29 ` ✓ CI.KUnit: success " Patchwork
2026-11-06  8:13 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-07  7:38 ` ✗ Xe.CI.FULL: failure " Patchwork

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