From: "Michał Grzelak" <michal.grzelak@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v2 32/34] drm/i915/kunit: DP link: add baseline fixed table reference test
Date: Sat, 4 Jul 2026 12:51:07 +0200 (CEST) [thread overview]
Message-ID: <b23a877a-0442-92ee-916f-d1f3873b5892@intel.com> (raw)
In-Reply-To: <20260701153204.4124150-33-imre.deak@intel.com>
[-- Attachment #1: Type: text/plain, Size: 9078 bytes --]
On Wed, 1 Jul 2026, Imre Deak wrote:
> Add a simple baseline test for DP link caps iteration using a fixed
> standard DP configuration table. This provides a minimal validity check,
> independent of more complex test setups, verifying the iterator returns
> expected configurations in ascending and descending order.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> .../i915/display/tests/intel_dp_link_test.c | 200 ++++++++++++++++++
> 1 file changed, 200 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/tests/intel_dp_link_test.c b/drivers/gpu/drm/i915/display/tests/intel_dp_link_test.c
> index b77472e9bbe12..1dc5bf6888990 100644
> --- a/drivers/gpu/drm/i915/display/tests/intel_dp_link_test.c
> +++ b/drivers/gpu/drm/i915/display/tests/intel_dp_link_test.c
> @@ -7,6 +7,7 @@
>
> #include <linux/compiler.h>
> #include <linux/device.h>
> +#include <linux/log2.h>
> #include <linux/prandom.h>
> #include <linux/random.h>
>
> @@ -20,6 +21,18 @@
> #include "intel_dp_link_caps.h"
> #include "intel_dp_link_training.h"
>
> +#define LINK_TEST_NUM_LANE_CONFIGS(__max_lane_count) \
> + (ilog2(__max_lane_count) + 1)
> +
> +#define LINK_TEST_NUM_CONFIGS(__num_rates, __max_lane_count) \
> + ((__num_rates) * LINK_TEST_NUM_LANE_CONFIGS(__max_lane_count))
> +
> +#define LINK_TEST_MAX_LANE_COUNT ((u32)4)
> +#define LINK_TEST_MAX_CONFIGS LINK_TEST_NUM_CONFIGS(DP_MAX_SUPPORTED_RATES, \
> + LINK_TEST_MAX_LANE_COUNT)
> +
> +#define LINK_TEST_NUM_RANDOM_ITERATIONS 50
> +
> struct test_ctx {
> struct {
> struct intel_display display;
> @@ -38,7 +51,194 @@ struct test_ctx {
> struct rnd_state rnd;
> };
>
> +struct link_rate_set {
> + const int *entries;
> + int size;
> +};
> +
> +struct link_config_set {
> + struct intel_dp_link_config entries[LINK_TEST_MAX_CONFIGS];
> + int size;
> +};
> +
> +static const int standard_dp_link_rates[] = {
> + 162000, 270000, 540000, 810000, 1000000, 1350000, 2000000
> +};
> +
> +#define LINK_TEST_NUM_STANDARD_RATES (ARRAY_SIZE(standard_dp_link_rates))
> +
> +static const struct link_config_set standard_dp_link_configs[] = {
> + [INTEL_DP_LINK_CAPS_ORDER_KEY_BW] = { /* MBps PBN */
> + .entries = {
> + { .rate = 162000, .lane_count = 1 }, /* 162.0 3.00 */
> + { .rate = 270000, .lane_count = 1 }, /* 270.0 5.00 */
> + { .rate = 162000, .lane_count = 2 }, /* 324.0 6.00 */
> + { .rate = 270000, .lane_count = 2 }, /* 540.0 10.00 */
> + { .rate = 540000, .lane_count = 1 }, /* 540.0 10.00 */
> + { .rate = 162000, .lane_count = 4 }, /* 648.0 12.00 */
> + { .rate = 810000, .lane_count = 1 }, /* 810.0 15.00 */
> + { .rate = 270000, .lane_count = 4 }, /* 1080.0 20.00 */
> + { .rate = 540000, .lane_count = 2 }, /* 1080.0 20.00 */
> + { .rate = 1000000, .lane_count = 1 }, /* 1208.9 22.39 */
> + { .rate = 810000, .lane_count = 2 }, /* 1620.0 30.00 */
> + { .rate = 1350000, .lane_count = 1 }, /* 1632.0 30.22 */
> + { .rate = 540000, .lane_count = 4 }, /* 2160.0 40.00 */
> + { .rate = 1000000, .lane_count = 2 }, /* 2417.8 44.77 */
> + { .rate = 2000000, .lane_count = 1 }, /* 2417.8 44.77 */
> + { .rate = 810000, .lane_count = 4 }, /* 3240.0 60.00 */
> + { .rate = 1350000, .lane_count = 2 }, /* 3264.0 60.44 */
> + { .rate = 1000000, .lane_count = 4 }, /* 4835.6 89.55 */
> + { .rate = 2000000, .lane_count = 2 }, /* 4835.6 89.55 */
> + { .rate = 1350000, .lane_count = 4 }, /* 6527.9 120.89 */
> + { .rate = 2000000, .lane_count = 4 }, /* 9671.1 179.09 */
> + },
> + .size = LINK_TEST_NUM_CONFIGS(ARRAY_SIZE(standard_dp_link_rates),
> + LINK_TEST_MAX_LANE_COUNT),
> + },
> + [INTEL_DP_LINK_CAPS_ORDER_KEY_RATE_LANE] = {
> + .entries = {
> + { .rate = 162000, .lane_count = 1 },
> + { .rate = 162000, .lane_count = 2 },
> + { .rate = 162000, .lane_count = 4 },
> +
> + { .rate = 270000, .lane_count = 1 },
> + { .rate = 270000, .lane_count = 2 },
> + { .rate = 270000, .lane_count = 4 },
> +
> + { .rate = 540000, .lane_count = 1 },
> + { .rate = 540000, .lane_count = 2 },
> + { .rate = 540000, .lane_count = 4 },
> +
> + { .rate = 810000, .lane_count = 1 },
> + { .rate = 810000, .lane_count = 2 },
> + { .rate = 810000, .lane_count = 4 },
> +
> + { .rate = 1000000, .lane_count = 1 },
> + { .rate = 1000000, .lane_count = 2 },
> + { .rate = 1000000, .lane_count = 4 },
> +
> + { .rate = 1350000, .lane_count = 1 },
> + { .rate = 1350000, .lane_count = 2 },
> + { .rate = 1350000, .lane_count = 4 },
> +
> + { .rate = 2000000, .lane_count = 1 },
> + { .rate = 2000000, .lane_count = 2 },
> + { .rate = 2000000, .lane_count = 4 },
> + },
> + .size = LINK_TEST_NUM_CONFIGS(ARRAY_SIZE(standard_dp_link_rates),
> + LINK_TEST_MAX_LANE_COUNT),
> + },
> + [INTEL_DP_LINK_CAPS_ORDER_KEY_LANE_RATE] = {
> + .entries = {
> + { .rate = 162000, .lane_count = 1 },
> + { .rate = 270000, .lane_count = 1 },
> + { .rate = 540000, .lane_count = 1 },
> + { .rate = 810000, .lane_count = 1 },
> + { .rate = 1000000, .lane_count = 1 },
> + { .rate = 1350000, .lane_count = 1 },
> + { .rate = 2000000, .lane_count = 1 },
> +
> + { .rate = 162000, .lane_count = 2 },
> + { .rate = 270000, .lane_count = 2 },
> + { .rate = 540000, .lane_count = 2 },
> + { .rate = 810000, .lane_count = 2 },
> + { .rate = 1000000, .lane_count = 2 },
> + { .rate = 1350000, .lane_count = 2 },
> + { .rate = 2000000, .lane_count = 2 },
> +
> + { .rate = 162000, .lane_count = 4 },
> + { .rate = 270000, .lane_count = 4 },
> + { .rate = 540000, .lane_count = 4 },
> + { .rate = 810000, .lane_count = 4 },
> + { .rate = 1000000, .lane_count = 4 },
> + { .rate = 1350000, .lane_count = 4 },
> + { .rate = 2000000, .lane_count = 4 },
> + },
> + .size = LINK_TEST_NUM_CONFIGS(ARRAY_SIZE(standard_dp_link_rates),
> + LINK_TEST_MAX_LANE_COUNT),
> + },
> +};
> +
> +static bool link_configs_match(const struct intel_dp_link_config *a,
> + const struct intel_dp_link_config *b)
> +{
> + return a->rate == b->rate && a->lane_count == b->lane_count;
maybe: s/\<a\>/lc_a/ and s/\<b\>/lc_b/
> +}
> +
> +static const struct intel_dp_link_caps_order config_orders[] = {
> + {
> + .key = INTEL_DP_LINK_CAPS_ORDER_KEY_BW,
> + .dir = INTEL_DP_LINK_CAPS_ORDER_DIR_ASC,
> + }, {
> + .key = INTEL_DP_LINK_CAPS_ORDER_KEY_BW,
> + .dir = INTEL_DP_LINK_CAPS_ORDER_DIR_DESC,
> + }, {
> + .key = INTEL_DP_LINK_CAPS_ORDER_KEY_RATE_LANE,
> + .dir = INTEL_DP_LINK_CAPS_ORDER_DIR_ASC,
> + }, {
> + .key = INTEL_DP_LINK_CAPS_ORDER_KEY_RATE_LANE,
> + .dir = INTEL_DP_LINK_CAPS_ORDER_DIR_DESC,
> + }
> +};
> +
> +static const struct link_config_set *
> +link_caps_config_order_key_to_set(struct kunit *test, enum intel_dp_link_caps_order_key key)
> +{
> + return &standard_dp_link_configs[key];
> +}
> +
> +/*
> + * TEST: Baseline with fixed reference table
> + * -----------------------------------------
Didn't find in other KUnit tests such header, but I think the info
provided is valuable. Can we add it to the line below, something like:
* Verify baseline link_caps config iterator using fixed standard DP config tables.
> + * Verify the link_caps config iterator using fixed standard DP config tables.
> + */
> +static void baseline_test_for_order(struct kunit *test,
> + struct intel_dp_link_caps *link_caps,
> + struct intel_dp_link_caps_order config_order)
> +{
> + struct test_ctx *ctx = test->priv;
> + const struct link_config_set *config_set =
> + link_caps_config_order_key_to_set(test, config_order.key);
> + const struct intel_dp_link_caps_test_ops *ops = ctx->link_caps_ops;
> + struct intel_dp_link_config iter_config;
> + struct intel_dp_link_caps_iter iter;
> + int pos = 0;
> +
> + ops->iter_start(&iter, link_caps, config_order, INTEL_DP_LINK_CAPS_FILTER_ALL);
> + for_each_dp_link_config(&iter, &iter_config) {
> + int idx = pos;
> +
> + if (config_order.dir == INTEL_DP_LINK_CAPS_ORDER_DIR_DESC)
> + idx = config_set->size - idx - 1;
> +
> + KUNIT_EXPECT_TRUE(test, link_configs_match(&iter_config,
> + &config_set->entries[idx]));
> +
> + pos++;
> + }
> + ops->iter_end(&iter);
> +}
> +
> +static void intel_dp_link_caps_test_baseline(struct kunit *test)
> +{
> + struct test_ctx *ctx = test->priv;
> + struct intel_dp_link_caps *link_caps = ctx->dev.dig_port.dp.link.caps;
> + const struct intel_dp_link_caps_test_ops *ops =
> + ctx->link_caps_ops;
> + int i;
> +
> + ops->update(link_caps,
> + standard_dp_link_rates, LINK_TEST_NUM_STANDARD_RATES,
> + LINK_TEST_MAX_LANE_COUNT,
> + true);
> +
> + for (i = 0; i < ARRAY_SIZE(config_orders); i++)
> + baseline_test_for_order(test, link_caps, config_orders[i]);
> +}
> +
> static struct kunit_case intel_dp_link_test_cases[] = {
> + KUNIT_CASE(intel_dp_link_caps_test_baseline),
> +
looks like a superfluous newline.
With all that addressed:
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
> {}
> };
>
> --
> 2.49.1
>
>
next prev parent reply other threads:[~2026-07-04 10:51 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 15:31 [PATCH v2 00/34] drm/i915/dp_link: Unify modeset/fallback config selection Imre Deak
2026-07-01 15:31 ` [PATCH v2 01/34] drm/i915/doc: Document DP link capabilities Imre Deak
2026-07-02 5:17 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 02/34] drm/i915/dp_link_caps: Factor out helper to get link config by index Imre Deak
2026-07-03 2:55 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 03/34] drm/i915/dp_link_caps: Add support for link rate, lane count iteration orders Imre Deak
2026-07-07 4:06 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 04/34] drm/i915/dp_link_caps: Add link configuration iterator Imre Deak
2026-07-07 4:17 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 05/34] drm/i915/dp_link_caps: Add helper to get iteration order for a connector Imre Deak
2026-07-07 5:13 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 06/34] drm/i915/dp_link_caps: Validate max link limits Imre Deak
2026-07-06 8:17 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 07/34] drm/i915/dp_link_caps: Add filter for enabled link configurations Imre Deak
2026-07-06 8:08 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 08/34] drm/i915/dp_link_caps: Re-enable link configurations after a link reset Imre Deak
2026-07-06 8:09 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 09/34] drm/i915/dp_link_caps: Re-enable link configurations after sink caps change Imre Deak
2026-07-06 8:14 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 10/34] drm/i915/dp_link_caps: Drop noupdate postfix from max link limit set helpers Imre Deak
2026-07-06 8:16 ` Kandpal, Suraj
2026-07-01 15:31 ` [PATCH v2 11/34] drm/i915/dp_link_caps: Add debugfs entry showing allowed configurations Imre Deak
2026-07-02 10:35 ` Luca Coelho
2026-07-01 15:31 ` [PATCH v2 12/34] drm/i915/dp: Add link configuration filter for modeset computation Imre Deak
2026-07-02 11:03 ` Luca Coelho
2026-07-06 7:52 ` Imre Deak
2026-07-01 15:31 ` [PATCH v2 13/34] drm/i915/dp_link_caps: Add helper to query max BW link configuration Imre Deak
2026-07-02 11:06 ` Luca Coelho
2026-07-01 15:31 ` [PATCH v2 14/34] drm/i915/dp: Query max BW config via link_caps during mode validation Imre Deak
2026-07-02 11:22 ` Luca Coelho
2026-07-01 15:31 ` [PATCH v2 15/34] drm/i915/dp_tunnel: Query max BW config via link_caps for BW computation Imre Deak
2026-07-02 11:23 ` Luca Coelho
2026-07-01 15:31 ` [PATCH v2 16/34] drm/i915/dp_test: Use link caps for compliance link configs Imre Deak
2026-07-02 16:19 ` Luca Coelho
2026-07-01 15:31 ` [PATCH v2 17/34] drm/i915/dp: Iterate configurations via link_caps for SST non-DSC Imre Deak
2026-07-06 10:42 ` Luca Coelho
2026-07-01 15:31 ` [PATCH v2 18/34] drm/i915/dp: Iterate configurations via link_caps for SST DSC Imre Deak
2026-07-06 10:48 ` Luca Coelho
2026-07-01 15:31 ` [PATCH v2 19/34] drm/i915/dp: Use link caps for eDP DSC config selection Imre Deak
2026-07-06 10:49 ` Luca Coelho
2026-07-06 15:03 ` Imre Deak
2026-07-01 15:31 ` [PATCH v2 20/34] drm/i915/dp_mst: Use link caps for non-DSC " Imre Deak
2026-07-06 16:45 ` Luca Coelho
2026-07-01 15:31 ` [PATCH v2 21/34] drm/i915/dp_mst: Use link caps for MST DSC " Imre Deak
2026-07-01 15:31 ` [PATCH v2 22/34] drm/i915/dp: Remove min/max link config limits Imre Deak
2026-07-01 15:31 ` [PATCH v2 23/34] drm/i915/dp_link_training: Reset the max link limits in the fallback code Imre Deak
2026-07-01 15:31 ` [PATCH v2 24/34] drm/i915/dp_link_training: Use config iterator for fallback Imre Deak
2026-07-01 15:31 ` [PATCH v2 25/34] drm/i915/dp_link_training: Disable failed config during fallback Imre Deak
2026-07-01 15:31 ` [PATCH v2 26/34] drm/i915/kunit: Enable KUnit tests Imre Deak
2026-07-04 10:48 ` Michał Grzelak
2026-07-06 7:07 ` Imre Deak
2026-07-01 15:31 ` [PATCH v2 27/34] drm/i915/kunit: Add DP link test stub Imre Deak
2026-07-04 10:48 ` Michał Grzelak
2026-07-01 15:31 ` [PATCH v2 28/34] drm/xe/kunit: Add display test config Imre Deak
2026-07-04 10:49 ` Michał Grzelak
2026-07-01 15:31 ` [PATCH v2 29/34] drm/xe/kunit: Build DP link display tests Imre Deak
2026-07-04 10:49 ` Michał Grzelak
2026-07-06 7:14 ` Imre Deak
2026-07-01 15:31 ` [PATCH v2 30/34] drm/i915/kunit: Setup DP link test context Imre Deak
2026-07-04 10:50 ` Michał Grzelak
2026-07-06 7:18 ` Imre Deak
2026-07-01 15:32 ` [PATCH v2 31/34] drm/i915/kunit: Export link training and caps funcs for testing Imre Deak
2026-07-04 10:52 ` Michał Grzelak
2026-07-01 15:32 ` [PATCH v2 32/34] drm/i915/kunit: DP link: add baseline fixed table reference test Imre Deak
2026-07-04 10:51 ` Michał Grzelak [this message]
2026-07-06 7:31 ` Imre Deak
2026-07-01 15:32 ` [PATCH v2 33/34] drm/i915/kunit: DP link: add update config tests Imre Deak
2026-07-04 10:51 ` Michał Grzelak
2026-07-06 7:46 ` Imre Deak
2026-07-01 15:32 ` [PATCH v2 34/34] drm/i915/kunit: DP link: add fallback tests Imre Deak
2026-07-04 10:51 ` Michał Grzelak
2026-07-06 7:51 ` Imre Deak
2026-07-01 16:39 ` ✗ CI.checkpatch: warning for drm/i915/dp_link: Unify modeset/fallback config selection Patchwork
2026-07-01 16:40 ` ✓ CI.KUnit: success " Patchwork
2026-07-01 16:59 ` ✗ CI.checksparse: warning " Patchwork
2026-07-01 17:43 ` ✓ Xe.CI.BAT: success " Patchwork
2026-07-02 12:25 ` ✓ Xe.CI.FULL: " Patchwork
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