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From: Jani Nikula <jani.nikula@intel.com>
To: Uma Shankar <uma.shankar@intel.com>,
	intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, Uma Shankar <uma.shankar@intel.com>
Subject: Re: [v2 15/19] drm/{i915, xe}: Remove i915_reg.h from intel_fifo_underrun.c
Date: Thu, 22 Jan 2026 14:14:28 +0200	[thread overview]
Message-ID: <c164173e1696e5d8fee8b5be0bbc90fa4f5aff1a@intel.com> (raw)
In-Reply-To: <20260121232414.707192-16-uma.shankar@intel.com>

On Thu, 22 Jan 2026, Uma Shankar <uma.shankar@intel.com> wrote:
> Move GEN7_ERR_INT reg to common header to make intel_fifo_underrun.c
> free from including i915_reg.h.

I think these should be in a display register header, not the common
one. The users are display and gvt, apart from a single use in
gt_record_global_regs() which should be moved to display. I can send a
patch for that.

BR,
Jani.



>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  .../drm/i915/display/intel_fifo_underrun.c    |  2 +-
>  drivers/gpu/drm/i915/i915_reg.h               | 23 -------------------
>  include/drm/intel/intel_gmd_common_regs.h     | 23 +++++++++++++++++++
>  3 files changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> index b413b3e871d8..c834be759e40 100644
> --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> @@ -28,8 +28,8 @@
>  #include <linux/seq_buf.h>
>  
>  #include <drm/drm_print.h>
> +#include <drm/intel/intel_gmd_common_regs.h>
>  
> -#include "i915_reg.h"
>  #include "intel_de.h"
>  #include "intel_display_irq.h"
>  #include "intel_display_regs.h"
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 62d58d7cfa7a..0af2c9c8dc0f 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -326,29 +326,6 @@
>  #define GEN7_MEDIA_MAX_REQ_COUNT	_MMIO(0x4070)
>  #define GEN7_GFX_MAX_REQ_COUNT		_MMIO(0x4074)
>  
> -#define GEN7_ERR_INT	_MMIO(0x44040)
> -#define   ERR_INT_POISON		(1 << 31)
> -#define   ERR_INT_INVALID_GTT_PTE	(1 << 29)
> -#define   ERR_INT_INVALID_PTE_DATA	(1 << 28)
> -#define   ERR_INT_SPRITE_C_FAULT	(1 << 23)
> -#define   ERR_INT_PRIMARY_C_FAULT	(1 << 22)
> -#define   ERR_INT_CURSOR_C_FAULT	(1 << 21)
> -#define   ERR_INT_SPRITE_B_FAULT	(1 << 20)
> -#define   ERR_INT_PRIMARY_B_FAULT	(1 << 19)
> -#define   ERR_INT_CURSOR_B_FAULT	(1 << 18)
> -#define   ERR_INT_SPRITE_A_FAULT	(1 << 17)
> -#define   ERR_INT_PRIMARY_A_FAULT	(1 << 16)
> -#define   ERR_INT_CURSOR_A_FAULT	(1 << 15)
> -#define   ERR_INT_MMIO_UNCLAIMED	(1 << 13)
> -#define   ERR_INT_PIPE_CRC_DONE_C	(1 << 8)
> -#define   ERR_INT_FIFO_UNDERRUN_C	(1 << 6)
> -#define   ERR_INT_PIPE_CRC_DONE_B	(1 << 5)
> -#define   ERR_INT_FIFO_UNDERRUN_B	(1 << 3)
> -#define   ERR_INT_PIPE_CRC_DONE_A	(1 << 2)
> -#define   ERR_INT_PIPE_CRC_DONE(pipe)	(1 << (2 + (pipe) * 3))
> -#define   ERR_INT_FIFO_UNDERRUN_A	(1 << 0)
> -#define   ERR_INT_FIFO_UNDERRUN(pipe)	(1 << ((pipe) * 3))
> -
>  #define FPGA_DBG		_MMIO(0x42300)
>  #define   FPGA_DBG_RM_NOCLAIM	REG_BIT(31)
>  
> diff --git a/include/drm/intel/intel_gmd_common_regs.h b/include/drm/intel/intel_gmd_common_regs.h
> index 049349c365e3..2b2a7f21529a 100644
> --- a/include/drm/intel/intel_gmd_common_regs.h
> +++ b/include/drm/intel/intel_gmd_common_regs.h
> @@ -169,4 +169,27 @@
>  #define   INSTPM_TLB_INVALIDATE	(1 << 9)
>  #define   INSTPM_SYNC_FLUSH	(1 << 5)
>  
> +#define GEN7_ERR_INT	_MMIO(0x44040)
> +#define   ERR_INT_POISON		(1 << 31)
> +#define   ERR_INT_INVALID_GTT_PTE	(1 << 29)
> +#define   ERR_INT_INVALID_PTE_DATA	(1 << 28)
> +#define   ERR_INT_SPRITE_C_FAULT	(1 << 23)
> +#define   ERR_INT_PRIMARY_C_FAULT	(1 << 22)
> +#define   ERR_INT_CURSOR_C_FAULT	(1 << 21)
> +#define   ERR_INT_SPRITE_B_FAULT	(1 << 20)
> +#define   ERR_INT_PRIMARY_B_FAULT	(1 << 19)
> +#define   ERR_INT_CURSOR_B_FAULT	(1 << 18)
> +#define   ERR_INT_SPRITE_A_FAULT	(1 << 17)
> +#define   ERR_INT_PRIMARY_A_FAULT	(1 << 16)
> +#define   ERR_INT_CURSOR_A_FAULT	(1 << 15)
> +#define   ERR_INT_MMIO_UNCLAIMED	(1 << 13)
> +#define   ERR_INT_PIPE_CRC_DONE_C	(1 << 8)
> +#define   ERR_INT_FIFO_UNDERRUN_C	(1 << 6)
> +#define   ERR_INT_PIPE_CRC_DONE_B	(1 << 5)
> +#define   ERR_INT_FIFO_UNDERRUN_B	(1 << 3)
> +#define   ERR_INT_PIPE_CRC_DONE_A	(1 << 2)
> +#define   ERR_INT_PIPE_CRC_DONE(pipe)	(1 << (2 + (pipe) * 3))
> +#define   ERR_INT_FIFO_UNDERRUN_A	(1 << 0)
> +#define   ERR_INT_FIFO_UNDERRUN(pipe)	(1 << ((pipe) * 3))
> +
>  #endif

-- 
Jani Nikula, Intel

  reply	other threads:[~2026-01-22 12:14 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-21 23:23 [v2 00/19] Make Display free from i915_reg.h Uma Shankar
2026-01-21 23:23 ` [v2 01/19] drm/{i915, xe}: Extract display registers from i915_reg.h to display Uma Shankar
2026-01-22 11:16   ` Jani Nikula
2026-01-22 11:16   ` Jani Nikula
2026-01-23 10:38     ` Shankar, Uma
2026-01-21 23:23 ` [v2 02/19] drm/{i915, xe}: Extract South chicken " Uma Shankar
2026-01-22 11:26   ` Jani Nikula
2026-01-23 10:40     ` Shankar, Uma
2026-01-21 23:23 ` [v2 03/19] drm/{i915, xe}: Extract display interrupt definitions Uma Shankar
2026-01-22 11:29   ` Jani Nikula
2026-01-23 10:42     ` Shankar, Uma
2026-01-21 23:23 ` [v2 04/19] drm/{i915, xe}: Extract DSPCLK_GATE_D from i915_reg to display Uma Shankar
2026-01-22 11:31   ` Jani Nikula
2026-01-21 23:24 ` [v2 05/19] drm/{i915, xe}: Extract pcode definitions to common header Uma Shankar
2026-01-22 11:40   ` Jani Nikula
2026-01-23 10:45     ` Shankar, Uma
2026-01-22 11:46   ` Jani Nikula
2026-01-23 10:46     ` Shankar, Uma
2026-01-21 23:24 ` [v2 06/19] drm/{i915, xe}: Remove i915_reg.h from intel_display_device.c Uma Shankar
2026-01-22 11:36   ` Jani Nikula
2026-01-23 10:43     ` Shankar, Uma
2026-01-21 23:24 ` [v2 07/19] drm/{i915, xe}: Remove i915_reg.h from intel_dram.c Uma Shankar
2026-01-22 11:41   ` Jani Nikula
2026-01-23 10:45     ` Shankar, Uma
2026-01-21 23:24 ` [v2 08/19] drm/{i915, xe}: Removed i915_reg.h from intel_display.c Uma Shankar
2026-01-22 11:43   ` Jani Nikula
2026-01-21 23:24 ` [v2 09/19] drm/{i915, xe}: Remove i915_reg.h from intel_overlay.c Uma Shankar
2026-01-22 11:51   ` Jani Nikula
2026-01-23 10:47     ` Shankar, Uma
2026-01-21 23:24 ` [v2 10/19] drm/{i915, xe}: Remove i915_reg.h from g4x_dp.c Uma Shankar
2026-01-22 12:00   ` Jani Nikula
2026-01-23 10:48     ` Shankar, Uma
2026-01-21 23:24 ` [v2 11/19] drm/{i915, xe}: Remove i915_reg.h from i9xx_wm.c Uma Shankar
2026-01-21 23:24 ` [v2 12/19] drm/{i915, xe}: Remove i915_reg.h from g4x_hdmi.c Uma Shankar
2026-01-22 12:08   ` Jani Nikula
2026-01-21 23:24 ` [v2 13/19] drm/{i915, xe}: Remove i915_reg.h from intel_rom.c Uma Shankar
2026-01-22 12:09   ` Jani Nikula
2026-01-21 23:24 ` [v2 14/19] drm/{i915, xe}: Remove i915_reg.h from intel_psr.c Uma Shankar
2026-01-22 12:10   ` Jani Nikula
2026-01-21 23:24 ` [v2 15/19] drm/{i915, xe}: Remove i915_reg.h from intel_fifo_underrun.c Uma Shankar
2026-01-22 12:14   ` Jani Nikula [this message]
2026-01-23 10:49     ` Shankar, Uma
2026-01-21 23:24 ` [v2 16/19] drm/{i915, xe}: Remove i915_reg.h from intel_display_irq.c Uma Shankar
2026-01-22 12:18   ` Jani Nikula
2026-01-23 10:49     ` Shankar, Uma
2026-01-21 23:24 ` [v2 17/19] drm/{i915, xe}: Remove i915_reg.h from intel_display_power_well.c Uma Shankar
2026-01-22 12:19   ` Jani Nikula
2026-01-23 10:50     ` Shankar, Uma
2026-01-21 23:24 ` [v2 18/19] drm/{i915, xe}: Remove i915_reg.h from intel_modeset_setup.c Uma Shankar
2026-01-22 12:21   ` Jani Nikula
2026-01-21 23:24 ` [v2 19/19] drm/{i915, xe}: Remove i915_reg.h from display Uma Shankar
2026-01-22 12:20   ` Jani Nikula
2026-01-23 10:53     ` Shankar, Uma
2026-01-21 23:56 ` ✗ CI.checkpatch: warning for Make Display free from i915_reg.h (rev2) Patchwork
2026-01-21 23:58 ` ✓ CI.KUnit: success " Patchwork
2026-01-22  0:13 ` ✗ CI.checksparse: warning " Patchwork
2026-01-22  0:39 ` ✓ Xe.CI.BAT: success " Patchwork
2026-01-22 10:10 ` ✓ Xe.CI.Full: " Patchwork

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