Re: [v2 12/19] drm/{i915, xe}: Remove i915_reg.h from g4x_hdmi.c

[Jani Nikula <jani.nikula@intel.com>]

On Thu, 22 Jan 2026, Uma Shankar <uma.shankar@intel.com> wrote:
> Move TRANS_CHICKEN1 reg to display header to make g4x_hdmi.c
> free from i915_reg.h dependency.
>
> v2: Remove from common header in include and use display_regs.h (Jani)
>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/display/g4x_hdmi.c           |  1 -
>  drivers/gpu/drm/i915/display/intel_display_regs.h | 12 ++++++++++++
>  drivers/gpu/drm/i915/i915_reg.h                   | 12 ------------
>  3 files changed, 12 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 8b22447e8e23..5fe5067c4237 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -8,7 +8,6 @@
>  #include <drm/drm_print.h>
>  
>  #include "g4x_hdmi.h"
> -#include "i915_reg.h"
>  #include "intel_atomic.h"
>  #include "intel_audio.h"
>  #include "intel_connector.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 477896faa79e..2c7cd9002da3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -2122,6 +2122,18 @@
>  #define  TRANS_BPC_6			REG_FIELD_PREP(TRANS_BPC_MASK, 2)
>  #define  TRANS_BPC_12			REG_FIELD_PREP(TRANS_BPC_MASK, 3)
>  
> +/* Icelake PPS_DATA and _ECC DIP Registers.
> + * These are available for transcoders B,C and eDP.
> + * Adding the _A so as to reuse the _MMIO_TRANS2
> + * definition, with which it offsets to the right location.
> + */
> +
> +#define _TRANSA_CHICKEN1	 0xf0060
> +#define _TRANSB_CHICKEN1	 0xf1060
> +#define TRANS_CHICKEN1(pipe)	_MMIO_PIPE(pipe, _TRANSA_CHICKEN1, _TRANSB_CHICKEN1)
> +#define   TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE	REG_BIT(10)
> +#define   TRANS_CHICKEN1_DP0UNIT_GC_DISABLE	REG_BIT(4)
> +
>  #define _TRANSA_CHICKEN2	0xf0064
>  #define _TRANSB_CHICKEN2	0xf1064
>  #define TRANS_CHICKEN2(pipe)	_MMIO_PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index bd3871f458d6..5d640f7cfc23 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -836,18 +836,6 @@
>  #define   MASK_WAKEMEM				REG_BIT(13)
>  #define   DDI_CLOCK_REG_ACCESS			REG_BIT(7)
>  
> -/* Icelake PPS_DATA and _ECC DIP Registers.
> - * These are available for transcoders B,C and eDP.
> - * Adding the _A so as to reuse the _MMIO_TRANS2
> - * definition, with which it offsets to the right location.
> - */
> -
> -#define _TRANSA_CHICKEN1	 0xf0060
> -#define _TRANSB_CHICKEN1	 0xf1060
> -#define TRANS_CHICKEN1(pipe)	_MMIO_PIPE(pipe, _TRANSA_CHICKEN1, _TRANSB_CHICKEN1)
> -#define   TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE	REG_BIT(10)
> -#define   TRANS_CHICKEN1_DP0UNIT_GC_DISABLE	REG_BIT(4)
> -
>  #define  VLV_PMWGICZ				_MMIO(0x1300a4)
>  
>  #define  HSW_EDRAM_CAP				_MMIO(0x120010)

-- 
Jani Nikula, Intel