[PATCH v3 00/10] Crescent Island PMT support

[PATCH v3 00/10] Crescent Island PMT support

[Michael J. Ruhl]

The Crescent Island (CRI) GPU supports PMT via Xe driver
registration.

The CRI PMT MMIO mapping is shared for each PMT feature and it is
necessary to set an index register value to access the correct memory
space.

The PMT driver has a callback infrastructure to access data areas with
driver specific access. It is does not support the PMT control access.

CRI discovery/control spaces are part of the access window so a driver
callback is necessary to allow for the correct window to be exposed.

Add control path callback support to the PMT driver.

Add CRI PMT discovery information.

Update the Xe driver to support the CRI PMT access.

The crashlog access needs to be done with power enabled (telem is only
available when the device is powered).

Determine which access is requested, and do the appropriate power
request.

CRI FW is loaded at device power.  Support the late-binding API to
wait for FW readiness. (pending sysctl patch set implements the API).

v2:
  Address AI feedback:
  - add missing entry->cb check
  - address SRIOV VF concerns
  - use xe_pm_runtime_put instead of _get in error path

  Address review comments:
  - redo power/lock sequencing
  - support device hotplug events

v3:
  - cleanup power manangement flow
  - fixed an out of order power management locking issue
  - add a GUID caching mechanism, for GUID read
  - removed unused parameter (mmio)


Michael J. Ruhl (10):
  platform/x86/intel/pmt: complete pcidev to device update
  platform/x86/intel/pmt: Add register access callbacks
  drm/xe/vsec: Protect against missing config
  drm/xe/vsec: Use correct pm state get
  drm/xe/vsec: Support possible hotplug exit
  drm/xe/vsec: Support Crescent Island PMT
  drm/xe/vsec: Crescent Island PMT decode
  drm/xe/vsec: Crescent Island PMT callbacks
  drm/xe/vsec: Support late bind fw information
  drm/xe/vsec: Update PMT internal access for CRI

 drivers/gpu/drm/xe/regs/xe_pmt.h           |   9 +-
 drivers/gpu/drm/xe/xe_debugfs.c            |  44 +-
 drivers/gpu/drm/xe/xe_device.c             |   4 +-
 drivers/gpu/drm/xe/xe_device_types.h       |   8 +
 drivers/gpu/drm/xe/xe_hwmon.c              |  10 +-
 drivers/gpu/drm/xe/xe_pcode.c              |  10 +-
 drivers/gpu/drm/xe/xe_vsec.c               | 536 +++++++++++++++++++--
 drivers/gpu/drm/xe/xe_vsec.h               |   3 +-
 drivers/platform/x86/intel/pmt/class.c     |   5 +-
 drivers/platform/x86/intel/pmt/class.h     |   3 +-
 drivers/platform/x86/intel/pmt/crashlog.c  |  39 +-
 drivers/platform/x86/intel/pmt/discovery.c |   2 +-
 include/linux/intel_vsec.h                 |  14 +-
 13 files changed, 607 insertions(+), 80 deletions(-)

-- 
2.43.0

[PATCH v3 01/10] platform/x86/intel/pmt: complete pcidev to device update

[Michael J. Ruhl]

Previously the pcidev usage was moved to the struct device.
The struct device is set for only the telemetry endpoints.

This usage prevents other PMT features (crashlog) from using
the callback mechanism.

Use struct device in the intel_pmt_entry.
Update callback usage to os the pmt entry rather than the
telemetry endpoint.

Fixes: 353042d54d82 ("platform/x86/intel/vsec: Switch exported helpers from pci_dev to device")
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/class.c     | 5 ++---
 drivers/platform/x86/intel/pmt/class.h     | 3 +--
 drivers/platform/x86/intel/pmt/discovery.c | 2 +-
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
index d0ab8e33c62a..402d51df834a 100644
--- a/drivers/platform/x86/intel/pmt/class.c
+++ b/drivers/platform/x86/intel/pmt/class.c
@@ -100,7 +100,7 @@ intel_pmt_read(struct file *filp, struct kobject *kobj,
 	if (count > entry->size - off)
 		count = entry->size - off;
 
-	count = pmt_telem_read_mmio(entry->ep->dev, entry->cb, entry->header.guid, buf,
+	count = pmt_telem_read_mmio(entry->dev, entry->cb, entry->header.guid, buf,
 				    entry->base, off, count);
 
 	return count;
@@ -286,8 +286,6 @@ static int pmt_resolve_access_pci(struct intel_pmt_entry *entry,
 		return -EINVAL;
 	}
 
-	entry->pcidev = pci_dev;
-
 	return 0;
 }
 
@@ -365,6 +363,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
 	entry->guid = header->guid;
 	entry->size = header->size;
 	entry->cb = ivdev->priv_data;
+	entry->dev = ivdev->dev;
 
 	return 0;
 }
diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
index a0ece4fc3837..258cb460e61c 100644
--- a/drivers/platform/x86/intel/pmt/class.h
+++ b/drivers/platform/x86/intel/pmt/class.h
@@ -20,7 +20,6 @@
 #define GET_ADDRESS(v)		((v) & GENMASK(31, 3))
 
 struct device;
-struct pci_dev;
 extern struct class intel_pmt_class;
 
 struct telem_endpoint {
@@ -42,7 +41,7 @@ struct intel_pmt_header {
 
 struct intel_pmt_entry {
 	struct telem_endpoint	*ep;
-	struct pci_dev		*pcidev;
+	struct device		*dev;
 	struct intel_pmt_header	header;
 	u32			disc_header[PMT_DISC_DWORDS];
 	struct bin_attribute	pmt_bin_attr;
diff --git a/drivers/platform/x86/intel/pmt/discovery.c b/drivers/platform/x86/intel/pmt/discovery.c
index c482368bfaae..f4203d240f54 100644
--- a/drivers/platform/x86/intel/pmt/discovery.c
+++ b/drivers/platform/x86/intel/pmt/discovery.c
@@ -609,7 +609,7 @@ void intel_pmt_get_features(struct intel_pmt_entry *entry)
 
 	mutex_lock(&feature_list_lock);
 	list_for_each_entry(feature, &pmt_feature_list, list) {
-		if (feature->priv->parent != entry->ep->dev)
+		if (feature->priv->parent != entry->dev)
 			continue;
 
 		pmt_get_features(entry, feature);
-- 
2.43.0

Re: [PATCH v3 01/10] platform/x86/intel/pmt: complete pcidev to device update

[Rodrigo Vivi]

On Mon, Aug 24, 2026 at 09:23:17AM -0700, Michael J. Ruhl wrote:
> Previously the pcidev usage was moved to the struct device.
> The struct device is set for only the telemetry endpoints.
> 
> This usage prevents other PMT features (crashlog) from using
> the callback mechanism.
> 
> Use struct device in the intel_pmt_entry.
> Update callback usage to os the pmt entry rather than the
> telemetry endpoint.
> 
> Fixes: 353042d54d82 ("platform/x86/intel/vsec: Switch exported helpers from pci_dev to device")
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>


Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Dave, Hans, Ilpo, ack on getting this through the drm-xe-next tree?

Thanks,
Rodrigo.

> ---
>  drivers/platform/x86/intel/pmt/class.c     | 5 ++---
>  drivers/platform/x86/intel/pmt/class.h     | 3 +--
>  drivers/platform/x86/intel/pmt/discovery.c | 2 +-
>  3 files changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
> index d0ab8e33c62a..402d51df834a 100644
> --- a/drivers/platform/x86/intel/pmt/class.c
> +++ b/drivers/platform/x86/intel/pmt/class.c
> @@ -100,7 +100,7 @@ intel_pmt_read(struct file *filp, struct kobject *kobj,
>  	if (count > entry->size - off)
>  		count = entry->size - off;
>  
> -	count = pmt_telem_read_mmio(entry->ep->dev, entry->cb, entry->header.guid, buf,
> +	count = pmt_telem_read_mmio(entry->dev, entry->cb, entry->header.guid, buf,
>  				    entry->base, off, count);
>  
>  	return count;
> @@ -286,8 +286,6 @@ static int pmt_resolve_access_pci(struct intel_pmt_entry *entry,
>  		return -EINVAL;
>  	}
>  
> -	entry->pcidev = pci_dev;
> -
>  	return 0;
>  }
>  
> @@ -365,6 +363,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
>  	entry->guid = header->guid;
>  	entry->size = header->size;
>  	entry->cb = ivdev->priv_data;
> +	entry->dev = ivdev->dev;
>  
>  	return 0;
>  }
> diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
> index a0ece4fc3837..258cb460e61c 100644
> --- a/drivers/platform/x86/intel/pmt/class.h
> +++ b/drivers/platform/x86/intel/pmt/class.h
> @@ -20,7 +20,6 @@
>  #define GET_ADDRESS(v)		((v) & GENMASK(31, 3))
>  
>  struct device;
> -struct pci_dev;
>  extern struct class intel_pmt_class;
>  
>  struct telem_endpoint {
> @@ -42,7 +41,7 @@ struct intel_pmt_header {
>  
>  struct intel_pmt_entry {
>  	struct telem_endpoint	*ep;
> -	struct pci_dev		*pcidev;
> +	struct device		*dev;
>  	struct intel_pmt_header	header;
>  	u32			disc_header[PMT_DISC_DWORDS];
>  	struct bin_attribute	pmt_bin_attr;
> diff --git a/drivers/platform/x86/intel/pmt/discovery.c b/drivers/platform/x86/intel/pmt/discovery.c
> index c482368bfaae..f4203d240f54 100644
> --- a/drivers/platform/x86/intel/pmt/discovery.c
> +++ b/drivers/platform/x86/intel/pmt/discovery.c
> @@ -609,7 +609,7 @@ void intel_pmt_get_features(struct intel_pmt_entry *entry)
>  
>  	mutex_lock(&feature_list_lock);
>  	list_for_each_entry(feature, &pmt_feature_list, list) {
> -		if (feature->priv->parent != entry->ep->dev)
> +		if (feature->priv->parent != entry->dev)
>  			continue;
>  
>  		pmt_get_features(entry, feature);
> -- 
> 2.43.0
> 

Re: [PATCH v3 01/10] platform/x86/intel/pmt: complete pcidev to device update

[Ilpo Järvinen]

On Mon, 24 Aug 2026, Rodrigo Vivi wrote:

> On Mon, Aug 24, 2026 at 09:23:17AM -0700, Michael J. Ruhl wrote:
> > Previously the pcidev usage was moved to the struct device.
> > The struct device is set for only the telemetry endpoints.
> > 
> > This usage prevents other PMT features (crashlog) from using
> > the callback mechanism.
> > 
> > Use struct device in the intel_pmt_entry.
> > Update callback usage to os the pmt entry rather than the
> > telemetry endpoint.
> > 
> > Fixes: 353042d54d82 ("platform/x86/intel/vsec: Switch exported helpers from pci_dev to device")
> > Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> 
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> Dave, Hans, Ilpo, ack on getting this through the drm-xe-next tree?

Does David have anything in the horizon for the upcoming for-next cycle 
that could potentially conflict with this?

If not, then it would be fine for me to merge this through the drm-xe-next 
tree (the second patch needs some work though).

> Thanks,
> Rodrigo.
> 
> > ---
> >  drivers/platform/x86/intel/pmt/class.c     | 5 ++---
> >  drivers/platform/x86/intel/pmt/class.h     | 3 +--
> >  drivers/platform/x86/intel/pmt/discovery.c | 2 +-
> >  3 files changed, 4 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
> > index d0ab8e33c62a..402d51df834a 100644
> > --- a/drivers/platform/x86/intel/pmt/class.c
> > +++ b/drivers/platform/x86/intel/pmt/class.c
> > @@ -100,7 +100,7 @@ intel_pmt_read(struct file *filp, struct kobject *kobj,
> >  	if (count > entry->size - off)
> >  		count = entry->size - off;
> >  
> > -	count = pmt_telem_read_mmio(entry->ep->dev, entry->cb, entry->header.guid, buf,
> > +	count = pmt_telem_read_mmio(entry->dev, entry->cb, entry->header.guid, buf,
> >  				    entry->base, off, count);
> >  
> >  	return count;
> > @@ -286,8 +286,6 @@ static int pmt_resolve_access_pci(struct intel_pmt_entry *entry,
> >  		return -EINVAL;
> >  	}
> >  
> > -	entry->pcidev = pci_dev;
> > -
> >  	return 0;
> >  }
> >  
> > @@ -365,6 +363,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
> >  	entry->guid = header->guid;
> >  	entry->size = header->size;
> >  	entry->cb = ivdev->priv_data;
> > +	entry->dev = ivdev->dev;
> >  
> >  	return 0;
> >  }
> > diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
> > index a0ece4fc3837..258cb460e61c 100644
> > --- a/drivers/platform/x86/intel/pmt/class.h
> > +++ b/drivers/platform/x86/intel/pmt/class.h
> > @@ -20,7 +20,6 @@
> >  #define GET_ADDRESS(v)		((v) & GENMASK(31, 3))
> >  
> >  struct device;
> > -struct pci_dev;
> >  extern struct class intel_pmt_class;
> >  
> >  struct telem_endpoint {
> > @@ -42,7 +41,7 @@ struct intel_pmt_header {
> >  
> >  struct intel_pmt_entry {
> >  	struct telem_endpoint	*ep;
> > -	struct pci_dev		*pcidev;
> > +	struct device		*dev;
> >  	struct intel_pmt_header	header;
> >  	u32			disc_header[PMT_DISC_DWORDS];
> >  	struct bin_attribute	pmt_bin_attr;
> > diff --git a/drivers/platform/x86/intel/pmt/discovery.c b/drivers/platform/x86/intel/pmt/discovery.c
> > index c482368bfaae..f4203d240f54 100644
> > --- a/drivers/platform/x86/intel/pmt/discovery.c
> > +++ b/drivers/platform/x86/intel/pmt/discovery.c
> > @@ -609,7 +609,7 @@ void intel_pmt_get_features(struct intel_pmt_entry *entry)
> >  
> >  	mutex_lock(&feature_list_lock);
> >  	list_for_each_entry(feature, &pmt_feature_list, list) {
> > -		if (feature->priv->parent != entry->ep->dev)
> > +		if (feature->priv->parent != entry->dev)
> >  			continue;
> >  
> >  		pmt_get_features(entry, feature);
> > -- 
> > 2.43.0
> > 
> 

-- 
 i.

Re: [PATCH v3 01/10] platform/x86/intel/pmt: complete pcidev to device update

[Ilpo Järvinen]

On Mon, 24 Aug 2026, Michael J. Ruhl wrote:

> Previously the pcidev usage was moved to the struct device.
> The struct device is set for only the telemetry endpoints.

I fail to understand any of this (1st sentence has even broken grammar 
afaict, and we don't set struct x but variables pointing to them). Please 
rephrase.

> This usage prevents other PMT features (crashlog) from using

What "this usage". Perhaps try to avoid using "this" as it often results 
in very vague references.

> the callback mechanism.
> 
> Use struct device in the intel_pmt_entry.

Don't leave lines short like this in middle of a paragraph.

> Update callback usage to os the pmt entry rather than the
> telemetry endpoint.
>
> Fixes: 353042d54d82 ("platform/x86/intel/vsec: Switch exported helpers from pci_dev to device")

With no changelog understandable for mere mortals like me, my assumptions 
is 353042d54d82 was incomplete, is that what you tried to say?

> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/class.c     | 5 ++---
>  drivers/platform/x86/intel/pmt/class.h     | 3 +--
>  drivers/platform/x86/intel/pmt/discovery.c | 2 +-
>  3 files changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
> index d0ab8e33c62a..402d51df834a 100644
> --- a/drivers/platform/x86/intel/pmt/class.c
> +++ b/drivers/platform/x86/intel/pmt/class.c
> @@ -100,7 +100,7 @@ intel_pmt_read(struct file *filp, struct kobject *kobj,
>  	if (count > entry->size - off)
>  		count = entry->size - off;
>  
> -	count = pmt_telem_read_mmio(entry->ep->dev, entry->cb, entry->header.guid, buf,
> +	count = pmt_telem_read_mmio(entry->dev, entry->cb, entry->header.guid, buf,
>  				    entry->base, off, count);
>  
>  	return count;
> @@ -286,8 +286,6 @@ static int pmt_resolve_access_pci(struct intel_pmt_entry *entry,
>  		return -EINVAL;
>  	}
>  
> -	entry->pcidev = pci_dev;
> -
>  	return 0;
>  }
>  
> @@ -365,6 +363,7 @@ static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
>  	entry->guid = header->guid;
>  	entry->size = header->size;
>  	entry->cb = ivdev->priv_data;
> +	entry->dev = ivdev->dev;
>  
>  	return 0;
>  }
> diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
> index a0ece4fc3837..258cb460e61c 100644
> --- a/drivers/platform/x86/intel/pmt/class.h
> +++ b/drivers/platform/x86/intel/pmt/class.h
> @@ -20,7 +20,6 @@
>  #define GET_ADDRESS(v)		((v) & GENMASK(31, 3))
>  
>  struct device;
> -struct pci_dev;
>  extern struct class intel_pmt_class;
>  
>  struct telem_endpoint {
> @@ -42,7 +41,7 @@ struct intel_pmt_header {
>  
>  struct intel_pmt_entry {
>  	struct telem_endpoint	*ep;
> -	struct pci_dev		*pcidev;
> +	struct device		*dev;
>  	struct intel_pmt_header	header;
>  	u32			disc_header[PMT_DISC_DWORDS];
>  	struct bin_attribute	pmt_bin_attr;
> diff --git a/drivers/platform/x86/intel/pmt/discovery.c b/drivers/platform/x86/intel/pmt/discovery.c
> index c482368bfaae..f4203d240f54 100644
> --- a/drivers/platform/x86/intel/pmt/discovery.c
> +++ b/drivers/platform/x86/intel/pmt/discovery.c
> @@ -609,7 +609,7 @@ void intel_pmt_get_features(struct intel_pmt_entry *entry)
>  
>  	mutex_lock(&feature_list_lock);
>  	list_for_each_entry(feature, &pmt_feature_list, list) {
> -		if (feature->priv->parent != entry->ep->dev)
> +		if (feature->priv->parent != entry->dev)
>  			continue;
>  
>  		pmt_get_features(entry, feature);
> 

-- 
 i.

[PATCH v3 02/10] platform/x86/intel/pmt: Add register access callbacks

[Michael J. Ruhl]

Some HW does not have direct MMIO access to PMT control and data
features.

Augment the current callback infrastructure (data access) to allow
a registered driver to customize read/write access to the control
paths for PMT usage.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 39 +++++++++++++++++++++--
 include/linux/intel_vsec.h                | 14 +++++++-
 2 files changed, 49 insertions(+), 4 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index f936daf99e4d..5923ad7abbd9 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -129,7 +129,19 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
 {
 	const struct crashlog_control *control = &crashlog->info->control;
 	struct intel_pmt_entry *entry = &crashlog->entry;
-	u32 reg = readl(entry->disc_table + control->offset);
+	u32 guid = entry->header.guid;
+	u32 reg;
+	int err;
+
+	if (entry->cb && entry->cb->read_reg) {
+		err = entry->cb->read_reg(entry->dev, guid, &reg, control->offset);
+		if (err) {
+			pr_err("%s: failed to read reg: %d\n", __func__, err);
+			return;
+		}
+	} else {
+		reg = readl(entry->disc_table + control->offset);
+	}
 
 	reg &= ~control->trigger_mask;
 
@@ -138,14 +150,35 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
 	else
 		reg &= ~bit;
 
-	writel(reg, entry->disc_table + control->offset);
+	if (entry->cb && entry->cb->write_reg) {
+		err = entry->cb->write_reg(entry->dev, guid, reg, control->offset);
+		if (err) {
+			pr_err("%s: failed to write reg: %d\n", __func__, err);
+			return;
+		}
+	} else {
+		writel(reg, entry->disc_table + control->offset);
+	}
 }
 
 /* Read the status register and see if the specified @bit is set */
 static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
 {
 	const struct crashlog_status *status = &crashlog->info->status;
-	u32 reg = readl(crashlog->entry.disc_table + status->offset);
+	struct intel_pmt_entry *entry = &crashlog->entry;
+	u32 guid = entry->header.guid;
+	u32 reg;
+	int err;
+
+	if (entry->cb && entry->cb->read_reg) {
+		err = entry->cb->read_reg(entry->dev, guid, &reg, status->offset);
+		if (err) {
+			pr_err("%s: failed to read reg: %d\n", __func__, err);
+			return false;
+		}
+	} else {
+		reg = readl(crashlog->entry.disc_table + status->offset);
+	}
 
 	return !!(reg & bit);
 }
diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h
index 843cda8f8644..917d9397a993 100644
--- a/include/linux/intel_vsec.h
+++ b/include/linux/intel_vsec.h
@@ -90,13 +90,25 @@ enum intel_vsec_quirks {
  * @read_telem: when specified, called by client driver to access PMT
  * data (instead of direct copy).
  * * dev:   device reference for the callback's use
- * * guid:  ID of data to acccss
+ * * guid:  ID of data to access
  * * data:  buffer for the data to be copied
  * * off:   offset into the requested buffer
  * * count: size of buffer
+ * @read_reg: when specified called by client driver to read PMT state
+ * * dev:      device reference for the callback's use
+ * * guid:     ID of data to access
+ * * reg_data: register data
+ * * offset:   offset of register to read
+ * @write_reg: when specified called by client driver to write PMT state
+ * * dev:      device reference for the callback's use
+ * * guid:     ID of data to access
+ * * reg_data: register data
+ * * offset:   offset of register to write
  */
 struct pmt_callbacks {
 	int (*read_telem)(struct device *dev, u32 guid, u64 *data, loff_t off, u32 count);
+	int (*read_reg)(struct device *dev, u32 guid, u32 *reg_data, u32 offset);
+	int (*write_reg)(struct device *dev, u32 guid, u32 reg_data, u32 offset);
 };
 
 struct vsec_feature_dependency {
-- 
2.43.0

Re: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access callbacks

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Hardware access errors from `read_reg` and `write_reg` callbacks are ignored and not propagated to sysfs callers.
- [Medium] Unratelimited pr_err() in sysfs read/write paths allows kernel log flooding.
--

--- Patch [2]: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access callbacks ---
Note: The format of this review is altered and does not include direct quotes
of the patch code due to recitation restrictions.

commit 6dda4f7e76b3694a6fb7bf21ac1d00ef75cff3ff
Author: Michael J. Ruhl <michael.j.ruhl@intel.com>
Subject: platform/x86/intel/pmt: Add register access callbacks

This commit augments the PMT callback infrastructure to allow drivers to
customize read and write access to control paths for PMT usage. It is intended
for hardware lacking direct MMIO access.

In drivers/platform/x86/intel/pmt/crashlog.c, the modified pmt_crashlog_rmw()
and pmt_crashlog_rc() functions check for errors from the new read_reg and
write_reg callbacks, but they do not propagate these error codes back up the
call stack.

[Severity: Medium]
Is it expected that hardware access failures are silently swallowed here?

When read_reg or write_reg fails in pmt_crashlog_rmw(), the function returns
void, and when read_reg fails in pmt_crashlog_rc(), it returns false. Because
these errors are not propagated, sysfs store operations will falsely report
success to userspace by returning the written byte count. Similarly, sysfs
reads will present hardware errors as a valid false state. Will this break
monitoring and management tools that rely on accurate return codes?

Additionally, the error handling paths in these same functions introduce
logging statements.

[Severity: Medium]
Could the unratelimited pr_err() calls in these functions cause kernel log
flooding?

If the hardware is in a state where read_reg or write_reg consistently fails,
an unprivileged user reading a world-readable sysfs attribute in a tight loop
will repeatedly trigger pmt_crashlog_rc(). Would it be safer to use ratelimited
logging here to prevent potential syslog I/O overhead and the dropping of other
important logs?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260824162317.2450380-12-michael.j.ruhl@intel.com?part=2

RE: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access callbacks

[Ruhl, Michael J]

>-----Original Message-----
>From: sashiko-bot@kernel.org <sashiko-bot@kernel.org>
>Sent: Monday, August 24, 2026 12:36 PM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: intel-xe@lists.freedesktop.org
>Subject: Re: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access
>callbacks
>
>Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to
>consider:
>- [Medium] Hardware access errors from `read_reg` and `write_reg` callbacks
>are ignored and not propagated to sysfs callers.
>- [Medium] Unratelimited pr_err() in sysfs read/write paths allows kernel log
>flooding.
>--
>
>--- Patch [2]: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access
>callbacks ---
>Note: The format of this review is altered and does not include direct quotes
>of the patch code due to recitation restrictions.
>
>commit 6dda4f7e76b3694a6fb7bf21ac1d00ef75cff3ff
>Author: Michael J. Ruhl <michael.j.ruhl@intel.com>
>Subject: platform/x86/intel/pmt: Add register access callbacks
>
>This commit augments the PMT callback infrastructure to allow drivers to
>customize read and write access to control paths for PMT usage. It is intended
>for hardware lacking direct MMIO access.
>
>In drivers/platform/x86/intel/pmt/crashlog.c, the modified
>pmt_crashlog_rmw()
>and pmt_crashlog_rc() functions check for errors from the new read_reg and
>write_reg callbacks, but they do not propagate these error codes back up the
>call stack.
>
>[Severity: Medium]
>Is it expected that hardware access failures are silently swallowed here?
>
>When read_reg or write_reg fails in pmt_crashlog_rmw(), the function returns
>void, and when read_reg fails in pmt_crashlog_rc(), it returns false. Because
>these errors are not propagated, sysfs store operations will falsely report
>success to userspace by returning the written byte count. Similarly, sysfs
>reads will present hardware errors as a valid false state. Will this break
>monitoring and management tools that rely on accurate return codes?

Yes.  This is a best effort operation.  If the HW access failures, it is up to the user to
interpret the data.

>Additionally, the error handling paths in these same functions introduce
>logging statements.
>
>[Severity: Medium]
>Could the unratelimited pr_err() calls in these functions cause kernel log
>flooding?
>
>If the hardware is in a state where read_reg or write_reg consistently fails,
>an unprivileged user reading a world-readable sysfs attribute in a tight loop
>will repeatedly trigger pmt_crashlog_rc(). Would it be safer to use ratelimited
>logging here to prevent potential syslog I/O overhead and the dropping of
>other important logs?

This makes sense.  I will update.

m

>
>--
>Sashiko AI review ·
>https://sashiko.dev/#/patchset/20260824162317.2450380-12-
>michael.j.ruhl@intel.com?part=2

Re: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access callbacks

[Ilpo Järvinen]

On Mon, 24 Aug 2026, Michael J. Ruhl wrote:

> Some HW does not have direct MMIO access to PMT control and data
> features.
> 
> Augment the current callback infrastructure (data access) to allow
> a registered driver to customize read/write access to the control
> paths for PMT usage.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/crashlog.c | 39 +++++++++++++++++++++--
>  include/linux/intel_vsec.h                | 14 +++++++-
>  2 files changed, 49 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
> index f936daf99e4d..5923ad7abbd9 100644
> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> @@ -129,7 +129,19 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
>  {
>  	const struct crashlog_control *control = &crashlog->info->control;
>  	struct intel_pmt_entry *entry = &crashlog->entry;
> -	u32 reg = readl(entry->disc_table + control->offset);
> +	u32 guid = entry->header.guid;
> +	u32 reg;
> +	int err;
> +
> +	if (entry->cb && entry->cb->read_reg) {
> +		err = entry->cb->read_reg(entry->dev, guid, &reg, control->offset);
> +		if (err) {
> +			pr_err("%s: failed to read reg: %d\n", __func__, err);

Never print __func__ in any user consumable message (level > debug) but 
write the message in plain English.

Also, this needs include.

> +			return;
> +		}
> +	} else {
> +		reg = readl(entry->disc_table + control->offset);

Add include.

> +	}
>  
>  	reg &= ~control->trigger_mask;
>  
> @@ -138,14 +150,35 @@ static void pmt_crashlog_rmw(struct crashlog_entry *crashlog, u32 bit, bool set)
>  	else
>  		reg &= ~bit;
>  
> -	writel(reg, entry->disc_table + control->offset);
> +	if (entry->cb && entry->cb->write_reg) {
> +		err = entry->cb->write_reg(entry->dev, guid, reg, control->offset);
> +		if (err) {
> +			pr_err("%s: failed to write reg: %d\n", __func__, err);

Rephrase without using __func__.

> +			return;
> +		}
> +	} else {
> +		writel(reg, entry->disc_table + control->offset);
> +	}
>  }
>  
>  /* Read the status register and see if the specified @bit is set */
>  static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
>  {
>  	const struct crashlog_status *status = &crashlog->info->status;
> -	u32 reg = readl(crashlog->entry.disc_table + status->offset);
> +	struct intel_pmt_entry *entry = &crashlog->entry;
> +	u32 guid = entry->header.guid;
> +	u32 reg;
> +	int err;
> +
> +	if (entry->cb && entry->cb->read_reg) {
> +		err = entry->cb->read_reg(entry->dev, guid, &reg, status->offset);
> +		if (err) {
> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
> +			return false;

It seems you need a lerger rework here to properly return error codes.

> +		}
> +	} else {
> +		reg = readl(crashlog->entry.disc_table + status->offset);

entry->disc_table

> +	}

This looks mostly duplicated code, add a helper?

>  
>  	return !!(reg & bit);
>  }
> diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h
> index 843cda8f8644..917d9397a993 100644
> --- a/include/linux/intel_vsec.h
> +++ b/include/linux/intel_vsec.h
> @@ -90,13 +90,25 @@ enum intel_vsec_quirks {
>   * @read_telem: when specified, called by client driver to access PMT
>   * data (instead of direct copy).
>   * * dev:   device reference for the callback's use
> - * * guid:  ID of data to acccss
> + * * guid:  ID of data to access
>   * * data:  buffer for the data to be copied
>   * * off:   offset into the requested buffer
>   * * count: size of buffer
> + * @read_reg: when specified called by client driver to read PMT state
> + * * dev:      device reference for the callback's use
> + * * guid:     ID of data to access
> + * * reg_data: register data
> + * * offset:   offset of register to read
> + * @write_reg: when specified called by client driver to write PMT state
> + * * dev:      device reference for the callback's use
> + * * guid:     ID of data to access
> + * * reg_data: register data
> + * * offset:   offset of register to write
>   */
>  struct pmt_callbacks {
>  	int (*read_telem)(struct device *dev, u32 guid, u64 *data, loff_t off, u32 count);
> +	int (*read_reg)(struct device *dev, u32 guid, u32 *reg_data, u32 offset);
> +	int (*write_reg)(struct device *dev, u32 guid, u32 reg_data, u32 offset);
>  };
>  
>  struct vsec_feature_dependency {
> 

-- 
 i.

RE: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access callbacks

[Ruhl, Michael J]

>-----Original Message-----
>From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>Sent: Tuesday, August 25, 2026 5:35 AM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org; Hans
>de Goede <hansg@kernel.org>; Brost, Matthew <matthew.brost@intel.com>;
>Vivi, Rodrigo <rodrigo.vivi@intel.com>; thomas.hellstrom@linux.intel.com;
>airlied@gmail.com; simona@ffwll.ch; david.e.box@linux.intel.com; Vijay,
>Anoop C <anoop.c.vijay@intel.com>; Nilawar, Badal
><badal.nilawar@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>;
>Ausmus, James <james.ausmus@intel.com>; Poosa, Karthik
><karthik.poosa@intel.com>
>Subject: Re: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access
>callbacks
>
>On Mon, 24 Aug 2026, Michael J. Ruhl wrote:
>
>> Some HW does not have direct MMIO access to PMT control and data
>> features.
>>
>> Augment the current callback infrastructure (data access) to allow
>> a registered driver to customize read/write access to the control
>> paths for PMT usage.
>>
>> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
>> ---
>>  drivers/platform/x86/intel/pmt/crashlog.c | 39 +++++++++++++++++++++-
>-
>>  include/linux/intel_vsec.h                | 14 +++++++-
>>  2 files changed, 49 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c
>b/drivers/platform/x86/intel/pmt/crashlog.c
>> index f936daf99e4d..5923ad7abbd9 100644
>> --- a/drivers/platform/x86/intel/pmt/crashlog.c
>> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
>> @@ -129,7 +129,19 @@ static void pmt_crashlog_rmw(struct
>crashlog_entry *crashlog, u32 bit, bool set)
>>  {
>>  	const struct crashlog_control *control = &crashlog->info->control;
>>  	struct intel_pmt_entry *entry = &crashlog->entry;
>> -	u32 reg = readl(entry->disc_table + control->offset);
>> +	u32 guid = entry->header.guid;
>> +	u32 reg;
>> +	int err;
>> +
>> +	if (entry->cb && entry->cb->read_reg) {
>> +		err = entry->cb->read_reg(entry->dev, guid, &reg, control-
>>offset);
>> +		if (err) {
>> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
>
>Never print __func__ in any user consumable message (level > debug) but
>write the message in plain English.
>
>Also, this needs include.
>
>> +			return;
>> +		}
>> +	} else {
>> +		reg = readl(entry->disc_table + control->offset);
>
>Add include.

I have added the linux/printk.h include... I am not clear on the correct readl inclued.

Should this be <linux/io.h> or <include/asm-generic/io.h>?

>> +	}
>>
>>  	reg &= ~control->trigger_mask;
>>
>> @@ -138,14 +150,35 @@ static void pmt_crashlog_rmw(struct
>crashlog_entry *crashlog, u32 bit, bool set)
>>  	else
>>  		reg &= ~bit;
>>
>> -	writel(reg, entry->disc_table + control->offset);
>> +	if (entry->cb && entry->cb->write_reg) {
>> +		err = entry->cb->write_reg(entry->dev, guid, reg, control-
>>offset);
>> +		if (err) {
>> +			pr_err("%s: failed to write reg: %d\n", __func__, err);
>
>Rephrase without using __func__.

This was for my internal debugging and should have been cleaned up.  Removed.

>> +			return;
>> +		}
>> +	} else {
>> +		writel(reg, entry->disc_table + control->offset);
>> +	}
>>  }
>>
>>  /* Read the status register and see if the specified @bit is set */
>>  static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
>>  {
>>  	const struct crashlog_status *status = &crashlog->info->status;
>> -	u32 reg = readl(crashlog->entry.disc_table + status->offset);
>> +	struct intel_pmt_entry *entry = &crashlog->entry;
>> +	u32 guid = entry->header.guid;
>> +	u32 reg;
>> +	int err;
>> +
>> +	if (entry->cb && entry->cb->read_reg) {
>> +		err = entry->cb->read_reg(entry->dev, guid, &reg, status-
>>offset);
>> +		if (err) {
>> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
>> +			return false;
>
>It seems you need a lerger rework here to properly return error codes.

Yes, there would be a significant rework (almost all internal functions will need to be updated)
to return the error codes.  This seems out of scope for these updates.

Does this need to be addressed to make progress on this patch set?  Or can we work on that
in the future?

>> +		}
>> +	} else {
>> +		reg = readl(crashlog->entry.disc_table + status->offset);
>
>entry->disc_table
>
>> +	}
>
>This looks mostly duplicated code, add a helper?

done

M

>>
>>  	return !!(reg & bit);
>>  }
>> diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h
>> index 843cda8f8644..917d9397a993 100644
>> --- a/include/linux/intel_vsec.h
>> +++ b/include/linux/intel_vsec.h
>> @@ -90,13 +90,25 @@ enum intel_vsec_quirks {
>>   * @read_telem: when specified, called by client driver to access PMT
>>   * data (instead of direct copy).
>>   * * dev:   device reference for the callback's use
>> - * * guid:  ID of data to acccss
>> + * * guid:  ID of data to access
>>   * * data:  buffer for the data to be copied
>>   * * off:   offset into the requested buffer
>>   * * count: size of buffer
>> + * @read_reg: when specified called by client driver to read PMT state
>> + * * dev:      device reference for the callback's use
>> + * * guid:     ID of data to access
>> + * * reg_data: register data
>> + * * offset:   offset of register to read
>> + * @write_reg: when specified called by client driver to write PMT state
>> + * * dev:      device reference for the callback's use
>> + * * guid:     ID of data to access
>> + * * reg_data: register data
>> + * * offset:   offset of register to write
>>   */
>>  struct pmt_callbacks {
>>  	int (*read_telem)(struct device *dev, u32 guid, u64 *data, loff_t off,
>u32 count);
>> +	int (*read_reg)(struct device *dev, u32 guid, u32 *reg_data, u32
>offset);
>> +	int (*write_reg)(struct device *dev, u32 guid, u32 reg_data, u32
>offset);
>>  };
>>
>>  struct vsec_feature_dependency {
>>
>
>--
> i.

RE: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access callbacks

[Ilpo Järvinen]

[-- Attachment #1: Type: text/plain, Size: 5169 bytes --]

On Wed, 26 Aug 2026, Ruhl, Michael J wrote:

> >-----Original Message-----
> >From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> >Sent: Tuesday, August 25, 2026 5:35 AM
> >To: Ruhl, Michael J <michael.j.ruhl@intel.com>
> >Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org; Hans
> >de Goede <hansg@kernel.org>; Brost, Matthew <matthew.brost@intel.com>;
> >Vivi, Rodrigo <rodrigo.vivi@intel.com>; thomas.hellstrom@linux.intel.com;
> >airlied@gmail.com; simona@ffwll.ch; david.e.box@linux.intel.com; Vijay,
> >Anoop C <anoop.c.vijay@intel.com>; Nilawar, Badal
> ><badal.nilawar@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>;
> >Ausmus, James <james.ausmus@intel.com>; Poosa, Karthik
> ><karthik.poosa@intel.com>
> >Subject: Re: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access
> >callbacks
> >
> >On Mon, 24 Aug 2026, Michael J. Ruhl wrote:
> >
> >> Some HW does not have direct MMIO access to PMT control and data
> >> features.
> >>
> >> Augment the current callback infrastructure (data access) to allow
> >> a registered driver to customize read/write access to the control
> >> paths for PMT usage.
> >>
> >> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> >> ---
> >>  drivers/platform/x86/intel/pmt/crashlog.c | 39 +++++++++++++++++++++-
> >-
> >>  include/linux/intel_vsec.h                | 14 +++++++-
> >>  2 files changed, 49 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c
> >b/drivers/platform/x86/intel/pmt/crashlog.c
> >> index f936daf99e4d..5923ad7abbd9 100644
> >> --- a/drivers/platform/x86/intel/pmt/crashlog.c
> >> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
> >> @@ -129,7 +129,19 @@ static void pmt_crashlog_rmw(struct
> >crashlog_entry *crashlog, u32 bit, bool set)
> >>  {
> >>  	const struct crashlog_control *control = &crashlog->info->control;
> >>  	struct intel_pmt_entry *entry = &crashlog->entry;
> >> -	u32 reg = readl(entry->disc_table + control->offset);
> >> +	u32 guid = entry->header.guid;
> >> +	u32 reg;
> >> +	int err;
> >> +
> >> +	if (entry->cb && entry->cb->read_reg) {
> >> +		err = entry->cb->read_reg(entry->dev, guid, &reg, control-
> >>offset);
> >> +		if (err) {
> >> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
> >
> >Never print __func__ in any user consumable message (level > debug) but
> >write the message in plain English.
> >
> >Also, this needs include.
> >
> >> +			return;
> >> +		}
> >> +	} else {
> >> +		reg = readl(entry->disc_table + control->offset);
> >
> >Add include.
> 
> I have added the linux/printk.h include... I am not clear on the correct readl inclued.
> 
> Should this be <linux/io.h> or <include/asm-generic/io.h>?

Usually it's better to use linux/ one, except in headers that are used 
in many .c files where it may be helpful to use as precise include as 
possible to limit the number of things one include ends up pulling in.

> >> +	}
> >>
> >>  	reg &= ~control->trigger_mask;
> >>
> >> @@ -138,14 +150,35 @@ static void pmt_crashlog_rmw(struct
> >crashlog_entry *crashlog, u32 bit, bool set)
> >>  	else
> >>  		reg &= ~bit;
> >>
> >> -	writel(reg, entry->disc_table + control->offset);
> >> +	if (entry->cb && entry->cb->write_reg) {
> >> +		err = entry->cb->write_reg(entry->dev, guid, reg, control-
> >>offset);
> >> +		if (err) {
> >> +			pr_err("%s: failed to write reg: %d\n", __func__, err);
> >
> >Rephrase without using __func__.
> 
> This was for my internal debugging and should have been cleaned up.  Removed.
> 
> >> +			return;
> >> +		}
> >> +	} else {
> >> +		writel(reg, entry->disc_table + control->offset);
> >> +	}
> >>  }
> >>
> >>  /* Read the status register and see if the specified @bit is set */
> >>  static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
> >>  {
> >>  	const struct crashlog_status *status = &crashlog->info->status;
> >> -	u32 reg = readl(crashlog->entry.disc_table + status->offset);
> >> +	struct intel_pmt_entry *entry = &crashlog->entry;
> >> +	u32 guid = entry->header.guid;
> >> +	u32 reg;
> >> +	int err;
> >> +
> >> +	if (entry->cb && entry->cb->read_reg) {
> >> +		err = entry->cb->read_reg(entry->dev, guid, &reg, status-
> >>offset);
> >> +		if (err) {
> >> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
> >> +			return false;
> >
> >It seems you need a lerger rework here to properly return error codes.
> 
> Yes, there would be a significant rework (almost all internal functions 
> will need to be updated) to return the error codes.  This seems out of 
> scope for these updates.

Your series adds a call that can fail (before there wasn't one) so it 
should be part of this effort. bool -> int conversion should be mostly 
simple (though admittedly a bit tedious) as it mainly just adds the 
error handling ifs to the callchains.

> Does this need to be addressed to make progress on this patch set?  Or can we work on that
> in the future?

I think it should be part of this effort because of the forementioned 
reason.


-- 
 i.

RE: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access callbacks

[Ruhl, Michael J]

>-----Original Message-----
>From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>Sent: Wednesday, August 26, 2026 2:30 PM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org; Hans
>de Goede <hansg@kernel.org>; Brost, Matthew <matthew.brost@intel.com>;
>Vivi, Rodrigo <rodrigo.vivi@intel.com>; thomas.hellstrom@linux.intel.com;
>airlied@gmail.com; simona@ffwll.ch; david.e.box@linux.intel.com; Vijay,
>Anoop C <anoop.c.vijay@intel.com>; Nilawar, Badal
><badal.nilawar@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>;
>Ausmus, James <james.ausmus@intel.com>; Poosa, Karthik
><karthik.poosa@intel.com>
>Subject: RE: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access
>callbacks
>
>On Wed, 26 Aug 2026, Ruhl, Michael J wrote:
>
>> >-----Original Message-----
>> >From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>> >Sent: Tuesday, August 25, 2026 5:35 AM
>> >To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>> >Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org;
>Hans
>> >de Goede <hansg@kernel.org>; Brost, Matthew
><matthew.brost@intel.com>;
>> >Vivi, Rodrigo <rodrigo.vivi@intel.com>; thomas.hellstrom@linux.intel.com;
>> >airlied@gmail.com; simona@ffwll.ch; david.e.box@linux.intel.com; Vijay,
>> >Anoop C <anoop.c.vijay@intel.com>; Nilawar, Badal
>> ><badal.nilawar@intel.com>; Roper, Matthew D
><matthew.d.roper@intel.com>;
>> >Ausmus, James <james.ausmus@intel.com>; Poosa, Karthik
>> ><karthik.poosa@intel.com>
>> >Subject: Re: [PATCH v3 02/10] platform/x86/intel/pmt: Add register access
>> >callbacks
>> >
>> >On Mon, 24 Aug 2026, Michael J. Ruhl wrote:
>> >
>> >> Some HW does not have direct MMIO access to PMT control and data
>> >> features.
>> >>
>> >> Augment the current callback infrastructure (data access) to allow
>> >> a registered driver to customize read/write access to the control
>> >> paths for PMT usage.
>> >>
>> >> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
>> >> ---
>> >>  drivers/platform/x86/intel/pmt/crashlog.c | 39
>+++++++++++++++++++++-
>> >-
>> >>  include/linux/intel_vsec.h                | 14 +++++++-
>> >>  2 files changed, 49 insertions(+), 4 deletions(-)
>> >>
>> >> diff --git a/drivers/platform/x86/intel/pmt/crashlog.c
>> >b/drivers/platform/x86/intel/pmt/crashlog.c
>> >> index f936daf99e4d..5923ad7abbd9 100644
>> >> --- a/drivers/platform/x86/intel/pmt/crashlog.c
>> >> +++ b/drivers/platform/x86/intel/pmt/crashlog.c
>> >> @@ -129,7 +129,19 @@ static void pmt_crashlog_rmw(struct
>> >crashlog_entry *crashlog, u32 bit, bool set)
>> >>  {
>> >>  	const struct crashlog_control *control = &crashlog->info->control;
>> >>  	struct intel_pmt_entry *entry = &crashlog->entry;
>> >> -	u32 reg = readl(entry->disc_table + control->offset);
>> >> +	u32 guid = entry->header.guid;
>> >> +	u32 reg;
>> >> +	int err;
>> >> +
>> >> +	if (entry->cb && entry->cb->read_reg) {
>> >> +		err = entry->cb->read_reg(entry->dev, guid, &reg, control-
>> >>offset);
>> >> +		if (err) {
>> >> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
>> >
>> >Never print __func__ in any user consumable message (level > debug) but
>> >write the message in plain English.
>> >
>> >Also, this needs include.
>> >
>> >> +			return;
>> >> +		}
>> >> +	} else {
>> >> +		reg = readl(entry->disc_table + control->offset);
>> >
>> >Add include.
>>
>> I have added the linux/printk.h include... I am not clear on the correct readl
>inclued.
>>
>> Should this be <linux/io.h> or <include/asm-generic/io.h>?
>
>Usually it's better to use linux/ one, except in headers that are used
>in many .c files where it may be helpful to use as precise include as
>possible to limit the number of things one include ends up pulling in.
>
>> >> +	}
>> >>
>> >>  	reg &= ~control->trigger_mask;
>> >>
>> >> @@ -138,14 +150,35 @@ static void pmt_crashlog_rmw(struct
>> >crashlog_entry *crashlog, u32 bit, bool set)
>> >>  	else
>> >>  		reg &= ~bit;
>> >>
>> >> -	writel(reg, entry->disc_table + control->offset);
>> >> +	if (entry->cb && entry->cb->write_reg) {
>> >> +		err = entry->cb->write_reg(entry->dev, guid, reg, control-
>> >>offset);
>> >> +		if (err) {
>> >> +			pr_err("%s: failed to write reg: %d\n", __func__, err);
>> >
>> >Rephrase without using __func__.
>>
>> This was for my internal debugging and should have been cleaned up.
>Removed.
>>
>> >> +			return;
>> >> +		}
>> >> +	} else {
>> >> +		writel(reg, entry->disc_table + control->offset);
>> >> +	}
>> >>  }
>> >>
>> >>  /* Read the status register and see if the specified @bit is set */
>> >>  static bool pmt_crashlog_rc(struct crashlog_entry *crashlog, u32 bit)
>> >>  {
>> >>  	const struct crashlog_status *status = &crashlog->info->status;
>> >> -	u32 reg = readl(crashlog->entry.disc_table + status->offset);
>> >> +	struct intel_pmt_entry *entry = &crashlog->entry;
>> >> +	u32 guid = entry->header.guid;
>> >> +	u32 reg;
>> >> +	int err;
>> >> +
>> >> +	if (entry->cb && entry->cb->read_reg) {
>> >> +		err = entry->cb->read_reg(entry->dev, guid, &reg, status-
>> >>offset);
>> >> +		if (err) {
>> >> +			pr_err("%s: failed to read reg: %d\n", __func__, err);
>> >> +			return false;
>> >
>> >It seems you need a lerger rework here to properly return error codes.
>>
>> Yes, there would be a significant rework (almost all internal functions
>> will need to be updated) to return the error codes.  This seems out of
>> scope for these updates.
>
>Your series adds a call that can fail (before there wasn't one) so it
>should be part of this effort. bool -> int conversion should be mostly
>simple (though admittedly a bit tedious) as it mainly just adds the
>error handling ifs to the callchains.
>
>> Does this need to be addressed to make progress on this patch set?  Or can we work on that
>> in the future?
>
>I think it should be part of this effort because of the forementioned
>reason.

Ok, I will rework the code paths.

M


>
>--
> i.

[PATCH v3 03/10] drm/xe/vsec: Protect against missing config

[Michael J. Ruhl]

Some init paths (VF) will not provide soc-remapper
callbacks.

BMG PMT access requires the soc-remapper.

If the soc-remapper is not configured, do not register for
PMT, and block read access.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_vsec.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index a9baf0bfe572..bd83a33aef6c 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -149,6 +149,9 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 	u32 offset;
 	int ret;
 
+	if (!xe->soc_remapper.set_telem_region)
+		return -ENODEV;
+
 	ret = xe_guid_decode(guid, &mem_region, &offset);
 	if (ret)
 		return ret;
@@ -157,9 +160,6 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 
 	guard(mutex)(&xe->pmt.lock);
 
-	if (!xe->soc_remapper.set_telem_region)
-		return -ENODEV;
-
 	/* indicate that we are not at an appropriate power level */
 	if (!xe_pm_runtime_get_if_active(xe))
 		return -ENODATA;
@@ -210,6 +210,8 @@ void xe_vsec_init(struct xe_device *xe)
 
 	switch (platform) {
 	case XE_VSEC_BMG:
+		if (!xe->soc_remapper.set_telem_region)
+			return;
 		info->priv_data = &xe_pmt_cb;
 		break;
 	default:
-- 
2.43.0

Re: [PATCH v3 03/10] drm/xe/vsec: Protect against missing config

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

New issues:
- [Medium] Subsystem guidelines violation: The patch uses the absence of `soc_remapper.set_telem_region` as a proxy check to prevent execution on Virtual Functions (VF) instead of an explicit `IS_SRIOV_VF()` guard.

Pre-existing issues:
- [High] The `xe_pmt_cb` struct is missing the `.read_reg` and `.write_reg` callbacks required for safe PMT Crashlog control register access on discrete GPUs.
--

--- Patch [3]: [PATCH v3 03/10] drm/xe/vsec: Protect against missing config ---
commit 6d90522f74020b6e17f1f98588ed1740977adfb4
Author: Michael J. Ruhl <michael.j.ruhl@intel.com>

drm/xe/vsec: Protect against missing config

This commit prevents PMT registration and telemetry read access when the
soc-remapper callbacks are not configured, specifically targeting Virtual
Function (VF) init paths.

> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
[ ... ]
> @@ -210,6 +210,8 @@ void xe_vsec_init(struct xe_device *xe)
>  
>  	switch (platform) {
>  	case XE_VSEC_BMG:
> +		if (!xe->soc_remapper.set_telem_region)
> +			return;

[Severity: Medium]
The commit message mentions that some init paths (VF) will not provide
soc-remapper callbacks. Is it safe to use this feature presence as a proxy
check to prevent execution on Virtual Functions?

According to the SR-IOV guidelines for the xe driver, VFs must be explicitly
blocked from PF-only resource registration using an IS_SRIOV_VF() guard to
prevent hardware failures and MMIO timeouts.

Should this code explicitly check for the VF context instead of relying on
the absence of the set_telem_region callback?

>  		info->priv_data = &xe_pmt_cb;

[Severity: High]
This is a pre-existing issue, but does assigning xe_pmt_cb here expose us to
unprotected MMIO accesses during suspend?

Since BMG exposes VSEC_CAP_CRASHLOG in xe_vsec_info, the crashlog driver
will probe and create sysfs entries. However, the xe_pmt_cb structure lacks
the .read_reg and .write_reg callbacks.

When userspace accesses crashlog sysfs attributes, the driver will fall back
to using direct readl()/writel() on entry->disc_table.

If the GPU is in D3cold, will these direct accesses bypass runtime PM checks
and attempt to read or write powered-off MMIO, potentially triggering MCE or
AER kernel panics?

>  		break;
>  	default:

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260824162317.2450380-12-michael.j.ruhl@intel.com?part=3

RE: [PATCH v3 03/10] drm/xe/vsec: Protect against missing config

[Ruhl, Michael J]

>-----Original Message-----
>From: sashiko-bot@kernel.org <sashiko-bot@kernel.org>
>Sent: Monday, August 24, 2026 12:37 PM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: intel-xe@lists.freedesktop.org
>Subject: Re: [PATCH v3 03/10] drm/xe/vsec: Protect against missing config
>
>Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to
>consider:
>
>New issues:
>- [Medium] Subsystem guidelines violation: The patch uses the absence of
>`soc_remapper.set_telem_region` as a proxy check to prevent execution on
>Virtual Functions (VF) instead of an explicit `IS_SRIOV_VF()` guard.
>
>Pre-existing issues:
>- [High] The `xe_pmt_cb` struct is missing the `.read_reg` and `.write_reg`
>callbacks required for safe PMT Crashlog control register access on discrete
>GPUs.
>--
>
>--- Patch [3]: [PATCH v3 03/10] drm/xe/vsec: Protect against missing config ---
>commit 6d90522f74020b6e17f1f98588ed1740977adfb4
>Author: Michael J. Ruhl <michael.j.ruhl@intel.com>
>
>drm/xe/vsec: Protect against missing config
>
>This commit prevents PMT registration and telemetry read access when the
>soc-remapper callbacks are not configured, specifically targeting Virtual
>Function (VF) init paths.
>
>> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
>> --- a/drivers/gpu/drm/xe/xe_vsec.c
>> +++ b/drivers/gpu/drm/xe/xe_vsec.c
>[ ... ]
>> @@ -210,6 +210,8 @@ void xe_vsec_init(struct xe_device *xe)
>>
>>  	switch (platform) {
>>  	case XE_VSEC_BMG:
>> +		if (!xe->soc_remapper.set_telem_region)
>> +			return;
>
>[Severity: Medium]
>The commit message mentions that some init paths (VF) will not provide
>soc-remapper callbacks. Is it safe to use this feature presence as a proxy
>check to prevent execution on Virtual Functions?
>
>According to the SR-IOV guidelines for the xe driver, VFs must be explicitly
>blocked from PF-only resource registration using an IS_SRIOV_VF() guard to
>prevent hardware failures and MMIO timeouts.
>
>Should this code explicitly check for the VF context instead of relying on
>the absence of the set_telem_region callback?
>
>>  		info->priv_data = &xe_pmt_cb;

The callback can be missing for other usages, at this time, checking for the callback
only, is reasonable.

>[Severity: High]
>This is a pre-existing issue, but does assigning xe_pmt_cb here expose us to
>unprotected MMIO accesses during suspend?
>
>Since BMG exposes VSEC_CAP_CRASHLOG in xe_vsec_info, the crashlog driver
>will probe and create sysfs entries. However, the xe_pmt_cb structure lacks
>the .read_reg and .write_reg callbacks.
>
>When userspace accesses crashlog sysfs attributes, the driver will fall back
>to using direct readl()/writel() on entry->disc_table.

The discovery registers for BMG reside in a different area from the data area.

The callback entries are not need, and the power state is always correct for that
usage.

M

>If the GPU is in D3cold, will these direct accesses bypass runtime PM checks
>and attempt to read or write powered-off MMIO, potentially triggering MCE or
>AER kernel panics?
>
>>  		break;
>>  	default:
>
>--
>Sashiko AI review ·
>https://sashiko.dev/#/patchset/20260824162317.2450380-12-
>michael.j.ruhl@intel.com?part=3

Re: [PATCH v3 03/10] drm/xe/vsec: Protect against missing config

[Rodrigo Vivi]

On Mon, Aug 24, 2026 at 04:36:35PM +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> 
> New issues:
> - [Medium] Subsystem guidelines violation: The patch uses the absence of `soc_remapper.set_telem_region` as a proxy check to prevent execution on Virtual Functions (VF) instead of an explicit `IS_SRIOV_VF()` guard.

Sashiko has a point here.

If the goal is to check for VF as commit message states, the IS_SRIOV_VF is the
right check.

If we need to really ensure the set_telem_region is there we need to add
a function in the xe_soc_remmaper component, rather than traversing the
component and checking it internals, what is a xe component violation.

Please create a helper with a better commit message or use the IS_SRIOV_VF
macro.

> 
> Pre-existing issues:
> - [High] The `xe_pmt_cb` struct is missing the `.read_reg` and `.write_reg` callbacks required for safe PMT Crashlog control register access on discrete GPUs.
> --
> 
> --- Patch [3]: [PATCH v3 03/10] drm/xe/vsec: Protect against missing config ---
> commit 6d90522f74020b6e17f1f98588ed1740977adfb4
> Author: Michael J. Ruhl <michael.j.ruhl@intel.com>
> 
> drm/xe/vsec: Protect against missing config
> 
> This commit prevents PMT registration and telemetry read access when the
> soc-remapper callbacks are not configured, specifically targeting Virtual
> Function (VF) init paths.
> 
> > diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> > --- a/drivers/gpu/drm/xe/xe_vsec.c
> > +++ b/drivers/gpu/drm/xe/xe_vsec.c
> [ ... ]
> > @@ -210,6 +210,8 @@ void xe_vsec_init(struct xe_device *xe)
> >  
> >  	switch (platform) {
> >  	case XE_VSEC_BMG:
> > +		if (!xe->soc_remapper.set_telem_region)
> > +			return;
> 
> [Severity: Medium]
> The commit message mentions that some init paths (VF) will not provide
> soc-remapper callbacks. Is it safe to use this feature presence as a proxy
> check to prevent execution on Virtual Functions?
> 
> According to the SR-IOV guidelines for the xe driver, VFs must be explicitly
> blocked from PF-only resource registration using an IS_SRIOV_VF() guard to
> prevent hardware failures and MMIO timeouts.
> 
> Should this code explicitly check for the VF context instead of relying on
> the absence of the set_telem_region callback?
> 
> >  		info->priv_data = &xe_pmt_cb;
> 
> [Severity: High]
> This is a pre-existing issue, but does assigning xe_pmt_cb here expose us to
> unprotected MMIO accesses during suspend?
> 
> Since BMG exposes VSEC_CAP_CRASHLOG in xe_vsec_info, the crashlog driver
> will probe and create sysfs entries. However, the xe_pmt_cb structure lacks
> the .read_reg and .write_reg callbacks.
> 
> When userspace accesses crashlog sysfs attributes, the driver will fall back
> to using direct readl()/writel() on entry->disc_table.
> 
> If the GPU is in D3cold, will these direct accesses bypass runtime PM checks
> and attempt to read or write powered-off MMIO, potentially triggering MCE or
> AER kernel panics?
> 
> >  		break;
> >  	default:
> 
> -- 
> Sashiko AI review · https://sashiko.dev/#/patchset/20260824162317.2450380-12-michael.j.ruhl@intel.com?part=3

[PATCH v3 04/10] drm/xe/vsec: Use correct pm state get

[Michael J. Ruhl]

Crashlog needs to be collected at all times.  The current pm
check assumes telemetry only.

Update read path to enable device for crashlog instances.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Fixes: 2c402a801c19 ("platform/x86/intel/pmt: support BMG crashlog")
---
 drivers/gpu/drm/xe/xe_vsec.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index bd83a33aef6c..8d99a3770b5a 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -145,6 +145,7 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 {
 	struct xe_device *xe = kdev_to_xe_device(dev);
 	void __iomem *telem_addr = xe->mmio.regs + BMG_TELEMETRY_OFFSET;
+	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
 	u32 mem_region;
 	u32 offset;
 	int ret;
@@ -158,16 +159,28 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 
 	telem_addr += offset + user_offset;
 
-	guard(mutex)(&xe->pmt.lock);
+	/* Always allow crashlog. Telemetry, only when powered */
+	switch (cap_type) {
+	case CRASHLOG:
+		xe_pm_runtime_get(xe);
+		break;
+	case TELEMETRY:
+		if (!xe_pm_runtime_get_if_active(xe))
+			return -ENODATA;
+		break;
+	case WATCHER:
+		return -EINVAL;
+	}
 
-	/* indicate that we are not at an appropriate power level */
-	if (!xe_pm_runtime_get_if_active(xe))
-		return -ENODATA;
+	mutex_lock(&xe->pmt.lock);
 
 	/* set SoC re-mapper index register based on GUID memory region */
 	xe->soc_remapper.set_telem_region(xe, mem_region);
 
 	memcpy_fromio(data, telem_addr, count);
+
+	mutex_unlock(&xe->pmt.lock);
+
 	xe_pm_runtime_put(xe);
 
 	return count;
-- 
2.43.0

Re: [PATCH v3 04/10] drm/xe/vsec: Use correct pm state get

[Rodrigo Vivi]

On Mon, Aug 24, 2026 at 09:23:20AM -0700, Michael J. Ruhl wrote:
> Crashlog needs to be collected at all times.  The current pm
> check assumes telemetry only.
> 
> Update read path to enable device for crashlog instances.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> Fixes: 2c402a801c19 ("platform/x86/intel/pmt: support BMG crashlog")

I have the feeling that this patch should be split into 2.
1. with the lock fix and another one that would be the feature
scope increase for the crashlog and watcher, no?!

Or at least mention the mutex in the commit message?

> ---
>  drivers/gpu/drm/xe/xe_vsec.c | 21 +++++++++++++++++----
>  1 file changed, 17 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index bd83a33aef6c..8d99a3770b5a 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -145,6 +145,7 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  {
>  	struct xe_device *xe = kdev_to_xe_device(dev);
>  	void __iomem *telem_addr = xe->mmio.regs + BMG_TELEMETRY_OFFSET;
> +	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
>  	u32 mem_region;
>  	u32 offset;
>  	int ret;
> @@ -158,16 +159,28 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  
>  	telem_addr += offset + user_offset;
>  
> -	guard(mutex)(&xe->pmt.lock);
> +	/* Always allow crashlog. Telemetry, only when powered */
> +	switch (cap_type) {
> +	case CRASHLOG:
> +		xe_pm_runtime_get(xe);
> +		break;
> +	case TELEMETRY:
> +		if (!xe_pm_runtime_get_if_active(xe))
> +			return -ENODATA;
> +		break;
> +	case WATCHER:
> +		return -EINVAL;
> +	}
>  
> -	/* indicate that we are not at an appropriate power level */
> -	if (!xe_pm_runtime_get_if_active(xe))
> -		return -ENODATA;
> +	mutex_lock(&xe->pmt.lock);
>  
>  	/* set SoC re-mapper index register based on GUID memory region */
>  	xe->soc_remapper.set_telem_region(xe, mem_region);
>  
>  	memcpy_fromio(data, telem_addr, count);
> +
> +	mutex_unlock(&xe->pmt.lock);
> +
>  	xe_pm_runtime_put(xe);
>  
>  	return count;
> -- 
> 2.43.0
> 

[PATCH v3 05/10] drm/xe/vsec: Support possible hotplug exit

[Michael J. Ruhl]

DRM has an API that will verify that a device is valid in
the hotplug context.

Verify device is valid before access in the VSEC callback
API.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_vsec.c | 33 ++++++++++++++++++++++++++-------
 1 file changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 8d99a3770b5a..8abe11e6312f 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -10,6 +10,8 @@
 #include <linux/pci.h>
 #include <linux/types.h>
 
+#include <drm/drm_drv.h>
+
 #include "xe_device.h"
 #include "xe_device_types.h"
 #include "xe_mmio.h"
@@ -140,6 +142,11 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
 	return 0;
 }
 
+/*
+ * xe_pmt_telem_read is a callback API.  I.e this can be accessed external to
+ * XE driver (PMT driver scope).  Because of this, DRM hotplug needs to be
+ * verified (drm_dev_enter()).
+ */
 int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset,
 		      u32 count)
 {
@@ -148,14 +155,20 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
 	u32 mem_region;
 	u32 offset;
-	int ret;
+	int ret = 0;
+	int idx;
 
-	if (!xe->soc_remapper.set_telem_region)
+	if (!drm_dev_enter(&xe->drm, &idx))
 		return -ENODEV;
 
+	if (!xe->soc_remapper.set_telem_region) {
+		ret = -EINVAL;
+		goto dev_exit;
+	}
+
 	ret = xe_guid_decode(guid, &mem_region, &offset);
 	if (ret)
-		return ret;
+		goto dev_exit;
 
 	telem_addr += offset + user_offset;
 
@@ -165,11 +178,14 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 		xe_pm_runtime_get(xe);
 		break;
 	case TELEMETRY:
-		if (!xe_pm_runtime_get_if_active(xe))
-			return -ENODATA;
+		if (!xe_pm_runtime_get_if_active(xe)) {
+			ret = -ENODATA;
+			goto dev_exit;
+		}
 		break;
 	case WATCHER:
-		return -EINVAL;
+		ret = -EINVAL;
+		goto dev_exit;
 	}
 
 	mutex_lock(&xe->pmt.lock);
@@ -183,7 +199,10 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 
 	xe_pm_runtime_put(xe);
 
-	return count;
+dev_exit:
+	drm_dev_exit(idx);
+
+	return ret == 0 ? count : ret;
 }
 
 static struct pmt_callbacks xe_pmt_cb = {
-- 
2.43.0

Re: [PATCH v3 05/10] drm/xe/vsec: Support possible hotplug exit

[Rodrigo Vivi]

On Mon, Aug 24, 2026 at 09:23:21AM -0700, Michael J. Ruhl wrote:
> DRM has an API that will verify that a device is valid in
> the hotplug context.
> 
> Verify device is valid before access in the VSEC callback
> API.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_vsec.c | 33 ++++++++++++++++++++++++++-------
>  1 file changed, 26 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 8d99a3770b5a..8abe11e6312f 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -10,6 +10,8 @@
>  #include <linux/pci.h>
>  #include <linux/types.h>
>  
> +#include <drm/drm_drv.h>
> +
>  #include "xe_device.h"
>  #include "xe_device_types.h"
>  #include "xe_mmio.h"
> @@ -140,6 +142,11 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
>  	return 0;
>  }
>  
> +/*
> + * xe_pmt_telem_read is a callback API.  I.e this can be accessed external to
> + * XE driver (PMT driver scope).  Because of this, DRM hotplug needs to be
> + * verified (drm_dev_enter()).
> + */
>  int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset,
>  		      u32 count)
>  {
> @@ -148,14 +155,20 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
>  	u32 mem_region;
>  	u32 offset;
> -	int ret;
> +	int ret = 0;
> +	int idx;
>  
> -	if (!xe->soc_remapper.set_telem_region)
> +	if (!drm_dev_enter(&xe->drm, &idx))
>  		return -ENODEV;
>  
> +	if (!xe->soc_remapper.set_telem_region) {

a pre-existing component layer violation, but it would be good
to change this patch once you fix that in the other one,
creating the xe_soc_remapper function entry.

> +		ret = -EINVAL;

probably worth to mention the change of the return errno in the commit msg.

with these 2 changes:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> +		goto dev_exit;
> +	}
> +
>  	ret = xe_guid_decode(guid, &mem_region, &offset);
>  	if (ret)
> -		return ret;
> +		goto dev_exit;
>  
>  	telem_addr += offset + user_offset;
>  
> @@ -165,11 +178,14 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  		xe_pm_runtime_get(xe);
>  		break;
>  	case TELEMETRY:
> -		if (!xe_pm_runtime_get_if_active(xe))
> -			return -ENODATA;
> +		if (!xe_pm_runtime_get_if_active(xe)) {
> +			ret = -ENODATA;
> +			goto dev_exit;
> +		}
>  		break;
>  	case WATCHER:
> -		return -EINVAL;
> +		ret = -EINVAL;
> +		goto dev_exit;
>  	}
>  
>  	mutex_lock(&xe->pmt.lock);
> @@ -183,7 +199,10 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  
>  	xe_pm_runtime_put(xe);
>  
> -	return count;
> +dev_exit:
> +	drm_dev_exit(idx);
> +
> +	return ret == 0 ? count : ret;
>  }
>  
>  static struct pmt_callbacks xe_pmt_cb = {
> -- 
> 2.43.0
> 

[PATCH v3 06/10] drm/xe/vsec: Support Crescent Island PMT

[Michael J. Ruhl]

Crescent Island (CRI) supports PMT telemetry and crashlog.

Add Crescent Island (CRI) discovery structure (DVSEC)
information to allow for Xe registration.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_pmt.h |  5 ++++
 drivers/gpu/drm/xe/xe_vsec.c     | 46 ++++++++++++++++++++++++++++++--
 2 files changed, 49 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
index a62ab05c6b4c..fc9c9cb6a830 100644
--- a/drivers/gpu/drm/xe/regs/xe_pmt.h
+++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
@@ -20,6 +20,11 @@
 #define BMG_TELEMETRY_BASE_OFFSET	0xE0000
 #define BMG_TELEMETRY_OFFSET		(SOC_BASE + BMG_TELEMETRY_BASE_OFFSET)
 
+#define CRI_TELEMETRY_BASE_OFFSET	0xE0000
+/* for CRI discovery and telemetry are in an indexed window */
+#define CRI_DISCOVERY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
+#define CRI_TELEMETRY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
+
 #define BMG_MODS_RESIDENCY_OFFSET		(0x4D0)
 #define BMG_G2_RESIDENCY_OFFSET		(0x530)
 #define BMG_G6_RESIDENCY_OFFSET		(0x538)
diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 8abe11e6312f..6345b0b4b26b 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -21,8 +21,19 @@
 
 #include "regs/xe_pmt.h"
 
-/* PMT GUID value for BMG devices.  NOTE: this is NOT a PCI id */
+/* PMT GUID value for BMG and CRI devices.  NOTE: this is NOT a PCI id */
 #define BMG_DEVICE_ID 0xE2F8
+#define CRI_DEVICE_ID 0xE2FA
+
+/*
+ * sizeof(Crashlog Type1 Version2) = 0x18 (24) bytes
+ * For BMG and CRI PUNIT and OOBMSMS crashlogs are consecutive.
+ */
+#define BMG_CRASHLOG_PUNIT_DISC_OFFSET (0x60)
+#define BMG_CRASHLOG_OOBMSM_DISC_OFFSET (BMG_CRASHLOG_PUNIT_DISC_OFFSET + 0x18)
+
+#define CRI_CRASHLOG_PUNIT_DISC_OFFSET (0x80)
+#define CRI_CRASHLOG_OOBMSM_DISC_OFFSET (CRI_CRASHLOG_PUNIT_DISC_OFFSET + 0x18)
 
 static struct intel_vsec_header bmg_telemetry = {
 	.rev = 1,
@@ -41,7 +52,7 @@ static struct intel_vsec_header bmg_crashlog = {
 	.num_entries = 2,
 	.entry_size = 6,
 	.tbir = 0,
-	.offset = BMG_DISCOVERY_OFFSET + 0x60,
+	.offset = BMG_DISCOVERY_OFFSET + BMG_CRASHLOG_PUNIT_DISC_OFFSET,
 };
 
 static struct intel_vsec_header *bmg_capabilities[] = {
@@ -50,9 +61,36 @@ static struct intel_vsec_header *bmg_capabilities[] = {
 	NULL
 };
 
+static struct intel_vsec_header cri_telemetry = {
+	.rev = 1,
+	.length = 0x10,
+	.id = VSEC_ID_TELEMETRY,
+	.num_entries = 3,
+	.entry_size = 4,
+	.tbir = 0,
+	.offset = CRI_DISCOVERY_OFFSET,
+};
+
+static struct intel_vsec_header cri_crashlog = {
+	.rev = 1,
+	.length = 0x10,
+	.id = VSEC_ID_CRASHLOG,
+	.num_entries = 2,
+	.entry_size = 6,
+	.tbir = 0,
+	.offset = CRI_DISCOVERY_OFFSET + CRI_CRASHLOG_PUNIT_DISC_OFFSET,
+};
+
+static struct intel_vsec_header *cri_capabilities[] = {
+	&cri_telemetry,
+	&cri_crashlog,
+	NULL
+};
+
 enum xe_vsec {
 	XE_VSEC_UNKNOWN = 0,
 	XE_VSEC_BMG,
+	XE_VSEC_CRI,
 };
 
 static struct intel_vsec_platform_info xe_vsec_info[] = {
@@ -60,6 +98,10 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
 		.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
 		.headers = bmg_capabilities,
 	},
+	[XE_VSEC_CRI] = {
+		.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
+		.headers = cri_capabilities,
+	},
 	{ }
 };
 
-- 
2.43.0

Re: [PATCH v3 06/10] drm/xe/vsec: Support Crescent Island PMT

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] The VSEC PMT/Crashlog subsystem registration lacks an IS_SRIOV_VF() early return guard, allowing Virtual Functions to attempt registration of PF-only SOC_BASE MMIO resources.
--

--- Patch [6]: [PATCH v3 06/10] drm/xe/vsec: Support Crescent Island PMT ---
(Note: Due to system recitation restrictions, the standard inline-quoted
patch format has been altered. The following is a free-form summary of the
review findings instead of the usual inline comments.)

Commit: 375a8279959bc1d7613d31c9ae9881fa3baa2d18
Author: Michael J. Ruhl <michael.j.ruhl@intel.com>
Subject: drm/xe/vsec: Support Crescent Island PMT

This commit adds Crescent Island (CRI) discovery structure (DVSEC)
information to allow for Xe registration of PMT telemetry and crashlog.

[Severity: High]

This is a pre-existing issue, but I wanted to ask about the execution flow
in xe_vsec_init() within drivers/gpu/drm/xe/xe_vsec.c.

Does xe_vsec_init() need an IS_SRIOV_VF() early return guard to prevent
Virtual Functions from attempting to register PF-only resources?

The intel_vsec auxiliary device driver will attempt to read from restricted
offsets, such as BMG_DISCOVERY_OFFSET or CRI_DISCOVERY_OFFSET, which are
based on SOC_BASE. Since xe_vsec_init() is called unconditionally during
device probe, VFs might register the intel_vsec subsystem with headers
pointing directly to SOC_BASE.

Could this lead to MMIO timeouts or incorrect driver behavior when a
Virtual Function context attempts to access these PF-only registers?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260824162317.2450380-12-michael.j.ruhl@intel.com?part=6

Re: [PATCH v3 06/10] drm/xe/vsec: Support Crescent Island PMT

[Rodrigo Vivi]

On Mon, Aug 24, 2026 at 09:23:22AM -0700, Michael J. Ruhl wrote:
> Crescent Island (CRI) supports PMT telemetry and crashlog.
> 
> Add Crescent Island (CRI) discovery structure (DVSEC)
> information to allow for Xe registration.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_pmt.h |  5 ++++
>  drivers/gpu/drm/xe/xe_vsec.c     | 46 ++++++++++++++++++++++++++++++--
>  2 files changed, 49 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
> index a62ab05c6b4c..fc9c9cb6a830 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pmt.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
> @@ -20,6 +20,11 @@
>  #define BMG_TELEMETRY_BASE_OFFSET	0xE0000
>  #define BMG_TELEMETRY_OFFSET		(SOC_BASE + BMG_TELEMETRY_BASE_OFFSET)
>  
> +#define CRI_TELEMETRY_BASE_OFFSET	0xE0000

If it is the same as BMG, let's just reuse that.
The platform prefix means the platform where that started or that got
changed. We don't need to have one define per platform.

And actually in the XE we even try to use XE_ as prefix whenever it is a
unique value with the platform.

> +/* for CRI discovery and telemetry are in an indexed window */
> +#define CRI_DISCOVERY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
> +#define CRI_TELEMETRY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)

same for this right?! probably not needed...

> +
>  #define BMG_MODS_RESIDENCY_OFFSET		(0x4D0)
>  #define BMG_G2_RESIDENCY_OFFSET		(0x530)
>  #define BMG_G6_RESIDENCY_OFFSET		(0x538)
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 8abe11e6312f..6345b0b4b26b 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -21,8 +21,19 @@
>  
>  #include "regs/xe_pmt.h"
>  
> -/* PMT GUID value for BMG devices.  NOTE: this is NOT a PCI id */
> +/* PMT GUID value for BMG and CRI devices.  NOTE: this is NOT a PCI id */
>  #define BMG_DEVICE_ID 0xE2F8
> +#define CRI_DEVICE_ID 0xE2FA
> +
> +/*
> + * sizeof(Crashlog Type1 Version2) = 0x18 (24) bytes
> + * For BMG and CRI PUNIT and OOBMSMS crashlogs are consecutive.
> + */
> +#define BMG_CRASHLOG_PUNIT_DISC_OFFSET (0x60)
> +#define BMG_CRASHLOG_OOBMSM_DISC_OFFSET (BMG_CRASHLOG_PUNIT_DISC_OFFSET + 0x18)
> +
> +#define CRI_CRASHLOG_PUNIT_DISC_OFFSET (0x80)
> +#define CRI_CRASHLOG_OOBMSM_DISC_OFFSET (CRI_CRASHLOG_PUNIT_DISC_OFFSET + 0x18)
>  
>  static struct intel_vsec_header bmg_telemetry = {
>  	.rev = 1,
> @@ -41,7 +52,7 @@ static struct intel_vsec_header bmg_crashlog = {
>  	.num_entries = 2,
>  	.entry_size = 6,
>  	.tbir = 0,
> -	.offset = BMG_DISCOVERY_OFFSET + 0x60,
> +	.offset = BMG_DISCOVERY_OFFSET + BMG_CRASHLOG_PUNIT_DISC_OFFSET,
>  };
>  
>  static struct intel_vsec_header *bmg_capabilities[] = {
> @@ -50,9 +61,36 @@ static struct intel_vsec_header *bmg_capabilities[] = {
>  	NULL
>  };
>  
> +static struct intel_vsec_header cri_telemetry = {
> +	.rev = 1,
> +	.length = 0x10,
> +	.id = VSEC_ID_TELEMETRY,
> +	.num_entries = 3,
> +	.entry_size = 4,
> +	.tbir = 0,
> +	.offset = CRI_DISCOVERY_OFFSET,
> +};
> +
> +static struct intel_vsec_header cri_crashlog = {
> +	.rev = 1,
> +	.length = 0x10,
> +	.id = VSEC_ID_CRASHLOG,
> +	.num_entries = 2,
> +	.entry_size = 6,
> +	.tbir = 0,
> +	.offset = CRI_DISCOVERY_OFFSET + CRI_CRASHLOG_PUNIT_DISC_OFFSET,
> +};
> +
> +static struct intel_vsec_header *cri_capabilities[] = {
> +	&cri_telemetry,
> +	&cri_crashlog,
> +	NULL
> +};
> +
>  enum xe_vsec {
>  	XE_VSEC_UNKNOWN = 0,
>  	XE_VSEC_BMG,
> +	XE_VSEC_CRI,
>  };
>  
>  static struct intel_vsec_platform_info xe_vsec_info[] = {
> @@ -60,6 +98,10 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
>  		.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
>  		.headers = bmg_capabilities,
>  	},
> +	[XE_VSEC_CRI] = {
> +		.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
> +		.headers = cri_capabilities,
> +	},
>  	{ }
>  };
>  
> -- 
> 2.43.0
> 

Re: [PATCH v3 06/10] drm/xe/vsec: Support Crescent Island PMT

[Ilpo Järvinen]

On Mon, 24 Aug 2026, Michael J. Ruhl wrote:

> Crescent Island (CRI) supports PMT telemetry and crashlog.
> 
> Add Crescent Island (CRI) discovery structure (DVSEC)
> information to allow for Xe registration.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_pmt.h |  5 ++++
>  drivers/gpu/drm/xe/xe_vsec.c     | 46 ++++++++++++++++++++++++++++++--
>  2 files changed, 49 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
> index a62ab05c6b4c..fc9c9cb6a830 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pmt.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
> @@ -20,6 +20,11 @@
>  #define BMG_TELEMETRY_BASE_OFFSET	0xE0000
>  #define BMG_TELEMETRY_OFFSET		(SOC_BASE + BMG_TELEMETRY_BASE_OFFSET)
>  
> +#define CRI_TELEMETRY_BASE_OFFSET	0xE0000
> +/* for CRI discovery and telemetry are in an indexed window */
> +#define CRI_DISCOVERY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
> +#define CRI_TELEMETRY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
> +
>  #define BMG_MODS_RESIDENCY_OFFSET		(0x4D0)
>  #define BMG_G2_RESIDENCY_OFFSET		(0x530)
>  #define BMG_G6_RESIDENCY_OFFSET		(0x538)
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 8abe11e6312f..6345b0b4b26b 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -21,8 +21,19 @@
>  
>  #include "regs/xe_pmt.h"
>  
> -/* PMT GUID value for BMG devices.  NOTE: this is NOT a PCI id */
> +/* PMT GUID value for BMG and CRI devices.  NOTE: this is NOT a PCI id */
>  #define BMG_DEVICE_ID 0xE2F8
> +#define CRI_DEVICE_ID 0xE2FA
> +
> +/*
> + * sizeof(Crashlog Type1 Version2) = 0x18 (24) bytes
> + * For BMG and CRI PUNIT and OOBMSMS crashlogs are consecutive.
> + */
> +#define BMG_CRASHLOG_PUNIT_DISC_OFFSET (0x60)
> +#define BMG_CRASHLOG_OOBMSM_DISC_OFFSET (BMG_CRASHLOG_PUNIT_DISC_OFFSET + 0x18)
> +
> +#define CRI_CRASHLOG_PUNIT_DISC_OFFSET (0x80)
> +#define CRI_CRASHLOG_OOBMSM_DISC_OFFSET (CRI_CRASHLOG_PUNIT_DISC_OFFSET + 0x18)
>  
>  static struct intel_vsec_header bmg_telemetry = {
>  	.rev = 1,
> @@ -41,7 +52,7 @@ static struct intel_vsec_header bmg_crashlog = {
>  	.num_entries = 2,
>  	.entry_size = 6,
>  	.tbir = 0,
> -	.offset = BMG_DISCOVERY_OFFSET + 0x60,
> +	.offset = BMG_DISCOVERY_OFFSET + BMG_CRASHLOG_PUNIT_DISC_OFFSET,
>  };
>  
>  static struct intel_vsec_header *bmg_capabilities[] = {
> @@ -50,9 +61,36 @@ static struct intel_vsec_header *bmg_capabilities[] = {
>  	NULL
>  };
>  
> +static struct intel_vsec_header cri_telemetry = {
> +	.rev = 1,
> +	.length = 0x10,

...

> +static struct intel_vsec_header cri_crashlog = {
> +	.rev = 1,
> +	.length = 0x10,

One could consider using SZ_x for these (if you do, make sure you've the 
header for it).

> +	.id = VSEC_ID_CRASHLOG,
> +	.num_entries = 2,
> +	.entry_size = 6,
> +	.tbir = 0,
> +	.offset = CRI_DISCOVERY_OFFSET + CRI_CRASHLOG_PUNIT_DISC_OFFSET,
> +};
> +
> +static struct intel_vsec_header *cri_capabilities[] = {
> +	&cri_telemetry,
> +	&cri_crashlog,
> +	NULL
> +};
> +
>  enum xe_vsec {
>  	XE_VSEC_UNKNOWN = 0,
>  	XE_VSEC_BMG,
> +	XE_VSEC_CRI,
>  };
>  
>  static struct intel_vsec_platform_info xe_vsec_info[] = {
> @@ -60,6 +98,10 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
>  		.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
>  		.headers = bmg_capabilities,
>  	},
> +	[XE_VSEC_CRI] = {
> +		.caps = VSEC_CAP_TELEMETRY | VSEC_CAP_CRASHLOG,
> +		.headers = cri_capabilities,
> +	},
>  	{ }
>  };
>  
> 

-- 
 i.

[PATCH v3 07/10] drm/xe/vsec: Crescent Island PMT decode

[Michael J. Ruhl]

Crescent Island (CRI) has different index and offset values for
accessing the PMT data area.

Update the decode path to support the CRI device.

Update the data read callback so to support the CRI usage.

Define several magic numbers.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_device_types.h |   2 +
 drivers/gpu/drm/xe/xe_vsec.c         | 135 ++++++++++++++++++++++-----
 2 files changed, 114 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 180d450a6deb..3f1a70813a99 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -466,6 +466,8 @@ struct xe_device {
 	struct {
 		/** @pmt.lock: protect access for telemetry data */
 		struct mutex lock;
+		/** @pmt.base_offset: device specific base offset */
+		u64 base_offset;
 	} pmt;
 
 	/** @soc_remapper: SoC remapper object */
diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 6345b0b4b26b..dc42b9492428 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -108,23 +108,47 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
 /*
  * The GUID will have the following bits to decode:
  *   [0:3]   - {Telemetry space iteration number (0,1,..)}
- *   [4:7]   - Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
+ *   [4:7]   - BMG Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
+ *   [4:5]   - CRI Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
+ *   [6:7]   - CRI Instance
  *   [8:11]  - SOC_SKU
  *   [12:27] – Device ID – changes for each down bin SKU’s
  *   [28:29] - Capability Type (Crashlog-0, Telemetry Aggregator-1, Watcher-2)
  *   [30:31] - Record-ID (0-PUNIT, 1-OOBMSM_0, 2-OOBMSM_1)
  */
 #define GUID_TELEM_ITERATION	GENMASK(3, 0)
-#define GUID_SEGMENT		GENMASK(7, 4)
 #define GUID_SOC_SKU		GENMASK(11, 8)
 #define GUID_DEVICE_ID		GENMASK(27, 12)
 #define GUID_CAP_TYPE		GENMASK(29, 28)
 #define GUID_RECORD_ID		GENMASK(31, 30)
 
-#define PUNIT_TELEMETRY_OFFSET		0x0200
-#define PUNIT_WATCHER_OFFSET		0x14A0
-#define OOBMSM_0_WATCHER_OFFSET		0x18D8
-#define OOBMSM_1_TELEMETRY_OFFSET	0x1000
+#define BMG_GUID_SEGMENT	GENMASK(7, 4)
+
+#define CRI_GUID_SEGMENT	GENMASK(5, 4)
+#define CRI_GUID_INSTANCE	GENMASK(7, 6)
+
+#define BMG_IDX_TELEM_PUNIT		0x00
+#define BMG_IDX_TELEM_OOBMSM		0x01
+#define BMG_IDX_CRASHLOG_PUNIT		0x02
+#define BMG_IDX_CRASHLOG_OOBMSM		0x04
+
+#define BMG_PUNIT_TELEMETRY_OFFSET	0x0200
+#define BMG_PUNIT_WATCHER_OFFSET	0x14A0
+#define BMG_OOBMSM_0_WATCHER_OFFSET	0x18D8
+#define BMG_OOBMSM_1_TELEMETRY_OFFSET	0x1000
+
+#define CRI_IDX_TELEM_DISCOVERY		0x00
+#define CRI_IDX_TELEM_PUNIT		0x01
+#define CRI_IDX_TELEM_OOBMSM		0x02
+#define CRI_IDX_CRASHLOG_PUNIT		0x03
+#define CRI_IDX_WATCHER_OOBMSM		0x03  /* PUNIT and OOBMSM share this index */
+#define CRI_IDX_CRASHLOG_OOBMSM		0x04
+
+#define CRI_PUNIT_TELEMETRY_OFFSET		0x0200
+#define CRI_PUNIT_WATCHER_OFFSET		0x08A0
+#define CRI_OOBMSM_WATCHER_OFFSET		0x0CF8
+#define CRI_OOBMSM_GFSP_TELEMETRY_OFFSET	0x1600
+#define CRI_PUNIT_CRASHLOG_OFFSET		0x0E60
 
 enum record_id {
 	PUNIT,
@@ -138,45 +162,92 @@ enum capability {
 	WATCHER,
 };
 
-static int xe_guid_decode(u32 guid, int *index, u32 *offset)
+static int bmg_guid_decode(u32 guid, int *index, u32 *offset)
 {
 	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
 	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
-	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
-
-	if (device_id != BMG_DEVICE_ID)
-		return -ENODEV;
-
-	if (cap_type > WATCHER)
-		return -EINVAL;
 
 	*offset = 0;
 
 	if (cap_type == CRASHLOG) {
-		*index = record_id == PUNIT ? 2 : 4;
+		*index = record_id == PUNIT ? BMG_IDX_CRASHLOG_PUNIT : BMG_IDX_CRASHLOG_OOBMSM;
 		return 0;
 	}
 
 	switch (record_id) {
 	case PUNIT:
-		*index = 0;
+		*index = BMG_IDX_TELEM_PUNIT;
 		if (cap_type == TELEMETRY)
-			*offset = PUNIT_TELEMETRY_OFFSET;
+			*offset = BMG_PUNIT_TELEMETRY_OFFSET;
 		else
-			*offset = PUNIT_WATCHER_OFFSET;
+			*offset = BMG_PUNIT_WATCHER_OFFSET;
 		break;
 
 	case OOBMSM_0:
-		*index = 1;
+		*index = BMG_IDX_TELEM_OOBMSM;
 		if (cap_type == WATCHER)
-			*offset = OOBMSM_0_WATCHER_OFFSET;
+			*offset = BMG_OOBMSM_0_WATCHER_OFFSET;
 		break;
 
 	case OOBMSM_1:
-		*index = 1;
+		*index = BMG_IDX_TELEM_OOBMSM;
+		if (cap_type == TELEMETRY)
+			*offset = BMG_OOBMSM_1_TELEMETRY_OFFSET;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int cri_guid_decode(u32 guid, int *index, u32 *offset)
+{
+	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
+	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
+	u32 instance  = FIELD_GET(CRI_GUID_INSTANCE, guid);
+
+	*offset = 0;
+
+	if (cap_type == CRASHLOG) {
+		if (record_id == PUNIT) {
+			*index = CRI_IDX_CRASHLOG_PUNIT;
+			*offset = CRI_PUNIT_CRASHLOG_OFFSET;
+		} else {
+			*index = CRI_IDX_CRASHLOG_OOBMSM;
+		}
+		return 0;
+	}
+
+	switch (record_id) {
+	case PUNIT:
+		*index = CRI_IDX_TELEM_PUNIT;
 		if (cap_type == TELEMETRY)
-			*offset = OOBMSM_1_TELEMETRY_OFFSET;
+			*offset = CRI_PUNIT_TELEMETRY_OFFSET;
+		else
+			*offset = CRI_PUNIT_WATCHER_OFFSET;
+		break;
+
+	case OOBMSM_0:
+		*index = CRI_IDX_TELEM_OOBMSM;
+		switch (instance) {
+		case 0:
+			if (cap_type == WATCHER) {
+				*index = CRI_IDX_WATCHER_OOBMSM;
+				*offset = CRI_OOBMSM_WATCHER_OFFSET;
+			}
+			break;
+
+		case 1:
+			if (cap_type == TELEMETRY)
+				*offset = CRI_OOBMSM_GFSP_TELEMETRY_OFFSET;
+			break;
+
+		default:
+			return -EINVAL;
+		}
 		break;
+
 	default:
 		return -EINVAL;
 	}
@@ -184,6 +255,23 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
 	return 0;
 }
 
+static int xe_guid_decode(u32 guid, int *index, u32 *offset)
+{
+	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
+	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
+
+	if (cap_type > WATCHER)
+		return -EINVAL;
+
+	if (device_id == BMG_DEVICE_ID)
+		return bmg_guid_decode(guid, index, offset);
+
+	if (device_id == CRI_DEVICE_ID)
+		return cri_guid_decode(guid, index, offset);
+
+	return -ENODEV;
+}
+
 /*
  * xe_pmt_telem_read is a callback API.  I.e this can be accessed external to
  * XE driver (PMT driver scope).  Because of this, DRM hotplug needs to be
@@ -193,8 +281,8 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 		      u32 count)
 {
 	struct xe_device *xe = kdev_to_xe_device(dev);
-	void __iomem *telem_addr = xe->mmio.regs + BMG_TELEMETRY_OFFSET;
 	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
+	void __iomem *telem_addr = xe->mmio.regs + xe->pmt.base_offset;
 	u32 mem_region;
 	u32 offset;
 	int ret = 0;
@@ -286,6 +374,7 @@ void xe_vsec_init(struct xe_device *xe)
 	case XE_VSEC_BMG:
 		if (!xe->soc_remapper.set_telem_region)
 			return;
+		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
 		info->priv_data = &xe_pmt_cb;
 		break;
 	default:
-- 
2.43.0

Re: [PATCH v3 07/10] drm/xe/vsec: Crescent Island PMT decode

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Incorrect index assignment for PUNIT WATCHER in cri_guid_decode().
--

--- Patch [7]: [PATCH v3 07/10] drm/xe/vsec: Crescent Island PMT decode ---
commit 1a9376fa8378b9795de36421250f5e1e1308ede7
Author: Michael J. Ruhl <michael.j.ruhl@intel.com>

drm/xe/vsec: Crescent Island PMT decode

Crescent Island (CRI) has different index and offset values for
accessing the PMT data area. This updates the decode path and data read
callbacks to support the CRI device usage.

> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 6345b0b4b26b8..dc42b9492428a 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c

[ ... ]

> +static int cri_guid_decode(u32 guid, int *index, u32 *offset)
> +{
> +	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
> +	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
> +	u32 instance  = FIELD_GET(CRI_GUID_INSTANCE, guid);
> +
> +	*offset = 0;

[ ... ]

> +	switch (record_id) {
> +	case PUNIT:
> +		*index = CRI_IDX_TELEM_PUNIT;
> +		if (cap_type == TELEMETRY)
> +			*offset = CRI_PUNIT_TELEMETRY_OFFSET;
> +		else
> +			*offset = CRI_PUNIT_WATCHER_OFFSET;

[Severity: Low]
Does this code assign the correct index for the PUNIT WATCHER capability?

Earlier in the patch, a macro is defined explicitly noting that PUNIT and
OOBMSM share the WATCHER index:

#define CRI_IDX_WATCHER_OOBMSM          0x03  /* PUNIT and OOBMSM share this index */

However, the switch statement for PUNIT unconditionally assigns the index
to CRI_IDX_TELEM_PUNIT (0x01) without updating it to CRI_IDX_WATCHER_OOBMSM
when cap_type is WATCHER.

While xe_pmt_telem_read() currently returns -EINVAL for the WATCHER
capability (which prevents any immediate io failures), does this decode logic
contradict the documented hardware index sharing?

> +		break;
> +
> +	case OOBMSM_0:

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260824162317.2450380-12-michael.j.ruhl@intel.com?part=7

Re: [PATCH v3 07/10] drm/xe/vsec: Crescent Island PMT decode

[Ilpo Järvinen]

[-- Attachment #1: Type: text/plain, Size: 7750 bytes --]

On Mon, 24 Aug 2026, Michael J. Ruhl wrote:

> Crescent Island (CRI) has different index and offset values for
> accessing the PMT data area.
> 
> Update the decode path to support the CRI device.
> 
> Update the data read callback so to support the CRI usage.
> 
> Define several magic numbers.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device_types.h |   2 +
>  drivers/gpu/drm/xe/xe_vsec.c         | 135 ++++++++++++++++++++++-----
>  2 files changed, 114 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 180d450a6deb..3f1a70813a99 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -466,6 +466,8 @@ struct xe_device {
>  	struct {
>  		/** @pmt.lock: protect access for telemetry data */
>  		struct mutex lock;
> +		/** @pmt.base_offset: device specific base offset */
> +		u64 base_offset;
>  	} pmt;
>  
>  	/** @soc_remapper: SoC remapper object */
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 6345b0b4b26b..dc42b9492428 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -108,23 +108,47 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
>  /*
>   * The GUID will have the following bits to decode:
>   *   [0:3]   - {Telemetry space iteration number (0,1,..)}
> - *   [4:7]   - Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
> + *   [4:7]   - BMG Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
> + *   [4:5]   - CRI Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
> + *   [6:7]   - CRI Instance
>   *   [8:11]  - SOC_SKU
>   *   [12:27] – Device ID – changes for each down bin SKU’s
>   *   [28:29] - Capability Type (Crashlog-0, Telemetry Aggregator-1, Watcher-2)
>   *   [30:31] - Record-ID (0-PUNIT, 1-OOBMSM_0, 2-OOBMSM_1)
>   */
>  #define GUID_TELEM_ITERATION	GENMASK(3, 0)
> -#define GUID_SEGMENT		GENMASK(7, 4)
>  #define GUID_SOC_SKU		GENMASK(11, 8)
>  #define GUID_DEVICE_ID		GENMASK(27, 12)
>  #define GUID_CAP_TYPE		GENMASK(29, 28)
>  #define GUID_RECORD_ID		GENMASK(31, 30)
>  
> -#define PUNIT_TELEMETRY_OFFSET		0x0200
> -#define PUNIT_WATCHER_OFFSET		0x14A0
> -#define OOBMSM_0_WATCHER_OFFSET		0x18D8
> -#define OOBMSM_1_TELEMETRY_OFFSET	0x1000
> +#define BMG_GUID_SEGMENT	GENMASK(7, 4)
> +
> +#define CRI_GUID_SEGMENT	GENMASK(5, 4)
> +#define CRI_GUID_INSTANCE	GENMASK(7, 6)
> +
> +#define BMG_IDX_TELEM_PUNIT		0x00
> +#define BMG_IDX_TELEM_OOBMSM		0x01
> +#define BMG_IDX_CRASHLOG_PUNIT		0x02
> +#define BMG_IDX_CRASHLOG_OOBMSM		0x04
> +
> +#define BMG_PUNIT_TELEMETRY_OFFSET	0x0200
> +#define BMG_PUNIT_WATCHER_OFFSET	0x14A0
> +#define BMG_OOBMSM_0_WATCHER_OFFSET	0x18D8
> +#define BMG_OOBMSM_1_TELEMETRY_OFFSET	0x1000

IMO, it would be better to do the plain renames first to get a clean diff 
for the new stuff.

-- 
 i.

> +#define CRI_IDX_TELEM_DISCOVERY		0x00
> +#define CRI_IDX_TELEM_PUNIT		0x01
> +#define CRI_IDX_TELEM_OOBMSM		0x02
> +#define CRI_IDX_CRASHLOG_PUNIT		0x03
> +#define CRI_IDX_WATCHER_OOBMSM		0x03  /* PUNIT and OOBMSM share this index */
> +#define CRI_IDX_CRASHLOG_OOBMSM		0x04
> +
> +#define CRI_PUNIT_TELEMETRY_OFFSET		0x0200
> +#define CRI_PUNIT_WATCHER_OFFSET		0x08A0
> +#define CRI_OOBMSM_WATCHER_OFFSET		0x0CF8
> +#define CRI_OOBMSM_GFSP_TELEMETRY_OFFSET	0x1600
> +#define CRI_PUNIT_CRASHLOG_OFFSET		0x0E60
>  
>  enum record_id {
>  	PUNIT,
> @@ -138,45 +162,92 @@ enum capability {
>  	WATCHER,
>  };
>  
> -static int xe_guid_decode(u32 guid, int *index, u32 *offset)
> +static int bmg_guid_decode(u32 guid, int *index, u32 *offset)
>  {
>  	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
>  	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
> -	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
> -
> -	if (device_id != BMG_DEVICE_ID)
> -		return -ENODEV;
> -
> -	if (cap_type > WATCHER)
> -		return -EINVAL;
>  
>  	*offset = 0;
>  
>  	if (cap_type == CRASHLOG) {
> -		*index = record_id == PUNIT ? 2 : 4;
> +		*index = record_id == PUNIT ? BMG_IDX_CRASHLOG_PUNIT : BMG_IDX_CRASHLOG_OOBMSM;
>  		return 0;
>  	}
>  
>  	switch (record_id) {
>  	case PUNIT:
> -		*index = 0;
> +		*index = BMG_IDX_TELEM_PUNIT;
>  		if (cap_type == TELEMETRY)
> -			*offset = PUNIT_TELEMETRY_OFFSET;
> +			*offset = BMG_PUNIT_TELEMETRY_OFFSET;
>  		else
> -			*offset = PUNIT_WATCHER_OFFSET;
> +			*offset = BMG_PUNIT_WATCHER_OFFSET;
>  		break;
>  
>  	case OOBMSM_0:
> -		*index = 1;
> +		*index = BMG_IDX_TELEM_OOBMSM;
>  		if (cap_type == WATCHER)
> -			*offset = OOBMSM_0_WATCHER_OFFSET;
> +			*offset = BMG_OOBMSM_0_WATCHER_OFFSET;
>  		break;
>  
>  	case OOBMSM_1:
> -		*index = 1;
> +		*index = BMG_IDX_TELEM_OOBMSM;
> +		if (cap_type == TELEMETRY)
> +			*offset = BMG_OOBMSM_1_TELEMETRY_OFFSET;
> +		break;
> +	default:
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +
> +static int cri_guid_decode(u32 guid, int *index, u32 *offset)
> +{
> +	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
> +	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
> +	u32 instance  = FIELD_GET(CRI_GUID_INSTANCE, guid);
> +
> +	*offset = 0;
> +
> +	if (cap_type == CRASHLOG) {
> +		if (record_id == PUNIT) {
> +			*index = CRI_IDX_CRASHLOG_PUNIT;
> +			*offset = CRI_PUNIT_CRASHLOG_OFFSET;
> +		} else {
> +			*index = CRI_IDX_CRASHLOG_OOBMSM;
> +		}
> +		return 0;
> +	}
> +
> +	switch (record_id) {
> +	case PUNIT:
> +		*index = CRI_IDX_TELEM_PUNIT;
>  		if (cap_type == TELEMETRY)
> -			*offset = OOBMSM_1_TELEMETRY_OFFSET;
> +			*offset = CRI_PUNIT_TELEMETRY_OFFSET;
> +		else
> +			*offset = CRI_PUNIT_WATCHER_OFFSET;
> +		break;
> +
> +	case OOBMSM_0:
> +		*index = CRI_IDX_TELEM_OOBMSM;
> +		switch (instance) {
> +		case 0:
> +			if (cap_type == WATCHER) {
> +				*index = CRI_IDX_WATCHER_OOBMSM;
> +				*offset = CRI_OOBMSM_WATCHER_OFFSET;
> +			}
> +			break;
> +
> +		case 1:
> +			if (cap_type == TELEMETRY)
> +				*offset = CRI_OOBMSM_GFSP_TELEMETRY_OFFSET;
> +			break;
> +
> +		default:
> +			return -EINVAL;
> +		}
>  		break;
> +
>  	default:
>  		return -EINVAL;
>  	}
> @@ -184,6 +255,23 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
>  	return 0;
>  }
>  
> +static int xe_guid_decode(u32 guid, int *index, u32 *offset)
> +{
> +	u32 cap_type  = FIELD_GET(GUID_CAP_TYPE, guid);
> +	u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
> +
> +	if (cap_type > WATCHER)
> +		return -EINVAL;
> +
> +	if (device_id == BMG_DEVICE_ID)
> +		return bmg_guid_decode(guid, index, offset);
> +
> +	if (device_id == CRI_DEVICE_ID)
> +		return cri_guid_decode(guid, index, offset);
> +
> +	return -ENODEV;
> +}
> +
>  /*
>   * xe_pmt_telem_read is a callback API.  I.e this can be accessed external to
>   * XE driver (PMT driver scope).  Because of this, DRM hotplug needs to be
> @@ -193,8 +281,8 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  		      u32 count)
>  {
>  	struct xe_device *xe = kdev_to_xe_device(dev);
> -	void __iomem *telem_addr = xe->mmio.regs + BMG_TELEMETRY_OFFSET;
>  	u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
> +	void __iomem *telem_addr = xe->mmio.regs + xe->pmt.base_offset;
>  	u32 mem_region;
>  	u32 offset;
>  	int ret = 0;
> @@ -286,6 +374,7 @@ void xe_vsec_init(struct xe_device *xe)
>  	case XE_VSEC_BMG:
>  		if (!xe->soc_remapper.set_telem_region)
>  			return;
> +		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
>  		info->priv_data = &xe_pmt_cb;
>  		break;
>  	default:
> 

[PATCH v3 08/10] drm/xe/vsec: Crescent Island PMT callbacks

[Michael J. Ruhl]

CRI PMT support requires callbacks to access the discovery status
and control areas.  Access is a common MMIO area that requires an
index to be set before access is allowed.

Introduce the necessary callbacks to get the status and control
information for CRI PMT usage.

Add the glue logic to register the CRI PMT functionality.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_vsec.c | 118 ++++++++++++++++++++++++++++++++++-
 1 file changed, 115 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index dc42b9492428..578d59048b39 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -335,17 +335,120 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 	return ret == 0 ? count : ret;
 }
 
-static struct pmt_callbacks xe_pmt_cb = {
+/**
+ * xe_pmt_read_reg() - read a crashlog register
+ * @dev: the xe device that registered the callback
+ * @guid: PMT guid of the crashlog instance
+ * @reg: data read from the PMT data structure
+ * @offset: which data to read from the PMT data structure
+ *
+ * Read the requested PMT register based on the pcie device and guid.  The
+ * supported struct is the Crashlog Type1 Version2.
+ *
+ * Currently this is for CRI only.
+ */
+static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+	void __iomem *disc_addr = xe->mmio.regs;
+	int ret = 0;
+	u32 inst;
+	int idx;
+
+	if (!drm_dev_enter(&xe->drm, &idx))
+		return -ENODEV;
+
+	if (!xe->soc_remapper.set_telem_region) {
+		ret = -ENODEV;
+		goto dev_exit;
+	}
+
+	if (FIELD_GET(GUID_DEVICE_ID, guid) != CRI_DEVICE_ID ||
+	    FIELD_GET(GUID_CAP_TYPE, guid) != CRASHLOG) {
+		ret = -EINVAL;
+		goto dev_exit;
+	}
+
+	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ?
+		CRI_CRASHLOG_PUNIT_DISC_OFFSET : CRI_CRASHLOG_OOBMSM_DISC_OFFSET;
+	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
+
+	xe_pm_runtime_get(xe);
+	mutex_lock(&xe->pmt.lock);
+
+	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
+
+	memcpy_fromio(reg, disc_addr, sizeof(*reg));
+
+	mutex_unlock(&xe->pmt.lock);
+	xe_pm_runtime_put(xe);
+
+dev_exit:
+	drm_dev_exit(idx);
+
+	return ret;
+}
+
+static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+	void __iomem *disc_addr = xe->mmio.regs;
+	int ret = 0;
+	u32 inst;
+	int idx;
+
+	if (!drm_dev_enter(&xe->drm, &idx))
+		return -ENODEV;
+
+	if (!xe->soc_remapper.set_telem_region) {
+		ret = -ENODEV;
+		goto dev_exit;
+	}
+
+	if (FIELD_GET(GUID_DEVICE_ID, guid) != CRI_DEVICE_ID ||
+	    FIELD_GET(GUID_CAP_TYPE, guid) != CRASHLOG) {
+		ret = -EINVAL;
+		goto dev_exit;
+	}
+
+	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ?
+		CRI_CRASHLOG_PUNIT_DISC_OFFSET : CRI_CRASHLOG_OOBMSM_DISC_OFFSET;
+	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
+
+	xe_pm_runtime_get(xe);
+	mutex_lock(&xe->pmt.lock);
+
+	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
+
+	memcpy_toio(disc_addr, &reg, sizeof(reg));
+
+	mutex_unlock(&xe->pmt.lock);
+	xe_pm_runtime_put(xe);
+
+dev_exit:
+	drm_dev_exit(idx);
+
+	return ret;
+}
+
+static struct pmt_callbacks xe_bmg_pmt_cb = {
 	.read_telem = xe_pmt_telem_read,
 };
 
+static struct pmt_callbacks xe_cri_pmt_cb = {
+	.read_telem = xe_pmt_telem_read,
+	.read_reg = xe_pmt_read_reg,
+	.write_reg = xe_pmt_write_reg,
+};
+
 static const int vsec_platforms[] = {
 	[XE_BATTLEMAGE] = XE_VSEC_BMG,
+	[XE_CRESCENTISLAND] = XE_VSEC_CRI,
 };
 
 static enum xe_vsec get_platform_info(struct xe_device *xe)
 {
-	if (xe->info.platform > XE_BATTLEMAGE)
+	if (xe->info.platform > XE_CRESCENTISLAND)
 		return XE_VSEC_UNKNOWN;
 
 	return vsec_platforms[xe->info.platform];
@@ -375,8 +478,17 @@ void xe_vsec_init(struct xe_device *xe)
 		if (!xe->soc_remapper.set_telem_region)
 			return;
 		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
-		info->priv_data = &xe_pmt_cb;
+		info->priv_data = &xe_bmg_pmt_cb;
+		break;
+
+	case XE_VSEC_CRI:
+		if (!xe->soc_remapper.set_telem_region)
+			return;
+		xe->pmt.base_offset = CRI_TELEMETRY_OFFSET;
+		info->priv_data = &xe_cri_pmt_cb;
+		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
 		break;
+
 	default:
 		break;
 	}
-- 
2.43.0

Re: [PATCH v3 08/10] drm/xe/vsec: Crescent Island PMT callbacks

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The CRI PMT functionality and VSEC registration lack an explicit IS_SRIOV_VF() guard, allowing Virtual Functions to access PF-only SOC_BASE MMIO registers.
--

--- Patch [8]: [PATCH v3 08/10] drm/xe/vsec: Crescent Island PMT callbacks ---
commit 20efb72ccb405a03098f93ae5977f349cb941f0a
Author: Michael J. Ruhl <michael.j.ruhl@intel.com>

drm/xe/vsec: Crescent Island PMT callbacks

This commit introduces necessary callbacks to read and write status and
control information for Crescent Island (CRI) PMT usage. It also adds the
logic to register the CRI PMT functionality.

> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c

[ ... ]

> +static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
> +{
> +	struct xe_device *xe = kdev_to_xe_device(dev);
> +	void __iomem *disc_addr = xe->mmio.regs;

[ ... ]

> +	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ?
> +		CRI_CRASHLOG_PUNIT_DISC_OFFSET : CRI_CRASHLOG_OOBMSM_DISC_OFFSET;
> +	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
> +
> +	xe_pm_runtime_get(xe);

[Severity: High]
Can a Virtual Function (VF) trigger this access?

It looks like disc_addr calculates a SOC_BASE MMIO region offset using
CRI_DISCOVERY_OFFSET, which is typically restricted to Physical Functions
(PFs). 

Accessing PF-only hardware resources from a VF context can cause MMIO
timeouts and hardware failures. 

[ ... ]

> @@ -375,8 +478,17 @@ void xe_vsec_init(struct xe_device *xe)
>  		if (!xe->soc_remapper.set_telem_region)
>  			return;
>  		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
> -		info->priv_data = &xe_pmt_cb;
> +		info->priv_data = &xe_bmg_pmt_cb;
> +		break;
> +
> +	case XE_VSEC_CRI:
> +		if (!xe->soc_remapper.set_telem_region)
> +			return;
> +		xe->pmt.base_offset = CRI_TELEMETRY_OFFSET;
> +		info->priv_data = &xe_cri_pmt_cb;
> +		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
>  		break;

[Severity: High]
Should this platform registration block be guarded by IS_SRIOV_VF()?

Since the newly added callbacks interact directly with SOC_BASE MMIO regions,
checking for IS_SRIOV_VF(xe) and returning early could prevent VFs from
registering the PMT functionality and attempting to access restricted hardware.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260824162317.2450380-12-michael.j.ruhl@intel.com?part=8

RE: [PATCH v3 08/10] drm/xe/vsec: Crescent Island PMT callbacks

[Ruhl, Michael J]

>-----Original Message-----
>From: sashiko-bot@kernel.org <sashiko-bot@kernel.org>
>Sent: Monday, August 24, 2026 12:37 PM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: intel-xe@lists.freedesktop.org
>Subject: Re: [PATCH v3 08/10] drm/xe/vsec: Crescent Island PMT callbacks
>
>Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to
>consider:
>- [High] The CRI PMT functionality and VSEC registration lack an explicit
>IS_SRIOV_VF() guard, allowing Virtual Functions to access PF-only SOC_BASE
>MMIO registers.
>--
>
>--- Patch [8]: [PATCH v3 08/10] drm/xe/vsec: Crescent Island PMT callbacks ---
>commit 20efb72ccb405a03098f93ae5977f349cb941f0a
>Author: Michael J. Ruhl <michael.j.ruhl@intel.com>
>
>drm/xe/vsec: Crescent Island PMT callbacks
>
>This commit introduces necessary callbacks to read and write status and
>control information for Crescent Island (CRI) PMT usage. It also adds the
>logic to register the CRI PMT functionality.
>
>> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
>> --- a/drivers/gpu/drm/xe/xe_vsec.c
>> +++ b/drivers/gpu/drm/xe/xe_vsec.c
>
>[ ... ]
>
>> +static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32
>offset)
>> +{
>> +	struct xe_device *xe = kdev_to_xe_device(dev);
>> +	void __iomem *disc_addr = xe->mmio.regs;
>
>[ ... ]
>
>> +	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ?
>> +		CRI_CRASHLOG_PUNIT_DISC_OFFSET :
>CRI_CRASHLOG_OOBMSM_DISC_OFFSET;
>> +	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
>> +
>> +	xe_pm_runtime_get(xe);
>
>[Severity: High]
>Can a Virtual Function (VF) trigger this access?
>
>It looks like disc_addr calculates a SOC_BASE MMIO region offset using
>CRI_DISCOVERY_OFFSET, which is typically restricted to Physical Functions
>(PFs).

No.  The callback will NOT be registered SRIO VF is in place.

M

>Accessing PF-only hardware resources from a VF context can cause MMIO
>timeouts and hardware failures.
>
>[ ... ]
>
>> @@ -375,8 +478,17 @@ void xe_vsec_init(struct xe_device *xe)
>>  		if (!xe->soc_remapper.set_telem_region)
>>  			return;
>>  		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
>> -		info->priv_data = &xe_pmt_cb;
>> +		info->priv_data = &xe_bmg_pmt_cb;
>> +		break;
>> +
>> +	case XE_VSEC_CRI:
>> +		if (!xe->soc_remapper.set_telem_region)
>> +			return;
>> +		xe->pmt.base_offset = CRI_TELEMETRY_OFFSET;
>> +		info->priv_data = &xe_cri_pmt_cb;
>> +		xe->soc_remapper.set_telem_region(xe,
>CRI_IDX_TELEM_DISCOVERY);
>>  		break;
>
>[Severity: High]
>Should this platform registration block be guarded by IS_SRIOV_VF()?
>
>Since the newly added callbacks interact directly with SOC_BASE MMIO regions,
>checking for IS_SRIOV_VF(xe) and returning early could prevent VFs from
>registering the PMT functionality and attempting to access restricted hardware.

VF configs do NOT have soc-remapper usage, so by checking for that the access will be PF only.

There are additional paths that will not have soc-remapper set, checking for the missing
config covers both usages.

M

>--
>Sashiko AI review ·
>https://sashiko.dev/#/patchset/20260824162317.2450380-12-
>michael.j.ruhl@intel.com?part=8

[PATCH v3 09/10] drm/xe/vsec: Support late bind fw information

[Michael J. Ruhl]

CRI FW is loaded on power on.  Because of this, access to
the FW cannot be done until it is running.

Update the XE PMT probe and access to check for late bind
devices, verify, and wait for the appropriate FW state
before probe or access.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/xe_device.c       |   4 +-
 drivers/gpu/drm/xe/xe_device_types.h |   4 +
 drivers/gpu/drm/xe/xe_vsec.c         | 141 +++++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_vsec.h         |   2 +-
 4 files changed, 143 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 74d566693dfd..bf02f881095f 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -1140,7 +1140,9 @@ int xe_device_probe(struct xe_device *xe)
 	for_each_gt(gt, xe, id)
 		xe_gt_sanitize_freq(gt);
 
-	xe_vsec_init(xe);
+	err = xe_vsec_init(xe);
+	if (err)
+		goto err_unregister_display;
 
 	err = xe_sriov_init_late(xe);
 	if (err)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 3f1a70813a99..5d9e6e66c665 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -468,6 +468,10 @@ struct xe_device {
 		struct mutex lock;
 		/** @pmt.base_offset: device specific base offset */
 		u64 base_offset;
+		/** @pmt.work: support late-bind probe */
+		struct delayed_work work;
+		/** @pmt.retry_count: late-bind probe retry */
+		u32 retry_count;
 	} pmt;
 
 	/** @soc_remapper: SoC remapper object */
diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index 578d59048b39..edc20c24137e 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -3,6 +3,7 @@
 #include <linux/bitfield.h>
 #include <linux/bits.h>
 #include <linux/cleanup.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/intel_vsec.h>
 #include <linux/module.h>
@@ -17,6 +18,7 @@
 #include "xe_mmio.h"
 #include "xe_platform_types.h"
 #include "xe_pm.h"
+#include "xe_sysctrl.h"
 #include "xe_vsec.h"
 
 #include "regs/xe_pmt.h"
@@ -162,6 +164,14 @@ enum capability {
 	WATCHER,
 };
 
+/*
+ * Late bind will delay 100msec for up to 20 seconds
+ */
+#define VSEC_LATE_BIND_DELAY_MSEC	(100)
+#define VSEC_LATE_BIND_RETRY		(200)
+
+static void cri_late_bind_probe(struct xe_device *xe);
+
 static int bmg_guid_decode(u32 guid, int *index, u32 *offset)
 {
 	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
@@ -272,6 +282,56 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
 	return -ENODEV;
 }
 
+#define WAITING_FOR_SYCTLR
+#ifdef WAITING_FOR_SYCTLR
+static bool xe_is_oobmsm_fw_ready(struct xe_device *xe)
+{
+	return true;
+}
+#endif
+
+static void cri_late_bind_probe_work(struct work_struct *work)
+{
+	struct xe_device *xe = container_of(work, struct xe_device, pmt.work.work);
+
+	if (xe_is_oobmsm_fw_ready(xe)) {
+		cri_late_bind_probe(xe);
+		xe_pm_runtime_put(xe);
+		return;
+	}
+
+	xe->pmt.retry_count++;
+
+	/* wait up to 20 seconds */
+	if (xe->pmt.retry_count == VSEC_LATE_BIND_RETRY) {
+		drm_warn(&xe->drm, "PMT probe: Late Binding failed to complete\n");
+		xe_pm_runtime_put(xe);
+		return;
+	}
+
+	if (!schedule_delayed_work(&xe->pmt.work, msecs_to_jiffies(VSEC_LATE_BIND_DELAY_MSEC)))
+		xe_pm_runtime_put(xe);
+}
+
+static bool wait_for_fw(struct xe_device *xe)
+{
+	int retries = VSEC_LATE_BIND_RETRY;  /* wait up to 20 secs */
+
+	if (xe->info.platform != XE_CRESCENTISLAND)
+		return true;
+
+	while (retries--) {
+		if (xe_is_oobmsm_fw_ready(xe))
+			return true;
+
+		msleep(VSEC_LATE_BIND_DELAY_MSEC);
+	}
+
+	drm_warn(&xe->drm, "Late Binding failed to complete\n");
+
+	return false;
+}
+
 /*
  * xe_pmt_telem_read is a callback API.  I.e this can be accessed external to
  * XE driver (PMT driver scope).  Because of this, DRM hotplug needs to be
@@ -318,6 +378,11 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 		goto dev_exit;
 	}
 
+	if (!wait_for_fw(xe)) {
+		ret = -ENODATA;
+		goto runtime_exit;
+	}
+
 	mutex_lock(&xe->pmt.lock);
 
 	/* set SoC re-mapper index register based on GUID memory region */
@@ -327,6 +392,7 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
 
 	mutex_unlock(&xe->pmt.lock);
 
+runtime_exit:
 	xe_pm_runtime_put(xe);
 
 dev_exit:
@@ -374,6 +440,10 @@ static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
 	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
 
 	xe_pm_runtime_get(xe);
+	if (!wait_for_fw(xe)) {
+		ret = -ENODATA;
+		goto runtime_exit;
+	}
 	mutex_lock(&xe->pmt.lock);
 
 	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
@@ -381,6 +451,8 @@ static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
 	memcpy_fromio(reg, disc_addr, sizeof(*reg));
 
 	mutex_unlock(&xe->pmt.lock);
+
+runtime_exit:
 	xe_pm_runtime_put(xe);
 
 dev_exit:
@@ -416,6 +488,10 @@ static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
 	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
 
 	xe_pm_runtime_get(xe);
+	if (!wait_for_fw(xe)) {
+		ret = -ENODATA;
+		goto runtime_exit;
+	}
 	mutex_lock(&xe->pmt.lock);
 
 	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
@@ -423,6 +499,8 @@ static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
 	memcpy_toio(disc_addr, &reg, sizeof(reg));
 
 	mutex_unlock(&xe->pmt.lock);
+
+runtime_exit:
 	xe_pm_runtime_put(xe);
 
 dev_exit:
@@ -454,12 +532,44 @@ static enum xe_vsec get_platform_info(struct xe_device *xe)
 	return vsec_platforms[xe->info.platform];
 }
 
+static void cri_late_bind_probe(struct xe_device *xe)
+{
+	struct intel_vsec_platform_info *info;
+	struct device *dev = xe->drm.dev;
+	enum xe_vsec platform;
+
+	platform = get_platform_info(xe);
+	if (platform != XE_VSEC_CRI)
+		return;
+
+	info = &xe_vsec_info[platform];
+	if (!info->headers)
+		return;
+
+	info->priv_data = &xe_cri_pmt_cb;
+	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
+
+	intel_vsec_register(dev, info);
+}
+
+static void vsec_disable_late_bind_work(void *arg)
+{
+	struct xe_device *xe = arg;
+
+	/*
+	 * If was work was cancelled while it was still pending, we need to
+	 * take care of releasing the runtime reference
+	 */
+	if (disable_delayed_work_sync(&xe->pmt.work))
+		xe_pm_runtime_put(xe);
+}
+
 /**
  * xe_vsec_init - Initialize resources and add intel_vsec auxiliary
  * interface
  * @xe: valid xe instance
  */
-void xe_vsec_init(struct xe_device *xe)
+int xe_vsec_init(struct xe_device *xe)
 {
 	struct intel_vsec_platform_info *info;
 	struct device *dev = xe->drm.dev;
@@ -467,30 +577,44 @@ void xe_vsec_init(struct xe_device *xe)
 
 	platform = get_platform_info(xe);
 	if (platform == XE_VSEC_UNKNOWN)
-		return;
+		return 0;
 
 	info = &xe_vsec_info[platform];
 	if (!info->headers)
-		return;
+		return 0;
 
 	switch (platform) {
 	case XE_VSEC_BMG:
 		if (!xe->soc_remapper.set_telem_region)
-			return;
+			return 0;
 		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
 		info->priv_data = &xe_bmg_pmt_cb;
 		break;
 
 	case XE_VSEC_CRI:
 		if (!xe->soc_remapper.set_telem_region)
-			return;
+			return 0;
 		xe->pmt.base_offset = CRI_TELEMETRY_OFFSET;
+
+		xe->pmt.retry_count = 0;
+		INIT_DELAYED_WORK(&xe->pmt.work, cri_late_bind_probe_work);
+
+		xe_pm_runtime_get_noresume(xe);
+		if (!xe_is_oobmsm_fw_ready(xe)) {
+			schedule_delayed_work(&xe->pmt.work,
+					      msecs_to_jiffies(VSEC_LATE_BIND_DELAY_MSEC));
+			return devm_add_action_or_reset(xe->drm.dev,
+							vsec_disable_late_bind_work,
+							xe);
+		}
+
 		info->priv_data = &xe_cri_pmt_cb;
 		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
 		break;
 
 	default:
-		break;
+		drm_err(&xe->drm, "Unsupported platform: %u\n", platform);
+		return 0;
 	}
 
 	/*
@@ -498,5 +622,10 @@ void xe_vsec_init(struct xe_device *xe)
 	 * resources.
 	 */
 	intel_vsec_register(dev, info);
+
+	if (platform == XE_VSEC_CRI)
+		xe_pm_runtime_put(xe);
+
+	return 0;
 }
 MODULE_IMPORT_NS("INTEL_VSEC");
diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h
index a25b4e6e681b..c4a1e2fc67d8 100644
--- a/drivers/gpu/drm/xe/xe_vsec.h
+++ b/drivers/gpu/drm/xe/xe_vsec.h
@@ -9,7 +9,7 @@
 struct device;
 struct xe_device;
 
-void xe_vsec_init(struct xe_device *xe);
+int xe_vsec_init(struct xe_device *xe);
 int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset, u32 count);
 
 #endif
-- 
2.43.0

Re: [PATCH v3 09/10] drm/xe/vsec: Support late bind fw information

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

New issues:
- [High] Registering devm resources from a delayed work that is cancelled via a devm action causes the devm resources to be leaked and outlive the driver binding, leading to a Use-After-Free.
- [High] Holding the DRM SRCU read lock while sleeping for up to 20 seconds blocks device hot-unplug and causes userspace tasks to hang unresponsively.

Pre-existing issues:
- [High] The PMT VSEC initialization does not restrict execution on Virtual Functions (VFs), violating the restriction on VF access to physical SOC controllers.
--

--- Patch [9]: [PATCH v3 09/10] drm/xe/vsec: Support late bind fw information ---
commit baf7715ba5240a405fca0471519228b0c43828df
Author: Michael J. Ruhl <michael.j.ruhl@intel.com>

drm/xe/vsec: Support late bind fw information

This commit updates the XE PMT probe to support late bind devices by
waiting for the appropriate firmware state before proceeding with
initialization. It introduces a delayed work queue to retry the probe
and pauses telemetry reads until the firmware is ready.

> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 578d59048b39c..edc20c24137ed 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c

[ ... ]

> @@ -272,6 +282,56 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)

[ ... ]

> +static bool wait_for_fw(struct xe_device *xe)
> +{
> +	int retries = VSEC_LATE_BIND_RETRY;  /* wait up to 20 secs */
> +
> +	if (xe->info.platform != XE_CRESCENTISLAND)
> +		return true;
> +
> +	while (retries--) {
> +		if (xe_is_oobmsm_fw_ready(xe))
> +			return true;
> +
> +		msleep(VSEC_LATE_BIND_DELAY_MSEC);
> +	}
> +
> +	drm_warn(&xe->drm, "Late Binding failed to complete\n");
> +
> +	return false;
> +}

[ ... ]

> @@ -318,6 +378,11 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse

[ ... ]

>  	if (!drm_dev_enter(&xe->drm, &idx))
>  		return -ENODEV;

[ ... ]

> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}

[Severity: High]
Does holding the DRM SRCU read lock while sleeping block device hot-unplug?

Earlier in xe_pmt_telem_read(), drm_dev_enter() is called, which acquires
the SRCU read lock. Inside this critical section, wait_for_fw() can sleep
for up to 20 seconds using msleep().

Could this uninterruptible sleep under SRCU prevent synchronize_srcu() from
completing during drm_dev_unplug(), causing a 20-second stall and leaving
user processes unkillable?

[ ... ]

> @@ -454,12 +532,44 @@ static enum xe_vsec get_platform_info(struct xe_device *xe)

[ ... ]

> +static void cri_late_bind_probe(struct xe_device *xe)
> +{

[ ... ]

> +	info->priv_data = &xe_cri_pmt_cb;
> +	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +
> +	intel_vsec_register(dev, info);
> +}
> +
> +static void vsec_disable_late_bind_work(void *arg)
> +{
> +	struct xe_device *xe = arg;
> +
> +	/*
> +	 * If was work was cancelled while it was still pending, we need to
> +	 * take care of releasing the runtime reference
> +	 */
> +	if (disable_delayed_work_sync(&xe->pmt.work))
> +		xe_pm_runtime_put(xe);
> +}

[Severity: High]
Can this sequence leak devres resources and cause a use-after-free?

When the driver unbinds, devres_release_all() detaches existing resources
to a local list and executes them. vsec_disable_late_bind_work() is
registered as a devm action and runs during this process.

If vsec_disable_late_bind_work() blocks in disable_delayed_work_sync() while
the work queue is actively executing cri_late_bind_probe(), the work thread
will call intel_vsec_register(), which allocates and attaches new devm
resources.

Since devres_release_all() only processes its detached list, will these
newly added devres nodes be added to the empty devres head, leaving them
behind to outlive the driver?

[ ... ]

> @@ -467,30 +577,44 @@ void xe_vsec_init(struct xe_device *xe)
>  {
>  	struct intel_vsec_platform_info *info;
>  	struct device *dev = xe->drm.dev;
>  	enum xe_vsec platform;
>  
>  	platform = get_platform_info(xe);
>  	if (platform == XE_VSEC_UNKNOWN)
> -		return;
> +		return 0;
>  
>  	info = &xe_vsec_info[platform];
>  	if (!info->headers)
> -		return;
> +		return 0;

[Severity: High]
This is a pre-existing issue, but does this initialization path lack an
IS_SRIOV_VF() guard before accessing physical SOC controllers?

If xe_vsec_init() is called during Virtual Function (VF) initialization, it
proceeds to access the SOC remapper and register the VSEC PMT auxiliary
device.

Since these are PF-only hardware resources, will accessing them from a VF
context result in hardware faults or MMIO timeouts?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260824162317.2450380-12-michael.j.ruhl@intel.com?part=9

Re: [PATCH v3 09/10] drm/xe/vsec: Support late bind fw information

[Rodrigo Vivi]

On Mon, Aug 24, 2026 at 09:23:25AM -0700, Michael J. Ruhl wrote:
> CRI FW is loaded on power on.  Because of this, access to
> the FW cannot be done until it is running.
> 
> Update the XE PMT probe and access to check for late bind
> devices, verify, and wait for the appropriate FW state
> before probe or access.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device.c       |   4 +-
>  drivers/gpu/drm/xe/xe_device_types.h |   4 +
>  drivers/gpu/drm/xe/xe_vsec.c         | 141 +++++++++++++++++++++++++--
>  drivers/gpu/drm/xe/xe_vsec.h         |   2 +-
>  4 files changed, 143 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 74d566693dfd..bf02f881095f 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -1140,7 +1140,9 @@ int xe_device_probe(struct xe_device *xe)
>  	for_each_gt(gt, xe, id)
>  		xe_gt_sanitize_freq(gt);
>  
> -	xe_vsec_init(xe);
> +	err = xe_vsec_init(xe);
> +	if (err)
> +		goto err_unregister_display;
>  
>  	err = xe_sriov_init_late(xe);
>  	if (err)
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 3f1a70813a99..5d9e6e66c665 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -468,6 +468,10 @@ struct xe_device {
>  		struct mutex lock;
>  		/** @pmt.base_offset: device specific base offset */
>  		u64 base_offset;
> +		/** @pmt.work: support late-bind probe */
> +		struct delayed_work work;
> +		/** @pmt.retry_count: late-bind probe retry */
> +		u32 retry_count;
>  	} pmt;
>  
>  	/** @soc_remapper: SoC remapper object */
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 578d59048b39..edc20c24137e 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -3,6 +3,7 @@
>  #include <linux/bitfield.h>
>  #include <linux/bits.h>
>  #include <linux/cleanup.h>
> +#include <linux/delay.h>
>  #include <linux/errno.h>
>  #include <linux/intel_vsec.h>
>  #include <linux/module.h>
> @@ -17,6 +18,7 @@
>  #include "xe_mmio.h"
>  #include "xe_platform_types.h"
>  #include "xe_pm.h"
> +#include "xe_sysctrl.h"
>  #include "xe_vsec.h"
>  
>  #include "regs/xe_pmt.h"
> @@ -162,6 +164,14 @@ enum capability {
>  	WATCHER,
>  };
>  
> +/*
> + * Late bind will delay 100msec for up to 20 seconds
> + */
> +#define VSEC_LATE_BIND_DELAY_MSEC	(100)
> +#define VSEC_LATE_BIND_RETRY		(200)
> +
> +static void cri_late_bind_probe(struct xe_device *xe);
> +
>  static int bmg_guid_decode(u32 guid, int *index, u32 *offset)
>  {
>  	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
> @@ -272,6 +282,56 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
>  	return -ENODEV;
>  }
>  
> +#define WAITING_FOR_SYCTLR
> +#ifdef WAITING_FOR_SYCTLR

I'm afraid you forgot to remove this before sending... or what's the goal of these?

> +static bool xe_is_oobmsm_fw_ready(struct xe_device *xe)
> +{
> +	return true;
> +}
> +#endif
> +
> +static void cri_late_bind_probe_work(struct work_struct *work)
> +{
> +	struct xe_device *xe = container_of(work, struct xe_device, pmt.work.work);
> +
> +	if (xe_is_oobmsm_fw_ready(xe)) {
> +		cri_late_bind_probe(xe);
> +		xe_pm_runtime_put(xe);
> +		return;
> +	}
> +
> +	xe->pmt.retry_count++;
> +
> +	/* wait up to 20 seconds */
> +	if (xe->pmt.retry_count == VSEC_LATE_BIND_RETRY) {
> +		drm_warn(&xe->drm, "PMT probe: Late Binding failed to complete\n");
> +		xe_pm_runtime_put(xe);
> +		return;
> +	}
> +
> +	if (!schedule_delayed_work(&xe->pmt.work, msecs_to_jiffies(VSEC_LATE_BIND_DELAY_MSEC)))
> +		xe_pm_runtime_put(xe);
> +}
> +
> +static bool wait_for_fw(struct xe_device *xe)
> +{
> +	int retries = VSEC_LATE_BIND_RETRY;  /* wait up to 20 secs */
> +
> +	if (xe->info.platform != XE_CRESCENTISLAND)
> +		return true;
> +
> +	while (retries--) {
> +		if (xe_is_oobmsm_fw_ready(xe))
> +			return true;
> +
> +		msleep(VSEC_LATE_BIND_DELAY_MSEC);
> +	}
> +
> +	drm_warn(&xe->drm, "Late Binding failed to complete\n");
> +
> +	return false;
> +}
> +
>  /*
>   * xe_pmt_telem_read is a callback API.  I.e this can be accessed external to
>   * XE driver (PMT driver scope).  Because of this, DRM hotplug needs to be
> @@ -318,6 +378,11 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  		goto dev_exit;
>  	}
>  
> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}
> +
>  	mutex_lock(&xe->pmt.lock);
>  
>  	/* set SoC re-mapper index register based on GUID memory region */
> @@ -327,6 +392,7 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  
>  	mutex_unlock(&xe->pmt.lock);
>  
> +runtime_exit:
>  	xe_pm_runtime_put(xe);
>  
>  dev_exit:
> @@ -374,6 +440,10 @@ static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
>  	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
>  
>  	xe_pm_runtime_get(xe);
> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}
>  	mutex_lock(&xe->pmt.lock);
>  
>  	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> @@ -381,6 +451,8 @@ static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
>  	memcpy_fromio(reg, disc_addr, sizeof(*reg));
>  
>  	mutex_unlock(&xe->pmt.lock);
> +
> +runtime_exit:
>  	xe_pm_runtime_put(xe);
>  
>  dev_exit:
> @@ -416,6 +488,10 @@ static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
>  	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
>  
>  	xe_pm_runtime_get(xe);
> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}
>  	mutex_lock(&xe->pmt.lock);
>  
>  	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> @@ -423,6 +499,8 @@ static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
>  	memcpy_toio(disc_addr, &reg, sizeof(reg));
>  
>  	mutex_unlock(&xe->pmt.lock);
> +
> +runtime_exit:
>  	xe_pm_runtime_put(xe);
>  
>  dev_exit:
> @@ -454,12 +532,44 @@ static enum xe_vsec get_platform_info(struct xe_device *xe)
>  	return vsec_platforms[xe->info.platform];
>  }
>  
> +static void cri_late_bind_probe(struct xe_device *xe)
> +{
> +	struct intel_vsec_platform_info *info;
> +	struct device *dev = xe->drm.dev;
> +	enum xe_vsec platform;
> +
> +	platform = get_platform_info(xe);
> +	if (platform != XE_VSEC_CRI)
> +		return;
> +
> +	info = &xe_vsec_info[platform];
> +	if (!info->headers)
> +		return;
> +
> +	info->priv_data = &xe_cri_pmt_cb;
> +	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +
> +	intel_vsec_register(dev, info);
> +}
> +
> +static void vsec_disable_late_bind_work(void *arg)
> +{
> +	struct xe_device *xe = arg;
> +
> +	/*
> +	 * If was work was cancelled while it was still pending, we need to
> +	 * take care of releasing the runtime reference
> +	 */
> +	if (disable_delayed_work_sync(&xe->pmt.work))
> +		xe_pm_runtime_put(xe);
> +}
> +
>  /**
>   * xe_vsec_init - Initialize resources and add intel_vsec auxiliary
>   * interface
>   * @xe: valid xe instance
>   */
> -void xe_vsec_init(struct xe_device *xe)
> +int xe_vsec_init(struct xe_device *xe)
>  {
>  	struct intel_vsec_platform_info *info;
>  	struct device *dev = xe->drm.dev;
> @@ -467,30 +577,44 @@ void xe_vsec_init(struct xe_device *xe)
>  
>  	platform = get_platform_info(xe);
>  	if (platform == XE_VSEC_UNKNOWN)
> -		return;
> +		return 0;
>  
>  	info = &xe_vsec_info[platform];
>  	if (!info->headers)
> -		return;
> +		return 0;
>  
>  	switch (platform) {
>  	case XE_VSEC_BMG:
>  		if (!xe->soc_remapper.set_telem_region)
> -			return;
> +			return 0;
>  		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
>  		info->priv_data = &xe_bmg_pmt_cb;
>  		break;
>  
>  	case XE_VSEC_CRI:
>  		if (!xe->soc_remapper.set_telem_region)
> -			return;
> +			return 0;
>  		xe->pmt.base_offset = CRI_TELEMETRY_OFFSET;
> +
> +		xe->pmt.retry_count = 0;
> +		INIT_DELAYED_WORK(&xe->pmt.work, cri_late_bind_probe_work);
> +
> +		xe_pm_runtime_get_noresume(xe);
> +		if (!xe_is_oobmsm_fw_ready(xe)) {
> +			schedule_delayed_work(&xe->pmt.work,
> +					      msecs_to_jiffies(VSEC_LATE_BIND_DELAY_MSEC));
> +			return devm_add_action_or_reset(xe->drm.dev,
> +							vsec_disable_late_bind_work,
> +							xe);
> +		}
> +
>  		info->priv_data = &xe_cri_pmt_cb;
>  		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
>  		break;
>  
>  	default:
> -		break;
> +		drm_err(&xe->drm, "Unsupported platform: %u\n", platform);
> +		return 0;
>  	}
>  
>  	/*
> @@ -498,5 +622,10 @@ void xe_vsec_init(struct xe_device *xe)
>  	 * resources.
>  	 */
>  	intel_vsec_register(dev, info);
> +
> +	if (platform == XE_VSEC_CRI)
> +		xe_pm_runtime_put(xe);
> +
> +	return 0;
>  }
>  MODULE_IMPORT_NS("INTEL_VSEC");
> diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h
> index a25b4e6e681b..c4a1e2fc67d8 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.h
> +++ b/drivers/gpu/drm/xe/xe_vsec.h
> @@ -9,7 +9,7 @@
>  struct device;
>  struct xe_device;
>  
> -void xe_vsec_init(struct xe_device *xe);
> +int xe_vsec_init(struct xe_device *xe);
>  int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset, u32 count);
>  
>  #endif
> -- 
> 2.43.0
> 

RE: [PATCH v3 09/10] drm/xe/vsec: Support late bind fw information

[Ruhl, Michael J]

>-----Original Message-----
>From: Vivi, Rodrigo <rodrigo.vivi@intel.com>
>Sent: Monday, August 24, 2026 3:16 PM
>To: Ruhl, Michael J <michael.j.ruhl@intel.com>
>Cc: platform-driver-x86@vger.kernel.org; intel-xe@lists.freedesktop.org;
>hansg@kernel.org; ilpo.jarvinen@linux.intel.com; Brost, Matthew
><matthew.brost@intel.com>; thomas.hellstrom@linux.intel.com;
>airlied@gmail.com; simona@ffwll.ch; david.e.box@linux.intel.com; Vijay,
>Anoop C <anoop.c.vijay@intel.com>; Nilawar, Badal
><badal.nilawar@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>;
>Ausmus, James <james.ausmus@intel.com>; Poosa, Karthik
><karthik.poosa@intel.com>
>Subject: Re: [PATCH v3 09/10] drm/xe/vsec: Support late bind fw information
>
>On Mon, Aug 24, 2026 at 09:23:25AM -0700, Michael J. Ruhl wrote:
>> CRI FW is loaded on power on.  Because of this, access to
>> the FW cannot be done until it is running.
>>
>> Update the XE PMT probe and access to check for late bind
>> devices, verify, and wait for the appropriate FW state
>> before probe or access.
>>
>> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_device.c       |   4 +-
>>  drivers/gpu/drm/xe/xe_device_types.h |   4 +
>>  drivers/gpu/drm/xe/xe_vsec.c         | 141 +++++++++++++++++++++++++--
>>  drivers/gpu/drm/xe/xe_vsec.h         |   2 +-
>>  4 files changed, 143 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_device.c
>b/drivers/gpu/drm/xe/xe_device.c
>> index 74d566693dfd..bf02f881095f 100644
>> --- a/drivers/gpu/drm/xe/xe_device.c
>> +++ b/drivers/gpu/drm/xe/xe_device.c
>> @@ -1140,7 +1140,9 @@ int xe_device_probe(struct xe_device *xe)
>>  	for_each_gt(gt, xe, id)
>>  		xe_gt_sanitize_freq(gt);
>>
>> -	xe_vsec_init(xe);
>> +	err = xe_vsec_init(xe);
>> +	if (err)
>> +		goto err_unregister_display;
>>
>>  	err = xe_sriov_init_late(xe);
>>  	if (err)
>> diff --git a/drivers/gpu/drm/xe/xe_device_types.h
>b/drivers/gpu/drm/xe/xe_device_types.h
>> index 3f1a70813a99..5d9e6e66c665 100644
>> --- a/drivers/gpu/drm/xe/xe_device_types.h
>> +++ b/drivers/gpu/drm/xe/xe_device_types.h
>> @@ -468,6 +468,10 @@ struct xe_device {
>>  		struct mutex lock;
>>  		/** @pmt.base_offset: device specific base offset */
>>  		u64 base_offset;
>> +		/** @pmt.work: support late-bind probe */
>> +		struct delayed_work work;
>> +		/** @pmt.retry_count: late-bind probe retry */
>> +		u32 retry_count;
>>  	} pmt;
>>
>>  	/** @soc_remapper: SoC remapper object */
>> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
>> index 578d59048b39..edc20c24137e 100644
>> --- a/drivers/gpu/drm/xe/xe_vsec.c
>> +++ b/drivers/gpu/drm/xe/xe_vsec.c
>> @@ -3,6 +3,7 @@
>>  #include <linux/bitfield.h>
>>  #include <linux/bits.h>
>>  #include <linux/cleanup.h>
>> +#include <linux/delay.h>
>>  #include <linux/errno.h>
>>  #include <linux/intel_vsec.h>
>>  #include <linux/module.h>
>> @@ -17,6 +18,7 @@
>>  #include "xe_mmio.h"
>>  #include "xe_platform_types.h"
>>  #include "xe_pm.h"
>> +#include "xe_sysctrl.h"
>>  #include "xe_vsec.h"
>>
>>  #include "regs/xe_pmt.h"
>> @@ -162,6 +164,14 @@ enum capability {
>>  	WATCHER,
>>  };
>>
>> +/*
>> + * Late bind will delay 100msec for up to 20 seconds
>> + */
>> +#define VSEC_LATE_BIND_DELAY_MSEC	(100)
>> +#define VSEC_LATE_BIND_RETRY		(200)
>> +
>> +static void cri_late_bind_probe(struct xe_device *xe);
>> +
>>  static int bmg_guid_decode(u32 guid, int *index, u32 *offset)
>>  {
>>  	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
>> @@ -272,6 +282,56 @@ static int xe_guid_decode(u32 guid, int *index, u32
>*offset)
>>  	return -ENODEV;
>>  }
>>
>> +#define WAITING_FOR_SYCTLR
>> +#ifdef WAITING_FOR_SYCTLR
>
>I'm afraid you forgot to remove this before sending... or what's the goal of
>these?

Until the sysctrl patches (with this API) land, this will not compile, so this is to allow CI to not
stop looking at the patches based on its inability to compile.

If there is a better way to do this, I will use it.

M

>> +static bool xe_is_oobmsm_fw_ready(struct xe_device *xe)
>> +{
>> +	return true;
>> +}
>> +#endif
>> +
>> +static void cri_late_bind_probe_work(struct work_struct *work)
>> +{
>> +	struct xe_device *xe = container_of(work, struct xe_device,
>pmt.work.work);
>> +
>> +	if (xe_is_oobmsm_fw_ready(xe)) {
>> +		cri_late_bind_probe(xe);
>> +		xe_pm_runtime_put(xe);
>> +		return;
>> +	}
>> +
>> +	xe->pmt.retry_count++;
>> +
>> +	/* wait up to 20 seconds */
>> +	if (xe->pmt.retry_count == VSEC_LATE_BIND_RETRY) {
>> +		drm_warn(&xe->drm, "PMT probe: Late Binding failed to
>complete\n");
>> +		xe_pm_runtime_put(xe);
>> +		return;
>> +	}
>> +
>> +	if (!schedule_delayed_work(&xe->pmt.work,
>msecs_to_jiffies(VSEC_LATE_BIND_DELAY_MSEC)))
>> +		xe_pm_runtime_put(xe);
>> +}
>> +
>> +static bool wait_for_fw(struct xe_device *xe)
>> +{
>> +	int retries = VSEC_LATE_BIND_RETRY;  /* wait up to 20 secs */
>> +
>> +	if (xe->info.platform != XE_CRESCENTISLAND)
>> +		return true;
>> +
>> +	while (retries--) {
>> +		if (xe_is_oobmsm_fw_ready(xe))
>> +			return true;
>> +
>> +		msleep(VSEC_LATE_BIND_DELAY_MSEC);
>> +	}
>> +
>> +	drm_warn(&xe->drm, "Late Binding failed to complete\n");
>> +
>> +	return false;
>> +}
>> +
>>  /*
>>   * xe_pmt_telem_read is a callback API.  I.e this can be accessed external to
>>   * XE driver (PMT driver scope).  Because of this, DRM hotplug needs to be
>> @@ -318,6 +378,11 @@ int xe_pmt_telem_read(struct device *dev, u32
>guid, u64 *data, loff_t user_offse
>>  		goto dev_exit;
>>  	}
>>
>> +	if (!wait_for_fw(xe)) {
>> +		ret = -ENODATA;
>> +		goto runtime_exit;
>> +	}
>> +
>>  	mutex_lock(&xe->pmt.lock);
>>
>>  	/* set SoC re-mapper index register based on GUID memory region */
>> @@ -327,6 +392,7 @@ int xe_pmt_telem_read(struct device *dev, u32 guid,
>u64 *data, loff_t user_offse
>>
>>  	mutex_unlock(&xe->pmt.lock);
>>
>> +runtime_exit:
>>  	xe_pm_runtime_put(xe);
>>
>>  dev_exit:
>> @@ -374,6 +440,10 @@ static int xe_pmt_read_reg(struct device *dev, u32
>guid, u32 *reg, u32 offset)
>>  	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
>>
>>  	xe_pm_runtime_get(xe);
>> +	if (!wait_for_fw(xe)) {
>> +		ret = -ENODATA;
>> +		goto runtime_exit;
>> +	}
>>  	mutex_lock(&xe->pmt.lock);
>>
>>  	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
>> @@ -381,6 +451,8 @@ static int xe_pmt_read_reg(struct device *dev, u32
>guid, u32 *reg, u32 offset)
>>  	memcpy_fromio(reg, disc_addr, sizeof(*reg));
>>
>>  	mutex_unlock(&xe->pmt.lock);
>> +
>> +runtime_exit:
>>  	xe_pm_runtime_put(xe);
>>
>>  dev_exit:
>> @@ -416,6 +488,10 @@ static int xe_pmt_write_reg(struct device *dev, u32
>guid, u32 reg, u32 offset)
>>  	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
>>
>>  	xe_pm_runtime_get(xe);
>> +	if (!wait_for_fw(xe)) {
>> +		ret = -ENODATA;
>> +		goto runtime_exit;
>> +	}
>>  	mutex_lock(&xe->pmt.lock);
>>
>>  	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
>> @@ -423,6 +499,8 @@ static int xe_pmt_write_reg(struct device *dev, u32
>guid, u32 reg, u32 offset)
>>  	memcpy_toio(disc_addr, &reg, sizeof(reg));
>>
>>  	mutex_unlock(&xe->pmt.lock);
>> +
>> +runtime_exit:
>>  	xe_pm_runtime_put(xe);
>>
>>  dev_exit:
>> @@ -454,12 +532,44 @@ static enum xe_vsec get_platform_info(struct
>xe_device *xe)
>>  	return vsec_platforms[xe->info.platform];
>>  }
>>
>> +static void cri_late_bind_probe(struct xe_device *xe)
>> +{
>> +	struct intel_vsec_platform_info *info;
>> +	struct device *dev = xe->drm.dev;
>> +	enum xe_vsec platform;
>> +
>> +	platform = get_platform_info(xe);
>> +	if (platform != XE_VSEC_CRI)
>> +		return;
>> +
>> +	info = &xe_vsec_info[platform];
>> +	if (!info->headers)
>> +		return;
>> +
>> +	info->priv_data = &xe_cri_pmt_cb;
>> +	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
>> +
>> +	intel_vsec_register(dev, info);
>> +}
>> +
>> +static void vsec_disable_late_bind_work(void *arg)
>> +{
>> +	struct xe_device *xe = arg;
>> +
>> +	/*
>> +	 * If was work was cancelled while it was still pending, we need to
>> +	 * take care of releasing the runtime reference
>> +	 */
>> +	if (disable_delayed_work_sync(&xe->pmt.work))
>> +		xe_pm_runtime_put(xe);
>> +}
>> +
>>  /**
>>   * xe_vsec_init - Initialize resources and add intel_vsec auxiliary
>>   * interface
>>   * @xe: valid xe instance
>>   */
>> -void xe_vsec_init(struct xe_device *xe)
>> +int xe_vsec_init(struct xe_device *xe)
>>  {
>>  	struct intel_vsec_platform_info *info;
>>  	struct device *dev = xe->drm.dev;
>> @@ -467,30 +577,44 @@ void xe_vsec_init(struct xe_device *xe)
>>
>>  	platform = get_platform_info(xe);
>>  	if (platform == XE_VSEC_UNKNOWN)
>> -		return;
>> +		return 0;
>>
>>  	info = &xe_vsec_info[platform];
>>  	if (!info->headers)
>> -		return;
>> +		return 0;
>>
>>  	switch (platform) {
>>  	case XE_VSEC_BMG:
>>  		if (!xe->soc_remapper.set_telem_region)
>> -			return;
>> +			return 0;
>>  		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
>>  		info->priv_data = &xe_bmg_pmt_cb;
>>  		break;
>>
>>  	case XE_VSEC_CRI:
>>  		if (!xe->soc_remapper.set_telem_region)
>> -			return;
>> +			return 0;
>>  		xe->pmt.base_offset = CRI_TELEMETRY_OFFSET;
>> +
>> +		xe->pmt.retry_count = 0;
>> +		INIT_DELAYED_WORK(&xe->pmt.work,
>cri_late_bind_probe_work);
>> +
>> +		xe_pm_runtime_get_noresume(xe);
>> +		if (!xe_is_oobmsm_fw_ready(xe)) {
>> +			schedule_delayed_work(&xe->pmt.work,
>> +
>msecs_to_jiffies(VSEC_LATE_BIND_DELAY_MSEC));
>> +			return devm_add_action_or_reset(xe->drm.dev,
>> +
>	vsec_disable_late_bind_work,
>> +							xe);
>> +		}
>> +
>>  		info->priv_data = &xe_cri_pmt_cb;
>>  		xe->soc_remapper.set_telem_region(xe,
>CRI_IDX_TELEM_DISCOVERY);
>>  		break;
>>
>>  	default:
>> -		break;
>> +		drm_err(&xe->drm, "Unsupported platform: %u\n", platform);
>> +		return 0;
>>  	}
>>
>>  	/*
>> @@ -498,5 +622,10 @@ void xe_vsec_init(struct xe_device *xe)
>>  	 * resources.
>>  	 */
>>  	intel_vsec_register(dev, info);
>> +
>> +	if (platform == XE_VSEC_CRI)
>> +		xe_pm_runtime_put(xe);
>> +
>> +	return 0;
>>  }
>>  MODULE_IMPORT_NS("INTEL_VSEC");
>> diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h
>> index a25b4e6e681b..c4a1e2fc67d8 100644
>> --- a/drivers/gpu/drm/xe/xe_vsec.h
>> +++ b/drivers/gpu/drm/xe/xe_vsec.h
>> @@ -9,7 +9,7 @@
>>  struct device;
>>  struct xe_device;
>>
>> -void xe_vsec_init(struct xe_device *xe);
>> +int xe_vsec_init(struct xe_device *xe);
>>  int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t
>user_offset, u32 count);
>>
>>  #endif
>> --
>> 2.43.0
>>

Re: [PATCH v3 09/10] drm/xe/vsec: Support late bind fw information

[Ilpo Järvinen]

On Mon, 24 Aug 2026, Michael J. Ruhl wrote:

> CRI FW is loaded on power on.  Because of this, access to
> the FW cannot be done until it is running.
> 
> Update the XE PMT probe and access to check for late bind
> devices, verify, and wait for the appropriate FW state
> before probe or access.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device.c       |   4 +-
>  drivers/gpu/drm/xe/xe_device_types.h |   4 +
>  drivers/gpu/drm/xe/xe_vsec.c         | 141 +++++++++++++++++++++++++--
>  drivers/gpu/drm/xe/xe_vsec.h         |   2 +-
>  4 files changed, 143 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 74d566693dfd..bf02f881095f 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -1140,7 +1140,9 @@ int xe_device_probe(struct xe_device *xe)
>  	for_each_gt(gt, xe, id)
>  		xe_gt_sanitize_freq(gt);
>  
> -	xe_vsec_init(xe);
> +	err = xe_vsec_init(xe);
> +	if (err)
> +		goto err_unregister_display;
>  
>  	err = xe_sriov_init_late(xe);
>  	if (err)
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 3f1a70813a99..5d9e6e66c665 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -468,6 +468,10 @@ struct xe_device {
>  		struct mutex lock;
>  		/** @pmt.base_offset: device specific base offset */
>  		u64 base_offset;
> +		/** @pmt.work: support late-bind probe */
> +		struct delayed_work work;

Not sure if xe driver has some strange policy on headers due to their 
love for local headers... but if there isn't, this one doesn't have a 
direct include in this file.

> +		/** @pmt.retry_count: late-bind probe retry */
> +		u32 retry_count;
>  	} pmt;
>  
>  	/** @soc_remapper: SoC remapper object */
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 578d59048b39..edc20c24137e 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -3,6 +3,7 @@
>  #include <linux/bitfield.h>
>  #include <linux/bits.h>
>  #include <linux/cleanup.h>
> +#include <linux/delay.h>
>  #include <linux/errno.h>
>  #include <linux/intel_vsec.h>
>  #include <linux/module.h>
> @@ -17,6 +18,7 @@
>  #include "xe_mmio.h"
>  #include "xe_platform_types.h"
>  #include "xe_pm.h"
> +#include "xe_sysctrl.h"
>  #include "xe_vsec.h"
>  
>  #include "regs/xe_pmt.h"
> @@ -162,6 +164,14 @@ enum capability {
>  	WATCHER,
>  };
>  
> +/*
> + * Late bind will delay 100msec for up to 20 seconds
> + */
> +#define VSEC_LATE_BIND_DELAY_MSEC	(100)
> +#define VSEC_LATE_BIND_RETRY		(200)

Remove the parenthesis?

> +
> +static void cri_late_bind_probe(struct xe_device *xe);
> +
>  static int bmg_guid_decode(u32 guid, int *index, u32 *offset)
>  {
>  	u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
> @@ -272,6 +282,56 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
>  	return -ENODEV;
>  }
>  
> +#define WAITING_FOR_SYCTLR
> +#ifdef WAITING_FOR_SYCTLR

It seems Rodrigo also noted this. Looks debug leftover or something along 
those lines to me.

> +static bool xe_is_oobmsm_fw_ready(struct xe_device *xe)
> +{
> +	return true;

Returning unconditionally true causes some dead code below on the caller 
side.

> +}
> +#endif
> +
> +static void cri_late_bind_probe_work(struct work_struct *work)
> +{
> +	struct xe_device *xe = container_of(work, struct xe_device, pmt.work.work);
> +
> +	if (xe_is_oobmsm_fw_ready(xe)) {
> +		cri_late_bind_probe(xe);
> +		xe_pm_runtime_put(xe);
> +		return;
> +	}
> +	xe->pmt.retry_count++;
> +
> +	/* wait up to 20 seconds */
> +	if (xe->pmt.retry_count == VSEC_LATE_BIND_RETRY) {
> +		drm_warn(&xe->drm, "PMT probe: Late Binding failed to complete\n");
> +		xe_pm_runtime_put(xe);
> +		return;
> +	}
> +
> +	if (!schedule_delayed_work(&xe->pmt.work, msecs_to_jiffies(VSEC_LATE_BIND_DELAY_MSEC)))
> +		xe_pm_runtime_put(xe);
> +}
> +
> +static bool wait_for_fw(struct xe_device *xe)
> +{
> +	int retries = VSEC_LATE_BIND_RETRY;  /* wait up to 20 secs */
> +
> +	if (xe->info.platform != XE_CRESCENTISLAND)
> +		return true;
> +
> +	while (retries--) {
> +		if (xe_is_oobmsm_fw_ready(xe))
> +			return true;
> +
> +		msleep(VSEC_LATE_BIND_DELAY_MSEC);
> +	}
> +
> +	drm_warn(&xe->drm, "Late Binding failed to complete\n");
> +
> +	return false;
> +}
> +
>  /*
>   * xe_pmt_telem_read is a callback API.  I.e this can be accessed external to
>   * XE driver (PMT driver scope).  Because of this, DRM hotplug needs to be
> @@ -318,6 +378,11 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  		goto dev_exit;
>  	}
>  
> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}
> +
>  	mutex_lock(&xe->pmt.lock);
>  
>  	/* set SoC re-mapper index register based on GUID memory region */
> @@ -327,6 +392,7 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  
>  	mutex_unlock(&xe->pmt.lock);
>  
> +runtime_exit:
>  	xe_pm_runtime_put(xe);
>  
>  dev_exit:
> @@ -374,6 +440,10 @@ static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
>  	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
>  
>  	xe_pm_runtime_get(xe);
> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}
>  	mutex_lock(&xe->pmt.lock);
>  
>  	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> @@ -381,6 +451,8 @@ static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
>  	memcpy_fromio(reg, disc_addr, sizeof(*reg));
>  
>  	mutex_unlock(&xe->pmt.lock);
> +
> +runtime_exit:
>  	xe_pm_runtime_put(xe);
>  
>  dev_exit:
> @@ -416,6 +488,10 @@ static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
>  	disc_addr += CRI_DISCOVERY_OFFSET + inst + offset;
>  
>  	xe_pm_runtime_get(xe);
> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}
>  	mutex_lock(&xe->pmt.lock);
>  
>  	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> @@ -423,6 +499,8 @@ static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
>  	memcpy_toio(disc_addr, &reg, sizeof(reg));
>  
>  	mutex_unlock(&xe->pmt.lock);
> +
> +runtime_exit:
>  	xe_pm_runtime_put(xe);
>  
>  dev_exit:
> @@ -454,12 +532,44 @@ static enum xe_vsec get_platform_info(struct xe_device *xe)
>  	return vsec_platforms[xe->info.platform];
>  }
>  
> +static void cri_late_bind_probe(struct xe_device *xe)
> +{
> +	struct intel_vsec_platform_info *info;
> +	struct device *dev = xe->drm.dev;
> +	enum xe_vsec platform;
> +
> +	platform = get_platform_info(xe);
> +	if (platform != XE_VSEC_CRI)
> +		return;
> +
> +	info = &xe_vsec_info[platform];
> +	if (!info->headers)
> +		return;
> +
> +	info->priv_data = &xe_cri_pmt_cb;
> +	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +
> +	intel_vsec_register(dev, info);
> +}
> +
> +static void vsec_disable_late_bind_work(void *arg)
> +{
> +	struct xe_device *xe = arg;
> +
> +	/*
> +	 * If was work was cancelled while it was still pending, we need to

Fix grammar.

> +	 * take care of releasing the runtime reference

Add .

> +	 */
> +	if (disable_delayed_work_sync(&xe->pmt.work))
> +		xe_pm_runtime_put(xe);
> +}
> +
>  /**
>   * xe_vsec_init - Initialize resources and add intel_vsec auxiliary
>   * interface
>   * @xe: valid xe instance
>   */
> -void xe_vsec_init(struct xe_device *xe)
> +int xe_vsec_init(struct xe_device *xe)
>  {
>  	struct intel_vsec_platform_info *info;
>  	struct device *dev = xe->drm.dev;
> @@ -467,30 +577,44 @@ void xe_vsec_init(struct xe_device *xe)
>  
>  	platform = get_platform_info(xe);
>  	if (platform == XE_VSEC_UNKNOWN)
> -		return;
> +		return 0;
>  
>  	info = &xe_vsec_info[platform];
>  	if (!info->headers)
> -		return;
> +		return 0;
>  
>  	switch (platform) {
>  	case XE_VSEC_BMG:
>  		if (!xe->soc_remapper.set_telem_region)
> -			return;
> +			return 0;
>  		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
>  		info->priv_data = &xe_bmg_pmt_cb;
>  		break;
>  
>  	case XE_VSEC_CRI:
>  		if (!xe->soc_remapper.set_telem_region)
> -			return;
> +			return 0;
>  		xe->pmt.base_offset = CRI_TELEMETRY_OFFSET;
> +
> +		xe->pmt.retry_count = 0;
> +		INIT_DELAYED_WORK(&xe->pmt.work, cri_late_bind_probe_work);
> +
> +		xe_pm_runtime_get_noresume(xe);
> +		if (!xe_is_oobmsm_fw_ready(xe)) {
> +			schedule_delayed_work(&xe->pmt.work,
> +					      msecs_to_jiffies(VSEC_LATE_BIND_DELAY_MSEC));
> +			return devm_add_action_or_reset(xe->drm.dev,
> +							vsec_disable_late_bind_work,
> +							xe);
> +		}
> +
>  		info->priv_data = &xe_cri_pmt_cb;
>  		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
>  		break;
>  
>  	default:
> -		break;
> +		drm_err(&xe->drm, "Unsupported platform: %u\n", platform);
> +		return 0;
>  	}
>  
>  	/*
> @@ -498,5 +622,10 @@ void xe_vsec_init(struct xe_device *xe)
>  	 * resources.
>  	 */
>  	intel_vsec_register(dev, info);
> +
> +	if (platform == XE_VSEC_CRI)
> +		xe_pm_runtime_put(xe);
> +
> +	return 0;
>  }
>  MODULE_IMPORT_NS("INTEL_VSEC");
> diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h
> index a25b4e6e681b..c4a1e2fc67d8 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.h
> +++ b/drivers/gpu/drm/xe/xe_vsec.h
> @@ -9,7 +9,7 @@
>  struct device;
>  struct xe_device;
>  
> -void xe_vsec_init(struct xe_device *xe);
> +int xe_vsec_init(struct xe_device *xe);
>  int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset, u32 count);
>  
>  #endif
> 

-- 
 i.

[PATCH v3 10/10] drm/xe/vsec: Update PMT internal access for CRI

[Michael J. Ruhl]

Xe access the PMT infrastructure directly. The current usage
is supported ONLY by BMG devices.

CRI has further requirements for access.

Add a new API to access the GUID based on the platform.
Use the API get the GUID for each device.

Minor cleanup for a newly unused parameter (mmio).

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_pmt.h     |  4 ++-
 drivers/gpu/drm/xe/xe_debugfs.c      | 44 ++++++++++++-------------
 drivers/gpu/drm/xe/xe_device_types.h |  2 ++
 drivers/gpu/drm/xe/xe_hwmon.c        | 10 ++++--
 drivers/gpu/drm/xe/xe_pcode.c        | 10 ++++--
 drivers/gpu/drm/xe/xe_vsec.c         | 48 ++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_vsec.h         |  1 +
 7 files changed, 92 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
index fc9c9cb6a830..683bf401dc9d 100644
--- a/drivers/gpu/drm/xe/regs/xe_pmt.h
+++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
@@ -10,7 +10,7 @@
 #define BMG_PMT_BASE_OFFSET		0xDB000
 #define BMG_DISCOVERY_OFFSET		(SOC_BASE + BMG_PMT_BASE_OFFSET)
 
-#define PUNIT_TELEMETRY_GUID		XE_REG(BMG_DISCOVERY_OFFSET + 0x4)
+#define BMG_PUNIT_TELEMETRY_GUID	XE_REG(BMG_DISCOVERY_OFFSET + 0x4)
 #define BMG_ENERGY_STATUS_PMT_OFFSET	(0x30)
 #define	ENERGY_PKG			REG_GENMASK64(31, 0)
 #define	ENERGY_CARD			REG_GENMASK64(63, 32)
@@ -25,6 +25,8 @@
 #define CRI_DISCOVERY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
 #define CRI_TELEMETRY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
 
+#define CRI_PUNIT_TELEMETRY_GUID	XE_REG(CRI_DISCOVERY_OFFSET + 0x4)
+
 #define BMG_MODS_RESIDENCY_OFFSET		(0x4D0)
 #define BMG_G2_RESIDENCY_OFFSET		(0x530)
 #define BMG_G6_RESIDENCY_OFFSET		(0x538)
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 28135f84e286..12476549164d 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -21,7 +21,6 @@
 #include "xe_gt_printk.h"
 #include "xe_guc_ads.h"
 #include "xe_hw_engine.h"
-#include "xe_mmio.h"
 #include "xe_pagefault.h"
 #include "xe_pcode.h"
 #include "xe_pm.h"
@@ -97,15 +96,20 @@ static void xe_fault_inject_debugfs_register(struct xe_device *xe,
 	}
 }
 
-static void read_residency_counter(struct xe_device *xe, struct xe_mmio *mmio,
-				   u32 offset, const char *name, struct drm_printer *p)
+static void read_residency_counter(struct xe_device *xe, u32 offset, const char *name,
+				   struct drm_printer *p)
 {
 	u64 residency = 0;
+	u32 guid;
 	int ret;
 
-	ret = xe_pmt_telem_read(xe->drm.dev,
-				xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID),
-				&residency, offset, sizeof(residency));
+	guid = xe_vsec_get_guid(xe);
+	if (!guid) {
+		drm_warn(&xe->drm, "PMT device is not powered\n");
+		return;
+	}
+
+	ret = xe_pmt_telem_read(xe->drm.dev, guid, &residency, offset, sizeof(residency));
 	if (ret != sizeof(residency)) {
 		drm_warn(&xe->drm, "%s counter failed to read, ret %d\n", name, ret);
 		return;
@@ -244,13 +248,12 @@ static int pcode_info(struct seq_file *m, void *data)
 static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
 {
 	struct xe_device *xe;
-	struct xe_mmio *mmio;
 	struct drm_printer p;
 
 	xe = node_to_xe(m->private);
 	p = drm_seq_file_printer(m);
 	guard(xe_pm_runtime)(xe);
-	mmio = xe_root_tile_mmio(xe);
+
 	static const struct {
 		u32 offset;
 		const char *name;
@@ -264,7 +267,7 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
 	};
 
 	for (int i = 0; i < ARRAY_SIZE(residencies); i++)
-		read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p);
+		read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p);
 
 	return 0;
 }
@@ -272,13 +275,11 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
 static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data)
 {
 	struct xe_device *xe;
-	struct xe_mmio *mmio;
 	struct drm_printer p;
 
 	xe = node_to_xe(m->private);
 	p = drm_seq_file_printer(m);
 	guard(xe_pm_runtime)(xe);
-	mmio = xe_root_tile_mmio(xe);
 
 	static const struct {
 		u32 offset;
@@ -290,7 +291,7 @@ static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data)
 	};
 
 	for (int i = 0; i < ARRAY_SIZE(residencies); i++)
-		read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p);
+		read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p);
 
 	return 0;
 }
@@ -710,23 +711,22 @@ void xe_debugfs_register(struct xe_device *xe)
 				 ARRAY_SIZE(debugfs_list),
 				 root, minor);
 
-	if (xe->info.platform == XE_BATTLEMAGE && !IS_SRIOV_VF(xe)) {
-		drm_debugfs_create_files(debugfs_residencies,
-					 ARRAY_SIZE(debugfs_residencies),
-					 root, minor);
-	}
-
 	/*
-	 * Pcode version read from PMT is currently only supported on CRI and BMG platforms in PF
-	 * mode, as both platforms support the necessary telemetry read mechanism and have a fixed
-	 * PUNIT_VERSION_OFFSET.
+	 * Residencies and Pcode version read from PMT is currently only supported on CRI and BMG
+	 * platforms in PF mode.  Both platforms support the necessary telemetry read mechanism
+	 * and have a fixed offsets for the required data.
 	 * Attempting this access on other platforms must be verified before enabling support.
 	 */
 	if (!IS_SRIOV_VF(xe) &&
-	    (xe->info.platform == XE_CRESCENTISLAND || xe->info.platform == XE_BATTLEMAGE))
+	    (xe->info.platform == XE_CRESCENTISLAND || xe->info.platform == XE_BATTLEMAGE)) {
+		drm_debugfs_create_files(debugfs_residencies,
+					 ARRAY_SIZE(debugfs_residencies),
+					 root, minor);
+
 		drm_debugfs_create_files(pcode_info_debugfs,
 					 ARRAY_SIZE(pcode_info_debugfs),
 					 root, minor);
+	}
 
 	debugfs_create_file("forcewake_all", 0400, root, xe,
 			    &forcewake_all_fops);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 5d9e6e66c665..7acc57f6d4fd 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -472,6 +472,8 @@ struct xe_device {
 		struct delayed_work work;
 		/** @pmt.retry_count: late-bind probe retry */
 		u32 retry_count;
+		/** @pmt.punit_guid_cache: cache of the PUINT GUID */
+		u32 punit_guid_cache;
 	} pmt;
 
 	/** @soc_remapper: SoC remapper object */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 5284cab6703d..c4b44eb4b220 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -517,9 +517,15 @@ xe_hwmon_energy_get(struct xe_hwmon *hwmon, int channel, long *energy)
 
 	if (hwmon->xe->info.platform == XE_BATTLEMAGE) {
 		u64 pmt_val;
+		u32 guid;
 
-		ret = xe_pmt_telem_read(hwmon->xe->drm.dev,
-					xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID),
+		guid = xe_vsec_get_guid(hwmon->xe);
+		if (!guid) {
+			drm_warn(&hwmon->xe->drm, "PMT device is not powered\n");
+			*energy = 0;
+			return;
+		}
+		ret = xe_pmt_telem_read(hwmon->xe->drm.dev, guid,
 					&pmt_val, BMG_ENERGY_STATUS_PMT_OFFSET,	sizeof(pmt_val));
 		if (ret != sizeof(pmt_val)) {
 			drm_warn(&hwmon->xe->drm, "energy read from pmt failed, ret %d\n", ret);
diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c
index e1b8062541a9..7831dd597794 100644
--- a/drivers/gpu/drm/xe/xe_pcode.c
+++ b/drivers/gpu/drm/xe/xe_pcode.c
@@ -366,11 +366,17 @@ ALLOW_ERROR_INJECTION(xe_pcode_probe_early, ERRNO); /* See xe_pci_probe */
 int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version)
 {
 	int ret = 0;
+	u32 guid;
 
 	guard(xe_pm_runtime)(xe);
 
-	ret = xe_pmt_telem_read(xe->drm.dev,
-				xe_mmio_read32(xe_root_tile_mmio(xe), PUNIT_TELEMETRY_GUID),
+	guid = xe_vsec_get_guid(xe);
+	if (!guid) {
+		xe_warn(xe, "PMT device is not powered\n");
+		return -ENODATA;
+	}
+
+	ret = xe_pmt_telem_read(xe->drm.dev, guid,
 				(u64 *)version, PUNIT_VERSION_OFFSET, sizeof(*version));
 	if (ret != sizeof(*version)) {
 		xe_warn(xe, "pcode version read from PMT failed, ret %pe\n", ERR_PTR(ret));
diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index edc20c24137e..5ebb4ee9ef08 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -564,6 +564,54 @@ static void vsec_disable_late_bind_work(void *arg)
 		xe_pm_runtime_put(xe);
 }
 
+u32 xe_vsec_get_guid(struct xe_device *xe)
+{
+	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
+	u32 guid;
+
+	/*
+	 * Both supported platforms (BMG, CRI) require the remapper callback to
+	 * access data. CRI needs it for the GUID.
+	 */
+	if (!xe->soc_remapper.set_telem_region)
+		return 0;
+
+	/* caller must ensure correct power state */
+	if (!xe_pm_runtime_get_if_active(xe))
+		return 0;
+
+	mutex_lock(&xe->pmt.lock);
+
+	if (xe->pmt.punit_guid_cache) {
+		guid = xe->pmt.punit_guid_cache;
+		goto unlock;
+	}
+
+	switch (xe->info.platform) {
+	case XE_BATTLEMAGE:
+		guid = xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID);
+		break;
+
+	case XE_CRESCENTISLAND:
+		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
+		guid = xe_mmio_read32(mmio, CRI_PUNIT_TELEMETRY_GUID);
+		break;
+
+	default:
+		guid = 0;
+		drm_err(&xe->drm, "Unsupported platform: %u\n", xe->info.platform);
+		break;
+	}
+
+	xe->pmt.punit_guid_cache = guid;
+
+unlock:
+	mutex_unlock(&xe->pmt.lock);
+	xe_pm_runtime_put(xe);
+
+	return guid;
+}
+
 /**
  * xe_vsec_init - Initialize resources and add intel_vsec auxiliary
  * interface
diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h
index c4a1e2fc67d8..43c3e9f227c5 100644
--- a/drivers/gpu/drm/xe/xe_vsec.h
+++ b/drivers/gpu/drm/xe/xe_vsec.h
@@ -10,6 +10,7 @@ struct device;
 struct xe_device;
 
 int xe_vsec_init(struct xe_device *xe);
+u32 xe_vsec_get_guid(struct xe_device *xe);
 int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset, u32 count);
 
 #endif
-- 
2.43.0

Re: [PATCH v3 10/10] drm/xe/vsec: Update PMT internal access for CRI

[Rodrigo Vivi]

On Mon, Aug 24, 2026 at 09:23:26AM -0700, Michael J. Ruhl wrote:
> Xe access the PMT infrastructure directly. The current usage
> is supported ONLY by BMG devices.
> 
> CRI has further requirements for access.
> 
> Add a new API to access the GUID based on the platform.
> Use the API get the GUID for each device.

I have the feeling that this patch is doing much more then advertised,
like the debugfs residencies and all... could you please split the patch
or improve the commit message?

Thanks,
Rodrigo.

> 
> Minor cleanup for a newly unused parameter (mmio).
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_pmt.h     |  4 ++-
>  drivers/gpu/drm/xe/xe_debugfs.c      | 44 ++++++++++++-------------
>  drivers/gpu/drm/xe/xe_device_types.h |  2 ++
>  drivers/gpu/drm/xe/xe_hwmon.c        | 10 ++++--
>  drivers/gpu/drm/xe/xe_pcode.c        | 10 ++++--
>  drivers/gpu/drm/xe/xe_vsec.c         | 48 ++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_vsec.h         |  1 +
>  7 files changed, 92 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
> index fc9c9cb6a830..683bf401dc9d 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pmt.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
> @@ -10,7 +10,7 @@
>  #define BMG_PMT_BASE_OFFSET		0xDB000
>  #define BMG_DISCOVERY_OFFSET		(SOC_BASE + BMG_PMT_BASE_OFFSET)
>  
> -#define PUNIT_TELEMETRY_GUID		XE_REG(BMG_DISCOVERY_OFFSET + 0x4)
> +#define BMG_PUNIT_TELEMETRY_GUID	XE_REG(BMG_DISCOVERY_OFFSET + 0x4)
>  #define BMG_ENERGY_STATUS_PMT_OFFSET	(0x30)
>  #define	ENERGY_PKG			REG_GENMASK64(31, 0)
>  #define	ENERGY_CARD			REG_GENMASK64(63, 32)
> @@ -25,6 +25,8 @@
>  #define CRI_DISCOVERY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
>  #define CRI_TELEMETRY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
>  
> +#define CRI_PUNIT_TELEMETRY_GUID	XE_REG(CRI_DISCOVERY_OFFSET + 0x4)
> +
>  #define BMG_MODS_RESIDENCY_OFFSET		(0x4D0)
>  #define BMG_G2_RESIDENCY_OFFSET		(0x530)
>  #define BMG_G6_RESIDENCY_OFFSET		(0x538)
> diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
> index 28135f84e286..12476549164d 100644
> --- a/drivers/gpu/drm/xe/xe_debugfs.c
> +++ b/drivers/gpu/drm/xe/xe_debugfs.c
> @@ -21,7 +21,6 @@
>  #include "xe_gt_printk.h"
>  #include "xe_guc_ads.h"
>  #include "xe_hw_engine.h"
> -#include "xe_mmio.h"
>  #include "xe_pagefault.h"
>  #include "xe_pcode.h"
>  #include "xe_pm.h"
> @@ -97,15 +96,20 @@ static void xe_fault_inject_debugfs_register(struct xe_device *xe,
>  	}
>  }
>  
> -static void read_residency_counter(struct xe_device *xe, struct xe_mmio *mmio,
> -				   u32 offset, const char *name, struct drm_printer *p)
> +static void read_residency_counter(struct xe_device *xe, u32 offset, const char *name,
> +				   struct drm_printer *p)
>  {
>  	u64 residency = 0;
> +	u32 guid;
>  	int ret;
>  
> -	ret = xe_pmt_telem_read(xe->drm.dev,
> -				xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID),
> -				&residency, offset, sizeof(residency));
> +	guid = xe_vsec_get_guid(xe);
> +	if (!guid) {
> +		drm_warn(&xe->drm, "PMT device is not powered\n");
> +		return;
> +	}
> +
> +	ret = xe_pmt_telem_read(xe->drm.dev, guid, &residency, offset, sizeof(residency));
>  	if (ret != sizeof(residency)) {
>  		drm_warn(&xe->drm, "%s counter failed to read, ret %d\n", name, ret);
>  		return;
> @@ -244,13 +248,12 @@ static int pcode_info(struct seq_file *m, void *data)
>  static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
>  {
>  	struct xe_device *xe;
> -	struct xe_mmio *mmio;
>  	struct drm_printer p;
>  
>  	xe = node_to_xe(m->private);
>  	p = drm_seq_file_printer(m);
>  	guard(xe_pm_runtime)(xe);
> -	mmio = xe_root_tile_mmio(xe);
> +
>  	static const struct {
>  		u32 offset;
>  		const char *name;
> @@ -264,7 +267,7 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
>  	};
>  
>  	for (int i = 0; i < ARRAY_SIZE(residencies); i++)
> -		read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p);
> +		read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p);
>  
>  	return 0;
>  }
> @@ -272,13 +275,11 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
>  static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data)
>  {
>  	struct xe_device *xe;
> -	struct xe_mmio *mmio;
>  	struct drm_printer p;
>  
>  	xe = node_to_xe(m->private);
>  	p = drm_seq_file_printer(m);
>  	guard(xe_pm_runtime)(xe);
> -	mmio = xe_root_tile_mmio(xe);
>  
>  	static const struct {
>  		u32 offset;
> @@ -290,7 +291,7 @@ static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data)
>  	};
>  
>  	for (int i = 0; i < ARRAY_SIZE(residencies); i++)
> -		read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p);
> +		read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p);
>  
>  	return 0;
>  }
> @@ -710,23 +711,22 @@ void xe_debugfs_register(struct xe_device *xe)
>  				 ARRAY_SIZE(debugfs_list),
>  				 root, minor);
>  
> -	if (xe->info.platform == XE_BATTLEMAGE && !IS_SRIOV_VF(xe)) {
> -		drm_debugfs_create_files(debugfs_residencies,
> -					 ARRAY_SIZE(debugfs_residencies),
> -					 root, minor);
> -	}
> -
>  	/*
> -	 * Pcode version read from PMT is currently only supported on CRI and BMG platforms in PF
> -	 * mode, as both platforms support the necessary telemetry read mechanism and have a fixed
> -	 * PUNIT_VERSION_OFFSET.
> +	 * Residencies and Pcode version read from PMT is currently only supported on CRI and BMG
> +	 * platforms in PF mode.  Both platforms support the necessary telemetry read mechanism
> +	 * and have a fixed offsets for the required data.
>  	 * Attempting this access on other platforms must be verified before enabling support.
>  	 */
>  	if (!IS_SRIOV_VF(xe) &&
> -	    (xe->info.platform == XE_CRESCENTISLAND || xe->info.platform == XE_BATTLEMAGE))
> +	    (xe->info.platform == XE_CRESCENTISLAND || xe->info.platform == XE_BATTLEMAGE)) {
> +		drm_debugfs_create_files(debugfs_residencies,
> +					 ARRAY_SIZE(debugfs_residencies),
> +					 root, minor);
> +
>  		drm_debugfs_create_files(pcode_info_debugfs,
>  					 ARRAY_SIZE(pcode_info_debugfs),
>  					 root, minor);
> +	}
>  
>  	debugfs_create_file("forcewake_all", 0400, root, xe,
>  			    &forcewake_all_fops);
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 5d9e6e66c665..7acc57f6d4fd 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -472,6 +472,8 @@ struct xe_device {
>  		struct delayed_work work;
>  		/** @pmt.retry_count: late-bind probe retry */
>  		u32 retry_count;
> +		/** @pmt.punit_guid_cache: cache of the PUINT GUID */
> +		u32 punit_guid_cache;
>  	} pmt;
>  
>  	/** @soc_remapper: SoC remapper object */
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 5284cab6703d..c4b44eb4b220 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -517,9 +517,15 @@ xe_hwmon_energy_get(struct xe_hwmon *hwmon, int channel, long *energy)
>  
>  	if (hwmon->xe->info.platform == XE_BATTLEMAGE) {
>  		u64 pmt_val;
> +		u32 guid;
>  
> -		ret = xe_pmt_telem_read(hwmon->xe->drm.dev,
> -					xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID),
> +		guid = xe_vsec_get_guid(hwmon->xe);
> +		if (!guid) {
> +			drm_warn(&hwmon->xe->drm, "PMT device is not powered\n");
> +			*energy = 0;
> +			return;
> +		}
> +		ret = xe_pmt_telem_read(hwmon->xe->drm.dev, guid,
>  					&pmt_val, BMG_ENERGY_STATUS_PMT_OFFSET,	sizeof(pmt_val));
>  		if (ret != sizeof(pmt_val)) {
>  			drm_warn(&hwmon->xe->drm, "energy read from pmt failed, ret %d\n", ret);
> diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c
> index e1b8062541a9..7831dd597794 100644
> --- a/drivers/gpu/drm/xe/xe_pcode.c
> +++ b/drivers/gpu/drm/xe/xe_pcode.c
> @@ -366,11 +366,17 @@ ALLOW_ERROR_INJECTION(xe_pcode_probe_early, ERRNO); /* See xe_pci_probe */
>  int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version)
>  {
>  	int ret = 0;
> +	u32 guid;
>  
>  	guard(xe_pm_runtime)(xe);
>  
> -	ret = xe_pmt_telem_read(xe->drm.dev,
> -				xe_mmio_read32(xe_root_tile_mmio(xe), PUNIT_TELEMETRY_GUID),
> +	guid = xe_vsec_get_guid(xe);
> +	if (!guid) {
> +		xe_warn(xe, "PMT device is not powered\n");
> +		return -ENODATA;
> +	}
> +
> +	ret = xe_pmt_telem_read(xe->drm.dev, guid,
>  				(u64 *)version, PUNIT_VERSION_OFFSET, sizeof(*version));
>  	if (ret != sizeof(*version)) {
>  		xe_warn(xe, "pcode version read from PMT failed, ret %pe\n", ERR_PTR(ret));
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index edc20c24137e..5ebb4ee9ef08 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -564,6 +564,54 @@ static void vsec_disable_late_bind_work(void *arg)
>  		xe_pm_runtime_put(xe);
>  }
>  
> +u32 xe_vsec_get_guid(struct xe_device *xe)
> +{
> +	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
> +	u32 guid;
> +
> +	/*
> +	 * Both supported platforms (BMG, CRI) require the remapper callback to
> +	 * access data. CRI needs it for the GUID.
> +	 */
> +	if (!xe->soc_remapper.set_telem_region)
> +		return 0;
> +
> +	/* caller must ensure correct power state */
> +	if (!xe_pm_runtime_get_if_active(xe))
> +		return 0;
> +
> +	mutex_lock(&xe->pmt.lock);
> +
> +	if (xe->pmt.punit_guid_cache) {
> +		guid = xe->pmt.punit_guid_cache;
> +		goto unlock;
> +	}
> +
> +	switch (xe->info.platform) {
> +	case XE_BATTLEMAGE:
> +		guid = xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID);
> +		break;
> +
> +	case XE_CRESCENTISLAND:
> +		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +		guid = xe_mmio_read32(mmio, CRI_PUNIT_TELEMETRY_GUID);
> +		break;
> +
> +	default:
> +		guid = 0;
> +		drm_err(&xe->drm, "Unsupported platform: %u\n", xe->info.platform);
> +		break;
> +	}
> +
> +	xe->pmt.punit_guid_cache = guid;
> +
> +unlock:
> +	mutex_unlock(&xe->pmt.lock);
> +	xe_pm_runtime_put(xe);
> +
> +	return guid;
> +}
> +
>  /**
>   * xe_vsec_init - Initialize resources and add intel_vsec auxiliary
>   * interface
> diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h
> index c4a1e2fc67d8..43c3e9f227c5 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.h
> +++ b/drivers/gpu/drm/xe/xe_vsec.h
> @@ -10,6 +10,7 @@ struct device;
>  struct xe_device;
>  
>  int xe_vsec_init(struct xe_device *xe);
> +u32 xe_vsec_get_guid(struct xe_device *xe);
>  int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset, u32 count);
>  
>  #endif
> -- 
> 2.43.0
> 

Re: [PATCH v3 10/10] drm/xe/vsec: Update PMT internal access for CRI

[Ilpo Järvinen]

On Mon, 24 Aug 2026, Michael J. Ruhl wrote:

> Xe access the PMT infrastructure directly. The current usage
> is supported ONLY by BMG devices.
> 
> CRI has further requirements for access.
> 
> Add a new API to access the GUID based on the platform.
> Use the API get the GUID for each device.
> 
> Minor cleanup for a newly unused parameter (mmio).
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_pmt.h     |  4 ++-
>  drivers/gpu/drm/xe/xe_debugfs.c      | 44 ++++++++++++-------------
>  drivers/gpu/drm/xe/xe_device_types.h |  2 ++
>  drivers/gpu/drm/xe/xe_hwmon.c        | 10 ++++--
>  drivers/gpu/drm/xe/xe_pcode.c        | 10 ++++--
>  drivers/gpu/drm/xe/xe_vsec.c         | 48 ++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_vsec.h         |  1 +
>  7 files changed, 92 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
> index fc9c9cb6a830..683bf401dc9d 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pmt.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
> @@ -10,7 +10,7 @@
>  #define BMG_PMT_BASE_OFFSET		0xDB000
>  #define BMG_DISCOVERY_OFFSET		(SOC_BASE + BMG_PMT_BASE_OFFSET)
>  
> -#define PUNIT_TELEMETRY_GUID		XE_REG(BMG_DISCOVERY_OFFSET + 0x4)
> +#define BMG_PUNIT_TELEMETRY_GUID	XE_REG(BMG_DISCOVERY_OFFSET + 0x4)
>  #define BMG_ENERGY_STATUS_PMT_OFFSET	(0x30)
>  #define	ENERGY_PKG			REG_GENMASK64(31, 0)
>  #define	ENERGY_CARD			REG_GENMASK64(63, 32)
> @@ -25,6 +25,8 @@
>  #define CRI_DISCOVERY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
>  #define CRI_TELEMETRY_OFFSET		(SOC_BASE + CRI_TELEMETRY_BASE_OFFSET)
>  
> +#define CRI_PUNIT_TELEMETRY_GUID	XE_REG(CRI_DISCOVERY_OFFSET + 0x4)
> +
>  #define BMG_MODS_RESIDENCY_OFFSET		(0x4D0)
>  #define BMG_G2_RESIDENCY_OFFSET		(0x530)
>  #define BMG_G6_RESIDENCY_OFFSET		(0x538)
> diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
> index 28135f84e286..12476549164d 100644
> --- a/drivers/gpu/drm/xe/xe_debugfs.c
> +++ b/drivers/gpu/drm/xe/xe_debugfs.c
> @@ -21,7 +21,6 @@
>  #include "xe_gt_printk.h"
>  #include "xe_guc_ads.h"
>  #include "xe_hw_engine.h"
> -#include "xe_mmio.h"
>  #include "xe_pagefault.h"
>  #include "xe_pcode.h"
>  #include "xe_pm.h"
> @@ -97,15 +96,20 @@ static void xe_fault_inject_debugfs_register(struct xe_device *xe,
>  	}
>  }
>  
> -static void read_residency_counter(struct xe_device *xe, struct xe_mmio *mmio,
> -				   u32 offset, const char *name, struct drm_printer *p)
> +static void read_residency_counter(struct xe_device *xe, u32 offset, const char *name,
> +				   struct drm_printer *p)
>  {
>  	u64 residency = 0;
> +	u32 guid;
>  	int ret;
>  
> -	ret = xe_pmt_telem_read(xe->drm.dev,
> -				xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID),
> -				&residency, offset, sizeof(residency));
> +	guid = xe_vsec_get_guid(xe);
> +	if (!guid) {
> +		drm_warn(&xe->drm, "PMT device is not powered\n");
> +		return;
> +	}
> +
> +	ret = xe_pmt_telem_read(xe->drm.dev, guid, &residency, offset, sizeof(residency));
>  	if (ret != sizeof(residency)) {
>  		drm_warn(&xe->drm, "%s counter failed to read, ret %d\n", name, ret);
>  		return;
> @@ -244,13 +248,12 @@ static int pcode_info(struct seq_file *m, void *data)
>  static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
>  {
>  	struct xe_device *xe;
> -	struct xe_mmio *mmio;
>  	struct drm_printer p;
>  
>  	xe = node_to_xe(m->private);
>  	p = drm_seq_file_printer(m);
>  	guard(xe_pm_runtime)(xe);
> -	mmio = xe_root_tile_mmio(xe);
> +
>  	static const struct {
>  		u32 offset;
>  		const char *name;
> @@ -264,7 +267,7 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
>  	};
>  
>  	for (int i = 0; i < ARRAY_SIZE(residencies); i++)
> -		read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p);
> +		read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p);
>  
>  	return 0;
>  }
> @@ -272,13 +275,11 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
>  static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data)
>  {
>  	struct xe_device *xe;
> -	struct xe_mmio *mmio;
>  	struct drm_printer p;
>  
>  	xe = node_to_xe(m->private);
>  	p = drm_seq_file_printer(m);
>  	guard(xe_pm_runtime)(xe);
> -	mmio = xe_root_tile_mmio(xe);
>  
>  	static const struct {
>  		u32 offset;
> @@ -290,7 +291,7 @@ static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data)
>  	};
>  
>  	for (int i = 0; i < ARRAY_SIZE(residencies); i++)
> -		read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p);
> +		read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p);
>  
>  	return 0;
>  }
> @@ -710,23 +711,22 @@ void xe_debugfs_register(struct xe_device *xe)
>  				 ARRAY_SIZE(debugfs_list),
>  				 root, minor);
>  
> -	if (xe->info.platform == XE_BATTLEMAGE && !IS_SRIOV_VF(xe)) {
> -		drm_debugfs_create_files(debugfs_residencies,
> -					 ARRAY_SIZE(debugfs_residencies),
> -					 root, minor);
> -	}
> -
>  	/*
> -	 * Pcode version read from PMT is currently only supported on CRI and BMG platforms in PF
> -	 * mode, as both platforms support the necessary telemetry read mechanism and have a fixed
> -	 * PUNIT_VERSION_OFFSET.
> +	 * Residencies and Pcode version read from PMT is currently only supported on CRI and BMG
> +	 * platforms in PF mode.  Both platforms support the necessary telemetry read mechanism
> +	 * and have a fixed offsets for the required data.
>  	 * Attempting this access on other platforms must be verified before enabling support.
>  	 */
>  	if (!IS_SRIOV_VF(xe) &&
> -	    (xe->info.platform == XE_CRESCENTISLAND || xe->info.platform == XE_BATTLEMAGE))
> +	    (xe->info.platform == XE_CRESCENTISLAND || xe->info.platform == XE_BATTLEMAGE)) {
> +		drm_debugfs_create_files(debugfs_residencies,
> +					 ARRAY_SIZE(debugfs_residencies),

ARRAY_SIZE() has also own include which is missing from this file (looks 
it's already used in this file and if there's no special include policy in 
xe, it would be time to finally add the include).

> +					 root, minor);
> +
>  		drm_debugfs_create_files(pcode_info_debugfs,
>  					 ARRAY_SIZE(pcode_info_debugfs),
>  					 root, minor);
> +	}
>  
>  	debugfs_create_file("forcewake_all", 0400, root, xe,
>  			    &forcewake_all_fops);
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 5d9e6e66c665..7acc57f6d4fd 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -472,6 +472,8 @@ struct xe_device {
>  		struct delayed_work work;
>  		/** @pmt.retry_count: late-bind probe retry */
>  		u32 retry_count;
> +		/** @pmt.punit_guid_cache: cache of the PUINT GUID */
> +		u32 punit_guid_cache;
>  	} pmt;
>  
>  	/** @soc_remapper: SoC remapper object */
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 5284cab6703d..c4b44eb4b220 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -517,9 +517,15 @@ xe_hwmon_energy_get(struct xe_hwmon *hwmon, int channel, long *energy)
>  
>  	if (hwmon->xe->info.platform == XE_BATTLEMAGE) {
>  		u64 pmt_val;
> +		u32 guid;
>  
> -		ret = xe_pmt_telem_read(hwmon->xe->drm.dev,
> -					xe_mmio_read32(mmio, PUNIT_TELEMETRY_GUID),
> +		guid = xe_vsec_get_guid(hwmon->xe);
> +		if (!guid) {
> +			drm_warn(&hwmon->xe->drm, "PMT device is not powered\n");
> +			*energy = 0;
> +			return;
> +		}
> +		ret = xe_pmt_telem_read(hwmon->xe->drm.dev, guid,
>  					&pmt_val, BMG_ENERGY_STATUS_PMT_OFFSET,	sizeof(pmt_val));
>  		if (ret != sizeof(pmt_val)) {
>  			drm_warn(&hwmon->xe->drm, "energy read from pmt failed, ret %d\n", ret);
> diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c
> index e1b8062541a9..7831dd597794 100644
> --- a/drivers/gpu/drm/xe/xe_pcode.c
> +++ b/drivers/gpu/drm/xe/xe_pcode.c
> @@ -366,11 +366,17 @@ ALLOW_ERROR_INJECTION(xe_pcode_probe_early, ERRNO); /* See xe_pci_probe */
>  int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version)
>  {
>  	int ret = 0;
> +	u32 guid;
>  
>  	guard(xe_pm_runtime)(xe);
>  
> -	ret = xe_pmt_telem_read(xe->drm.dev,
> -				xe_mmio_read32(xe_root_tile_mmio(xe), PUNIT_TELEMETRY_GUID),
> +	guid = xe_vsec_get_guid(xe);
> +	if (!guid) {
> +		xe_warn(xe, "PMT device is not powered\n");
> +		return -ENODATA;
> +	}
> +
> +	ret = xe_pmt_telem_read(xe->drm.dev, guid,
>  				(u64 *)version, PUNIT_VERSION_OFFSET, sizeof(*version));
>  	if (ret != sizeof(*version)) {
>  		xe_warn(xe, "pcode version read from PMT failed, ret %pe\n", ERR_PTR(ret));
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index edc20c24137e..5ebb4ee9ef08 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -564,6 +564,54 @@ static void vsec_disable_late_bind_work(void *arg)
>  		xe_pm_runtime_put(xe);
>  }
>  
> +u32 xe_vsec_get_guid(struct xe_device *xe)
> +{
> +	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
> +	u32 guid;
> +
> +	/*
> +	 * Both supported platforms (BMG, CRI) require the remapper callback to
> +	 * access data. CRI needs it for the GUID.
> +	 */
> +	if (!xe->soc_remapper.set_telem_region)
> +		return 0;
> +
> +	/* caller must ensure correct power state */
> +	if (!xe_pm_runtime_get_if_active(xe))

The comments sounds like it's a coding error somewhere if we're not 
active at this point, which would be easier to catch if there would be 
WARN_ON_ONCE() instead of silently hiding the problem.

(I don't know much about xe, so please keep it in mind when considering 
my comments on xe side code.)

-- 
 i.

> +		return 0;
> +
> +	mutex_lock(&xe->pmt.lock);
> +
> +	if (xe->pmt.punit_guid_cache) {
> +		guid = xe->pmt.punit_guid_cache;
> +		goto unlock;
> +	}
> +
> +	switch (xe->info.platform) {
> +	case XE_BATTLEMAGE:
> +		guid = xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID);
> +		break;
> +
> +	case XE_CRESCENTISLAND:
> +		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +		guid = xe_mmio_read32(mmio, CRI_PUNIT_TELEMETRY_GUID);
> +		break;
> +
> +	default:
> +		guid = 0;
> +		drm_err(&xe->drm, "Unsupported platform: %u\n", xe->info.platform);
> +		break;
> +	}
> +
> +	xe->pmt.punit_guid_cache = guid;
> +
> +unlock:
> +	mutex_unlock(&xe->pmt.lock);
> +	xe_pm_runtime_put(xe);
> +
> +	return guid;
> +}
> +
>  /**
>   * xe_vsec_init - Initialize resources and add intel_vsec auxiliary
>   * interface
> diff --git a/drivers/gpu/drm/xe/xe_vsec.h b/drivers/gpu/drm/xe/xe_vsec.h
> index c4a1e2fc67d8..43c3e9f227c5 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.h
> +++ b/drivers/gpu/drm/xe/xe_vsec.h
> @@ -10,6 +10,7 @@ struct device;
>  struct xe_device;
>  
>  int xe_vsec_init(struct xe_device *xe);
> +u32 xe_vsec_get_guid(struct xe_device *xe);
>  int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offset, u32 count);
>  
>  #endif
> 

✓ CI.KUnit: success for Crescent Island PMT support (rev5)

[Patchwork]

== Series Details ==

Series: Crescent Island PMT support (rev5)
URL   : https://patchwork.freedesktop.org/series/160717/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[06:42:48] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:42:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:43:25] Starting KUnit Kernel (1/1)...
[06:43:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:43:25] ================== guc_buf (11 subtests) ===================
[06:43:25] [PASSED] test_smallest
[06:43:25] [PASSED] test_largest
[06:43:25] [PASSED] test_granular
[06:43:25] [PASSED] test_unique
[06:43:25] [PASSED] test_overlap
[06:43:25] [PASSED] test_reusable
[06:43:25] [PASSED] test_too_big
[06:43:25] [PASSED] test_flush
[06:43:25] [PASSED] test_lookup
[06:43:25] [PASSED] test_data
[06:43:25] [PASSED] test_class
[06:43:25] ===================== [PASSED] guc_buf =====================
[06:43:25] =================== guc_dbm (7 subtests) ===================
[06:43:25] [PASSED] test_empty
[06:43:25] [PASSED] test_default
[06:43:25] ======================== test_size  ========================
[06:43:25] [PASSED] 4
[06:43:25] [PASSED] 8
[06:43:25] [PASSED] 32
[06:43:25] [PASSED] 256
[06:43:25] ==================== [PASSED] test_size ====================
[06:43:25] ======================= test_reuse  ========================
[06:43:25] [PASSED] 4
[06:43:25] [PASSED] 8
[06:43:25] [PASSED] 32
[06:43:25] [PASSED] 256
[06:43:25] =================== [PASSED] test_reuse ====================
[06:43:25] =================== test_range_overlap  ====================
[06:43:25] [PASSED] 4
[06:43:25] [PASSED] 8
[06:43:25] [PASSED] 32
[06:43:25] [PASSED] 256
[06:43:25] =============== [PASSED] test_range_overlap ================
[06:43:25] =================== test_range_compact  ====================
[06:43:25] [PASSED] 4
[06:43:25] [PASSED] 8
[06:43:25] [PASSED] 32
[06:43:25] [PASSED] 256
[06:43:25] =============== [PASSED] test_range_compact ================
[06:43:25] ==================== test_range_spare  =====================
[06:43:25] [PASSED] 4
[06:43:25] [PASSED] 8
[06:43:25] [PASSED] 32
[06:43:25] [PASSED] 256
[06:43:25] ================ [PASSED] test_range_spare =================
[06:43:25] ===================== [PASSED] guc_dbm =====================
[06:43:25] =================== guc_idm (6 subtests) ===================
[06:43:25] [PASSED] bad_init
[06:43:25] [PASSED] no_init
[06:43:25] [PASSED] init_fini
[06:43:25] [PASSED] check_used
[06:43:25] [PASSED] check_quota
[06:43:25] [PASSED] check_all
[06:43:25] ===================== [PASSED] guc_idm =====================
[06:43:25] =============== guc_klv_helpers (9 subtests) ===============
[06:43:25] [PASSED] test_count
[06:43:25] [PASSED] test_encode_u32
[06:43:25] [PASSED] test_encode_u64
[06:43:25] [PASSED] test_encode_string
[06:43:25] [PASSED] test_encode_object_raw
[06:43:25] [PASSED] test_encode_object_klv
[06:43:25] [PASSED] test_encode_object_nested
[06:43:25] [PASSED] test_encode_object_basic
[06:43:25] [PASSED] test_print
[06:43:25] ================= [PASSED] guc_klv_helpers =================
[06:43:25] =================== xe_log (4 subtests) ====================
[06:43:25] [PASSED] demo_cper
[06:43:25] [PASSED] demo_dmesg
[06:43:25] ======================= test_dmesg  ========================
[06:43:25] [PASSED] test_fatal
[06:43:25] [PASSED] test_fatal_tile
[06:43:25] [PASSED] test_fatal_gt
[06:43:25] [PASSED] test_fatal_comp
[06:43:25] [PASSED] test_fatal_comp_tile
[06:43:25] [PASSED] test_fatal_comp_gt
[06:43:25] [PASSED] test_fatal_all
[06:43:25] [PASSED] test_recoverable
[06:43:25] [PASSED] test_recoverable_tile
[06:43:25] [PASSED] test_recoverable_gt
[06:43:25] [PASSED] test_recoverable_comp
[06:43:25] [PASSED] test_recoverable_comp_tile
[06:43:25] [PASSED] test_recoverable_comp_gt
[06:43:25] [PASSED] test_recoverable_all
[06:43:25] [PASSED] test_info
[06:43:25] [PASSED] test_info_tile
[06:43:25] [PASSED] test_info_gt
[06:43:25] [PASSED] test_info_err
[06:43:25] [PASSED] test_info_comp
[06:43:25] [PASSED] test_info_comp_tile
[06:43:25] [PASSED] test_info_comp_gt
[06:43:25] [PASSED] test_info_all
[06:43:25] [PASSED] test_hw_fatal
[06:43:25] [PASSED] test_hw_recoverable
[06:43:25] [PASSED] test_hw_corrected
[06:43:25] [PASSED] test_hw_informational
[06:43:25] =================== [PASSED] test_dmesg ====================
[06:43:25] ====================== test_invalid  =======================
[06:43:25] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[06:43:25] ================== [SKIPPED] test_invalid ==================
[06:43:25] ===================== [PASSED] xe_log ======================
[06:43:25] ================== no_relay (3 subtests) ===================
[06:43:25] [PASSED] xe_drops_guc2pf_if_not_ready
[06:43:25] [PASSED] xe_drops_guc2vf_if_not_ready
[06:43:25] [PASSED] xe_rejects_send_if_not_ready
[06:43:25] ==================== [PASSED] no_relay =====================
[06:43:25] ================== pf_relay (14 subtests) ==================
[06:43:25] [PASSED] pf_rejects_guc2pf_too_short
[06:43:25] [PASSED] pf_rejects_guc2pf_too_long
[06:43:25] [PASSED] pf_rejects_guc2pf_no_payload
[06:43:25] [PASSED] pf_fails_no_payload
[06:43:25] [PASSED] pf_fails_bad_origin
[06:43:25] [PASSED] pf_fails_bad_type
[06:43:25] [PASSED] pf_txn_reports_error
[06:43:25] [PASSED] pf_txn_sends_pf2guc
[06:43:25] [PASSED] pf_sends_pf2guc
[06:43:25] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:43:25] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:43:25] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:43:25] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:43:25] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:43:25] ==================== [PASSED] pf_relay =====================
[06:43:25] ================== vf_relay (3 subtests) ===================
[06:43:25] [PASSED] vf_rejects_guc2vf_too_short
[06:43:25] [PASSED] vf_rejects_guc2vf_too_long
[06:43:25] [PASSED] vf_rejects_guc2vf_no_payload
[06:43:25] ==================== [PASSED] vf_relay =====================
[06:43:25] ================ pf_gt_config (9 subtests) =================
[06:43:25] [PASSED] fair_contexts_1vf
[06:43:25] [PASSED] fair_doorbells_1vf
[06:43:25] [PASSED] fair_ggtt_1vf
[06:43:25] ====================== fair_vram_1vf  ======================
[06:43:25] [PASSED] 3.50 GiB
[06:43:25] [PASSED] 11.5 GiB
[06:43:25] [PASSED] 15.5 GiB
[06:43:25] [PASSED] 31.5 GiB
[06:43:25] [PASSED] 63.5 GiB
[06:43:25] [PASSED] 1.91 GiB
[06:43:25] ================== [PASSED] fair_vram_1vf ==================
[06:43:25] ================ fair_vram_1vf_admin_only  =================
[06:43:25] [PASSED] 3.50 GiB
[06:43:25] [PASSED] 11.5 GiB
[06:43:25] [PASSED] 15.5 GiB
[06:43:25] [PASSED] 31.5 GiB
[06:43:25] [PASSED] 63.5 GiB
[06:43:25] [PASSED] 1.91 GiB
[06:43:25] ============ [PASSED] fair_vram_1vf_admin_only =============
[06:43:25] ====================== fair_contexts  ======================
[06:43:25] [PASSED] 1 VF
[06:43:25] [PASSED] 2 VFs
[06:43:25] [PASSED] 3 VFs
[06:43:25] [PASSED] 4 VFs
[06:43:25] [PASSED] 5 VFs
[06:43:25] [PASSED] 6 VFs
[06:43:25] [PASSED] 7 VFs
[06:43:25] [PASSED] 8 VFs
[06:43:25] [PASSED] 9 VFs
[06:43:25] [PASSED] 10 VFs
[06:43:25] [PASSED] 11 VFs
[06:43:25] [PASSED] 12 VFs
[06:43:25] [PASSED] 13 VFs
[06:43:25] [PASSED] 14 VFs
[06:43:25] [PASSED] 15 VFs
[06:43:25] [PASSED] 16 VFs
[06:43:25] [PASSED] 17 VFs
[06:43:25] [PASSED] 18 VFs
[06:43:25] [PASSED] 19 VFs
[06:43:25] [PASSED] 20 VFs
[06:43:25] [PASSED] 21 VFs
[06:43:25] [PASSED] 22 VFs
[06:43:25] [PASSED] 23 VFs
[06:43:25] [PASSED] 24 VFs
[06:43:25] [PASSED] 25 VFs
[06:43:25] [PASSED] 26 VFs
[06:43:25] [PASSED] 27 VFs
[06:43:25] [PASSED] 28 VFs
[06:43:25] [PASSED] 29 VFs
[06:43:25] [PASSED] 30 VFs
[06:43:25] [PASSED] 31 VFs
[06:43:25] [PASSED] 32 VFs
[06:43:25] [PASSED] 33 VFs
[06:43:25] [PASSED] 34 VFs
[06:43:25] [PASSED] 35 VFs
[06:43:25] [PASSED] 36 VFs
[06:43:25] [PASSED] 37 VFs
[06:43:25] [PASSED] 38 VFs
[06:43:25] [PASSED] 39 VFs
[06:43:25] [PASSED] 40 VFs
[06:43:25] [PASSED] 41 VFs
[06:43:25] [PASSED] 42 VFs
[06:43:25] [PASSED] 43 VFs
[06:43:25] [PASSED] 44 VFs
[06:43:25] [PASSED] 45 VFs
[06:43:25] [PASSED] 46 VFs
[06:43:25] [PASSED] 47 VFs
[06:43:25] [PASSED] 48 VFs
[06:43:25] [PASSED] 49 VFs
[06:43:25] [PASSED] 50 VFs
[06:43:25] [PASSED] 51 VFs
[06:43:25] [PASSED] 52 VFs
[06:43:25] [PASSED] 53 VFs
[06:43:25] [PASSED] 54 VFs
[06:43:25] [PASSED] 55 VFs
[06:43:25] [PASSED] 56 VFs
[06:43:25] [PASSED] 57 VFs
[06:43:25] [PASSED] 58 VFs
[06:43:25] [PASSED] 59 VFs
[06:43:25] [PASSED] 60 VFs
[06:43:25] [PASSED] 61 VFs
[06:43:25] [PASSED] 62 VFs
[06:43:25] [PASSED] 63 VFs
[06:43:25] ================== [PASSED] fair_contexts ==================
[06:43:25] ===================== fair_doorbells  ======================
[06:43:25] [PASSED] 1 VF
[06:43:25] [PASSED] 2 VFs
[06:43:25] [PASSED] 3 VFs
[06:43:25] [PASSED] 4 VFs
[06:43:25] [PASSED] 5 VFs
[06:43:25] [PASSED] 6 VFs
[06:43:25] [PASSED] 7 VFs
[06:43:25] [PASSED] 8 VFs
[06:43:25] [PASSED] 9 VFs
[06:43:25] [PASSED] 10 VFs
[06:43:25] [PASSED] 11 VFs
[06:43:25] [PASSED] 12 VFs
[06:43:25] [PASSED] 13 VFs
[06:43:25] [PASSED] 14 VFs
[06:43:25] [PASSED] 15 VFs
[06:43:25] [PASSED] 16 VFs
[06:43:25] [PASSED] 17 VFs
[06:43:25] [PASSED] 18 VFs
[06:43:25] [PASSED] 19 VFs
[06:43:25] [PASSED] 20 VFs
[06:43:25] [PASSED] 21 VFs
[06:43:25] [PASSED] 22 VFs
[06:43:25] [PASSED] 23 VFs
[06:43:25] [PASSED] 24 VFs
[06:43:25] [PASSED] 25 VFs
[06:43:25] [PASSED] 26 VFs
[06:43:25] [PASSED] 27 VFs
[06:43:25] [PASSED] 28 VFs
[06:43:25] [PASSED] 29 VFs
[06:43:25] [PASSED] 30 VFs
[06:43:25] [PASSED] 31 VFs
[06:43:25] [PASSED] 32 VFs
[06:43:25] [PASSED] 33 VFs
[06:43:25] [PASSED] 34 VFs
[06:43:25] [PASSED] 35 VFs
[06:43:25] [PASSED] 36 VFs
[06:43:25] [PASSED] 37 VFs
[06:43:25] [PASSED] 38 VFs
[06:43:25] [PASSED] 39 VFs
[06:43:25] [PASSED] 40 VFs
[06:43:25] [PASSED] 41 VFs
[06:43:26] [PASSED] 42 VFs
[06:43:26] [PASSED] 43 VFs
[06:43:26] [PASSED] 44 VFs
[06:43:26] [PASSED] 45 VFs
[06:43:26] [PASSED] 46 VFs
[06:43:26] [PASSED] 47 VFs
[06:43:26] [PASSED] 48 VFs
[06:43:26] [PASSED] 49 VFs
[06:43:26] [PASSED] 50 VFs
[06:43:26] [PASSED] 51 VFs
[06:43:26] [PASSED] 52 VFs
[06:43:26] [PASSED] 53 VFs
[06:43:26] [PASSED] 54 VFs
[06:43:26] [PASSED] 55 VFs
[06:43:26] [PASSED] 56 VFs
[06:43:26] [PASSED] 57 VFs
[06:43:26] [PASSED] 58 VFs
[06:43:26] [PASSED] 59 VFs
[06:43:26] [PASSED] 60 VFs
[06:43:26] [PASSED] 61 VFs
[06:43:26] [PASSED] 62 VFs
[06:43:26] [PASSED] 63 VFs
[06:43:26] ================= [PASSED] fair_doorbells ==================
[06:43:26] ======================== fair_ggtt  ========================
[06:43:26] [PASSED] 1 VF
[06:43:26] [PASSED] 2 VFs
[06:43:26] [PASSED] 3 VFs
[06:43:26] [PASSED] 4 VFs
[06:43:26] [PASSED] 5 VFs
[06:43:26] [PASSED] 6 VFs
[06:43:26] [PASSED] 7 VFs
[06:43:26] [PASSED] 8 VFs
[06:43:26] [PASSED] 9 VFs
[06:43:26] [PASSED] 10 VFs
[06:43:26] [PASSED] 11 VFs
[06:43:26] [PASSED] 12 VFs
[06:43:26] [PASSED] 13 VFs
[06:43:26] [PASSED] 14 VFs
[06:43:26] [PASSED] 15 VFs
[06:43:26] [PASSED] 16 VFs
[06:43:26] [PASSED] 17 VFs
[06:43:26] [PASSED] 18 VFs
[06:43:26] [PASSED] 19 VFs
[06:43:26] [PASSED] 20 VFs
[06:43:26] [PASSED] 21 VFs
[06:43:26] [PASSED] 22 VFs
[06:43:26] [PASSED] 23 VFs
[06:43:26] [PASSED] 24 VFs
[06:43:26] [PASSED] 25 VFs
[06:43:26] [PASSED] 26 VFs
[06:43:26] [PASSED] 27 VFs
[06:43:26] [PASSED] 28 VFs
[06:43:26] [PASSED] 29 VFs
[06:43:26] [PASSED] 30 VFs
[06:43:26] [PASSED] 31 VFs
[06:43:26] [PASSED] 32 VFs
[06:43:26] [PASSED] 33 VFs
[06:43:26] [PASSED] 34 VFs
[06:43:26] [PASSED] 35 VFs
[06:43:26] [PASSED] 36 VFs
[06:43:26] [PASSED] 37 VFs
[06:43:26] [PASSED] 38 VFs
[06:43:26] [PASSED] 39 VFs
[06:43:26] [PASSED] 40 VFs
[06:43:26] [PASSED] 41 VFs
[06:43:26] [PASSED] 42 VFs
[06:43:26] [PASSED] 43 VFs
[06:43:26] [PASSED] 44 VFs
[06:43:26] [PASSED] 45 VFs
[06:43:26] [PASSED] 46 VFs
[06:43:26] [PASSED] 47 VFs
[06:43:26] [PASSED] 48 VFs
[06:43:26] [PASSED] 49 VFs
[06:43:26] [PASSED] 50 VFs
[06:43:26] [PASSED] 51 VFs
[06:43:26] [PASSED] 52 VFs
[06:43:26] [PASSED] 53 VFs
[06:43:26] [PASSED] 54 VFs
[06:43:26] [PASSED] 55 VFs
[06:43:26] [PASSED] 56 VFs
[06:43:26] [PASSED] 57 VFs
[06:43:26] [PASSED] 58 VFs
[06:43:26] [PASSED] 59 VFs
[06:43:26] [PASSED] 60 VFs
[06:43:26] [PASSED] 61 VFs
[06:43:26] [PASSED] 62 VFs
[06:43:26] [PASSED] 63 VFs
[06:43:26] ==================== [PASSED] fair_ggtt ====================
[06:43:26] ======================== fair_vram  ========================
[06:43:26] [PASSED] 1 VF
[06:43:26] [PASSED] 2 VFs
[06:43:26] [PASSED] 3 VFs
[06:43:26] [PASSED] 4 VFs
[06:43:26] [PASSED] 5 VFs
[06:43:26] [PASSED] 6 VFs
[06:43:26] [PASSED] 7 VFs
[06:43:26] [PASSED] 8 VFs
[06:43:26] [PASSED] 9 VFs
[06:43:26] [PASSED] 10 VFs
[06:43:26] [PASSED] 11 VFs
[06:43:26] [PASSED] 12 VFs
[06:43:26] [PASSED] 13 VFs
[06:43:26] [PASSED] 14 VFs
[06:43:26] [PASSED] 15 VFs
[06:43:26] [PASSED] 16 VFs
[06:43:26] [PASSED] 17 VFs
[06:43:26] [PASSED] 18 VFs
[06:43:26] [PASSED] 19 VFs
[06:43:26] [PASSED] 20 VFs
[06:43:26] [PASSED] 21 VFs
[06:43:26] [PASSED] 22 VFs
[06:43:26] [PASSED] 23 VFs
[06:43:26] [PASSED] 24 VFs
[06:43:26] [PASSED] 25 VFs
[06:43:26] [PASSED] 26 VFs
[06:43:26] [PASSED] 27 VFs
[06:43:26] [PASSED] 28 VFs
[06:43:26] [PASSED] 29 VFs
[06:43:26] [PASSED] 30 VFs
[06:43:26] [PASSED] 31 VFs
[06:43:26] [PASSED] 32 VFs
[06:43:26] [PASSED] 33 VFs
[06:43:26] [PASSED] 34 VFs
[06:43:26] [PASSED] 35 VFs
[06:43:26] [PASSED] 36 VFs
[06:43:26] [PASSED] 37 VFs
[06:43:26] [PASSED] 38 VFs
[06:43:26] [PASSED] 39 VFs
[06:43:26] [PASSED] 40 VFs
[06:43:26] [PASSED] 41 VFs
[06:43:26] [PASSED] 42 VFs
[06:43:26] [PASSED] 43 VFs
[06:43:26] [PASSED] 44 VFs
[06:43:26] [PASSED] 45 VFs
[06:43:26] [PASSED] 46 VFs
[06:43:26] [PASSED] 47 VFs
[06:43:26] [PASSED] 48 VFs
[06:43:26] [PASSED] 49 VFs
[06:43:26] [PASSED] 50 VFs
[06:43:26] [PASSED] 51 VFs
[06:43:26] [PASSED] 52 VFs
[06:43:26] [PASSED] 53 VFs
[06:43:26] [PASSED] 54 VFs
[06:43:26] [PASSED] 55 VFs
[06:43:26] [PASSED] 56 VFs
[06:43:26] [PASSED] 57 VFs
[06:43:26] [PASSED] 58 VFs
[06:43:26] [PASSED] 59 VFs
[06:43:26] [PASSED] 60 VFs
[06:43:26] [PASSED] 61 VFs
[06:43:26] [PASSED] 62 VFs
[06:43:26] [PASSED] 63 VFs
[06:43:26] ==================== [PASSED] fair_vram ====================
[06:43:26] ================== [PASSED] pf_gt_config ===================
[06:43:26] ===================== lmtt (1 subtest) =====================
[06:43:26] ======================== test_ops  =========================
[06:43:26] [PASSED] 2-level
[06:43:26] [PASSED] multi-level
[06:43:26] ==================== [PASSED] test_ops =====================
[06:43:26] ====================== [PASSED] lmtt =======================
[06:43:26] ================= sriov_packet (1 subtest) =================
[06:43:26] [PASSED] test_descriptor_init
[06:43:26] ================== [PASSED] sriov_packet ===================
[06:43:26] ================= pf_service (11 subtests) =================
[06:43:26] [PASSED] pf_negotiate_any
[06:43:26] [PASSED] pf_negotiate_base_match
[06:43:26] [PASSED] pf_negotiate_base_newer
[06:43:26] [PASSED] pf_negotiate_base_next
[06:43:26] [SKIPPED] pf_negotiate_base_older (no older minor)
[06:43:26] [PASSED] pf_negotiate_base_prev
[06:43:26] [PASSED] pf_negotiate_latest_match
[06:43:26] [PASSED] pf_negotiate_latest_newer
[06:43:26] [PASSED] pf_negotiate_latest_next
[06:43:26] [SKIPPED] pf_negotiate_latest_older (no older minor)
[06:43:26] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[06:43:26] =================== [PASSED] pf_service ====================
[06:43:26] ================= xe_guc_g2g (2 subtests) ==================
[06:43:26] ============== xe_live_guc_g2g_kunit_default  ==============
[06:43:26] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[06:43:26] ============== xe_live_guc_g2g_kunit_allmem  ===============
[06:43:26] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[06:43:26] =================== [SKIPPED] xe_guc_g2g ===================
[06:43:26] =================== xe_mocs (2 subtests) ===================
[06:43:26] ================ xe_live_mocs_kernel_kunit  ================
[06:43:26] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[06:43:26] ================ xe_live_mocs_reset_kunit  =================
[06:43:26] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[06:43:26] ==================== [SKIPPED] xe_mocs =====================
[06:43:26] ================= xe_migrate (2 subtests) ==================
[06:43:26] ================= xe_migrate_sanity_kunit  =================
[06:43:26] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[06:43:26] ================== xe_validate_ccs_kunit  ==================
[06:43:26] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[06:43:26] =================== [SKIPPED] xe_migrate ===================
[06:43:26] ================== xe_dma_buf (1 subtest) ==================
[06:43:26] ==================== xe_dma_buf_kunit  =====================
[06:43:26] ================ [SKIPPED] xe_dma_buf_kunit ================
[06:43:26] =================== [SKIPPED] xe_dma_buf ===================
[06:43:26] ================= xe_bo_shrink (1 subtest) =================
[06:43:26] =================== xe_bo_shrink_kunit  ====================
[06:43:26] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[06:43:26] ================== [SKIPPED] xe_bo_shrink ==================
[06:43:26] ==================== xe_bo (2 subtests) ====================
[06:43:26] ================== xe_ccs_migrate_kunit  ===================
[06:43:26] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[06:43:26] ==================== xe_bo_evict_kunit  ====================
[06:43:26] =============== [SKIPPED] xe_bo_evict_kunit ================
[06:43:26] ===================== [SKIPPED] xe_bo ======================
[06:43:26] =================== xe_any (9 subtests) ====================
[06:43:26] [PASSED] test_to_xe
[06:43:26] [PASSED] test_to_dev
[06:43:26] [PASSED] test_to_pdev
[06:43:26] [PASSED] test_to_drm
[06:43:26] [PASSED] test_if_pdev
[06:43:26] [PASSED] test_if_xe
[06:43:26] [PASSED] test_if_tile
[06:43:26] [PASSED] test_if_gt
[06:43:26] [PASSED] test_to_id
[06:43:26] ===================== [PASSED] xe_any ======================
[06:43:26] ==================== args (13 subtests) ====================
[06:43:26] [PASSED] count_args_test
[06:43:26] [PASSED] call_args_example
[06:43:26] [PASSED] call_args_test
[06:43:26] [PASSED] drop_first_arg_example
[06:43:26] [PASSED] drop_first_arg_test
[06:43:26] [PASSED] first_arg_example
[06:43:26] [PASSED] first_arg_test
[06:43:26] [PASSED] last_arg_example
[06:43:26] [PASSED] last_arg_test
[06:43:26] [PASSED] pick_arg_example
[06:43:26] [PASSED] if_args_example
[06:43:26] [PASSED] if_args_test
[06:43:26] [PASSED] sep_comma_example
[06:43:26] ====================== [PASSED] args =======================
[06:43:26] =================== xe_pci (3 subtests) ====================
[06:43:26] ==================== check_graphics_ip  ====================
[06:43:26] [PASSED] 12.00 Xe_LP
[06:43:26] [PASSED] 12.10 Xe_LP+
[06:43:26] [PASSED] 12.55 Xe_HPG
[06:43:26] [PASSED] 12.60 Xe_HPC
[06:43:26] [PASSED] 12.70 Xe_LPG
[06:43:26] [PASSED] 12.71 Xe_LPG
[06:43:26] [PASSED] 12.74 Xe_LPG+
[06:43:26] [PASSED] 20.01 Xe2_HPG
[06:43:26] [PASSED] 20.02 Xe2_HPG
[06:43:26] [PASSED] 20.04 Xe2_LPG
[06:43:26] [PASSED] 30.00 Xe3_LPG
[06:43:26] [PASSED] 30.01 Xe3_LPG
[06:43:26] [PASSED] 30.03 Xe3_LPG
[06:43:26] [PASSED] 30.04 Xe3_LPG
[06:43:26] [PASSED] 30.05 Xe3_LPG
[06:43:26] [PASSED] 35.10 Xe3p_LPG
[06:43:26] [PASSED] 35.11 Xe3p_XPC
[06:43:26] ================ [PASSED] check_graphics_ip ================
[06:43:26] ===================== check_media_ip  ======================
[06:43:26] [PASSED] 12.00 Xe_M
[06:43:26] [PASSED] 12.55 Xe_HPM
[06:43:26] [PASSED] 13.00 Xe_LPM+
[06:43:26] [PASSED] 13.01 Xe2_HPM
[06:43:26] [PASSED] 20.00 Xe2_LPM
[06:43:26] [PASSED] 30.00 Xe3_LPM
[06:43:26] [PASSED] 30.02 Xe3_LPM
[06:43:26] [PASSED] 35.00 Xe3p_LPM
[06:43:26] [PASSED] 35.03 Xe3p_HPM
[06:43:26] ================= [PASSED] check_media_ip ==================
[06:43:26] =================== check_platform_desc  ===================
[06:43:26] [PASSED] 0x9A60 (TIGERLAKE)
[06:43:26] [PASSED] 0x9A68 (TIGERLAKE)
[06:43:26] [PASSED] 0x9A70 (TIGERLAKE)
[06:43:26] [PASSED] 0x9A40 (TIGERLAKE)
[06:43:26] [PASSED] 0x9A49 (TIGERLAKE)
[06:43:26] [PASSED] 0x9A59 (TIGERLAKE)
[06:43:26] [PASSED] 0x9A78 (TIGERLAKE)
[06:43:26] [PASSED] 0x9AC0 (TIGERLAKE)
[06:43:26] [PASSED] 0x9AC9 (TIGERLAKE)
[06:43:26] [PASSED] 0x9AD9 (TIGERLAKE)
[06:43:26] [PASSED] 0x9AF8 (TIGERLAKE)
[06:43:26] [PASSED] 0x4C80 (ROCKETLAKE)
[06:43:26] [PASSED] 0x4C8A (ROCKETLAKE)
[06:43:26] [PASSED] 0x4C8B (ROCKETLAKE)
[06:43:26] [PASSED] 0x4C8C (ROCKETLAKE)
[06:43:26] [PASSED] 0x4C90 (ROCKETLAKE)
[06:43:26] [PASSED] 0x4C9A (ROCKETLAKE)
[06:43:26] [PASSED] 0x4680 (ALDERLAKE_S)
[06:43:26] [PASSED] 0x4682 (ALDERLAKE_S)
[06:43:26] [PASSED] 0x4688 (ALDERLAKE_S)
[06:43:26] [PASSED] 0x468A (ALDERLAKE_S)
[06:43:26] [PASSED] 0x468B (ALDERLAKE_S)
[06:43:26] [PASSED] 0x4690 (ALDERLAKE_S)
[06:43:26] [PASSED] 0x4692 (ALDERLAKE_S)
[06:43:26] [PASSED] 0x4693 (ALDERLAKE_S)
[06:43:26] [PASSED] 0x46A0 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46A1 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46A2 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46A3 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46A6 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46A8 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46AA (ALDERLAKE_P)
[06:43:26] [PASSED] 0x462A (ALDERLAKE_P)
[06:43:26] [PASSED] 0x4626 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x4628 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46B0 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46B1 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46B2 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46B3 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46C0 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46C1 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46C2 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46C3 (ALDERLAKE_P)
[06:43:26] [PASSED] 0x46D0 (ALDERLAKE_N)
[06:43:26] [PASSED] 0x46D1 (ALDERLAKE_N)
[06:43:26] [PASSED] 0x46D2 (ALDERLAKE_N)
[06:43:26] [PASSED] 0x46D3 (ALDERLAKE_N)
[06:43:26] [PASSED] 0x46D4 (ALDERLAKE_N)
[06:43:26] [PASSED] 0xA721 (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA7A1 (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA7A9 (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA7AC (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA7AD (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA720 (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA7A0 (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA7A8 (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA7AA (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA7AB (ALDERLAKE_P)
[06:43:26] [PASSED] 0xA780 (ALDERLAKE_S)
[06:43:26] [PASSED] 0xA781 (ALDERLAKE_S)
[06:43:26] [PASSED] 0xA782 (ALDERLAKE_S)
[06:43:26] [PASSED] 0xA783 (ALDERLAKE_S)
[06:43:26] [PASSED] 0xA788 (ALDERLAKE_S)
[06:43:26] [PASSED] 0xA789 (ALDERLAKE_S)
[06:43:26] [PASSED] 0xA78A (ALDERLAKE_S)
[06:43:26] [PASSED] 0xA78B (ALDERLAKE_S)
[06:43:26] [PASSED] 0x4905 (DG1)
[06:43:26] [PASSED] 0x4906 (DG1)
[06:43:26] [PASSED] 0x4907 (DG1)
[06:43:26] [PASSED] 0x4908 (DG1)
[06:43:26] [PASSED] 0x4909 (DG1)
[06:43:26] [PASSED] 0x56C0 (DG2)
[06:43:26] [PASSED] 0x56C2 (DG2)
[06:43:26] [PASSED] 0x56C1 (DG2)
[06:43:26] [PASSED] 0x7D51 (METEORLAKE)
[06:43:26] [PASSED] 0x7DD1 (METEORLAKE)
[06:43:26] [PASSED] 0x7D41 (METEORLAKE)
[06:43:26] [PASSED] 0x7D67 (METEORLAKE)
[06:43:26] [PASSED] 0xB640 (METEORLAKE)
[06:43:26] [PASSED] 0x56A0 (DG2)
[06:43:26] [PASSED] 0x56A1 (DG2)
[06:43:26] [PASSED] 0x56A2 (DG2)
[06:43:26] [PASSED] 0x56BE (DG2)
[06:43:26] [PASSED] 0x56BF (DG2)
[06:43:26] [PASSED] 0x5690 (DG2)
[06:43:26] [PASSED] 0x5691 (DG2)
[06:43:26] [PASSED] 0x5692 (DG2)
[06:43:26] [PASSED] 0x56A5 (DG2)
[06:43:26] [PASSED] 0x56A6 (DG2)
[06:43:26] [PASSED] 0x56B0 (DG2)
[06:43:26] [PASSED] 0x56B1 (DG2)
[06:43:26] [PASSED] 0x56BA (DG2)
[06:43:26] [PASSED] 0x56BB (DG2)
[06:43:26] [PASSED] 0x56BC (DG2)
[06:43:26] [PASSED] 0x56BD (DG2)
[06:43:26] [PASSED] 0x5693 (DG2)
[06:43:26] [PASSED] 0x5694 (DG2)
[06:43:26] [PASSED] 0x5695 (DG2)
[06:43:26] [PASSED] 0x56A3 (DG2)
[06:43:26] [PASSED] 0x56A4 (DG2)
[06:43:26] [PASSED] 0x56B2 (DG2)
[06:43:26] [PASSED] 0x56B3 (DG2)
[06:43:26] [PASSED] 0x5696 (DG2)
[06:43:26] [PASSED] 0x5697 (DG2)
[06:43:26] [PASSED] 0xB69 (PVC)
[06:43:26] [PASSED] 0xB6E (PVC)
[06:43:26] [PASSED] 0xBD4 (PVC)
[06:43:26] [PASSED] 0xBD5 (PVC)
[06:43:26] [PASSED] 0xBD6 (PVC)
[06:43:26] [PASSED] 0xBD7 (PVC)
[06:43:26] [PASSED] 0xBD8 (PVC)
[06:43:26] [PASSED] 0xBD9 (PVC)
[06:43:26] [PASSED] 0xBDA (PVC)
[06:43:26] [PASSED] 0xBDB (PVC)
[06:43:26] [PASSED] 0xBE0 (PVC)
[06:43:26] [PASSED] 0xBE1 (PVC)
[06:43:26] [PASSED] 0xBE5 (PVC)
[06:43:26] [PASSED] 0x7D40 (METEORLAKE)
[06:43:26] [PASSED] 0x7D45 (METEORLAKE)
[06:43:26] [PASSED] 0x7D55 (METEORLAKE)
[06:43:26] [PASSED] 0x7D60 (METEORLAKE)
[06:43:26] [PASSED] 0x7DD5 (METEORLAKE)
[06:43:26] [PASSED] 0x6420 (LUNARLAKE)
[06:43:26] [PASSED] 0x64A0 (LUNARLAKE)
[06:43:26] [PASSED] 0x64B0 (LUNARLAKE)
[06:43:26] [PASSED] 0xE202 (BATTLEMAGE)
[06:43:26] [PASSED] 0xE209 (BATTLEMAGE)
[06:43:26] [PASSED] 0xE20B (BATTLEMAGE)
[06:43:26] [PASSED] 0xE20C (BATTLEMAGE)
[06:43:26] [PASSED] 0xE20D (BATTLEMAGE)
[06:43:26] [PASSED] 0xE210 (BATTLEMAGE)
[06:43:26] [PASSED] 0xE211 (BATTLEMAGE)
[06:43:26] [PASSED] 0xE212 (BATTLEMAGE)
[06:43:26] [PASSED] 0xE216 (BATTLEMAGE)
[06:43:26] [PASSED] 0xE220 (BATTLEMAGE)
[06:43:26] [PASSED] 0xE221 (BATTLEMAGE)
[06:43:26] [PASSED] 0xE222 (BATTLEMAGE)
[06:43:26] [PASSED] 0xE223 (BATTLEMAGE)
[06:43:26] [PASSED] 0xB080 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB081 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB082 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB083 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB084 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB085 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB086 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB087 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB08F (PANTHERLAKE)
[06:43:26] [PASSED] 0xB090 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB0A0 (PANTHERLAKE)
[06:43:26] [PASSED] 0xB0B0 (PANTHERLAKE)
[06:43:26] [PASSED] 0xFD80 (PANTHERLAKE)
[06:43:26] [PASSED] 0xFD81 (PANTHERLAKE)
[06:43:26] [PASSED] 0xD740 (NOVALAKE_S)
[06:43:26] [PASSED] 0xD741 (NOVALAKE_S)
[06:43:26] [PASSED] 0xD742 (NOVALAKE_S)
[06:43:26] [PASSED] 0xD743 (NOVALAKE_S)
[06:43:26] [PASSED] 0xD745 (NOVALAKE_S)
[06:43:26] [PASSED] 0xD74A (NOVALAKE_S)
[06:43:26] [PASSED] 0xD74B (NOVALAKE_S)
[06:43:26] [PASSED] 0x674C (CRESCENTISLAND)
[06:43:26] [PASSED] 0x674D (CRESCENTISLAND)
[06:43:26] [PASSED] 0x674E (CRESCENTISLAND)
[06:43:26] [PASSED] 0x674F (CRESCENTISLAND)
[06:43:26] [PASSED] 0x6750 (CRESCENTISLAND)
[06:43:26] [PASSED] 0xD750 (NOVALAKE_P)
[06:43:26] [PASSED] 0xD751 (NOVALAKE_P)
[06:43:26] [PASSED] 0xD752 (NOVALAKE_P)
[06:43:26] [PASSED] 0xD753 (NOVALAKE_P)
[06:43:26] [PASSED] 0xD754 (NOVALAKE_P)
[06:43:26] [PASSED] 0xD755 (NOVALAKE_P)
[06:43:26] [PASSED] 0xD756 (NOVALAKE_P)
[06:43:26] [PASSED] 0xD757 (NOVALAKE_P)
[06:43:26] [PASSED] 0xD75F (NOVALAKE_P)
[06:43:26] =============== [PASSED] check_platform_desc ===============
[06:43:26] ===================== [PASSED] xe_pci ======================
[06:43:26] ============= xe_rtp_tables_test (5 subtests) ==============
[06:43:26] ================== xe_rtp_table_gt_test  ===================
[06:43:26] [PASSED] gt_was/14011060649
[06:43:26] [PASSED] gt_was/14011059788
[06:43:26] [PASSED] gt_was/14015795083
[06:43:26] [PASSED] gt_was/16021867713
[06:43:26] [PASSED] gt_was/14019449301
[06:43:26] [PASSED] gt_was/16028005424
[06:43:26] [PASSED] gt_was/14026578760
[06:43:26] [PASSED] gt_was/1409420604
[06:43:26] [PASSED] gt_was/1408615072
[06:43:26] [PASSED] gt_was/22010523718
[06:43:26] [PASSED] gt_was/14011006942
[06:43:26] [PASSED] gt_was/14014830051
[06:43:26] [PASSED] gt_was/18018781329
[06:43:26] [PASSED] gt_was/1509235366
[06:43:26] [PASSED] gt_was/18018781329
[06:43:26] [PASSED] gt_was/16016694945
[06:43:26] [PASSED] gt_was/14018575942
[06:43:26] [PASSED] gt_was/22016670082
[06:43:26] [PASSED] gt_was/22016670082
[06:43:26] [PASSED] gt_was/14017421178
[06:43:26] [PASSED] gt_was/16025250150
[06:43:26] [PASSED] gt_was/14021871409
[06:43:26] [PASSED] gt_was/16021865536
[06:43:26] [PASSED] gt_was/14021486841
[06:43:26] [PASSED] gt_was/14025160223
[06:43:26] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[06:43:26] [PASSED] gt_was/14025635424
[06:43:26] [PASSED] gt_was/16028005424
[06:43:26] ============== [PASSED] xe_rtp_table_gt_test ===============
[06:43:26] ================== xe_rtp_table_gt_test  ===================
[06:43:26] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[06:43:26] [PASSED] gt_tunings/Tuning: 32B Access Enable
[06:43:26] [PASSED] gt_tunings/Tuning: L3 cache
[06:43:26] [PASSED] gt_tunings/Tuning: L3 cache - media
[06:43:26] [PASSED] gt_tunings/Tuning: Compression Overfetch
[06:43:26] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[06:43:26] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[06:43:26] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[06:43:26] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[06:43:26] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[06:43:26] [PASSED] gt_tunings/Tuning: Stateless compression control
[06:43:26] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[06:43:26] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[06:43:26] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[06:43:26] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[06:43:26] ============== [PASSED] xe_rtp_table_gt_test ===============
[06:43:26] ================== xe_rtp_table_oob_test  ==================
[06:43:26] [PASSED] oob_was/1607983814
[06:43:26] [PASSED] oob_was/16010904313
[06:43:26] [PASSED] oob_was/18022495364
[06:43:26] [PASSED] oob_was/22012773006
[06:43:26] [PASSED] oob_was/14014475959
[06:43:26] [PASSED] oob_was/22011391025
[06:43:26] [PASSED] oob_was/22012727170
[06:43:26] [PASSED] oob_was/22012727685
[06:43:26] [PASSED] oob_was/22016596838
[06:43:26] [PASSED] oob_was/18020744125
[06:43:26] [PASSED] oob_was/1409600907
[06:43:26] [PASSED] oob_was/22014953428
[06:43:26] [PASSED] oob_was/16017236439
[06:43:26] [PASSED] oob_was/14019821291
[06:43:26] [PASSED] oob_was/14015076503
[06:43:26] [PASSED] oob_was/14018913170
[06:43:26] [PASSED] oob_was/14018094691
[06:43:26] [PASSED] oob_was/18024947630
[06:43:26] [PASSED] oob_was/16022287689
[06:43:26] [PASSED] oob_was/13011645652
[06:43:26] [PASSED] oob_was/14022293748
[06:43:26] [PASSED] oob_was/22019794406
[06:43:26] [PASSED] oob_was/22019338487
[06:43:26] [PASSED] oob_was/16023588340
[06:43:26] [PASSED] oob_was/14019789679
[06:43:26] [PASSED] oob_was/14022866841
[06:43:26] [PASSED] oob_was/16021333562
[06:43:26] [PASSED] oob_was/14016712196
[06:43:26] [PASSED] oob_was/14015568240
[06:43:26] [PASSED] oob_was/18013179988
[06:43:26] [PASSED] oob_was/1508761755
[06:43:26] [PASSED] oob_was/16023105232
[06:43:26] [PASSED] oob_was/16026508708
[06:43:26] [PASSED] oob_was/14020001231
[06:43:26] [PASSED] oob_was/16023683509
[06:43:26] [PASSED] oob_was/14025515070
[06:43:26] [PASSED] oob_was/15015404425_disable
[06:43:26] [PASSED] oob_was/16026007364
[06:43:26] [PASSED] oob_was/14020316580
[06:43:26] [PASSED] oob_was/14025883347
[06:43:26] [PASSED] oob_was/16029380221
[06:43:26] [PASSED] oob_was/22022079272
[06:43:26] [PASSED] oob_was/16029897822
[06:43:26] [PASSED] oob_was/14027054324
[06:43:26] ============== [PASSED] xe_rtp_table_oob_test ==============
[06:43:26] ================ xe_rtp_table_dev_oob_test  ================
[06:43:26] [PASSED] device_oob_was/22010954014
[06:43:26] [PASSED] device_oob_was/15015404425
[06:43:26] [PASSED] device_oob_was/22019338487_display
[06:43:26] [PASSED] device_oob_was/14022085890
[06:43:26] [PASSED] device_oob_was/14026539277
[06:43:26] [PASSED] device_oob_was/14026633728
[06:43:26] [PASSED] device_oob_was/14026746987
[06:43:26] [PASSED] device_oob_was/14026779378
[06:43:26] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[06:43:26] ========== xe_rtp_table_missing_upper_bound_test  ==========
[06:43:26] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[06:43:26] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[06:43:26] [PASSED] register_whitelist/1806527549
[06:43:26] [PASSED] register_whitelist/allow_read_ctx_timestamp
[06:43:26] [PASSED] register_whitelist/allow_read_queue_timestamp
[06:43:26] [PASSED] register_whitelist/16014440446
[06:43:26] [PASSED] register_whitelist/16017236439
[06:43:26] [PASSED] register_whitelist/16020183090
[06:43:26] [PASSED] register_whitelist/14024997852
[06:43:26] [PASSED] register_whitelist/14024997852
[06:43:26] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[06:43:26] =============== [PASSED] xe_rtp_tables_test ================
[06:43:26] =================== xe_rtp (3 subtests) ====================
[06:43:26] =================== xe_rtp_rules_tests  ====================
[06:43:26] [PASSED] no
[06:43:26] [PASSED] yes
[06:43:26] [PASSED] no-and-no
[06:43:26] [PASSED] no-and-yes
[06:43:26] [PASSED] yes-and-no
[06:43:26] [PASSED] yes-and-yes
[06:43:26] [PASSED] no-or-no
[06:43:26] [PASSED] no-or-yes
[06:43:26] [PASSED] yes-or-no
[06:43:26] [PASSED] yes-or-yes
[06:43:26] [PASSED] no-yes-or-yes-no
[06:43:26] [PASSED] no-yes-or-yes-yes
[06:43:26] [PASSED] yes-yes-or-no-yes
[06:43:26] [PASSED] yes-yes-or-yes-yes
[06:43:26] [PASSED] no-no-or-yes-or-no
[06:43:26] [PASSED] or
[06:43:26] [PASSED] or-yes
[06:43:26] [PASSED] or-no
[06:43:26] [PASSED] yes-or
[06:43:26] [PASSED] no-or
[06:43:26] [PASSED] no-or-or-yes
[06:43:26] [PASSED] yes-or-or-no
[06:43:26] [PASSED] no-or-or-no
[06:43:26] [PASSED] missing-context-engine-class
[06:43:26] [PASSED] missing-context-engine-class-or-yes
[06:43:26] [PASSED] missing-context-engine-class-or-or-yes
[06:43:26] =============== [PASSED] xe_rtp_rules_tests ================
[06:43:26] =============== xe_rtp_process_to_sr_tests  ================
[06:43:26] [PASSED] coalesce-same-reg
[06:43:26] [PASSED] coalesce-same-reg-literal-and-func
[06:43:26] [PASSED] no-match-no-add
[06:43:26] [PASSED] two-regs-two-entries
[06:43:26] [PASSED] clr-one-set-other
[06:43:26] [PASSED] set-field
[06:43:26] [PASSED] conflict-duplicate
[06:43:26] [PASSED] conflict-not-disjoint
[06:43:26] [PASSED] conflict-not-disjoint-literal-and-func
[06:43:26] [PASSED] conflict-reg-type
[06:43:26] [PASSED] bad-mcr-reg-forced-to-regular
[06:43:26] [PASSED] bad-regular-reg-forced-to-mcr
[06:43:26] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[06:43:26] ================== xe_rtp_process_tests  ===================
[06:43:26] [PASSED] active1
[06:43:26] [PASSED] active2
[06:43:26] [PASSED] active-inactive
[06:43:26] [PASSED] inactive-active
[06:43:26] [PASSED] inactive-active-inactive
[06:43:26] [PASSED] inactive-inactive-inactive
[06:43:26] ============== [PASSED] xe_rtp_process_tests ===============
[06:43:26] ===================== [PASSED] xe_rtp ======================
[06:43:26] ==================== xe_wa (1 subtest) =====================
[06:43:26] ======================== xe_wa_gt  =========================
[06:43:26] [PASSED] TIGERLAKE B0
[06:43:26] [PASSED] DG1 A0
[06:43:26] [PASSED] DG1 B0
[06:43:26] [PASSED] ALDERLAKE_S A0
[06:43:26] [PASSED] ALDERLAKE_S B0
[06:43:26] [PASSED] ALDERLAKE_S C0
[06:43:26] [PASSED] ALDERLAKE_S D0
[06:43:26] [PASSED] ALDERLAKE_P A0
[06:43:26] [PASSED] ALDERLAKE_P B0
[06:43:26] [PASSED] ALDERLAKE_P C0
[06:43:26] [PASSED] ALDERLAKE_S RPLS D0
[06:43:26] [PASSED] ALDERLAKE_P RPLU E0
[06:43:26] [PASSED] DG2 G10 C0
[06:43:26] [PASSED] DG2 G11 B1
[06:43:26] [PASSED] DG2 G12 A1
[06:43:26] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:43:26] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:43:26] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[06:43:26] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[06:43:26] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[06:43:26] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[06:43:26] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[06:43:26] ==================== [PASSED] xe_wa_gt =====================
[06:43:26] ====================== [PASSED] xe_wa ======================
[06:43:26] ============================================================
[06:43:26] Testing complete. Ran 789 tests: passed: 761, skipped: 28
[06:43:26] Elapsed time: 37.795s total, 4.419s configuring, 32.658s building, 0.693s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[06:43:26] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:43:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:43:53] Starting KUnit Kernel (1/1)...
[06:43:53] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:43:53] ============ drm_test_pick_cmdline (2 subtests) ============
[06:43:53] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[06:43:53] =============== drm_test_pick_cmdline_named  ===============
[06:43:53] [PASSED] NTSC
[06:43:53] [PASSED] NTSC-J
[06:43:53] [PASSED] PAL
[06:43:53] [PASSED] PAL-M
[06:43:53] =========== [PASSED] drm_test_pick_cmdline_named ===========
[06:43:53] ============== [PASSED] drm_test_pick_cmdline ==============
[06:43:53] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[06:43:53] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[06:43:53] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[06:43:53] =========== drm_validate_clone_mode (2 subtests) ===========
[06:43:53] ============== drm_test_check_in_clone_mode  ===============
[06:43:53] [PASSED] in_clone_mode
[06:43:53] [PASSED] not_in_clone_mode
[06:43:53] ========== [PASSED] drm_test_check_in_clone_mode ===========
[06:43:53] =============== drm_test_check_valid_clones  ===============
[06:43:53] [PASSED] not_in_clone_mode
[06:43:53] [PASSED] valid_clone
[06:43:53] [PASSED] invalid_clone
[06:43:53] =========== [PASSED] drm_test_check_valid_clones ===========
[06:43:53] ============= [PASSED] drm_validate_clone_mode =============
[06:43:53] ============= drm_validate_modeset (1 subtest) =============
[06:43:53] [PASSED] drm_test_check_connector_changed_modeset
[06:43:53] ============== [PASSED] drm_validate_modeset ===============
[06:43:53] ====== drm_test_bridge_get_current_state (1 subtest) =======
[06:43:53] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[06:43:53] ======== [PASSED] drm_test_bridge_get_current_state ========
[06:43:53] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[06:43:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[06:43:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[06:43:53] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[06:43:53] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[06:43:53] ============== drm_bridge_alloc (2 subtests) ===============
[06:43:53] [PASSED] drm_test_drm_bridge_alloc_basic
[06:43:53] [PASSED] drm_test_drm_bridge_alloc_get_put
[06:43:53] ================ [PASSED] drm_bridge_alloc =================
[06:43:53] ============= drm_bridge_bus_fmt (5 subtests) ==============
[06:43:53] [PASSED] drm_test_bridge_rgb_yuv_rgb
[06:43:53] [PASSED] drm_test_bridge_must_convert_to_yuv444
[06:43:53] [PASSED] drm_test_bridge_hdmi_auto_rgb
[06:43:53] [PASSED] drm_test_bridge_auto_first
[06:43:53] [PASSED] drm_test_bridge_rgb_yuv_no_path
[06:43:53] =============== [PASSED] drm_bridge_bus_fmt ================
[06:43:53] ============= drm_cmdline_parser (40 subtests) =============
[06:43:53] [PASSED] drm_test_cmdline_force_d_only
[06:43:53] [PASSED] drm_test_cmdline_force_D_only_dvi
[06:43:53] [PASSED] drm_test_cmdline_force_D_only_hdmi
[06:43:53] [PASSED] drm_test_cmdline_force_D_only_not_digital
[06:43:53] [PASSED] drm_test_cmdline_force_e_only
[06:43:53] [PASSED] drm_test_cmdline_res
[06:43:53] [PASSED] drm_test_cmdline_res_vesa
[06:43:53] [PASSED] drm_test_cmdline_res_vesa_rblank
[06:43:53] [PASSED] drm_test_cmdline_res_rblank
[06:43:53] [PASSED] drm_test_cmdline_res_bpp
[06:43:53] [PASSED] drm_test_cmdline_res_refresh
[06:43:53] [PASSED] drm_test_cmdline_res_bpp_refresh
[06:43:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[06:43:53] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[06:43:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[06:43:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[06:43:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[06:43:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[06:43:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[06:43:53] [PASSED] drm_test_cmdline_res_margins_force_on
[06:43:53] [PASSED] drm_test_cmdline_res_vesa_margins
[06:43:53] [PASSED] drm_test_cmdline_name
[06:43:53] [PASSED] drm_test_cmdline_name_bpp
[06:43:53] [PASSED] drm_test_cmdline_name_option
[06:43:53] [PASSED] drm_test_cmdline_name_bpp_option
[06:43:53] [PASSED] drm_test_cmdline_rotate_0
[06:43:53] [PASSED] drm_test_cmdline_rotate_90
[06:43:53] [PASSED] drm_test_cmdline_rotate_180
[06:43:53] [PASSED] drm_test_cmdline_rotate_270
[06:43:53] [PASSED] drm_test_cmdline_hmirror
[06:43:53] [PASSED] drm_test_cmdline_vmirror
[06:43:53] [PASSED] drm_test_cmdline_margin_options
[06:43:53] [PASSED] drm_test_cmdline_multiple_options
[06:43:53] [PASSED] drm_test_cmdline_bpp_extra_and_option
[06:43:53] [PASSED] drm_test_cmdline_extra_and_option
[06:43:53] [PASSED] drm_test_cmdline_freestanding_options
[06:43:53] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[06:43:53] [PASSED] drm_test_cmdline_panel_orientation
[06:43:53] ================ drm_test_cmdline_invalid  =================
[06:43:53] [PASSED] margin_only
[06:43:53] [PASSED] interlace_only
[06:43:53] [PASSED] res_missing_x
[06:43:53] [PASSED] res_missing_y
[06:43:53] [PASSED] res_bad_y
[06:43:53] [PASSED] res_missing_y_bpp
[06:43:53] [PASSED] res_bad_bpp
[06:43:53] [PASSED] res_bad_refresh
[06:43:53] [PASSED] res_bpp_refresh_force_on_off
[06:43:53] [PASSED] res_invalid_mode
[06:43:53] [PASSED] res_bpp_wrong_place_mode
[06:43:53] [PASSED] name_bpp_refresh
[06:43:53] [PASSED] name_refresh
[06:43:53] [PASSED] name_refresh_wrong_mode
[06:43:53] [PASSED] name_refresh_invalid_mode
[06:43:53] [PASSED] rotate_multiple
[06:43:53] [PASSED] rotate_invalid_val
[06:43:53] [PASSED] rotate_truncated
[06:43:53] [PASSED] invalid_option
[06:43:53] [PASSED] invalid_tv_option
[06:43:53] [PASSED] truncated_tv_option
[06:43:53] ============ [PASSED] drm_test_cmdline_invalid =============
[06:43:53] =============== drm_test_cmdline_tv_options  ===============
[06:43:53] [PASSED] NTSC
[06:43:53] [PASSED] NTSC_443
[06:43:53] [PASSED] NTSC_J
[06:43:53] [PASSED] PAL
[06:43:53] [PASSED] PAL_M
[06:43:53] [PASSED] PAL_N
[06:43:53] [PASSED] SECAM
[06:43:53] [PASSED] MONO_525
[06:43:53] [PASSED] MONO_625
[06:43:53] =========== [PASSED] drm_test_cmdline_tv_options ===========
[06:43:53] =============== [PASSED] drm_cmdline_parser ================
[06:43:53] ========== drmm_connector_hdmi_init (20 subtests) ==========
[06:43:53] [PASSED] drm_test_connector_hdmi_init_valid
[06:43:53] [PASSED] drm_test_connector_hdmi_init_bpc_8
[06:43:53] [PASSED] drm_test_connector_hdmi_init_bpc_10
[06:43:53] [PASSED] drm_test_connector_hdmi_init_bpc_12
[06:43:53] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[06:43:53] [PASSED] drm_test_connector_hdmi_init_bpc_null
[06:43:53] [PASSED] drm_test_connector_hdmi_init_formats_empty
[06:43:53] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[06:43:53] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[06:43:53] [PASSED] supported_formats=0x9 yuv420_allowed=1
[06:43:53] [PASSED] supported_formats=0x9 yuv420_allowed=0
[06:43:53] [PASSED] supported_formats=0x5 yuv420_allowed=1
[06:43:53] [PASSED] supported_formats=0x5 yuv420_allowed=0
[06:43:53] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:43:53] [PASSED] drm_test_connector_hdmi_init_null_ddc
[06:43:53] [PASSED] drm_test_connector_hdmi_init_null_product
[06:43:53] [PASSED] drm_test_connector_hdmi_init_null_vendor
[06:43:53] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[06:43:53] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[06:43:53] [PASSED] drm_test_connector_hdmi_init_product_valid
[06:43:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[06:43:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[06:43:53] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[06:43:53] ========= drm_test_connector_hdmi_init_type_valid  =========
[06:43:53] [PASSED] HDMI-A
[06:43:53] [PASSED] HDMI-B
[06:43:53] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[06:43:53] ======== drm_test_connector_hdmi_init_type_invalid  ========
[06:43:53] [PASSED] Unknown
[06:43:53] [PASSED] VGA
[06:43:53] [PASSED] DVI-I
[06:43:53] [PASSED] DVI-D
[06:43:53] [PASSED] DVI-A
[06:43:53] [PASSED] Composite
[06:43:53] [PASSED] SVIDEO
[06:43:53] [PASSED] LVDS
[06:43:53] [PASSED] Component
[06:43:53] [PASSED] DIN
[06:43:53] [PASSED] DP
[06:43:53] [PASSED] TV
[06:43:53] [PASSED] eDP
[06:43:53] [PASSED] Virtual
[06:43:53] [PASSED] DSI
[06:43:53] [PASSED] DPI
[06:43:53] [PASSED] Writeback
[06:43:53] [PASSED] SPI
[06:43:53] [PASSED] USB
[06:43:53] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[06:43:53] ============ [PASSED] drmm_connector_hdmi_init =============
[06:43:53] ============= drmm_connector_init (3 subtests) =============
[06:43:53] [PASSED] drm_test_drmm_connector_init
[06:43:53] [PASSED] drm_test_drmm_connector_init_null_ddc
[06:43:53] ========= drm_test_drmm_connector_init_type_valid  =========
[06:43:53] [PASSED] Unknown
[06:43:53] [PASSED] VGA
[06:43:53] [PASSED] DVI-I
[06:43:53] [PASSED] DVI-D
[06:43:53] [PASSED] DVI-A
[06:43:53] [PASSED] Composite
[06:43:53] [PASSED] SVIDEO
[06:43:53] [PASSED] LVDS
[06:43:53] [PASSED] Component
[06:43:53] [PASSED] DIN
[06:43:53] [PASSED] DP
[06:43:53] [PASSED] HDMI-A
[06:43:53] [PASSED] HDMI-B
[06:43:53] [PASSED] TV
[06:43:53] [PASSED] eDP
[06:43:53] [PASSED] Virtual
[06:43:53] [PASSED] DSI
[06:43:53] [PASSED] DPI
[06:43:53] [PASSED] Writeback
[06:43:53] [PASSED] SPI
[06:43:53] [PASSED] USB
[06:43:53] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[06:43:53] =============== [PASSED] drmm_connector_init ===============
[06:43:53] ========= drm_connector_dynamic_init (6 subtests) ==========
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_init
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_init_properties
[06:43:53] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[06:43:53] [PASSED] Unknown
[06:43:53] [PASSED] VGA
[06:43:53] [PASSED] DVI-I
[06:43:53] [PASSED] DVI-D
[06:43:53] [PASSED] DVI-A
[06:43:53] [PASSED] Composite
[06:43:53] [PASSED] SVIDEO
[06:43:53] [PASSED] LVDS
[06:43:53] [PASSED] Component
[06:43:53] [PASSED] DIN
[06:43:53] [PASSED] DP
[06:43:53] [PASSED] HDMI-A
[06:43:53] [PASSED] HDMI-B
[06:43:53] [PASSED] TV
[06:43:53] [PASSED] eDP
[06:43:53] [PASSED] Virtual
[06:43:53] [PASSED] DSI
[06:43:53] [PASSED] DPI
[06:43:53] [PASSED] Writeback
[06:43:53] [PASSED] SPI
[06:43:53] [PASSED] USB
[06:43:53] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[06:43:53] ======== drm_test_drm_connector_dynamic_init_name  =========
[06:43:53] [PASSED] Unknown
[06:43:53] [PASSED] VGA
[06:43:53] [PASSED] DVI-I
[06:43:53] [PASSED] DVI-D
[06:43:53] [PASSED] DVI-A
[06:43:53] [PASSED] Composite
[06:43:53] [PASSED] SVIDEO
[06:43:53] [PASSED] LVDS
[06:43:53] [PASSED] Component
[06:43:53] [PASSED] DIN
[06:43:53] [PASSED] DP
[06:43:53] [PASSED] HDMI-A
[06:43:53] [PASSED] HDMI-B
[06:43:53] [PASSED] TV
[06:43:53] [PASSED] eDP
[06:43:53] [PASSED] Virtual
[06:43:53] [PASSED] DSI
[06:43:53] [PASSED] DPI
[06:43:53] [PASSED] Writeback
[06:43:53] [PASSED] SPI
[06:43:53] [PASSED] USB
[06:43:53] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[06:43:53] =========== [PASSED] drm_connector_dynamic_init ============
[06:43:53] ==== drm_connector_dynamic_register_early (4 subtests) =====
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[06:43:53] ====== [PASSED] drm_connector_dynamic_register_early =======
[06:43:53] ======= drm_connector_dynamic_register (7 subtests) ========
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[06:43:53] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[06:43:53] ========= [PASSED] drm_connector_dynamic_register ==========
[06:43:53] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[06:43:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[06:43:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[06:43:53] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[06:43:53] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[06:43:53] ========== drm_test_get_tv_mode_from_name_valid  ===========
[06:43:53] [PASSED] NTSC
[06:43:53] [PASSED] NTSC-443
[06:43:53] [PASSED] NTSC-J
[06:43:53] [PASSED] PAL
[06:43:53] [PASSED] PAL-M
[06:43:53] [PASSED] PAL-N
[06:43:53] [PASSED] SECAM
[06:43:53] [PASSED] Mono
[06:43:53] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[06:43:53] [PASSED] drm_test_get_tv_mode_from_name_truncated
[06:43:53] ============ [PASSED] drm_get_tv_mode_from_name ============
[06:43:53] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[06:43:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[06:43:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[06:43:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[06:43:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[06:43:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[06:43:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[06:43:53] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[06:43:53] [PASSED] VIC 96
[06:43:53] [PASSED] VIC 97
[06:43:53] [PASSED] VIC 101
[06:43:53] [PASSED] VIC 102
[06:43:53] [PASSED] VIC 106
[06:43:53] [PASSED] VIC 107
[06:43:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[06:43:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[06:43:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[06:43:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[06:43:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[06:43:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[06:43:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[06:43:53] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[06:43:53] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[06:43:53] [PASSED] Automatic
[06:43:53] [PASSED] Full
[06:43:53] [PASSED] Limited 16:235
[06:43:53] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[06:43:53] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[06:43:53] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[06:43:53] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[06:43:53] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[06:43:53] [PASSED] RGB
[06:43:53] [PASSED] YUV 4:2:0
[06:43:53] [PASSED] YUV 4:2:2
[06:43:53] [PASSED] YUV 4:4:4
[06:43:53] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[06:43:53] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[06:43:53] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[06:43:53] ============= drm_damage_helper (21 subtests) ==============
[06:43:53] [PASSED] drm_test_damage_iter_no_damage
[06:43:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[06:43:53] [PASSED] drm_test_damage_iter_no_damage_src_moved
[06:43:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[06:43:53] [PASSED] drm_test_damage_iter_no_damage_not_visible
[06:43:53] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[06:43:53] [PASSED] drm_test_damage_iter_no_damage_no_fb
[06:43:53] [PASSED] drm_test_damage_iter_simple_damage
[06:43:53] [PASSED] drm_test_damage_iter_single_damage
[06:43:53] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[06:43:53] [PASSED] drm_test_damage_iter_single_damage_outside_src
[06:43:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[06:43:53] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[06:43:53] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[06:43:53] [PASSED] drm_test_damage_iter_single_damage_src_moved
[06:43:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[06:43:53] [PASSED] drm_test_damage_iter_damage
[06:43:53] [PASSED] drm_test_damage_iter_damage_one_intersect
[06:43:53] [PASSED] drm_test_damage_iter_damage_one_outside
[06:43:53] [PASSED] drm_test_damage_iter_damage_src_moved
[06:43:53] [PASSED] drm_test_damage_iter_damage_not_visible
[06:43:53] ================ [PASSED] drm_damage_helper ================
[06:43:53] ============== drm_dp_mst_helper (3 subtests) ==============
[06:43:53] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[06:43:53] [PASSED] Clock 154000 BPP 30 DSC disabled
[06:43:53] [PASSED] Clock 234000 BPP 30 DSC disabled
[06:43:53] [PASSED] Clock 297000 BPP 24 DSC disabled
[06:43:53] [PASSED] Clock 332880 BPP 24 DSC enabled
[06:43:53] [PASSED] Clock 324540 BPP 24 DSC enabled
[06:43:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[06:43:53] ============== drm_test_dp_mst_calc_pbn_div  ===============
[06:43:53] [PASSED] Link rate 2000000 lane count 4
[06:43:53] [PASSED] Link rate 2000000 lane count 2
[06:43:53] [PASSED] Link rate 2000000 lane count 1
[06:43:53] [PASSED] Link rate 1350000 lane count 4
[06:43:53] [PASSED] Link rate 1350000 lane count 2
[06:43:53] [PASSED] Link rate 1350000 lane count 1
[06:43:53] [PASSED] Link rate 1000000 lane count 4
[06:43:53] [PASSED] Link rate 1000000 lane count 2
[06:43:53] [PASSED] Link rate 1000000 lane count 1
[06:43:53] [PASSED] Link rate 810000 lane count 4
[06:43:53] [PASSED] Link rate 810000 lane count 2
[06:43:53] [PASSED] Link rate 810000 lane count 1
[06:43:53] [PASSED] Link rate 540000 lane count 4
[06:43:53] [PASSED] Link rate 540000 lane count 2
[06:43:53] [PASSED] Link rate 540000 lane count 1
[06:43:53] [PASSED] Link rate 270000 lane count 4
[06:43:53] [PASSED] Link rate 270000 lane count 2
[06:43:53] [PASSED] Link rate 270000 lane count 1
[06:43:53] [PASSED] Link rate 162000 lane count 4
[06:43:53] [PASSED] Link rate 162000 lane count 2
[06:43:53] [PASSED] Link rate 162000 lane count 1
[06:43:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[06:43:53] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[06:43:53] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[06:43:53] [PASSED] DP_POWER_UP_PHY with port number
[06:43:53] [PASSED] DP_POWER_DOWN_PHY with port number
[06:43:53] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[06:43:53] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[06:43:53] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[06:43:53] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[06:43:53] [PASSED] DP_QUERY_PAYLOAD with port number
[06:43:53] [PASSED] DP_QUERY_PAYLOAD with VCPI
[06:43:53] [PASSED] DP_REMOTE_DPCD_READ with port number
[06:43:53] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[06:43:53] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[06:43:53] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[06:43:53] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[06:43:53] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[06:43:53] [PASSED] DP_REMOTE_I2C_READ with port number
[06:43:53] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[06:43:53] [PASSED] DP_REMOTE_I2C_READ with transactions array
[06:43:53] [PASSED] DP_REMOTE_I2C_WRITE with port number
[06:43:53] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[06:43:53] [PASSED] DP_REMOTE_I2C_WRITE with data array
[06:43:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[06:43:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[06:43:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[06:43:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[06:43:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[06:43:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[06:43:53] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[06:43:53] ================ [PASSED] drm_dp_mst_helper ================
[06:43:53] ================== drm_exec (7 subtests) ===================
[06:43:53] [PASSED] sanitycheck
[06:43:53] [PASSED] test_lock
[06:43:53] [PASSED] test_lock_unlock
[06:43:53] [PASSED] test_duplicates
[06:43:53] [PASSED] test_prepare
[06:43:53] [PASSED] test_prepare_array
[06:43:53] [PASSED] test_multiple_loops
[06:43:53] ==================== [PASSED] drm_exec =====================
[06:43:53] =========== drm_format_helper_test (17 subtests) ===========
[06:43:53] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[06:43:53] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[06:43:53] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[06:43:53] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[06:43:53] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[06:43:53] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[06:43:53] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[06:43:53] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[06:43:53] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[06:43:53] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[06:43:53] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[06:43:53] ============== drm_test_fb_xrgb8888_to_mono  ===============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[06:43:53] ==================== drm_test_fb_swab  =====================
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ================ [PASSED] drm_test_fb_swab =================
[06:43:53] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[06:43:53] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[06:43:53] [PASSED] single_pixel_source_buffer
[06:43:53] [PASSED] single_pixel_clip_rectangle
[06:43:53] [PASSED] well_known_colors
[06:43:53] [PASSED] destination_pitch
[06:43:53] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[06:43:53] ================= drm_test_fb_clip_offset  =================
[06:43:53] [PASSED] pass through
[06:43:53] [PASSED] horizontal offset
[06:43:53] [PASSED] vertical offset
[06:43:53] [PASSED] horizontal and vertical offset
[06:43:53] [PASSED] horizontal offset (custom pitch)
[06:43:53] [PASSED] vertical offset (custom pitch)
[06:43:53] [PASSED] horizontal and vertical offset (custom pitch)
[06:43:53] ============= [PASSED] drm_test_fb_clip_offset =============
[06:43:53] =================== drm_test_fb_memcpy  ====================
[06:43:53] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[06:43:53] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[06:43:53] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[06:43:53] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[06:43:53] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[06:43:53] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[06:43:53] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[06:43:53] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[06:43:53] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[06:43:53] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[06:43:53] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[06:43:53] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[06:43:53] =============== [PASSED] drm_test_fb_memcpy ================
[06:43:53] ============= [PASSED] drm_format_helper_test ==============
[06:43:53] ================= drm_format (18 subtests) =================
[06:43:53] [PASSED] drm_test_format_block_width_invalid
[06:43:53] [PASSED] drm_test_format_block_width_one_plane
[06:43:53] [PASSED] drm_test_format_block_width_two_plane
[06:43:53] [PASSED] drm_test_format_block_width_three_plane
[06:43:53] [PASSED] drm_test_format_block_width_tiled
[06:43:53] [PASSED] drm_test_format_block_height_invalid
[06:43:53] [PASSED] drm_test_format_block_height_one_plane
[06:43:53] [PASSED] drm_test_format_block_height_two_plane
[06:43:53] [PASSED] drm_test_format_block_height_three_plane
[06:43:53] [PASSED] drm_test_format_block_height_tiled
[06:43:53] [PASSED] drm_test_format_min_pitch_invalid
[06:43:53] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[06:43:53] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[06:43:53] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[06:43:53] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[06:43:53] [PASSED] drm_test_format_min_pitch_two_plane
[06:43:53] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[06:43:53] [PASSED] drm_test_format_min_pitch_tiled
[06:43:53] =================== [PASSED] drm_format ====================
[06:43:53] ============== drm_framebuffer (10 subtests) ===============
[06:43:53] ========== drm_test_framebuffer_check_src_coords  ==========
[06:43:53] [PASSED] Success: source fits into fb
[06:43:53] [PASSED] Fail: overflowing fb with x-axis coordinate
[06:43:53] [PASSED] Fail: overflowing fb with y-axis coordinate
[06:43:53] [PASSED] Fail: overflowing fb with source width
[06:43:53] [PASSED] Fail: overflowing fb with source height
[06:43:53] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[06:43:53] [PASSED] drm_test_framebuffer_cleanup
[06:43:53] =============== drm_test_framebuffer_create  ===============
[06:43:53] [PASSED] ABGR8888 normal sizes
[06:43:53] [PASSED] ABGR8888 max sizes
[06:43:53] [PASSED] ABGR8888 pitch greater than min required
[06:43:53] [PASSED] ABGR8888 pitch less than min required
[06:43:53] [PASSED] ABGR8888 Invalid width
[06:43:53] [PASSED] ABGR8888 Invalid buffer handle
[06:43:53] [PASSED] No pixel format
[06:43:53] [PASSED] ABGR8888 Width 0
[06:43:53] [PASSED] ABGR8888 Height 0
[06:43:53] [PASSED] ABGR8888 Out of bound height * pitch combination
[06:43:53] [PASSED] ABGR8888 Large buffer offset
[06:43:53] [PASSED] ABGR8888 Buffer offset for inexistent plane
[06:43:53] [PASSED] ABGR8888 Invalid flag
[06:43:53] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[06:43:53] [PASSED] ABGR8888 Valid buffer modifier
[06:43:53] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[06:43:53] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[06:43:53] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[06:43:53] [PASSED] NV12 Normal sizes
[06:43:53] [PASSED] NV12 Max sizes
[06:43:53] [PASSED] NV12 Invalid pitch
[06:43:53] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[06:43:53] [PASSED] NV12 different  modifier per-plane
[06:43:53] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[06:43:53] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[06:43:53] [PASSED] NV12 Modifier for inexistent plane
[06:43:53] [PASSED] NV12 Handle for inexistent plane
[06:43:53] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[06:43:53] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[06:43:53] [PASSED] YVU420 Normal sizes
[06:43:53] [PASSED] YVU420 Max sizes
[06:43:53] [PASSED] YVU420 Invalid pitch
[06:43:53] [PASSED] YVU420 Different pitches
[06:43:53] [PASSED] YVU420 Different buffer offsets/pitches
[06:43:53] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[06:43:53] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[06:43:53] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[06:43:53] [PASSED] YVU420 Valid modifier
[06:43:53] [PASSED] YVU420 Different modifiers per plane
[06:43:53] [PASSED] YVU420 Modifier for inexistent plane
[06:43:53] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[06:43:53] [PASSED] X0L2 Normal sizes
[06:43:53] [PASSED] X0L2 Max sizes
[06:43:53] [PASSED] X0L2 Invalid pitch
[06:43:53] [PASSED] X0L2 Pitch greater than minimum required
[06:43:53] [PASSED] X0L2 Handle for inexistent plane
[06:43:53] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[06:43:53] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[06:43:53] [PASSED] X0L2 Valid modifier
[06:43:53] [PASSED] X0L2 Modifier for inexistent plane
[06:43:53] =========== [PASSED] drm_test_framebuffer_create ===========
[06:43:53] [PASSED] drm_test_framebuffer_free
[06:43:53] [PASSED] drm_test_framebuffer_init
[06:43:53] [PASSED] drm_test_framebuffer_init_bad_format
[06:43:53] [PASSED] drm_test_framebuffer_init_dev_mismatch
[06:43:53] [PASSED] drm_test_framebuffer_lookup
[06:43:53] [PASSED] drm_test_framebuffer_lookup_inexistent
[06:43:53] [PASSED] drm_test_framebuffer_modifiers_not_supported
[06:43:53] ================= [PASSED] drm_framebuffer =================
[06:43:53] ================ drm_gem_shmem (8 subtests) ================
[06:43:53] [PASSED] drm_gem_shmem_test_obj_create
[06:43:53] [PASSED] drm_gem_shmem_test_obj_create_private
[06:43:53] [PASSED] drm_gem_shmem_test_pin_pages
[06:43:53] [PASSED] drm_gem_shmem_test_vmap
[06:43:53] [PASSED] drm_gem_shmem_test_get_sg_table
[06:43:53] [PASSED] drm_gem_shmem_test_get_pages_sgt
[06:43:53] [PASSED] drm_gem_shmem_test_madvise
[06:43:53] [PASSED] drm_gem_shmem_test_purge
[06:43:53] ================== [PASSED] drm_gem_shmem ==================
[06:43:53] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[06:43:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[06:43:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[06:43:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[06:43:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[06:43:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[06:43:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[06:43:53] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[06:43:53] [PASSED] Automatic
[06:43:53] [PASSED] Full
[06:43:53] [PASSED] Limited 16:235
[06:43:53] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[06:43:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[06:43:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[06:43:53] [PASSED] drm_test_check_disable_connector
[06:43:53] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[06:43:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[06:43:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[06:43:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[06:43:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[06:43:53] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[06:43:53] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[06:43:53] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[06:43:53] [PASSED] drm_test_check_output_bpc_dvi
[06:43:53] [PASSED] drm_test_check_output_bpc_format_vic_1
[06:43:53] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[06:43:53] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[06:43:53] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[06:43:53] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[06:43:53] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[06:43:53] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[06:43:53] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[06:43:53] ============ drm_test_check_hdmi_color_format  =============
[06:43:53] [PASSED] AUTO -> RGB
[06:43:53] [PASSED] YCBCR422 -> YUV422
[06:43:53] [PASSED] YCBCR420 -> YUV420
[06:43:53] [PASSED] YCBCR444 -> YUV444
[06:43:53] [PASSED] RGB -> RGB
[06:43:53] ======== [PASSED] drm_test_check_hdmi_color_format =========
[06:43:53] ======== drm_test_check_hdmi_color_format_420_only  ========
[06:43:53] [PASSED] RGB should fail
[06:43:53] [PASSED] YUV444 should fail
[06:43:53] [PASSED] YUV422 should fail
[06:43:53] [PASSED] YUV420 should work
[06:43:53] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[06:43:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[06:43:53] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[06:43:53] [PASSED] drm_test_check_broadcast_rgb_value
[06:43:53] [PASSED] drm_test_check_bpc_8_value
[06:43:53] [PASSED] drm_test_check_bpc_10_value
[06:43:53] [PASSED] drm_test_check_bpc_12_value
[06:43:53] [PASSED] drm_test_check_format_value
[06:43:53] [PASSED] drm_test_check_tmds_char_value
[06:43:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[06:43:53] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[06:43:53] [PASSED] drm_test_check_mode_valid
[06:43:53] [PASSED] drm_test_check_mode_valid_reject
[06:43:53] [PASSED] drm_test_check_mode_valid_reject_rate
[06:43:53] [PASSED] drm_test_check_mode_valid_reject_max_clock
[06:43:53] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[06:43:53] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[06:43:53] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[06:43:53] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[06:43:53] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[06:43:53] [PASSED] drm_test_check_infoframes
[06:43:53] [PASSED] drm_test_check_reject_avi_infoframe
[06:43:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[06:43:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[06:43:53] [PASSED] drm_test_check_reject_audio_infoframe
[06:43:53] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[06:43:53] ================= drm_managed (2 subtests) =================
[06:43:53] [PASSED] drm_test_managed_release_action
[06:43:53] [PASSED] drm_test_managed_run_action
[06:43:53] =================== [PASSED] drm_managed ===================
[06:43:53] =================== drm_mm (6 subtests) ====================
[06:43:53] [PASSED] drm_test_mm_init
[06:43:53] [PASSED] drm_test_mm_debug
[06:43:53] [PASSED] drm_test_mm_align32
[06:43:53] [PASSED] drm_test_mm_align64
[06:43:53] [PASSED] drm_test_mm_lowest
[06:43:53] [PASSED] drm_test_mm_highest
[06:43:53] ===================== [PASSED] drm_mm ======================
[06:43:53] ============= drm_modes_analog_tv (5 subtests) =============
[06:43:53] [PASSED] drm_test_modes_analog_tv_mono_576i
[06:43:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[06:43:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[06:43:53] [PASSED] drm_test_modes_analog_tv_pal_576i
[06:43:53] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[06:43:53] =============== [PASSED] drm_modes_analog_tv ===============
[06:43:53] ============== drm_plane_helper (2 subtests) ===============
[06:43:53] =============== drm_test_check_plane_state  ================
[06:43:53] [PASSED] clipping_simple
[06:43:53] [PASSED] clipping_rotate_reflect
[06:43:53] [PASSED] positioning_simple
[06:43:53] [PASSED] upscaling
[06:43:53] [PASSED] downscaling
[06:43:53] [PASSED] rounding1
[06:43:53] [PASSED] rounding2
[06:43:53] [PASSED] rounding3
[06:43:53] [PASSED] rounding4
[06:43:53] =========== [PASSED] drm_test_check_plane_state ============
[06:43:53] =========== drm_test_check_invalid_plane_state  ============
[06:43:53] [PASSED] positioning_invalid
[06:43:53] [PASSED] upscaling_invalid
[06:43:53] [PASSED] downscaling_invalid
[06:43:53] ======= [PASSED] drm_test_check_invalid_plane_state ========
[06:43:53] ================ [PASSED] drm_plane_helper =================
[06:43:53] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[06:43:53] ====== drm_test_connector_helper_tv_get_modes_check  =======
[06:43:53] [PASSED] None
[06:43:53] [PASSED] PAL
[06:43:53] [PASSED] NTSC
[06:43:53] [PASSED] Both, NTSC Default
[06:43:53] [PASSED] Both, PAL Default
[06:43:53] [PASSED] Both, NTSC Default, with PAL on command-line
[06:43:53] [PASSED] Both, PAL Default, with NTSC on command-line
[06:43:53] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[06:43:53] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[06:43:53] ================== drm_rect (9 subtests) ===================
[06:43:53] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[06:43:53] [PASSED] drm_test_rect_clip_scaled_not_clipped
[06:43:53] [PASSED] drm_test_rect_clip_scaled_clipped
[06:43:53] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[06:43:53] ================= drm_test_rect_intersect  =================
[06:43:53] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[06:43:53] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[06:43:53] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[06:43:53] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[06:43:53] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[06:43:53] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[06:43:53] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[06:43:53] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[06:43:53] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[06:43:53] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[06:43:53] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[06:43:53] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[06:43:53] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[06:43:53] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[06:43:53] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[06:43:53] ============= [PASSED] drm_test_rect_intersect =============
[06:43:53] ================ drm_test_rect_calc_hscale  ================
[06:43:53] [PASSED] normal use
[06:43:53] [PASSED] out of max range
[06:43:53] [PASSED] out of min range
[06:43:53] [PASSED] zero dst
[06:43:53] [PASSED] negative src
[06:43:53] [PASSED] negative dst
[06:43:53] ============ [PASSED] drm_test_rect_calc_hscale ============
[06:43:53] ================ drm_test_rect_calc_vscale  ================
[06:43:53] [PASSED] normal use
[06:43:53] [PASSED] out of max range
[06:43:53] [PASSED] out of min range
[06:43:53] [PASSED] zero dst
[06:43:53] [PASSED] negative src
[06:43:53] [PASSED] negative dst
[06:43:53] ============ [PASSED] drm_test_rect_calc_vscale ============
[06:43:53] ================== drm_test_rect_rotate  ===================
[06:43:53] [PASSED] reflect-x
[06:43:53] [PASSED] reflect-y
[06:43:53] [PASSED] rotate-0
[06:43:53] [PASSED] rotate-90
[06:43:53] [PASSED] rotate-180
[06:43:53] [PASSED] rotate-270
[06:43:53] ============== [PASSED] drm_test_rect_rotate ===============
[06:43:53] ================ drm_test_rect_rotate_inv  =================
[06:43:53] [PASSED] reflect-x
[06:43:53] [PASSED] reflect-y
[06:43:53] [PASSED] rotate-0
[06:43:53] [PASSED] rotate-90
[06:43:53] [PASSED] rotate-180
[06:43:53] [PASSED] rotate-270
[06:43:53] ============ [PASSED] drm_test_rect_rotate_inv =============
[06:43:53] ==================== [PASSED] drm_rect =====================
[06:43:53] ============ drm_sysfb_modeset_test (1 subtest) ============
[06:43:53] ============ drm_test_sysfb_build_fourcc_list  =============
[06:43:53] [PASSED] no native formats
[06:43:53] [PASSED] XRGB8888 as native format
[06:43:53] [PASSED] remove duplicates
[06:43:53] [PASSED] convert alpha formats
[06:43:53] [PASSED] random formats
[06:43:53] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[06:43:53] ============= [PASSED] drm_sysfb_modeset_test ==============
[06:43:53] ================== drm_fixp (2 subtests) ===================
[06:43:53] [PASSED] drm_test_int2fixp
[06:43:53] [PASSED] drm_test_sm2fixp
[06:43:53] ==================== [PASSED] drm_fixp =====================
[06:43:53] ============================================================
[06:43:53] Testing complete. Ran 637 tests: passed: 637
[06:43:53] Elapsed time: 27.196s total, 1.832s configuring, 25.198s building, 0.154s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[06:43:53] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:43:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:44:05] Starting KUnit Kernel (1/1)...
[06:44:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:44:05] ================= ttm_device (5 subtests) ==================
[06:44:05] [PASSED] ttm_device_init_basic
[06:44:05] [PASSED] ttm_device_init_multiple
[06:44:05] [PASSED] ttm_device_fini_basic
[06:44:05] [PASSED] ttm_device_init_no_vma_man
[06:44:05] ================== ttm_device_init_pools  ==================
[06:44:05] [PASSED] No DMA allocations, no DMA32 required
[06:44:05] [PASSED] DMA allocations, DMA32 required
[06:44:05] [PASSED] No DMA allocations, DMA32 required
[06:44:05] [PASSED] DMA allocations, no DMA32 required
[06:44:05] ============== [PASSED] ttm_device_init_pools ==============
[06:44:05] =================== [PASSED] ttm_device ====================
[06:44:05] ================== ttm_pool (8 subtests) ===================
[06:44:05] ================== ttm_pool_alloc_basic  ===================
[06:44:05] [PASSED] One page
[06:44:05] [PASSED] More than one page
[06:44:05] [PASSED] Above the allocation limit
[06:44:05] [PASSED] One page, with coherent DMA mappings enabled
[06:44:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:44:05] ============== [PASSED] ttm_pool_alloc_basic ===============
[06:44:05] ============== ttm_pool_alloc_basic_dma_addr  ==============
[06:44:05] [PASSED] One page
[06:44:05] [PASSED] More than one page
[06:44:05] [PASSED] Above the allocation limit
[06:44:05] [PASSED] One page, with coherent DMA mappings enabled
[06:44:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:44:05] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[06:44:05] [PASSED] ttm_pool_alloc_order_caching_match
[06:44:05] [PASSED] ttm_pool_alloc_caching_mismatch
[06:44:05] [PASSED] ttm_pool_alloc_order_mismatch
[06:44:05] [PASSED] ttm_pool_free_dma_alloc
[06:44:05] [PASSED] ttm_pool_free_no_dma_alloc
[06:44:05] [PASSED] ttm_pool_fini_basic
[06:44:05] ==================== [PASSED] ttm_pool =====================
[06:44:05] ================ ttm_resource (8 subtests) =================
[06:44:05] ================= ttm_resource_init_basic  =================
[06:44:05] [PASSED] Init resource in TTM_PL_SYSTEM
[06:44:05] [PASSED] Init resource in TTM_PL_VRAM
[06:44:05] [PASSED] Init resource in a private placement
[06:44:05] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[06:44:05] ============= [PASSED] ttm_resource_init_basic =============
[06:44:05] [PASSED] ttm_resource_init_pinned
[06:44:05] [PASSED] ttm_resource_fini_basic
[06:44:05] [PASSED] ttm_resource_manager_init_basic
[06:44:05] [PASSED] ttm_resource_manager_usage_basic
[06:44:05] [PASSED] ttm_resource_manager_set_used_basic
[06:44:05] [PASSED] ttm_sys_man_alloc_basic
[06:44:05] [PASSED] ttm_sys_man_free_basic
[06:44:05] ================== [PASSED] ttm_resource ===================
[06:44:05] =================== ttm_tt (15 subtests) ===================
[06:44:05] ==================== ttm_tt_init_basic  ====================
[06:44:05] [PASSED] Page-aligned size
[06:44:05] [PASSED] Extra pages requested
[06:44:05] ================ [PASSED] ttm_tt_init_basic ================
[06:44:05] [PASSED] ttm_tt_init_misaligned
[06:44:05] [PASSED] ttm_tt_fini_basic
[06:44:05] [PASSED] ttm_tt_fini_sg
[06:44:05] [PASSED] ttm_tt_fini_shmem
[06:44:05] [PASSED] ttm_tt_create_basic
[06:44:05] [PASSED] ttm_tt_create_invalid_bo_type
[06:44:05] [PASSED] ttm_tt_create_ttm_exists
[06:44:05] [PASSED] ttm_tt_create_failed
[06:44:05] [PASSED] ttm_tt_destroy_basic
[06:44:05] [PASSED] ttm_tt_populate_null_ttm
[06:44:05] [PASSED] ttm_tt_populate_populated_ttm
[06:44:05] [PASSED] ttm_tt_unpopulate_basic
[06:44:05] [PASSED] ttm_tt_unpopulate_empty_ttm
[06:44:05] [PASSED] ttm_tt_swapin_basic
[06:44:05] ===================== [PASSED] ttm_tt ======================
[06:44:05] =================== ttm_bo (14 subtests) ===================
[06:44:05] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[06:44:05] [PASSED] Cannot be interrupted and sleeps
[06:44:05] [PASSED] Cannot be interrupted, locks straight away
[06:44:05] [PASSED] Can be interrupted, sleeps
[06:44:05] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[06:44:05] [PASSED] ttm_bo_reserve_locked_no_sleep
[06:44:05] [PASSED] ttm_bo_reserve_no_wait_ticket
[06:44:05] [PASSED] ttm_bo_reserve_double_resv
[06:44:05] [PASSED] ttm_bo_reserve_interrupted
[06:44:05] [PASSED] ttm_bo_reserve_deadlock
[06:44:05] [PASSED] ttm_bo_unreserve_basic
[06:44:05] [PASSED] ttm_bo_unreserve_pinned
[06:44:05] [PASSED] ttm_bo_unreserve_bulk
[06:44:05] [PASSED] ttm_bo_fini_basic
[06:44:05] [PASSED] ttm_bo_fini_shared_resv
[06:44:05] [PASSED] ttm_bo_pin_basic
[06:44:05] [PASSED] ttm_bo_pin_unpin_resource
[06:44:05] [PASSED] ttm_bo_multiple_pin_one_unpin
[06:44:05] ===================== [PASSED] ttm_bo ======================
[06:44:05] ============== ttm_bo_validate (22 subtests) ===============
[06:44:05] ============== ttm_bo_init_reserved_sys_man  ===============
[06:44:05] [PASSED] Buffer object for userspace
[06:44:05] [PASSED] Kernel buffer object
[06:44:05] [PASSED] Shared buffer object
[06:44:05] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[06:44:05] ============== ttm_bo_init_reserved_mock_man  ==============
[06:44:05] [PASSED] Buffer object for userspace
[06:44:05] [PASSED] Kernel buffer object
[06:44:05] [PASSED] Shared buffer object
[06:44:05] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[06:44:05] [PASSED] ttm_bo_init_reserved_resv
[06:44:05] ================== ttm_bo_validate_basic  ==================
[06:44:05] [PASSED] Buffer object for userspace
[06:44:05] [PASSED] Kernel buffer object
[06:44:05] [PASSED] Shared buffer object
[06:44:05] ============== [PASSED] ttm_bo_validate_basic ==============
[06:44:05] [PASSED] ttm_bo_validate_invalid_placement
[06:44:05] ============= ttm_bo_validate_same_placement  ==============
[06:44:05] [PASSED] System manager
[06:44:05] [PASSED] VRAM manager
[06:44:05] ========= [PASSED] ttm_bo_validate_same_placement ==========
[06:44:05] [PASSED] ttm_bo_validate_failed_alloc
[06:44:05] [PASSED] ttm_bo_validate_pinned
[06:44:05] [PASSED] ttm_bo_validate_busy_placement
[06:44:05] ================ ttm_bo_validate_multihop  =================
[06:44:05] [PASSED] Buffer object for userspace
[06:44:05] [PASSED] Kernel buffer object
[06:44:05] [PASSED] Shared buffer object
[06:44:05] ============ [PASSED] ttm_bo_validate_multihop =============
[06:44:05] ========== ttm_bo_validate_no_placement_signaled  ==========
[06:44:05] [PASSED] Buffer object in system domain, no page vector
[06:44:05] [PASSED] Buffer object in system domain with an existing page vector
[06:44:05] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[06:44:05] ======== ttm_bo_validate_no_placement_not_signaled  ========
[06:44:05] [PASSED] Buffer object for userspace
[06:44:05] [PASSED] Kernel buffer object
[06:44:05] [PASSED] Shared buffer object
[06:44:05] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[06:44:05] [PASSED] ttm_bo_validate_move_fence_signaled
[06:44:05] ========= ttm_bo_validate_move_fence_not_signaled  =========
[06:44:05] [PASSED] Waits for GPU
[06:44:05] [PASSED] Tries to lock straight away
[06:44:05] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[06:44:05] [PASSED] ttm_bo_validate_swapout
[06:44:05] [PASSED] ttm_bo_validate_happy_evict
[06:44:05] [PASSED] ttm_bo_validate_all_pinned_evict
[06:44:05] [PASSED] ttm_bo_validate_allowed_only_evict
[06:44:05] [PASSED] ttm_bo_validate_deleted_evict
[06:44:05] [PASSED] ttm_bo_validate_busy_domain_evict
[06:44:05] [PASSED] ttm_bo_validate_evict_gutting
[06:44:05] [PASSED] ttm_bo_validate_recrusive_evict
[06:44:05] ================= [PASSED] ttm_bo_validate =================
[06:44:05] ============================================================
[06:44:05] Testing complete. Ran 102 tests: passed: 102
[06:44:06] Elapsed time: 12.269s total, 1.826s configuring, 10.178s building, 0.225s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[06:44:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:44:07] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:44:16] Starting KUnit Kernel (1/1)...
[06:44:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:44:16] =============== dma-buf-fence (12 subtests) ================
[06:44:16] [PASSED] test_sanitycheck
[06:44:16] [PASSED] test_signaling
[06:44:16] [PASSED] test_add_callback
[06:44:16] [PASSED] test_late_add_callback
[06:44:16] [PASSED] test_rm_callback
[06:44:16] [PASSED] test_late_rm_callback
[06:44:16] [PASSED] test_status
[06:44:16] [PASSED] test_error
[06:44:16] [PASSED] test_wait
[06:44:16] [PASSED] test_wait_timeout
[06:44:16] [PASSED] test_stub
[06:44:16] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[06:44:16] ================== [PASSED] dma-buf-fence ==================
[06:44:16] ============ dma-buf-fence-chain (11 subtests) =============
[06:44:16] [PASSED] test_sanitycheck
[06:44:16] [PASSED] test_find_seqno
[06:44:16] [PASSED] test_find_signaled
[06:44:16] [PASSED] test_find_out_of_order
[06:44:21] [PASSED] test_find_gap
[06:44:21] [PASSED] test_find_race
[06:44:21] [PASSED] test_signal_forward
[06:44:21] [PASSED] test_signal_backward
[06:44:21] [PASSED] test_wait_forward
[06:44:21] [PASSED] test_wait_backward
[06:44:21] [PASSED] test_wait_random
[06:44:21] =============== [PASSED] dma-buf-fence-chain ===============
[06:44:21] ============ dma-buf-fence-unwrap (10 subtests) ============
[06:44:21] [PASSED] test_sanitycheck
[06:44:21] [PASSED] test_unwrap_array
[06:44:21] [PASSED] test_unwrap_chain
[06:44:21] [PASSED] test_unwrap_chain_array
[06:44:21] [PASSED] test_unwrap_merge
[06:44:21] [PASSED] test_unwrap_merge_duplicate
[06:44:21] [PASSED] test_unwrap_merge_seqno
[06:44:21] [PASSED] test_unwrap_merge_order
[06:44:21] [PASSED] test_unwrap_merge_complex
[06:44:21] [PASSED] test_unwrap_merge_complex_seqno
[06:44:21] ============== [PASSED] dma-buf-fence-unwrap ===============
[06:44:21] ================ dma-buf-resv (5 subtests) =================
[06:44:21] [PASSED] test_sanitycheck
[06:44:21] ===================== test_signaling  ======================
[06:44:21] [PASSED] kernel
[06:44:21] [PASSED] write
[06:44:21] [PASSED] read
[06:44:21] [PASSED] bookkeep
[06:44:21] ================= [PASSED] test_signaling ==================
[06:44:21] ====================== test_for_each  ======================
[06:44:21] [PASSED] kernel
[06:44:21] [PASSED] write
[06:44:21] [PASSED] read
[06:44:21] [PASSED] bookkeep
[06:44:21] ================== [PASSED] test_for_each ==================
[06:44:21] ================= test_for_each_unlocked  ==================
[06:44:21] [PASSED] kernel
[06:44:21] [PASSED] write
[06:44:21] [PASSED] read
[06:44:21] [PASSED] bookkeep
[06:44:21] ============= [PASSED] test_for_each_unlocked ==============
[06:44:21] ===================== test_get_fences  =====================
[06:44:21] [PASSED] kernel
[06:44:21] [PASSED] write
[06:44:21] [PASSED] read
[06:44:21] [PASSED] bookkeep
[06:44:21] ================= [PASSED] test_get_fences =================
[06:44:21] ================== [PASSED] dma-buf-resv ===================
[06:44:21] ============================================================
[06:44:21] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[06:44:21] Elapsed time: 15.770s total, 1.779s configuring, 8.670s building, 5.279s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Crescent Island PMT support (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 904 bytes --]

== Series Details ==

Series: Crescent Island PMT support (rev5)
URL   : https://patchwork.freedesktop.org/series/160717/
State : success

== Summary ==

CI Bug Log - changes from xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad_BAT -> xe-pw-160717v5_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_9071 -> IGT_9072
  * Linux: xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad -> xe-pw-160717v5

  IGT_9071: 9071
  IGT_9072: 9072
  xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad: 15e2ba2fb6d25c03d89519aec46f8d5be3e118ad
  xe-pw-160717v5: 160717v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/index.html

[-- Attachment #2: Type: text/html, Size: 1466 bytes --]

✗ Xe.CI.FULL: failure for Crescent Island PMT support (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 33247 bytes --]

== Series Details ==

Series: Crescent Island PMT support (rev5)
URL   : https://patchwork.freedesktop.org/series/160717/
State : failure

== Summary ==

CI Bug Log - changes from xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad_FULL -> xe-pw-160717v5_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-160717v5_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-160717v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-160717v5_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_pmu@fn-engine-activity-sched-if-idle:
    - shard-bmg:          [PASS][1] -> [SKIP][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-3/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@xe_pmu@fn-engine-activity-sched-if-idle.html

  
Known issues
------------

  Here are the changes found in xe-pw-160717v5_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2233])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-bmg:          [PASS][4] -> [FAIL][5] ([Intel XE#3718] / [Intel XE#6078])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
    - shard-lnl:          [PASS][6] -> [FAIL][7] ([Intel XE#3718] / [Intel XE#7265])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-lnl-5/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-lnl-8/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-edp-1:
    - shard-lnl:          [PASS][8] -> [FAIL][9] ([Intel XE#7265]) +1 other test fail
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-lnl-5/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-edp-1.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-lnl-8/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-edp-1.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3:
    - shard-bmg:          [PASS][10] -> [FAIL][11] ([Intel XE#6078]) +3 other tests fail
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3.html

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][12] ([Intel XE#6819] / [Intel XE#7912] / [Intel XE#8174])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-b-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][13] ([Intel XE#6819] / [Intel XE#8174])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-b-hdmi-a-3.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2327]) +2 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-4/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#1124]) +2 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#610] / [Intel XE#7387])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_bw@linear-tiling-2-displays-target-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#367]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-8/igt@kms_bw@linear-tiling-2-displays-target-1920x1080p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2887]) +10 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2652]) +8 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html

  * igt@kms_cdclk@plane-scaling:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2724] / [Intel XE#7449])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_cdclk@plane-scaling.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2325] / [Intel XE#7358]) +2 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-2/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2252]) +3 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-7/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html

  * igt@kms_content_protection@dp-mst-lic-type-0-hdcp14:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#6974])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_content_protection@dp-mst-lic-type-0-hdcp14.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][24] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2321] / [Intel XE#7355])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-64x21:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2320]) +2 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@kms_cursor_crc@cursor-sliding-64x21.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#8265])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#4156] / [Intel XE#7425])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-8/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_feature_discovery@display-4x:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#1138] / [Intel XE#7344])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-9/igt@kms_feature_discovery@display-4x.html

  * igt@kms_flip@2x-wf_vblank-ts-check:
    - shard-bmg:          NOTRUN -> [FAIL][30] ([Intel XE#6266]) +1 other test fail
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-1/igt@kms_flip@2x-wf_vblank-ts-check.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7178] / [Intel XE#7349]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#7178] / [Intel XE#7351])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2311]) +28 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#4141]) +11 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-move:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2313]) +34 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#7061]) +3 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-8/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#6901])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-1/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#6911] / [Intel XE#7378])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-4/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#6912] / [Intel XE#7375])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-2/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#8303]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#7283]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2393])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-4/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#5020] / [Intel XE#7348])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-6/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#8396]) +3 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-9/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html

  * igt@kms_pm_dc@dc3co-vpb-framegap:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#8395] / [Intel XE#8396]) +3 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_pm_dc@dc3co-vpb-framegap.html

  * igt@kms_pm_dc@dc5-dpms:
    - shard-lnl:          [PASS][47] -> [FAIL][48] ([Intel XE#8399])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-lnl-5/igt@kms_pm_dc@dc5-dpms.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-lnl-2/igt@kms_pm_dc@dc5-dpms.html

  * igt@kms_pm_dc@dc5-pageflip-negative:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#6927])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_pm_dc@dc5-pageflip-negative.html

  * igt@kms_pm_rpm@package-g7:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#6814] / [Intel XE#7428])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@kms_pm_rpm@package-g7.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#1489]) +6 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-4/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr@psr-sprite-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2234] / [Intel XE#2850]) +7 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@kms_psr@psr-sprite-plane-move.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#7795])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-4/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_sharpness_filter@filter-scaler-downscale:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#6503]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-1/igt@kms_sharpness_filter@filter-scaler-downscale.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#1499]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-8/igt@kms_vrr@flip-suspend.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][56] ([Intel XE#6321] / [Intel XE#8355])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-2/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-small-multi-queue-cm:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#8370])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@xe_evict@evict-small-multi-queue-cm.html

  * igt@xe_exec_basic@multigpu-once-null-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-8/igt@xe_exec_basic@multigpu-once-null-rebind.html

  * igt@xe_exec_fault_mode@twice-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#8374]) +5 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-1/igt@xe_exec_fault_mode@twice-multi-queue.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-basic:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#8364]) +14 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-5/igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-basic.html

  * igt@xe_exec_reset@multi-queue-cat-error:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#8369])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-9/igt@xe_exec_reset@multi-queue-cat-error.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#8378]) +4 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-9/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr.html

  * igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare:
    - shard-bmg:          [PASS][63] -> [ABORT][64] ([Intel XE#8007]) +2 other tests abort
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-10/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-5/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare.html

  * igt@xe_live_ktest@xe_eudebug:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#2833])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@xe_live_ktest@xe_eudebug.html

  * igt@xe_multigpu_svm@mgpu-coherency-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#6964])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-3/igt@xe_multigpu_svm@mgpu-coherency-prefetch.html

  * igt@xe_page_reclaim@binds-null-vma:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#7793]) +2 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-2/igt@xe_page_reclaim@binds-null-vma.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#2245] / [Intel XE#7590])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-6/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@xa-app-transient-media-off:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#7590]) +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-8/igt@xe_pat@xa-app-transient-media-off.html

  * igt@xe_peer2peer@read:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@xe_peer2peer@read.html

  * igt@xe_pm@d3cold-mocs:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#2284] / [Intel XE#7370]) +1 other test skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-8/igt@xe_pm@d3cold-mocs.html

  * igt@xe_pxp@pxp-stale-queue-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#4733] / [Intel XE#7417]) +2 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-9/igt@xe_pxp@pxp-stale-queue-post-suspend.html

  * igt@xe_query@multigpu-query-invalid-extension:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#944]) +2 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-1/igt@xe_query@multigpu-query-invalid-extension.html

  * igt@xe_sriov_vfio@bind-unbind-vfs@numvfs-16:
    - shard-bmg:          [PASS][74] -> [FAIL][75] ([Intel XE#7992]) +24 other tests fail
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-4/igt@xe_sriov_vfio@bind-unbind-vfs@numvfs-16.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@xe_sriov_vfio@bind-unbind-vfs@numvfs-16.html

  
#### Possible fixes ####

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][76] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][77] +1 other test pass
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [FAIL][78] ([Intel XE#301]) -> [PASS][79]
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [FAIL][80] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][81] +2 other tests pass
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip@modeset-vs-vblank-race-interruptible:
    - shard-bmg:          [FAIL][82] ([Intel XE#3098]) -> [PASS][83] +1 other test pass
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-2/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-4/igt@kms_flip@modeset-vs-vblank-race-interruptible.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-bmg:          [SKIP][84] ([Intel XE#7308]) -> [PASS][85]
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-10/igt@kms_hdmi_inject@inject-audio.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-5/igt@kms_hdmi_inject@inject-audio.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [ABORT][86] ([Intel XE#8007]) -> [PASS][87]
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-5/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_sriov_flr@flr-vfs-parallel:
    - shard-bmg:          [FAIL][88] ([Intel XE#6569]) -> [PASS][89]
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-5/igt@xe_sriov_flr@flr-vfs-parallel.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-10/igt@xe_sriov_flr@flr-vfs-parallel.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-lnl:          [SKIP][90] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][91] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-lnl:          [FAIL][92] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][93] ([Intel XE#301])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][94] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][95] ([Intel XE#3544])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][96] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][97] ([Intel XE#2426] / [Intel XE#5848])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814
  [Intel XE#6819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6819
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6927
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7265
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7344]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7344
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7375
  [Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
  [Intel XE#7428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7428
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7795]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7795
  [Intel XE#7912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7912
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8174
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_9071 -> IGT_9072
  * Linux: xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad -> xe-pw-160717v5

  IGT_9071: 9071
  IGT_9072: 9072
  xe-5642-15e2ba2fb6d25c03d89519aec46f8d5be3e118ad: 15e2ba2fb6d25c03d89519aec46f8d5be3e118ad
  xe-pw-160717v5: 160717v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160717v5/index.html

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