KVM-RISCV Archive on lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH V4 0/6] Add riscv tests to cover the base extension specs
@ 2024-03-13 21:50 cem
  2024-03-13 21:50 ` [PATCH V4 1/6] riscv: Add a wrapper to call sbi_ecall for base extension cem
                   ` (6 more replies)
  0 siblings, 7 replies; 18+ messages in thread
From: cem @ 2024-03-13 21:50 UTC (permalink / raw)
  To: kvm-riscv

From: Carlos Maiolino <cem@kernel.org>

Hi,

This is a new (V4) version of this series to create tests to cover functions
of the riscv's SBI base implementation spec. The series also includes a
a few helpers to reduce code duplication.

This new version includes updates related to Drew reviews, and rebasing of
the patches according to the changes. 
This new series has also been rebased on TOT, didn't affect the patches,
but worth the heads up.

Patches tagged with V4 needed modifications from the previous version.

Detailed updates are specified on a patch-basis


Carlos Maiolino (6):
  riscv: Add a wrapper to call sbi_ecall for base extension
  riscv: Add test to probe SBI Extension
  riscv: Factor out environment variable check and report generation
  riscv: Implement test for architecture ID register
  riscv: Enable gen_report() to print the wrong value in case of failure
  riscv: Test for specific SBI implementation ID

 riscv/sbi.c | 81 +++++++++++++++++++++++++++++++++++++++++++++--------
 1 file changed, 69 insertions(+), 12 deletions(-)

-- 
2.44.0



^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 1/6] riscv: Add a wrapper to call sbi_ecall for base extension
  2024-03-13 21:50 [PATCH V4 0/6] Add riscv tests to cover the base extension specs cem
@ 2024-03-13 21:50 ` cem
  2024-03-13 21:50 ` [PATCH V4 2/6] riscv: Add test to probe SBI Extension cem
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 18+ messages in thread
From: cem @ 2024-03-13 21:50 UTC (permalink / raw)
  To: kvm-riscv

From: Carlos Maiolino <cem@kernel.org>

All SBI extension functions accepts at most one argument, so create a
wrapper around sbi_ecall() to avoid needing to pass in arguments 1 to 5
all the time, also, the wrapper can specify SBI_EXT_BASE directly.

Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

---
V4:
	- Remove stray blank line
V3:
	- Move to the beginning of the series
	- Don't mark __base_sbi_ecall() as inline
V2:
	- This patch was introduced in V2

 riscv/sbi.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/riscv/sbi.c b/riscv/sbi.c
index ffb07a25..76b72a80 100644
--- a/riscv/sbi.c
+++ b/riscv/sbi.c
@@ -14,6 +14,11 @@ static void help(void)
 	puts("An environ must be provided where expected values are given.\n");
 }
 
+static struct sbiret __base_sbi_ecall(int fid, unsigned long arg0)
+{
+	return sbi_ecall(SBI_EXT_BASE, fid, arg0, 0, 0, 0, 0, 0);
+}
+
 int main(int argc, char **argv)
 {
 	struct sbiret ret;
@@ -32,7 +37,7 @@ int main(int argc, char **argv)
 	}
 	expected = strtol(getenv("MVENDORID"), NULL, 0);
 
-	ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_MVENDORID, 0, 0, 0, 0, 0, 0);
+	ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MVENDORID, 0);
 	report(!ret.error, "mvendorid: no error");
 	report(ret.value == expected, "mvendorid");
 
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH V4 2/6] riscv: Add test to probe SBI Extension
  2024-03-13 21:50 [PATCH V4 0/6] Add riscv tests to cover the base extension specs cem
  2024-03-13 21:50 ` [PATCH V4 1/6] riscv: Add a wrapper to call sbi_ecall for base extension cem
@ 2024-03-13 21:50 ` cem
  2024-03-14  7:09   ` Andrew Jones
  2024-03-13 21:50 ` [PATCH V4 3/6] riscv: Factor out environment variable check and report generation cem
                   ` (4 subsequent siblings)
  6 siblings, 1 reply; 18+ messages in thread
From: cem @ 2024-03-13 21:50 UTC (permalink / raw)
  To: kvm-riscv

From: Carlos Maiolino <cem@kernel.org>

Factor out vendor id test to a new helper, and add a new test for
probing the SBI extension.
Compare the retrieved value against an environment variable, as the
implementation can return any non-zero value.

Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>

---
V4:
	- rebase on previous patch update (blank line removal)
	- Fix sbi_ecall to pass SBI_BASE_EXT as argument
V3:
	- Adapt patch to use __base_sbi_ecall

 riscv/sbi.c | 43 ++++++++++++++++++++++++++++++++-----------
 1 file changed, 32 insertions(+), 11 deletions(-)

diff --git a/riscv/sbi.c b/riscv/sbi.c
index 76b72a80..519c5a0c 100644
--- a/riscv/sbi.c
+++ b/riscv/sbi.c
@@ -19,28 +19,49 @@ static struct sbiret __base_sbi_ecall(int fid, unsigned long arg0)
 	return sbi_ecall(SBI_EXT_BASE, fid, arg0, 0, 0, 0, 0, 0);
 }
 
-int main(int argc, char **argv)
+static void check_base(void)
 {
 	struct sbiret ret;
 	long expected;
 
-	if (argc > 1 && !strcmp(argv[1], "-h")) {
-		help();
-		exit(0);
-	}
-
-	report_prefix_push("sbi");
+	report_prefix_push("base");
 
 	if (!getenv("MVENDORID")) {
 		report_skip("mvendorid: missing MVENDORID environment variable");
-		goto done;
+		return;
 	}
+
+	report_prefix_push("mvendorid");
 	expected = strtol(getenv("MVENDORID"), NULL, 0);
 
 	ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MVENDORID, 0);
-	report(!ret.error, "mvendorid: no error");
-	report(ret.value == expected, "mvendorid");
 
-done:
+	report(!ret.error, "no sbi.error");
+	report(ret.value == expected, "expected sbi.value");
+	report_prefix_pop();
+
+	report_prefix_push("probe_ext");
+	expected = getenv("PROBE_EXT") ? strtol(getenv("PROBE_EXT"), NULL, 0) : 1;
+
+	ret = __base_sbi_ecall(SBI_EXT_BASE_PROBE_EXT, SBI_EXT_BASE);
+
+	report(!ret.error, "no sbi.error");
+	report(ret.value == expected, "expected sbi.value");
+	report_prefix_pop();
+
+	report_prefix_pop();
+}
+
+int main(int argc, char **argv)
+{
+
+	if (argc > 1 && !strcmp(argv[1], "-h")) {
+		help();
+		exit(0);
+	}
+
+	report_prefix_push("sbi");
+	check_base();
+
 	return report_summary();
 }
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH V4 3/6] riscv: Factor out environment variable check and report generation
  2024-03-13 21:50 [PATCH V4 0/6] Add riscv tests to cover the base extension specs cem
  2024-03-13 21:50 ` [PATCH V4 1/6] riscv: Add a wrapper to call sbi_ecall for base extension cem
  2024-03-13 21:50 ` [PATCH V4 2/6] riscv: Add test to probe SBI Extension cem
@ 2024-03-13 21:50 ` cem
  2024-03-13 21:50 ` [PATCH 4/6] riscv: Implement test for architecture ID register cem
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 18+ messages in thread
From: cem @ 2024-03-13 21:50 UTC (permalink / raw)
  To: kvm-riscv

From: Carlos Maiolino <cem@kernel.org>

We do check Environment variables and generate reports all the time,
so use a couple of helpers for that

Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

---
V4:
	- Fix blank line
	- rebase on top of previous fix for probing extension
V3:
	- Adapt to use __base_sbi_ecall()

 riscv/sbi.c | 37 ++++++++++++++++++++++---------------
 1 file changed, 22 insertions(+), 15 deletions(-)

diff --git a/riscv/sbi.c b/riscv/sbi.c
index 519c5a0c..6be78dae 100644
--- a/riscv/sbi.c
+++ b/riscv/sbi.c
@@ -19,6 +19,22 @@ static struct sbiret __base_sbi_ecall(int fid, unsigned long arg0)
 	return sbi_ecall(SBI_EXT_BASE, fid, arg0, 0, 0, 0, 0, 0);
 }
 
+static bool env_or_skip(const char *env)
+{
+	if (!getenv(env)) {
+		report_skip("missing %s environment variable", env);
+		return false;
+	}
+
+	return true;
+}
+
+static void gen_report(struct sbiret *ret, long expected)
+{
+	report(!ret->error, "no sbi.error");
+	report(ret->value == expected, "expected sbi.value");
+}
+
 static void check_base(void)
 {
 	struct sbiret ret;
@@ -26,27 +42,18 @@ static void check_base(void)
 
 	report_prefix_push("base");
 
-	if (!getenv("MVENDORID")) {
-		report_skip("mvendorid: missing MVENDORID environment variable");
-		return;
-	}
-
 	report_prefix_push("mvendorid");
-	expected = strtol(getenv("MVENDORID"), NULL, 0);
-
-	ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MVENDORID, 0);
-
-	report(!ret.error, "no sbi.error");
-	report(ret.value == expected, "expected sbi.value");
+	if (env_or_skip("MVENDORID")) {
+		expected = strtol(getenv("MVENDORID"), NULL, 0);
+		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MVENDORID, 0);
+		gen_report(&ret, expected);
+	}
 	report_prefix_pop();
 
 	report_prefix_push("probe_ext");
 	expected = getenv("PROBE_EXT") ? strtol(getenv("PROBE_EXT"), NULL, 0) : 1;
-
 	ret = __base_sbi_ecall(SBI_EXT_BASE_PROBE_EXT, SBI_EXT_BASE);
-
-	report(!ret.error, "no sbi.error");
-	report(ret.value == expected, "expected sbi.value");
+	gen_report(&ret, expected);
 	report_prefix_pop();
 
 	report_prefix_pop();
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH 4/6] riscv: Implement test for architecture ID register
  2024-03-13 21:50 [PATCH V4 0/6] Add riscv tests to cover the base extension specs cem
                   ` (2 preceding siblings ...)
  2024-03-13 21:50 ` [PATCH V4 3/6] riscv: Factor out environment variable check and report generation cem
@ 2024-03-13 21:50 ` cem
  2024-03-13 21:50 ` [PATCH V4 5/6] riscv: Enable gen_report() to print the wrong value in case of failure cem
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 18+ messages in thread
From: cem @ 2024-03-13 21:50 UTC (permalink / raw)
  To: kvm-riscv

From: Carlos Maiolino <cem@kernel.org>

Probe the MARCHID register and compare it to the specified MARCHID
environment variable.

Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 riscv/sbi.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/riscv/sbi.c b/riscv/sbi.c
index 6be78dae..f33c19f4 100644
--- a/riscv/sbi.c
+++ b/riscv/sbi.c
@@ -56,6 +56,14 @@ static void check_base(void)
 	gen_report(&ret, expected);
 	report_prefix_pop();
 
+	report_prefix_push("marchid");
+	if (env_or_skip("MARCHID")) {
+		expected = strtol(getenv("MARCHID"), NULL, 0);
+		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MARCHID, 0);
+		gen_report(&ret, expected);
+	}
+	report_prefix_pop();
+
 	report_prefix_pop();
 }
 
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH V4 5/6] riscv: Enable gen_report() to print the wrong value in case of failure
  2024-03-13 21:50 [PATCH V4 0/6] Add riscv tests to cover the base extension specs cem
                   ` (3 preceding siblings ...)
  2024-03-13 21:50 ` [PATCH 4/6] riscv: Implement test for architecture ID register cem
@ 2024-03-13 21:50 ` cem
  2024-03-14  8:45   ` Andrew Jones
  2024-03-13 21:50 ` [PATCH V4 6/6] riscv: Test for specific SBI implementation ID cem
  2024-03-18 17:24 ` [PATCH V4 0/6] Add riscv tests to cover the base extension specs Andrew Jones
  6 siblings, 1 reply; 18+ messages in thread
From: cem @ 2024-03-13 21:50 UTC (permalink / raw)
  To: kvm-riscv

From: Carlos Maiolino <cem@kernel.org>

If the test fails because the expected value doesn't match, it's
useful to know what value was actually printed.

Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

---
V4:
	- Rebase on top of previous changes related to sbi probe extension

 riscv/sbi.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/riscv/sbi.c b/riscv/sbi.c
index f33c19f4..043beb04 100644
--- a/riscv/sbi.c
+++ b/riscv/sbi.c
@@ -29,10 +29,18 @@ static bool env_or_skip(const char *env)
 	return true;
 }
 
-static void gen_report(struct sbiret *ret, long expected)
+static void gen_report(struct sbiret *ret,
+		       long expected_error, long expected_value)
 {
-	report(!ret->error, "no sbi.error");
-	report(ret->value == expected, "expected sbi.value");
+	bool check_error = ret->error == expected_error;
+	bool check_value = ret->value == expected_value;
+
+	if (!check_error || !check_value)
+		report_info("expected (error: %ld, value: %ld), received: (error: %ld, value %ld)\n",
+			    expected_error, expected_value, ret->error, ret->value);
+
+	report(check_error, "expected sbi.error");
+	report(check_value, "expected sbi.value");
 }
 
 static void check_base(void)
@@ -46,21 +54,21 @@ static void check_base(void)
 	if (env_or_skip("MVENDORID")) {
 		expected = strtol(getenv("MVENDORID"), NULL, 0);
 		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MVENDORID, 0);
-		gen_report(&ret, expected);
+		gen_report(&ret, 0, expected);
 	}
 	report_prefix_pop();
 
 	report_prefix_push("probe_ext");
 	expected = getenv("PROBE_EXT") ? strtol(getenv("PROBE_EXT"), NULL, 0) : 1;
 	ret = __base_sbi_ecall(SBI_EXT_BASE_PROBE_EXT, SBI_EXT_BASE);
-	gen_report(&ret, expected);
+	gen_report(&ret, 0, expected);
 	report_prefix_pop();
 
 	report_prefix_push("marchid");
 	if (env_or_skip("MARCHID")) {
 		expected = strtol(getenv("MARCHID"), NULL, 0);
 		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MARCHID, 0);
-		gen_report(&ret, expected);
+		gen_report(&ret, 0, expected);
 	}
 	report_prefix_pop();
 
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH V4 6/6] riscv: Test for specific SBI implementation ID
  2024-03-13 21:50 [PATCH V4 0/6] Add riscv tests to cover the base extension specs cem
                   ` (4 preceding siblings ...)
  2024-03-13 21:50 ` [PATCH V4 5/6] riscv: Enable gen_report() to print the wrong value in case of failure cem
@ 2024-03-13 21:50 ` cem
  2024-03-14  7:13   ` Andrew Jones
  2024-03-14  8:46   ` Andrew Jones
  2024-03-18 17:24 ` [PATCH V4 0/6] Add riscv tests to cover the base extension specs Andrew Jones
  6 siblings, 2 replies; 18+ messages in thread
From: cem @ 2024-03-13 21:50 UTC (permalink / raw)
  To: kvm-riscv

From: Carlos Maiolino <cem@kernel.org>

Retrieve the ID from the SBI, and test it against the IMPL_ID
enviroment variable.

Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>

---
V4:
	- Definitely update to use __base_sbi_ecall
V3:
	- Update to use __base_sbi_ecall (also fixes the correct paramenters)
	- Rename env var to IMPL_ID to match the other tests
V2:
	- Update commit description to fit 70 chars
	- Move sbi_ecall() after expected assignment to make consistent with
	  other tests

 riscv/sbi.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/riscv/sbi.c b/riscv/sbi.c
index 043beb04..2a4002df 100644
--- a/riscv/sbi.c
+++ b/riscv/sbi.c
@@ -58,6 +58,14 @@ static void check_base(void)
 	}
 	report_prefix_pop();
 
+	report_prefix_push("impl_id");
+	if (env_or_skip("IMPL_ID")) {
+		expected = strtol(getenv("IMPL_ID"), NULL, 0);
+		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_IMP_ID, 0);
+		gen_report(&ret, 0, expected);
+	}
+	report_prefix_pop();
+
 	report_prefix_push("probe_ext");
 	expected = getenv("PROBE_EXT") ? strtol(getenv("PROBE_EXT"), NULL, 0) : 1;
 	ret = __base_sbi_ecall(SBI_EXT_BASE_PROBE_EXT, SBI_EXT_BASE);
-- 
2.44.0



^ permalink raw reply related	[flat|nested] 18+ messages in thread

* [PATCH V4 2/6] riscv: Add test to probe SBI Extension
  2024-03-13 21:50 ` [PATCH V4 2/6] riscv: Add test to probe SBI Extension cem
@ 2024-03-14  7:09   ` Andrew Jones
  0 siblings, 0 replies; 18+ messages in thread
From: Andrew Jones @ 2024-03-14  7:09 UTC (permalink / raw)
  To: kvm-riscv

On Wed, Mar 13, 2024 at 10:50:53PM +0100, cem at kernel.org wrote:
> From: Carlos Maiolino <cem@kernel.org>
> 
> Factor out vendor id test to a new helper, and add a new test for
> probing the SBI extension.
> Compare the retrieved value against an environment variable, as the
> implementation can return any non-zero value.
> 
> Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
> 
> ---
> V4:
> 	- rebase on previous patch update (blank line removal)
> 	- Fix sbi_ecall to pass SBI_BASE_EXT as argument
> V3:
> 	- Adapt patch to use __base_sbi_ecall
> 
>  riscv/sbi.c | 43 ++++++++++++++++++++++++++++++++-----------
>  1 file changed, 32 insertions(+), 11 deletions(-)
> 
> diff --git a/riscv/sbi.c b/riscv/sbi.c
> index 76b72a80..519c5a0c 100644
> --- a/riscv/sbi.c
> +++ b/riscv/sbi.c
> @@ -19,28 +19,49 @@ static struct sbiret __base_sbi_ecall(int fid, unsigned long arg0)
>  	return sbi_ecall(SBI_EXT_BASE, fid, arg0, 0, 0, 0, 0, 0);
>  }
>  
> -int main(int argc, char **argv)
> +static void check_base(void)
>  {
>  	struct sbiret ret;
>  	long expected;
>  
> -	if (argc > 1 && !strcmp(argv[1], "-h")) {
> -		help();
> -		exit(0);
> -	}
> -
> -	report_prefix_push("sbi");
> +	report_prefix_push("base");
>  
>  	if (!getenv("MVENDORID")) {
>  		report_skip("mvendorid: missing MVENDORID environment variable");
> -		goto done;
> +		return;
>  	}
> +
> +	report_prefix_push("mvendorid");
>  	expected = strtol(getenv("MVENDORID"), NULL, 0);
>  
>  	ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MVENDORID, 0);
> -	report(!ret.error, "mvendorid: no error");
> -	report(ret.value == expected, "mvendorid");
>  
> -done:
> +	report(!ret.error, "no sbi.error");
> +	report(ret.value == expected, "expected sbi.value");
> +	report_prefix_pop();
> +
> +	report_prefix_push("probe_ext");
> +	expected = getenv("PROBE_EXT") ? strtol(getenv("PROBE_EXT"), NULL, 0) : 1;
> +
> +	ret = __base_sbi_ecall(SBI_EXT_BASE_PROBE_EXT, SBI_EXT_BASE);
> +
> +	report(!ret.error, "no sbi.error");
> +	report(ret.value == expected, "expected sbi.value");
> +	report_prefix_pop();
> +
> +	report_prefix_pop();
> +}
> +
> +int main(int argc, char **argv)
> +{
> +
> +	if (argc > 1 && !strcmp(argv[1], "-h")) {
> +		help();
> +		exit(0);
> +	}
> +
> +	report_prefix_push("sbi");
> +	check_base();
> +
>  	return report_summary();
>  }
> -- 
> 2.44.0
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 6/6] riscv: Test for specific SBI implementation ID
  2024-03-13 21:50 ` [PATCH V4 6/6] riscv: Test for specific SBI implementation ID cem
@ 2024-03-14  7:13   ` Andrew Jones
  2024-03-14  8:46   ` Andrew Jones
  1 sibling, 0 replies; 18+ messages in thread
From: Andrew Jones @ 2024-03-14  7:13 UTC (permalink / raw)
  To: kvm-riscv

On Wed, Mar 13, 2024 at 10:50:57PM +0100, cem at kernel.org wrote:
> From: Carlos Maiolino <cem@kernel.org>
> 
> Retrieve the ID from the SBI, and test it against the IMPL_ID
> enviroment variable.
> 
> Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
> 
> ---
> V4:
> 	- Definitely update to use __base_sbi_ecall
> V3:
> 	- Update to use __base_sbi_ecall (also fixes the correct paramenters)
> 	- Rename env var to IMPL_ID to match the other tests
> V2:
> 	- Update commit description to fit 70 chars
> 	- Move sbi_ecall() after expected assignment to make consistent with
> 	  other tests
> 
>  riscv/sbi.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/riscv/sbi.c b/riscv/sbi.c
> index 043beb04..2a4002df 100644
> --- a/riscv/sbi.c
> +++ b/riscv/sbi.c
> @@ -58,6 +58,14 @@ static void check_base(void)
>  	}
>  	report_prefix_pop();
>  
> +	report_prefix_push("impl_id");
> +	if (env_or_skip("IMPL_ID")) {
> +		expected = strtol(getenv("IMPL_ID"), NULL, 0);
> +		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_IMP_ID, 0);
> +		gen_report(&ret, 0, expected);
> +	}
> +	report_prefix_pop();
> +
>  	report_prefix_push("probe_ext");
>  	expected = getenv("PROBE_EXT") ? strtol(getenv("PROBE_EXT"), NULL, 0) : 1;
>  	ret = __base_sbi_ecall(SBI_EXT_BASE_PROBE_EXT, SBI_EXT_BASE);
> -- 
> 2.44.0
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 5/6] riscv: Enable gen_report() to print the wrong value in case of failure
  2024-03-13 21:50 ` [PATCH V4 5/6] riscv: Enable gen_report() to print the wrong value in case of failure cem
@ 2024-03-14  8:45   ` Andrew Jones
  0 siblings, 0 replies; 18+ messages in thread
From: Andrew Jones @ 2024-03-14  8:45 UTC (permalink / raw)
  To: kvm-riscv

On Wed, Mar 13, 2024 at 10:50:56PM +0100, cem at kernel.org wrote:
> From: Carlos Maiolino <cem@kernel.org>
> 
> If the test fails because the expected value doesn't match, it's
> useful to know what value was actually printed.
> 
> Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> 
> ---
> V4:
> 	- Rebase on top of previous changes related to sbi probe extension
> 
>  riscv/sbi.c | 20 ++++++++++++++------
>  1 file changed, 14 insertions(+), 6 deletions(-)
> 
> diff --git a/riscv/sbi.c b/riscv/sbi.c
> index f33c19f4..043beb04 100644
> --- a/riscv/sbi.c
> +++ b/riscv/sbi.c
> @@ -29,10 +29,18 @@ static bool env_or_skip(const char *env)
>  	return true;
>  }
>  
> -static void gen_report(struct sbiret *ret, long expected)
> +static void gen_report(struct sbiret *ret,
> +		       long expected_error, long expected_value)
>  {
> -	report(!ret->error, "no sbi.error");
> -	report(ret->value == expected, "expected sbi.value");
> +	bool check_error = ret->error == expected_error;
> +	bool check_value = ret->value == expected_value;
> +
> +	if (!check_error || !check_value)
> +		report_info("expected (error: %ld, value: %ld), received: (error: %ld, value %ld)\n",

I dropped the '\n' while queuing this since report_info appends its own.

> +			    expected_error, expected_value, ret->error, ret->value);
> +
> +	report(check_error, "expected sbi.error");
> +	report(check_value, "expected sbi.value");
>  }
>  
>  static void check_base(void)
> @@ -46,21 +54,21 @@ static void check_base(void)
>  	if (env_or_skip("MVENDORID")) {
>  		expected = strtol(getenv("MVENDORID"), NULL, 0);
>  		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MVENDORID, 0);
> -		gen_report(&ret, expected);
> +		gen_report(&ret, 0, expected);
>  	}
>  	report_prefix_pop();
>  
>  	report_prefix_push("probe_ext");
>  	expected = getenv("PROBE_EXT") ? strtol(getenv("PROBE_EXT"), NULL, 0) : 1;
>  	ret = __base_sbi_ecall(SBI_EXT_BASE_PROBE_EXT, SBI_EXT_BASE);
> -	gen_report(&ret, expected);
> +	gen_report(&ret, 0, expected);
>  	report_prefix_pop();
>  
>  	report_prefix_push("marchid");
>  	if (env_or_skip("MARCHID")) {
>  		expected = strtol(getenv("MARCHID"), NULL, 0);
>  		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_MARCHID, 0);
> -		gen_report(&ret, expected);
> +		gen_report(&ret, 0, expected);
>  	}
>  	report_prefix_pop();
>  
> -- 
> 2.44.0
> 


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 6/6] riscv: Test for specific SBI implementation ID
  2024-03-13 21:50 ` [PATCH V4 6/6] riscv: Test for specific SBI implementation ID cem
  2024-03-14  7:13   ` Andrew Jones
@ 2024-03-14  8:46   ` Andrew Jones
  2024-03-14  8:59     ` Carlos Maiolino
  1 sibling, 1 reply; 18+ messages in thread
From: Andrew Jones @ 2024-03-14  8:46 UTC (permalink / raw)
  To: kvm-riscv

On Wed, Mar 13, 2024 at 10:50:57PM +0100, cem at kernel.org wrote:
> From: Carlos Maiolino <cem@kernel.org>
> 
> Retrieve the ID from the SBI, and test it against the IMPL_ID
> enviroment variable.
> 
> Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
> 
> ---
> V4:
> 	- Definitely update to use __base_sbi_ecall
> V3:
> 	- Update to use __base_sbi_ecall (also fixes the correct paramenters)
> 	- Rename env var to IMPL_ID to match the other tests
> V2:
> 	- Update commit description to fit 70 chars
> 	- Move sbi_ecall() after expected assignment to make consistent with
> 	  other tests
> 
>  riscv/sbi.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/riscv/sbi.c b/riscv/sbi.c
> index 043beb04..2a4002df 100644
> --- a/riscv/sbi.c
> +++ b/riscv/sbi.c
> @@ -58,6 +58,14 @@ static void check_base(void)
>  	}
>  	report_prefix_pop();
>  
> +	report_prefix_push("impl_id");
> +	if (env_or_skip("IMPL_ID")) {
> +		expected = strtol(getenv("IMPL_ID"), NULL, 0);
> +		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_IMP_ID, 0);
> +		gen_report(&ret, 0, expected);
> +	}
> +	report_prefix_pop();
> +
>  	report_prefix_push("probe_ext");
>  	expected = getenv("PROBE_EXT") ? strtol(getenv("PROBE_EXT"), NULL, 0) : 1;
>  	ret = __base_sbi_ecall(SBI_EXT_BASE_PROBE_EXT, SBI_EXT_BASE);
> -- 
> 2.44.0
>

I adjusted the order of the tests to match the function order in the spec
while queuing.



^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 6/6] riscv: Test for specific SBI implementation ID
  2024-03-14  8:46   ` Andrew Jones
@ 2024-03-14  8:59     ` Carlos Maiolino
  0 siblings, 0 replies; 18+ messages in thread
From: Carlos Maiolino @ 2024-03-14  8:59 UTC (permalink / raw)
  To: kvm-riscv

On Thu, Mar 14, 2024 at 09:46:02AM +0100, Andrew Jones wrote:
> On Wed, Mar 13, 2024 at 10:50:57PM +0100, cem at kernel.org wrote:
> > From: Carlos Maiolino <cem@kernel.org>
> >
> > Retrieve the ID from the SBI, and test it against the IMPL_ID
> > enviroment variable.
> >
> > Signed-off-by: Carlos Maiolino <cmaiolino@redhat.com>
> >
> > ---
> > V4:
> > 	- Definitely update to use __base_sbi_ecall
> > V3:
> > 	- Update to use __base_sbi_ecall (also fixes the correct paramenters)
> > 	- Rename env var to IMPL_ID to match the other tests
> > V2:
> > 	- Update commit description to fit 70 chars
> > 	- Move sbi_ecall() after expected assignment to make consistent with
> > 	  other tests
> >
> >  riscv/sbi.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/riscv/sbi.c b/riscv/sbi.c
> > index 043beb04..2a4002df 100644
> > --- a/riscv/sbi.c
> > +++ b/riscv/sbi.c
> > @@ -58,6 +58,14 @@ static void check_base(void)
> >  	}
> >  	report_prefix_pop();
> >
> > +	report_prefix_push("impl_id");
> > +	if (env_or_skip("IMPL_ID")) {
> > +		expected = strtol(getenv("IMPL_ID"), NULL, 0);
> > +		ret = __base_sbi_ecall(SBI_EXT_BASE_GET_IMP_ID, 0);
> > +		gen_report(&ret, 0, expected);
> > +	}
> > +	report_prefix_pop();
> > +
> >  	report_prefix_push("probe_ext");
> >  	expected = getenv("PROBE_EXT") ? strtol(getenv("PROBE_EXT"), NULL, 0) : 1;
> >  	ret = __base_sbi_ecall(SBI_EXT_BASE_PROBE_EXT, SBI_EXT_BASE);
> > --
> > 2.44.0
> >
> 
> I adjusted the order of the tests to match the function order in the spec
> while queuing.
> 

Sounds good, thanks!
Carlos


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 0/6] Add riscv tests to cover the base extension specs
  2024-03-13 21:50 [PATCH V4 0/6] Add riscv tests to cover the base extension specs cem
                   ` (5 preceding siblings ...)
  2024-03-13 21:50 ` [PATCH V4 6/6] riscv: Test for specific SBI implementation ID cem
@ 2024-03-18 17:24 ` Andrew Jones
  2024-03-18 17:27   ` Andrew Jones
  6 siblings, 1 reply; 18+ messages in thread
From: Andrew Jones @ 2024-03-18 17:24 UTC (permalink / raw)
  To: kvm-riscv

On Wed, Mar 13, 2024 at 10:50:51PM +0100, cem at kernel.org wrote:
> From: Carlos Maiolino <cem@kernel.org>
> 
> Hi,
> 
> This is a new (V4) version of this series to create tests to cover functions
> of the riscv's SBI base implementation spec. The series also includes a
> a few helpers to reduce code duplication.
> 
> This new version includes updates related to Drew reviews, and rebasing of
> the patches according to the changes. 
> This new series has also been rebased on TOT, didn't affect the patches,
> but worth the heads up.
> 
> Patches tagged with V4 needed modifications from the previous version.
> 
> Detailed updates are specified on a patch-basis
> 
> 
> Carlos Maiolino (6):
>   riscv: Add a wrapper to call sbi_ecall for base extension
>   riscv: Add test to probe SBI Extension
>   riscv: Factor out environment variable check and report generation
>   riscv: Implement test for architecture ID register
>   riscv: Enable gen_report() to print the wrong value in case of failure
>   riscv: Test for specific SBI implementation ID
> 
>  riscv/sbi.c | 81 +++++++++++++++++++++++++++++++++++++++++++++--------
>  1 file changed, 69 insertions(+), 12 deletions(-)
> 
> -- 
> 2.44.0
>

Merged to https://gitlab.com/kvm-unit-tests/kvm-unit-tests

Thanks,
drew


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 0/6] Add riscv tests to cover the base extension specs
  2024-03-18 17:24 ` [PATCH V4 0/6] Add riscv tests to cover the base extension specs Andrew Jones
@ 2024-03-18 17:27   ` Andrew Jones
  2024-03-18 18:39     ` Carlos Maiolino
  0 siblings, 1 reply; 18+ messages in thread
From: Andrew Jones @ 2024-03-18 17:27 UTC (permalink / raw)
  To: kvm-riscv

On Mon, Mar 18, 2024 at 06:24:09PM +0100, Andrew Jones wrote:
> On Wed, Mar 13, 2024 at 10:50:51PM +0100, cem at kernel.org wrote:
> > From: Carlos Maiolino <cem@kernel.org>
> > 
> > Hi,
> > 
> > This is a new (V4) version of this series to create tests to cover functions
> > of the riscv's SBI base implementation spec. The series also includes a
> > a few helpers to reduce code duplication.
> > 
> > This new version includes updates related to Drew reviews, and rebasing of
> > the patches according to the changes. 
> > This new series has also been rebased on TOT, didn't affect the patches,
> > but worth the heads up.
> > 
> > Patches tagged with V4 needed modifications from the previous version.
> > 
> > Detailed updates are specified on a patch-basis
> > 
> > 
> > Carlos Maiolino (6):
> >   riscv: Add a wrapper to call sbi_ecall for base extension
> >   riscv: Add test to probe SBI Extension
> >   riscv: Factor out environment variable check and report generation
> >   riscv: Implement test for architecture ID register
> >   riscv: Enable gen_report() to print the wrong value in case of failure
> >   riscv: Test for specific SBI implementation ID
> > 
> >  riscv/sbi.c | 81 +++++++++++++++++++++++++++++++++++++++++++++--------
> >  1 file changed, 69 insertions(+), 12 deletions(-)
> > 
> > -- 
> > 2.44.0
> >
> 
> Merged to https://gitlab.com/kvm-unit-tests/kvm-unit-tests

Hi Carlos,

I just realized you've forgotten to CC tech-prs on v3 and v4.

drew


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 0/6] Add riscv tests to cover the base extension specs
  2024-03-18 17:27   ` Andrew Jones
@ 2024-03-18 18:39     ` Carlos Maiolino
  2024-03-18 19:37       ` Atish Patra
  0 siblings, 1 reply; 18+ messages in thread
From: Carlos Maiolino @ 2024-03-18 18:39 UTC (permalink / raw)
  To: kvm-riscv

On Mon, Mar 18, 2024 at 06:27:03PM +0100, Andrew Jones wrote:
> On Mon, Mar 18, 2024 at 06:24:09PM +0100, Andrew Jones wrote:
> > On Wed, Mar 13, 2024 at 10:50:51PM +0100, cem at kernel.org wrote:
> > > From: Carlos Maiolino <cem@kernel.org>
> > >
> > > Hi,
> > >
> > > This is a new (V4) version of this series to create tests to cover functions
> > > of the riscv's SBI base implementation spec. The series also includes a
> > > a few helpers to reduce code duplication.
> > >
> > > This new version includes updates related to Drew reviews, and rebasing of
> > > the patches according to the changes.
> > > This new series has also been rebased on TOT, didn't affect the patches,
> > > but worth the heads up.
> > >
> > > Patches tagged with V4 needed modifications from the previous version.
> > >
> > > Detailed updates are specified on a patch-basis
> > >
> > >
> > > Carlos Maiolino (6):
> > >   riscv: Add a wrapper to call sbi_ecall for base extension
> > >   riscv: Add test to probe SBI Extension
> > >   riscv: Factor out environment variable check and report generation
> > >   riscv: Implement test for architecture ID register
> > >   riscv: Enable gen_report() to print the wrong value in case of failure
> > >   riscv: Test for specific SBI implementation ID
> > >
> > >  riscv/sbi.c | 81 +++++++++++++++++++++++++++++++++++++++++++++--------
> > >  1 file changed, 69 insertions(+), 12 deletions(-)
> > >
> > > --
> > > 2.44.0
> > >
> >
> > Merged to https://gitlab.com/kvm-unit-tests/kvm-unit-tests
> 
> Hi Carlos,
> 
> I just realized you've forgotten to CC tech-prs on v3 and v4.

I actually didn't CC them on purpose. The list seems to only accept incoming emails from registered
users, so all previous attempts I got a bunch of delivery failure messages, so I thought it was
pointless to CC them. I should get myself registered there, but I didn't have time so far to figure
it out. 

Carlos.

> 
> drew


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 0/6] Add riscv tests to cover the base extension specs
  2024-03-18 18:39     ` Carlos Maiolino
@ 2024-03-18 19:37       ` Atish Patra
  2024-03-19  7:38         ` Andrew Jones
  2024-03-20  8:16         ` Carlos Maiolino
  0 siblings, 2 replies; 18+ messages in thread
From: Atish Patra @ 2024-03-18 19:37 UTC (permalink / raw)
  To: kvm-riscv

On Mon, Mar 18, 2024 at 11:39?AM Carlos Maiolino <cem@kernel.org> wrote:
>
> On Mon, Mar 18, 2024 at 06:27:03PM +0100, Andrew Jones wrote:
> > On Mon, Mar 18, 2024 at 06:24:09PM +0100, Andrew Jones wrote:
> > > On Wed, Mar 13, 2024 at 10:50:51PM +0100, cem at kernel.org wrote:
> > > > From: Carlos Maiolino <cem@kernel.org>
> > > >
> > > > Hi,
> > > >
> > > > This is a new (V4) version of this series to create tests to cover functions
> > > > of the riscv's SBI base implementation spec. The series also includes a
> > > > a few helpers to reduce code duplication.
> > > >
> > > > This new version includes updates related to Drew reviews, and rebasing of
> > > > the patches according to the changes.
> > > > This new series has also been rebased on TOT, didn't affect the patches,
> > > > but worth the heads up.
> > > >
> > > > Patches tagged with V4 needed modifications from the previous version.
> > > >
> > > > Detailed updates are specified on a patch-basis
> > > >
> > > >
> > > > Carlos Maiolino (6):
> > > >   riscv: Add a wrapper to call sbi_ecall for base extension
> > > >   riscv: Add test to probe SBI Extension
> > > >   riscv: Factor out environment variable check and report generation
> > > >   riscv: Implement test for architecture ID register
> > > >   riscv: Enable gen_report() to print the wrong value in case of failure
> > > >   riscv: Test for specific SBI implementation ID
> > > >
> > > >  riscv/sbi.c | 81 +++++++++++++++++++++++++++++++++++++++++++++--------
> > > >  1 file changed, 69 insertions(+), 12 deletions(-)
> > > >
> > > > --
> > > > 2.44.0
> > > >
> > >
> > > Merged to https://gitlab.com/kvm-unit-tests/kvm-unit-tests
> >
> > Hi Carlos,
> >
> > I just realized you've forgotten to CC tech-prs on v3 and v4.
>
> I actually didn't CC them on purpose. The list seems to only accept incoming emails from registered
> users, so all previous attempts I got a bunch of delivery failure messages, so I thought it was
> pointless to CC them. I should get myself registered there, but I didn't have time so far to figure
> it out.
>
Here are the details.
https://lists.riscv.org/g/tech-prs

IIRC, you also need to be an individual member or employee of a RVI
member company to subscribe to PRS.

@Andrew Jones : I don't think it is possible for every contributor for
kvm-unit-tests to be a member of RVI
and subscribe to PRS.

Maybe we should just send periodic updates ? I am not sure if there is
a better way to do cross-posting.

> Carlos.
>
> >
> > drew
>
> --
> kvm-riscv mailing list
> kvm-riscv at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv



-- 
Regards,
Atish


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 0/6] Add riscv tests to cover the base extension specs
  2024-03-18 19:37       ` Atish Patra
@ 2024-03-19  7:38         ` Andrew Jones
  2024-03-20  8:16         ` Carlos Maiolino
  1 sibling, 0 replies; 18+ messages in thread
From: Andrew Jones @ 2024-03-19  7:38 UTC (permalink / raw)
  To: kvm-riscv

On Mon, Mar 18, 2024 at 12:37:46PM -0700, Atish Patra wrote:
> On Mon, Mar 18, 2024 at 11:39?AM Carlos Maiolino <cem@kernel.org> wrote:
> >
> > On Mon, Mar 18, 2024 at 06:27:03PM +0100, Andrew Jones wrote:
> > > On Mon, Mar 18, 2024 at 06:24:09PM +0100, Andrew Jones wrote:
> > > > On Wed, Mar 13, 2024 at 10:50:51PM +0100, cem at kernel.org wrote:
> > > > > From: Carlos Maiolino <cem@kernel.org>
> > > > >
> > > > > Hi,
> > > > >
> > > > > This is a new (V4) version of this series to create tests to cover functions
> > > > > of the riscv's SBI base implementation spec. The series also includes a
> > > > > a few helpers to reduce code duplication.
> > > > >
> > > > > This new version includes updates related to Drew reviews, and rebasing of
> > > > > the patches according to the changes.
> > > > > This new series has also been rebased on TOT, didn't affect the patches,
> > > > > but worth the heads up.
> > > > >
> > > > > Patches tagged with V4 needed modifications from the previous version.
> > > > >
> > > > > Detailed updates are specified on a patch-basis
> > > > >
> > > > >
> > > > > Carlos Maiolino (6):
> > > > >   riscv: Add a wrapper to call sbi_ecall for base extension
> > > > >   riscv: Add test to probe SBI Extension
> > > > >   riscv: Factor out environment variable check and report generation
> > > > >   riscv: Implement test for architecture ID register
> > > > >   riscv: Enable gen_report() to print the wrong value in case of failure
> > > > >   riscv: Test for specific SBI implementation ID
> > > > >
> > > > >  riscv/sbi.c | 81 +++++++++++++++++++++++++++++++++++++++++++++--------
> > > > >  1 file changed, 69 insertions(+), 12 deletions(-)
> > > > >
> > > > > --
> > > > > 2.44.0
> > > > >
> > > >
> > > > Merged to https://gitlab.com/kvm-unit-tests/kvm-unit-tests
> > >
> > > Hi Carlos,
> > >
> > > I just realized you've forgotten to CC tech-prs on v3 and v4.
> >
> > I actually didn't CC them on purpose. The list seems to only accept incoming emails from registered
> > users, so all previous attempts I got a bunch of delivery failure messages, so I thought it was
> > pointless to CC them. I should get myself registered there, but I didn't have time so far to figure
> > it out.
> >
> Here are the details.
> https://lists.riscv.org/g/tech-prs
> 
> IIRC, you also need to be an individual member or employee of a RVI
> member company to subscribe to PRS.
> 
> @Andrew Jones : I don't think it is possible for every contributor for
> kvm-unit-tests to be a member of RVI
> and subscribe to PRS.
> 
> Maybe we should just send periodic updates ?

Periodic updates sounds good to me.

Thanks,
drew

> I am not sure if there is
> a better way to do cross-posting.
> 
> > Carlos.
> >
> > >
> > > drew
> >
> > --
> > kvm-riscv mailing list
> > kvm-riscv at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/kvm-riscv
> 
> 
> 
> -- 
> Regards,
> Atish


^ permalink raw reply	[flat|nested] 18+ messages in thread

* [PATCH V4 0/6] Add riscv tests to cover the base extension specs
  2024-03-18 19:37       ` Atish Patra
  2024-03-19  7:38         ` Andrew Jones
@ 2024-03-20  8:16         ` Carlos Maiolino
  1 sibling, 0 replies; 18+ messages in thread
From: Carlos Maiolino @ 2024-03-20  8:16 UTC (permalink / raw)
  To: kvm-riscv

On Mon, Mar 18, 2024 at 12:37:46PM -0700, Atish Patra wrote:
> On Mon, Mar 18, 2024 at 11:39?AM Carlos Maiolino <cem@kernel.org> wrote:
> >
> > On Mon, Mar 18, 2024 at 06:27:03PM +0100, Andrew Jones wrote:
> > > On Mon, Mar 18, 2024 at 06:24:09PM +0100, Andrew Jones wrote:
> > > > On Wed, Mar 13, 2024 at 10:50:51PM +0100, cem at kernel.org wrote:
> > > > > From: Carlos Maiolino <cem@kernel.org>
> > > > >
> > > > > Hi,
> > > > >
> > > > > This is a new (V4) version of this series to create tests to cover functions
> > > > > of the riscv's SBI base implementation spec. The series also includes a
> > > > > a few helpers to reduce code duplication.
> > > > >
> > > > > This new version includes updates related to Drew reviews, and rebasing of
> > > > > the patches according to the changes.
> > > > > This new series has also been rebased on TOT, didn't affect the patches,
> > > > > but worth the heads up.
> > > > >
> > > > > Patches tagged with V4 needed modifications from the previous version.
> > > > >
> > > > > Detailed updates are specified on a patch-basis
> > > > >
> > > > >
> > > > > Carlos Maiolino (6):
> > > > >   riscv: Add a wrapper to call sbi_ecall for base extension
> > > > >   riscv: Add test to probe SBI Extension
> > > > >   riscv: Factor out environment variable check and report generation
> > > > >   riscv: Implement test for architecture ID register
> > > > >   riscv: Enable gen_report() to print the wrong value in case of failure
> > > > >   riscv: Test for specific SBI implementation ID
> > > > >
> > > > >  riscv/sbi.c | 81 +++++++++++++++++++++++++++++++++++++++++++++--------
> > > > >  1 file changed, 69 insertions(+), 12 deletions(-)
> > > > >
> > > > > --
> > > > > 2.44.0
> > > > >
> > > >
> > > > Merged to https://gitlab.com/kvm-unit-tests/kvm-unit-tests
> > >
> > > Hi Carlos,
> > >
> > > I just realized you've forgotten to CC tech-prs on v3 and v4.
> >
> > I actually didn't CC them on purpose. The list seems to only accept incoming emails from registered
> > users, so all previous attempts I got a bunch of delivery failure messages, so I thought it was
> > pointless to CC them. I should get myself registered there, but I didn't have time so far to figure
> > it out.
> >
> Here are the details.
> https://lists.riscv.org/g/tech-prs

Thanks for the link, I'll look into that.

> 
> IIRC, you also need to be an individual member or employee of a RVI
> member company to subscribe to PRS.
> 
> @Andrew Jones : I don't think it is possible for every contributor for
> kvm-unit-tests to be a member of RVI
> and subscribe to PRS.
> 
> Maybe we should just send periodic updates ? I am not sure if there is
> a better way to do cross-posting.
> 
> > Carlos.
> >
> > >
> > > drew
> >
> > --
> > kvm-riscv mailing list
> > kvm-riscv at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/kvm-riscv
> 
> 
> 
> --
> Regards,
> Atish


^ permalink raw reply	[flat|nested] 18+ messages in thread

end of thread, other threads:[~2024-03-20  8:16 UTC | newest]

Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-03-13 21:50 [PATCH V4 0/6] Add riscv tests to cover the base extension specs cem
2024-03-13 21:50 ` [PATCH V4 1/6] riscv: Add a wrapper to call sbi_ecall for base extension cem
2024-03-13 21:50 ` [PATCH V4 2/6] riscv: Add test to probe SBI Extension cem
2024-03-14  7:09   ` Andrew Jones
2024-03-13 21:50 ` [PATCH V4 3/6] riscv: Factor out environment variable check and report generation cem
2024-03-13 21:50 ` [PATCH 4/6] riscv: Implement test for architecture ID register cem
2024-03-13 21:50 ` [PATCH V4 5/6] riscv: Enable gen_report() to print the wrong value in case of failure cem
2024-03-14  8:45   ` Andrew Jones
2024-03-13 21:50 ` [PATCH V4 6/6] riscv: Test for specific SBI implementation ID cem
2024-03-14  7:13   ` Andrew Jones
2024-03-14  8:46   ` Andrew Jones
2024-03-14  8:59     ` Carlos Maiolino
2024-03-18 17:24 ` [PATCH V4 0/6] Add riscv tests to cover the base extension specs Andrew Jones
2024-03-18 17:27   ` Andrew Jones
2024-03-18 18:39     ` Carlos Maiolino
2024-03-18 19:37       ` Atish Patra
2024-03-19  7:38         ` Andrew Jones
2024-03-20  8:16         ` Carlos Maiolino

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox