From: Magnus Kulke <magnuskulke@linux.microsoft.com>
To: qemu-devel@nongnu.org
Cc: kvm@vger.kernel.org, "Magnus Kulke" <magnuskulke@microsoft.com>,
"Wei Liu" <liuwe@microsoft.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Cédric Le Goater" <clg@redhat.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Wei Liu" <wei.liu@kernel.org>,
"Magnus Kulke" <magnuskulke@linux.microsoft.com>,
"Alex Williamson" <alex@shazbot.org>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Marcelo Tosatti" <mtosatti@redhat.com>
Subject: [PATCH 12/34] accel/mshv: reserve ioapic routes on s->irq_routes
Date: Fri, 17 Apr 2026 12:55:56 +0200 [thread overview]
Message-ID: <20260417105618.3621-13-magnuskulke@linux.microsoft.com> (raw)
In-Reply-To: <20260417105618.3621-1-magnuskulke@linux.microsoft.com>
We reserve 24 ioapic routes using the new functions that operate on the
mshv apic state.
commit/add_msi_routing() fn's can be removed now.
Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
---
accel/mshv/irq.c | 115 ++++++--------------------------------
accel/mshv/mshv-all.c | 5 --
include/system/mshv_int.h | 1 -
3 files changed, 18 insertions(+), 103 deletions(-)
diff --git a/accel/mshv/irq.c b/accel/mshv/irq.c
index 9ba837f0e2..52b8ac9479 100644
--- a/accel/mshv/irq.c
+++ b/accel/mshv/irq.c
@@ -36,93 +36,6 @@ void mshv_init_msicontrol(void)
msi_control->updated = false;
}
-static int add_msi_routing(uint64_t addr, uint32_t data)
-{
- struct mshv_user_irq_entry *route_entry;
- uint32_t high_addr = addr >> 32;
- uint32_t low_addr = addr & 0xFFFFFFFF;
- int gsi;
- GHashTable *gsi_routes;
-
- trace_mshv_add_msi_routing(addr, data);
-
- assert(msi_control);
-
- WITH_QEMU_LOCK_GUARD(&msi_control_mutex) {
- /* find an empty slot */
- gsi = 0;
- gsi_routes = msi_control->gsi_routes;
- while (gsi < MSHV_MAX_MSI_ROUTES) {
- route_entry = g_hash_table_lookup(gsi_routes, GINT_TO_POINTER(gsi));
- if (!route_entry) {
- break;
- }
- gsi++;
- }
- if (gsi >= MSHV_MAX_MSI_ROUTES) {
- error_report("No empty gsi slot available");
- return -1;
- }
-
- /* create new entry */
- route_entry = g_new0(struct mshv_user_irq_entry, 1);
- route_entry->gsi = gsi;
- route_entry->address_hi = high_addr;
- route_entry->address_lo = low_addr;
- route_entry->data = data;
-
- g_hash_table_insert(gsi_routes, GINT_TO_POINTER(gsi), route_entry);
- msi_control->updated = true;
- }
-
- return gsi;
-}
-
-static int commit_msi_routing_table(int vm_fd)
-{
- guint len;
- int i, ret;
- size_t table_size;
- struct mshv_user_irq_table *table;
- GHashTableIter iter;
- gpointer key, value;
-
- assert(msi_control);
-
- WITH_QEMU_LOCK_GUARD(&msi_control_mutex) {
- if (!msi_control->updated) {
- /* nothing to update */
- return 0;
- }
-
- /* Calculate the size of the table */
- len = g_hash_table_size(msi_control->gsi_routes);
- table_size = sizeof(struct mshv_user_irq_table)
- + len * sizeof(struct mshv_user_irq_entry);
- table = g_malloc0(table_size);
-
- g_hash_table_iter_init(&iter, msi_control->gsi_routes);
- i = 0;
- while (g_hash_table_iter_next(&iter, &key, &value)) {
- struct mshv_user_irq_entry *entry = value;
- table->entries[i] = *entry;
- i++;
- }
- table->nr = i;
-
- trace_mshv_commit_msi_routing_table(vm_fd, len);
-
- ret = ioctl(vm_fd, MSHV_SET_MSI_ROUTING, table);
- g_free(table);
- if (ret < 0) {
- error_report("Failed to commit msi routing table");
- return -1;
- }
- msi_control->updated = false;
- }
- return 0;
-}
-
/* Pass an eventfd which is to be used for injecting interrupts from userland */
static int irqfd(int vm_fd, int fd, int resample_fd, uint32_t gsi,
uint32_t flags)
@@ -420,37 +333,45 @@ int mshv_irqchip_remove_irqfd_notifier_gsi(const EventNotifier *event,
return irqchip_update_irqfd_notifier_gsi(event, NULL, virq, false);
}
-int mshv_reserve_ioapic_msi_routes(int vm_fd)
+static int mshv_reserve_ioapic_msi_routes(MshvState *s)
{
- int ret, gsi;
+ int ret, i;
+ int gsi = 0;
+ struct mshv_user_irq_entry blank_entry = { 0 };
/*
* Reserve GSI 0-23 for IOAPIC pins, to avoid conflicts of legacy
* peripherals with MSI-X devices
*/
- for (gsi = 0; gsi < IOAPIC_NUM_PINS; gsi++) {
- ret = add_msi_routing(0, 0);
+ for (i = 0; i < IOAPIC_NUM_PINS; i++) {
+ /* ret = add_msi_routing(0, 0); */
+ ret = irqchip_allocate_gsi(s, &gsi);
if (ret < 0) {
- error_report("Failed to reserve GSI %d", gsi);
+ error_report("Failed to reserve GSI %d: %s", gsi, strerror(-ret));
return -1;
}
+ blank_entry.gsi = gsi;
+ add_routing_entry(s, &blank_entry);
}
- ret = commit_msi_routing_table(vm_fd);
- if (ret < 0) {
- error_report("Failed to commit reserved IOAPIC MSI routes");
- return -1;
- }
+ mshv_irqchip_commit_routes(s);
return 0;
}
void mshv_init_irq_routing(MshvState *s)
{
+ int ret;
int gsi_count = MSHV_MAX_MSI_ROUTES;
s->irq_routes = g_malloc0(sizeof(*s->irq_routes));
s->nr_allocated_irq_routes = 0;
s->gsi_count = gsi_count;
s->used_gsi_bitmap = bitmap_new(gsi_count);
+
+ ret = mshv_reserve_ioapic_msi_routes(s);
+ if (ret < 0) {
+ error_report("Failed to reserve IOAPIC MSI routes");
+ abort();
+ }
}
diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c
index 8acb080db1..08bc26713f 100644
--- a/accel/mshv/mshv-all.c
+++ b/accel/mshv/mshv-all.c
@@ -200,11 +200,6 @@ static int create_vm(int mshv_fd, int *vm_fd)
return -1;
}
- ret = mshv_reserve_ioapic_msi_routes(*vm_fd);
- if (ret < 0) {
- return -1;
- }
-
ret = mshv_arch_post_init_vm(*vm_fd);
if (ret < 0) {
return -1;
diff --git a/include/system/mshv_int.h b/include/system/mshv_int.h
index 56fda76a9c..9bc56e70cf 100644
--- a/include/system/mshv_int.h
+++ b/include/system/mshv_int.h
@@ -120,6 +120,5 @@ int mshv_configure_msr(const CPUState *cpu, const MshvMsrEntry *msrs,
/* interrupt */
void mshv_init_msicontrol(void);
-int mshv_reserve_ioapic_msi_routes(int vm_fd);
#endif
--
2.34.1
next prev parent reply other threads:[~2026-04-17 10:57 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-17 10:55 [PATCH 00/34] Add migration support to the MSHV accelerator Magnus Kulke
2026-04-17 10:55 ` [PATCH 01/34] target/i386/mshv: use arch_load/store_reg fns Magnus Kulke
2026-04-17 10:55 ` [PATCH 02/34] target/i386/mshv: use generic FPU/xcr0 state Magnus Kulke
2026-04-17 10:55 ` [PATCH 03/34] target/i386/mshv: impl init/load/store_vcpu_state Magnus Kulke
2026-04-17 10:55 ` [PATCH 04/34] accel/accel-irq: add AccelRouteChange abstraction Magnus Kulke
2026-04-17 10:55 ` [PATCH 05/34] accel/accel-irq: add generic begin_route_changes Magnus Kulke
2026-04-17 10:55 ` [PATCH 06/34] accel/accel-irq: add generic commit_route_changes Magnus Kulke
2026-04-17 10:55 ` [PATCH 07/34] accel/mshv: add irq_routes to state Magnus Kulke
2026-04-17 10:55 ` [PATCH 08/34] accel/mshv: update s->irq_routes in add_msi_route Magnus Kulke
2026-04-17 10:55 ` [PATCH 09/34] accel/mshv: update s->irq_routes in update_msi_route Magnus Kulke
2026-04-17 10:55 ` [PATCH 10/34] accel/mshv: update s->irq_routes in release_virq Magnus Kulke
2026-04-17 10:55 ` [PATCH 11/34] accel/mshv: use s->irq_routes in commit_routes Magnus Kulke
2026-04-17 10:55 ` Magnus Kulke [this message]
2026-04-17 10:55 ` [PATCH 13/34] accel/mshv: remove redundant msi controller Magnus Kulke
2026-04-17 10:55 ` [PATCH 14/34] target/i386/mshv: move apic logic into own file Magnus Kulke
2026-04-17 10:55 ` [PATCH 15/34] target/i386/mshv: remove redundant apic helpers Magnus Kulke
2026-04-17 10:56 ` [PATCH 16/34] target/i386/mshv: migrate LAPIC state Magnus Kulke
2026-04-17 11:54 ` Mohamed Mediouni
2026-04-20 11:37 ` Magnus Kulke
2026-04-17 10:56 ` [PATCH 17/34] target/i386/mshv: move msr code to arch Magnus Kulke
2026-04-17 10:56 ` [PATCH 18/34] accel/mshv: store partition proc features Magnus Kulke
2026-04-17 10:56 ` [PATCH 19/34] target/i386/mshv: expose msvh_get_generic_regs Magnus Kulke
2026-04-17 10:56 ` [PATCH 20/34] target/i386/mshv: migrate MSRs Magnus Kulke
2026-04-17 10:56 ` [PATCH 21/34] target/i386/mshv: migrate MTRR MSRs Magnus Kulke
2026-04-17 10:56 ` [PATCH 22/34] target/i386/mshv: migrate Synic SINT MSRs Magnus Kulke
2026-04-17 10:56 ` [PATCH 23/34] target/i386/mshv: migrate CET/SS MSRs Magnus Kulke
2026-04-17 10:56 ` [PATCH 24/34] target/i386/mshv: migrate SIMP and SIEFP state Magnus Kulke
2026-04-17 10:56 ` [PATCH 25/34] target/i386/mshv: migrate STIMER state Magnus Kulke
2026-04-17 10:56 ` [PATCH 26/34] accel/mshv: introduce SaveVMHandler Magnus Kulke
2026-04-17 10:56 ` [PATCH 27/34] accel/mshv: write synthetic MSRs after migration Magnus Kulke
2026-04-17 10:56 ` [PATCH 28/34] accel/mshv: migrate REFERENCE_TIME Magnus Kulke
2026-04-17 10:56 ` [PATCH 29/34] target/i386/mshv: migrate pending ints/excs Magnus Kulke
2026-04-17 10:56 ` [PATCH 30/34] target/i386: add de/compaction to xsave_helper Magnus Kulke
2026-04-17 11:56 ` Mohamed Mediouni
2026-04-18 17:46 ` Mohamed Mediouni
2026-04-20 12:02 ` Magnus Kulke
2026-04-17 10:56 ` [PATCH 31/34] target/i386/mshv: migrate XSAVE state Magnus Kulke
2026-04-17 10:56 ` [PATCH 32/34] target/i386/mshv: reconstruct hflags after load Magnus Kulke
2026-04-17 10:56 ` [PATCH 33/34] target/i386/mshv: migrate MP_STATE Magnus Kulke
2026-04-17 10:56 ` [PATCH 34/34] accel/mshv: enable dirty page tracking Magnus Kulke
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