From: Magnus Kulke <magnuskulke@linux.microsoft.com>
To: qemu-devel@nongnu.org
Cc: kvm@vger.kernel.org, "Magnus Kulke" <magnuskulke@microsoft.com>,
"Wei Liu" <liuwe@microsoft.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Cédric Le Goater" <clg@redhat.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Wei Liu" <wei.liu@kernel.org>,
"Magnus Kulke" <magnuskulke@linux.microsoft.com>,
"Alex Williamson" <alex@shazbot.org>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Marcelo Tosatti" <mtosatti@redhat.com>
Subject: [PATCH 08/34] accel/mshv: update s->irq_routes in add_msi_route
Date: Fri, 17 Apr 2026 12:55:52 +0200 [thread overview]
Message-ID: <20260417105618.3621-9-magnuskulke@linux.microsoft.com> (raw)
In-Reply-To: <20260417105618.3621-1-magnuskulke@linux.microsoft.com>
The irq_routes field of the state is populated with native mshv irq
route entries. The allocation logic is modelled after the KVM
implementation: we will always allocate a minumum of 64 entries and use
a bitmask to find/set/clear GSIs.
The old implementation of add_msi_routes will be removed in a subsequent
commit.
Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
---
accel/accel-irq.c | 2 +-
accel/mshv/irq.c | 87 +++++++++++++++++++++++++++++++++++++----
accel/stubs/mshv-stub.c | 2 +-
include/system/mshv.h | 3 +-
4 files changed, 84 insertions(+), 10 deletions(-)
diff --git a/accel/accel-irq.c b/accel/accel-irq.c
index 7e71b52555..5a97a345b2 100644
--- a/accel/accel-irq.c
+++ b/accel/accel-irq.c
@@ -21,7 +21,7 @@ int accel_irqchip_add_msi_route(AccelRouteChange *c, int vector, PCIDevice *dev)
{
#ifdef CONFIG_MSHV_IS_POSSIBLE
if (mshv_msi_via_irqfd_enabled()) {
- return mshv_irqchip_add_msi_route(vector, dev);
+ return mshv_irqchip_add_msi_route(c, vector, dev);
}
#endif
if (kvm_enabled()) {
diff --git a/accel/mshv/irq.c b/accel/mshv/irq.c
index 82f2022c7c..9d6bdde27a 100644
--- a/accel/mshv/irq.c
+++ b/accel/mshv/irq.c
@@ -278,18 +278,91 @@ static int irqchip_update_irqfd_notifier_gsi(const EventNotifier *event,
return register_irqfd(vm_fd, fd, virq);
}
+static int irqchip_allocate_gsi(MshvState *s, int *gsi)
+{
+ int next_gsi;
+
+ /* Return the lowest unused GSI in the bitmap */
+ next_gsi = find_first_zero_bit(s->used_gsi_bitmap, s->gsi_count);
+ if (next_gsi >= s->gsi_count) {
+ return -ENOSPC;
+ }
+
+ *gsi = next_gsi;
+
+ return 0;
+}
+
+static void irqchip_release_gsi(MshvState *s, int gsi)
+{
+ clear_bit(gsi, s->used_gsi_bitmap);
+}
+
+static void add_routing_entry(MshvState *s, struct mshv_user_irq_entry *entry)
+{
+ struct mshv_user_irq_entry *new;
+ int n, size;
+
+ if (s->irq_routes->nr == s->nr_allocated_irq_routes) {
+ n = s->nr_allocated_irq_routes * 2;
+ if (n < MSHV_MIN_ALLOCATED_MSI_ROUTES) {
+ n = MSHV_MIN_ALLOCATED_MSI_ROUTES;
+ }
+ size = sizeof(struct mshv_user_irq_table);
+ size += n * sizeof(*new);
+ s->irq_routes = g_realloc(s->irq_routes, size);
+ s->nr_allocated_irq_routes = n;
+ }
+
+ n = s->irq_routes->nr;
+ s->irq_routes->nr++;
+ new = &s->irq_routes->entries[n];
+
+ *new = *entry;
+
+ set_bit(entry->gsi, s->used_gsi_bitmap);
-int mshv_irqchip_add_msi_route(int vector, PCIDevice *dev)
+ trace_mshv_add_msi_routing(entry->address_lo | entry->address_hi,
+ entry->data);
+}
+
+int mshv_irqchip_add_msi_route(AccelRouteChange *c, int vector, PCIDevice *dev)
{
- MSIMessage msg = { 0, 0 };
- int virq = 0;
+ struct mshv_user_irq_entry entry = { 0 };
+ MSIMessage msg = { 0 };
+ uint32_t data, high_addr, low_addr;
+ int gsi, ret;
+ MshvState *s = MSHV_STATE(c->accel);
+
+ if (!pci_available || !dev) {
+ return 0;
+ }
- if (pci_available && dev) {
- msg = pci_get_msi_message(dev, vector);
- virq = add_msi_routing(msg.address, le32_to_cpu(msg.data));
+ msg = pci_get_msi_message(dev, vector);
+
+ ret = irqchip_allocate_gsi(mshv_state, &gsi);
+ if (ret < 0) {
+ error_report("Could not allocate GSI for MSI route");
+ return -1;
+ }
+ high_addr = msg.address >> 32;
+ low_addr = msg.address & 0xFFFFFFFF;
+ data = le32_to_cpu(msg.data);
+
+ entry.gsi = gsi;
+ entry.address_hi = high_addr;
+ entry.address_lo = low_addr;
+ entry.data = data;
+
+ if (s->irq_routes->nr < s->gsi_count) {
+ add_routing_entry(s, &entry);
+ c->changes++;
+ } else {
+ irqchip_release_gsi(s, gsi);
+ return -ENOSPC;
}
- return virq;
+ return gsi;
}
void mshv_irqchip_release_virq(int virq)
diff --git a/accel/stubs/mshv-stub.c b/accel/stubs/mshv-stub.c
index e499b199d9..998c9e2fc6 100644
--- a/accel/stubs/mshv-stub.c
+++ b/accel/stubs/mshv-stub.c
@@ -14,7 +14,7 @@
bool mshv_allowed;
-int mshv_irqchip_add_msi_route(int vector, PCIDevice *dev)
+int mshv_irqchip_add_msi_route(AccelRouteChange *c, int vector, PCIDevice *dev)
{
return -ENOSYS;
}
diff --git a/include/system/mshv.h b/include/system/mshv.h
index 0d1745315b..7f60aba308 100644
--- a/include/system/mshv.h
+++ b/include/system/mshv.h
@@ -33,6 +33,7 @@
#endif
#define MSHV_MAX_MSI_ROUTES 4096
+#define MSHV_MIN_ALLOCATED_MSI_ROUTES 64
#define MSHV_PAGE_SHIFT 12
@@ -59,7 +60,7 @@ int mshv_request_interrupt(MshvState *mshv_state, uint32_t interrupt_type, uint3
uint32_t vp_index, bool logical_destination_mode,
bool level_triggered);
-int mshv_irqchip_add_msi_route(int vector, PCIDevice *dev);
+int mshv_irqchip_add_msi_route(AccelRouteChange *c, int vector, PCIDevice *dev);
int mshv_irqchip_update_msi_route(int virq, MSIMessage msg, PCIDevice *dev);
void mshv_irqchip_commit_routes(void);
void mshv_irqchip_release_virq(int virq);
--
2.34.1
next prev parent reply other threads:[~2026-04-17 10:56 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-17 10:55 [PATCH 00/34] Add migration support to the MSHV accelerator Magnus Kulke
2026-04-17 10:55 ` [PATCH 01/34] target/i386/mshv: use arch_load/store_reg fns Magnus Kulke
2026-04-17 10:55 ` [PATCH 02/34] target/i386/mshv: use generic FPU/xcr0 state Magnus Kulke
2026-04-17 10:55 ` [PATCH 03/34] target/i386/mshv: impl init/load/store_vcpu_state Magnus Kulke
2026-04-17 10:55 ` [PATCH 04/34] accel/accel-irq: add AccelRouteChange abstraction Magnus Kulke
2026-04-17 10:55 ` [PATCH 05/34] accel/accel-irq: add generic begin_route_changes Magnus Kulke
2026-04-17 10:55 ` [PATCH 06/34] accel/accel-irq: add generic commit_route_changes Magnus Kulke
2026-04-17 10:55 ` [PATCH 07/34] accel/mshv: add irq_routes to state Magnus Kulke
2026-04-17 10:55 ` Magnus Kulke [this message]
2026-04-17 10:55 ` [PATCH 09/34] accel/mshv: update s->irq_routes in update_msi_route Magnus Kulke
2026-04-17 10:55 ` [PATCH 10/34] accel/mshv: update s->irq_routes in release_virq Magnus Kulke
2026-04-17 10:55 ` [PATCH 11/34] accel/mshv: use s->irq_routes in commit_routes Magnus Kulke
2026-04-17 10:55 ` [PATCH 12/34] accel/mshv: reserve ioapic routes on s->irq_routes Magnus Kulke
2026-04-17 10:55 ` [PATCH 13/34] accel/mshv: remove redundant msi controller Magnus Kulke
2026-04-17 10:55 ` [PATCH 14/34] target/i386/mshv: move apic logic into own file Magnus Kulke
2026-04-17 10:55 ` [PATCH 15/34] target/i386/mshv: remove redundant apic helpers Magnus Kulke
2026-04-17 10:56 ` [PATCH 16/34] target/i386/mshv: migrate LAPIC state Magnus Kulke
2026-04-17 11:54 ` Mohamed Mediouni
2026-04-20 11:37 ` Magnus Kulke
2026-04-17 10:56 ` [PATCH 17/34] target/i386/mshv: move msr code to arch Magnus Kulke
2026-04-17 10:56 ` [PATCH 18/34] accel/mshv: store partition proc features Magnus Kulke
2026-04-17 10:56 ` [PATCH 19/34] target/i386/mshv: expose msvh_get_generic_regs Magnus Kulke
2026-04-17 10:56 ` [PATCH 20/34] target/i386/mshv: migrate MSRs Magnus Kulke
2026-04-17 10:56 ` [PATCH 21/34] target/i386/mshv: migrate MTRR MSRs Magnus Kulke
2026-04-17 10:56 ` [PATCH 22/34] target/i386/mshv: migrate Synic SINT MSRs Magnus Kulke
2026-04-17 10:56 ` [PATCH 23/34] target/i386/mshv: migrate CET/SS MSRs Magnus Kulke
2026-04-17 10:56 ` [PATCH 24/34] target/i386/mshv: migrate SIMP and SIEFP state Magnus Kulke
2026-04-17 10:56 ` [PATCH 25/34] target/i386/mshv: migrate STIMER state Magnus Kulke
2026-04-17 10:56 ` [PATCH 26/34] accel/mshv: introduce SaveVMHandler Magnus Kulke
2026-04-17 10:56 ` [PATCH 27/34] accel/mshv: write synthetic MSRs after migration Magnus Kulke
2026-04-17 10:56 ` [PATCH 28/34] accel/mshv: migrate REFERENCE_TIME Magnus Kulke
2026-04-17 10:56 ` [PATCH 29/34] target/i386/mshv: migrate pending ints/excs Magnus Kulke
2026-04-17 10:56 ` [PATCH 30/34] target/i386: add de/compaction to xsave_helper Magnus Kulke
2026-04-17 11:56 ` Mohamed Mediouni
2026-04-18 17:46 ` Mohamed Mediouni
2026-04-20 12:02 ` Magnus Kulke
2026-04-17 10:56 ` [PATCH 31/34] target/i386/mshv: migrate XSAVE state Magnus Kulke
2026-04-17 10:56 ` [PATCH 32/34] target/i386/mshv: reconstruct hflags after load Magnus Kulke
2026-04-17 10:56 ` [PATCH 33/34] target/i386/mshv: migrate MP_STATE Magnus Kulke
2026-04-17 10:56 ` [PATCH 34/34] accel/mshv: enable dirty page tracking Magnus Kulke
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