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From: sashiko-bot@kernel.org
To: "Sascha Bischoff" <Sascha.Bischoff@arm.com>
Cc: "Oliver Upton" <oupton@kernel.org>,
	kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	"Marc Zyngier" <maz@kernel.org>
Subject: Re: [PATCH v4 14/48] KVM: arm64: gic-v5: Set up VMTEs and VPE doorbells
Date: Fri, 24 Jul 2026 11:27:50 +0000	[thread overview]
Message-ID: <20260724112751.0D7BC1F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260724104819.1296803-15-sascha.bischoff@arm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] vgic_v5_send_command() unsafely passes 0 to irq_set_vcpu_affinity() if the doorbell IRQ is not allocated.
--

--- Patch [14]: [PATCH v4 14/48] KVM: arm64: gic-v5: Set up VMTEs and VPE doorbells ---
commit 3fe87417ec724cc6e6581baab62b9b85ad04ae50
Author: Sascha Bischoff <Sascha.Bischoff@arm.com>

KVM: arm64: gic-v5: Set up VMTEs and VPE doorbells

This patch introduces the setup and teardown paths for GICv5 VM Table Entries
and VPE doorbells. It allocates a VM ID, creates a per-VM VPE doorbell IRQ
domain, and assigns doorbells to vCPUs for communication with the host IRS.
Initialization and teardown workflows are implemented, including unwind paths
for partial failures.

> diff --git a/arch/arm64/kvm/vgic/vgic-v5.c b/arch/arm64/kvm/vgic/vgic-v5.c
> index 826c2284a1453..4a62aa7d6505a 100644
> --- a/arch/arm64/kvm/vgic/vgic-v5.c
> +++ b/arch/arm64/kvm/vgic/vgic-v5.c
[ ... ]
> @@ -406,6 +406,23 @@ static int vgic_v5_irs_set_up_vpe(u16 vm_id, u16 vpe_id,
>  	return 0;
>  }
>  
> +static irqreturn_t db_handler(int irq, void *data)
> +{
> +	struct kvm_vcpu *vcpu = data;
> +
> +	WRITE_ONCE(vcpu->arch.vgic_cpu.vgic_v5.gicv5_vpe.db_fired, true);
> +
> +	kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
> +	kvm_vcpu_kick(vcpu);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +static int vgic_v5_send_command(struct kvm_vcpu *vcpu, enum gicv5_vcpu_cmd cmd)
> +{
> +	return irq_set_vcpu_affinity(vgic_v5_vpe_db(vcpu), &cmd);
> +}

[Severity: High]
Does this code handle the case where the doorbell IRQ is not allocated yet or
has already been freed, returning 0 from vgic_v5_vpe_db(vcpu)?

Passing 0 to irq_set_vcpu_affinity() can cause unexpected behavior, including
potential memory corruption if IRQ 0 happens to be a valid interrupt on the
platform.

There appear to be two paths where this happens. First, vgic_v5_reset() can be
invoked before the VGIC is initialized, meaning the doorbell IRQ is still 0:

arch/arm64/kvm/vgic/vgic-v5.c:vgic_v5_reset()
	/* Make the VPE valid in the VPET */
	if (WARN_ON(vgic_v5_send_command(vcpu, VPE_MAKE_VALID)))
		return;

Second, a secondary teardown retry can trigger this in vgic_v5_teardown(). If
an initial teardown failed to invalidate the VMTE, it leaves
vmte_allocated = true but still frees the doorbells. A subsequent teardown
will execute this with a 0 doorbell IRQ:

arch/arm64/kvm/vgic/vgic-v5.c:vgic_v5_teardown()
	if (kvm->arch.vgic.gicv5_vm.vmte_allocated) {
		/* Make the VM invalid  */
		vcpu0 = kvm_get_vcpu(kvm, 0);
		rc = vgic_v5_send_command(vcpu0, VMTE_MAKE_INVALID);

Could vgic_v5_send_command() verify the IRQ is non-zero before passing it
to the IRQ core?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260724104819.1296803-1-sascha.bischoff@arm.com?part=14

  reply	other threads:[~2026-07-24 11:27 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-24 10:48 [PATCH v4 00/48] KVM: arm64: Add GICv5 IRS support Sascha Bischoff
2026-07-24 10:48 ` [PATCH v4 01/48] irqchip/gic-v5: Allow KVM setup without a maintenance IRQ Sascha Bischoff
2026-07-24 11:21   ` sashiko-bot
2026-07-24 10:48 ` [PATCH v4 02/48] irqchip/gic-v5: Provide OF IRS config frame attrs to KVM Sascha Bischoff
2026-07-24 11:10   ` sashiko-bot
2026-07-24 10:49 ` [PATCH v4 03/48] irqchip/gic-v5: Set up gic_kvm_info on ACPI hosts Sascha Bischoff
2026-07-24 11:19   ` sashiko-bot
2026-07-24 10:49 ` [PATCH v4 04/48] KVM: arm64: gic-v5: Define remaining IRS MMIO registers Sascha Bischoff
2026-07-24 10:49 ` [PATCH v4 05/48] arm64/sysreg: Add GICv5 GIC VDPEND encoding Sascha Bischoff
2026-07-24 10:49 ` [PATCH v4 06/48] arm64/sysreg: Update ICC_CR0_EL1 with LINK and LINK_IDLE fields Sascha Bischoff
2026-07-24 11:14   ` sashiko-bot
2026-07-24 10:50 ` [PATCH v4 07/48] KVM: arm64: gic-v5: Extract host IRS caps from IRS config frame Sascha Bischoff
2026-07-24 11:19   ` sashiko-bot
2026-07-24 10:50 ` [PATCH v4 08/48] KVM: arm64: gic-v5: Add VPE doorbell domain Sascha Bischoff
2026-07-24 11:11   ` sashiko-bot
2026-07-24 10:50 ` [PATCH v4 09/48] KVM: arm64: gic-v5: Create and manage VM and VPE tables Sascha Bischoff
2026-07-24 11:19   ` sashiko-bot
2026-07-24 10:50 ` [PATCH v4 10/48] KVM: arm64: gic-v5: Introduce guest IST alloc and management Sascha Bischoff
2026-07-24 11:22   ` sashiko-bot
2026-07-24 10:51 ` [PATCH v4 11/48] KVM: arm64: gic-v5: Implement VMT/vIST IRS MMIO Ops Sascha Bischoff
2026-07-24 11:20   ` sashiko-bot
2026-07-24 10:51 ` [PATCH v4 12/48] KVM: arm64: gic-v5: Keep GICv5 vCPU limit model-specific Sascha Bischoff
2026-07-24 10:51 ` [PATCH v4 13/48] KVM: arm64: gic-v5: Implement VPE IRS MMIO Ops Sascha Bischoff
2026-07-24 11:21   ` sashiko-bot
2026-07-24 10:52 ` [PATCH v4 14/48] KVM: arm64: gic-v5: Set up VMTEs and VPE doorbells Sascha Bischoff
2026-07-24 11:27   ` sashiko-bot [this message]
2026-07-24 10:52 ` [PATCH v4 15/48] KVM: arm64: gic-v5: Add resident/non-resident hyp calls Sascha Bischoff
2026-07-24 11:26   ` sashiko-bot
2026-07-24 10:52 ` [PATCH v4 16/48] KVM: arm64: gic-v5: Request doorbells when VPEs enter WFI Sascha Bischoff
2026-07-24 11:41   ` sashiko-bot
2026-07-24 10:52 ` [PATCH v4 17/48] KVM: arm64: gic-v5: Introduce struct vgic_v5_irs and IRS base address Sascha Bischoff
2026-07-24 10:53 ` [PATCH v4 18/48] KVM: arm64: gic-v5: Add IRS IODEV support to MMIO handlers Sascha Bischoff
2026-07-24 10:53 ` [PATCH v4 19/48] KVM: arm64: gic-v5: Add KVM_VGIC_V5_ADDR_TYPE_IRS to UAPI Sascha Bischoff
2026-07-24 11:30   ` sashiko-bot
2026-07-24 10:53 ` [PATCH v4 20/48] KVM: arm64: gic-v5: Add GICv5 IRS IODEV and MMIO emulation Sascha Bischoff
2026-07-24 11:45   ` sashiko-bot
2026-07-24 10:53 ` [PATCH v4 21/48] KVM: arm64: gic-v5: Initialise per-VM IRS state Sascha Bischoff
2026-07-24 10:54 ` [PATCH v4 22/48] KVM: arm64: gic-v5: Register the IRS IODEV Sascha Bischoff
2026-07-24 11:33   ` sashiko-bot
2026-07-24 10:54 ` [PATCH v4 23/48] KVM: arm64: gic-v5: Set IRICHPPIDIS based on IRS enable state Sascha Bischoff
2026-07-24 11:41   ` sashiko-bot
2026-07-24 10:54 ` [PATCH v4 24/48] KVM: arm64: selftests: Update vGICv5 selftest to set IRS address Sascha Bischoff
2026-07-24 10:54 ` [PATCH v4 25/48] KVM: arm64: gic-v5: Add GIC VDPEND hyp call Sascha Bischoff
2026-07-24 11:34   ` sashiko-bot
2026-07-24 10:55 ` [PATCH v4 26/48] KVM: arm64: gic: Introduce set_pending_state() to irq_op Sascha Bischoff
2026-07-24 11:39   ` sashiko-bot
2026-07-24 10:55 ` [PATCH v4 27/48] KVM: arm64: gic-v5: Support SPI injection Sascha Bischoff
2026-07-24 11:48   ` sashiko-bot
2026-07-24 10:55 ` [PATCH v4 28/48] Documentation: KVM: Extend VGICv5 device attribute docs Sascha Bischoff
     [not found] ` <20260724104819.1296803-35-sascha.bischoff@arm.com>
2026-07-24 11:46   ` [PATCH v4 34/48] KVM: arm64: gic-v5: Add VGICv5 IST save/restore UAPI sashiko-bot
     [not found] ` <20260724104819.1296803-31-sascha.bischoff@arm.com>
2026-07-24 11:52   ` [PATCH v4 30/48] KVM: arm64: gic-v5: Mask per-vcpu PPI state in vgic_v5_finalize_ppi_state() sashiko-bot
     [not found] ` <20260724104819.1296803-36-sascha.bischoff@arm.com>
2026-07-24 12:02   ` [PATCH v4 35/48] KVM: arm64: gic-v5: Implement save/restore mechanisms for ISTs sashiko-bot
     [not found] ` <20260724104819.1296803-42-sascha.bischoff@arm.com>
2026-07-24 12:02   ` [PATCH v4 41/48] KVM: selftests: Add VGICv5 NR_IRQS attribute tests sashiko-bot
     [not found] ` <20260724104819.1296803-33-sascha.bischoff@arm.com>
2026-07-24 12:05   ` [PATCH v4 32/48] KVM: arm64: gic-v5: Handle userspace accesses to IRS MMIO region sashiko-bot
     [not found] ` <20260724104819.1296803-43-sascha.bischoff@arm.com>
2026-07-24 12:06   ` [PATCH v4 42/48] KVM: selftests: Add VGICv5 IRS_REGS attribute tests sashiko-bot
     [not found] ` <20260724104819.1296803-32-sascha.bischoff@arm.com>
2026-07-24 12:09   ` [PATCH v4 31/48] KVM: arm64: gic-v5: Add GICv5 EL1 sysreg userspace accessors sashiko-bot
     [not found] ` <20260724104819.1296803-47-sascha.bischoff@arm.com>
2026-07-24 12:15   ` [PATCH v4 46/48] KVM: selftests: Add VGICv5 SPI injection tests sashiko-bot
     [not found] ` <20260724104819.1296803-48-sascha.bischoff@arm.com>
2026-07-24 12:18   ` [PATCH v4 47/48] KVM: selftests: Add VGICv5 LPI delivery tests sashiko-bot
     [not found] ` <20260724104819.1296803-38-sascha.bischoff@arm.com>
2026-07-24 12:19   ` [PATCH v4 37/48] Documentation: KVM: Add KVM_DEV_ARM_VGIC_GRP_IRS_REGS to VGICv5 docs sashiko-bot
     [not found] ` <20260724104819.1296803-30-sascha.bischoff@arm.com>
2026-07-24 12:19   ` [PATCH v4 29/48] KVM: arm64: gic-v5: Add GICv5 SPI injection to irqfd sashiko-bot

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