From: Marc Zyngier <maz@kernel.org>
To: sashiko-reviews@lists.linux.dev
Cc: kvmarm@lists.linux.dev, "Oliver Upton" <oupton@kernel.org>,
kvm@vger.kernel.org
Subject: Re: [PATCH 22/28] KVM: arm64: Add routing for NVHCR_EL2 trap
Date: Thu, 02 Jul 2026 19:14:56 +0100 [thread overview]
Message-ID: <87wlvd6yxr.wl-maz@kernel.org> (raw)
In-Reply-To: <20260702162608.6D0FD1F00A3D@smtp.kernel.org>
On Thu, 02 Jul 2026 17:26:07 +0100,
sashiko-bot@kernel.org wrote:
>
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] The trap routing condition for `NVHCR_EL2` incorrectly uses a logical OR (`MCB`) instead of a logical AND, causing improper trap injection to guest EL2.
> --
>
> commit 6d634fa5ff4e9b082f4e46e999fa4990ecf38957
> Author: Marc Zyngier <maz@kernel.org>
>
> KVM: arm64: Add routing for NVHCR_EL2 trap
>
> NVHCR_EL2 accesses from EL1 are taken to EL2 when HCRX_EL2.NVTGE==0
> and HCR_EL2.NV==1. Describe this in the exception routing tables.
>
> > diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c
> > index b7f3d86a94031..f5dc578d8c985 100644
> > --- a/arch/arm64/kvm/emulate-nested.c
> > +++ b/arch/arm64/kvm/emulate-nested.c
> [ ... ]
> > @@ -468,6 +477,7 @@ static const enum cgt_group_id *coarse_control_combo[] = {
> > CGT_HCR_TVM, CGT_HCR_TRVM, CGT_HCRX_SCTLR2En),
> > MCB(CGT_HCR_TPU_TICAB, CGT_HCR_TPU, CGT_HCR_TICAB),
> > MCB(CGT_HCR_TPU_TOCU, CGT_HCR_TPU, CGT_HCR_TOCU),
> > + MCB(CGT_HCR_NV_HCRX_nNVTGE, CGT_HCR_NV, CGT_HCRX_nNVTGE),
>
> [Severity: High]
> Does this correctly evaluate the trap condition as an AND?
>
> The commit message indicates the trap is taken when "HCRX_EL2.NVTGE==0 and
> HCR_EL2.NV==1". However, coarse_control_combo[] uses the MCB() macro, which
> evaluates multiple conditions using a bitwise OR:
>
> arch/arm64/kvm/emulate-nested.c:__compute_trap_behaviour() {
> ...
> for (int i = 0; cgids[i] != __RESERVED__; i++)
> b |= __compute_trap_behaviour(vcpu, cgids[i], b);
> ...
> }
>
> Because this ORs the behaviors, the trap will be forwarded if HCR_EL2.NV == 1
> OR HCRX_EL2.NVTGE == 0 evaluates to forward. This would erroneously send the
> trap to EL2 even if normal execution without nested virt is active (NV == 0
> and NVTGE == 0).
>
> Should this use a __COMPLEX_CONDITIONS__ callback instead to enforce the
> logical AND?
Grmbl. Yes, well spotted.
M.
--
Jazz isn't dead. It just smells funny.
next prev parent reply other threads:[~2026-07-02 18:13 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-02 16:02 [PATCH 00/28] KVM: arm64: Add support for FEAT_NV2p1 and FEAT_NV3 Marc Zyngier
2026-07-02 16:02 ` [PATCH 01/28] arm64: sysreg: Emit RESx/UNKN values for Mapping definitions Marc Zyngier
2026-07-02 16:19 ` sashiko-bot
2026-07-02 17:41 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 02/28] arm64: Update ID_AA64MMFR4_EL1 description to 2026-03 JSON release Marc Zyngier
2026-07-02 16:02 ` [PATCH 03/28] KVM: arm64: Merge guest's HCRX_EL2 using NV_HCRX_GUEST_EXCLUDE Marc Zyngier
2026-07-02 16:34 ` sashiko-bot
2026-07-02 18:29 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 04/28] KVM: arm64: Drop __HCRX_EL2_* masks Marc Zyngier
2026-07-02 18:34 ` sashiko-bot
2026-07-02 21:10 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 05/28] KVM: arm64: Plumb HCRX_EL2.SRMASKEn in HCRX_EL2 sanitisation Marc Zyngier
2026-07-02 16:28 ` sashiko-bot
2026-07-02 18:18 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 06/28] KVM: arm64: Classify CPTR_EL2 as a SR_LOC_SPECIAL register Marc Zyngier
2026-07-02 16:02 ` [PATCH 07/28] KVM: arm64: Don't evaluate HCR_EL2.NV on ERET fast path Marc Zyngier
2026-07-02 16:24 ` sashiko-bot
2026-07-02 17:57 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 08/28] arm64: Add ARM64_HAS_NV2P1 capability Marc Zyngier
2026-07-02 16:02 ` [PATCH 09/28] KVM: arm64: Relax CPTR_EL2 handling when FEAT_NV2p1 is present Marc Zyngier
2026-07-02 16:02 ` [PATCH 10/28] KVM: arm64: Relax CNTHCTL_EL2 " Marc Zyngier
2026-07-02 16:21 ` sashiko-bot
2026-07-02 17:46 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 11/28] KVM: arm64: Expose FEAT_NV2p1 to NV guests Marc Zyngier
2026-07-02 16:28 ` sashiko-bot
2026-07-02 18:23 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 12/28] arm64: Add FEAT_NV2p1 detection Marc Zyngier
2026-07-02 16:02 ` [PATCH 13/28] arm64: sysreg: Add NVHCR_EL2 description as a mirror of HCR_EL2 Marc Zyngier
2026-07-02 16:02 ` [PATCH 14/28] arm64: sysreg: Add HCRX_EL2 bits related to FEAT_NV3 Marc Zyngier
2026-07-02 16:02 ` [PATCH 15/28] arm64: Add ARM64_HAS_NV3 capability Marc Zyngier
2026-07-02 16:02 ` [PATCH 16/28] KVM: arm64: Split NV-specific exit fixups from the non-NV handling Marc Zyngier
2026-07-02 16:02 ` [PATCH 17/28] KVM: arm64: Add NV3 control bits to HCRX_EL2 sanitisation Marc Zyngier
2026-07-02 16:02 ` [PATCH 18/28] KVM: arm64: Add kvm_has_nv{2,3}() predicates Marc Zyngier
2026-07-02 16:25 ` sashiko-bot
2026-07-02 18:01 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 19/28] KVM: arm64: Make HCR_EL2 a non-VNCR register Marc Zyngier
2026-07-02 16:02 ` [PATCH 20/28] KVM: arm64: Add sanitisation for NVHCR_EL2 Marc Zyngier
2026-07-02 16:02 ` [PATCH 21/28] KVM: arm64: Add NVHCR_EL2 handling to the sysreg array Marc Zyngier
2026-07-02 16:02 ` [PATCH 22/28] KVM: arm64: Add routing for NVHCR_EL2 trap Marc Zyngier
2026-07-02 16:26 ` sashiko-bot
2026-07-02 18:14 ` Marc Zyngier [this message]
2026-07-02 16:02 ` [PATCH 23/28] KVM: arm64: Add NVHCR_EL2 context switching Marc Zyngier
2026-07-02 16:43 ` sashiko-bot
2026-07-02 20:28 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 24/28] KVM: arm64: Engage NV3 ERET trap elision Marc Zyngier
2026-07-02 16:02 ` [PATCH 25/28] KVM: arm64: Engage NV3 TLBI " Marc Zyngier
2026-07-02 16:45 ` sashiko-bot
2026-07-02 21:04 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 26/28] KVM: arm64: Add FEAT_NV3 detection Marc Zyngier
2026-07-02 16:39 ` sashiko-bot
2026-07-02 20:03 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 27/28] KVM: arm64: Expose FEAT_NV3 to guests Marc Zyngier
2026-07-02 16:39 ` sashiko-bot
2026-07-02 20:01 ` Marc Zyngier
2026-07-02 16:02 ` [PATCH 28/28] arm64: Add override for ID_AA64MMFR4_EL1.NV_frac Marc Zyngier
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