Re: [kvm-unit-tests PATCH 2/3] x86/msr: Add a testcase to verify SPEC_CTRL exists (or not) as expected

[Sean Christopherson <seanjc@google.com>]

On Fri, Jun 06, 2025, Chao Gao wrote:
> On Thu, Jun 05, 2025 at 12:26:42PM -0700, Sean Christopherson wrote:
> >diff --git a/x86/msr.c b/x86/msr.c
> >index ac12d127..ca265fac 100644
> >--- a/x86/msr.c
> >+++ b/x86/msr.c
> >@@ -290,10 +290,37 @@ static void test_x2apic_msrs(void)
> > 	__test_x2apic_msrs(true);
> > }
> > 
> >-static void test_cmd_msrs(void)
> >+static void test_mitigation_msrs(void)
> > {
> >+	u64 spec_ctrl_bits = 0, val;
> > 	int i;
> > 
> >+	if (this_cpu_has(X86_FEATURE_SPEC_CTRL) || this_cpu_has(X86_FEATURE_AMD_IBRS))
> >+		spec_ctrl_bits |= SPEC_CTRL_IBRS;
> >+
> >+	if (this_cpu_has(X86_FEATURE_SPEC_CTRL) || this_cpu_has(X86_FEATURE_AMD_STIBP))
> >+		spec_ctrl_bits |= SPEC_CTRL_STIBP;
> 
> CPUID.(EAX=07H, ECX=0):EDX[26] enumerates IBRS and IBPB support, but it doesn't
> enumerate STIBP support. EDX[27] does.

Drat, that's what I get for trying to reverse engineer the kernel's mitigations.
It's super obvious when I actually look at the CPUID feature definitions.

Thanks!