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From: Ricardo Koller <ricarkol@google.com>
To: Marc Zyngier <maz@kernel.org>
Cc: kvm@vger.kernel.org, kvmarm@lists.linux.dev,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 04/16] KVM: arm64: PMU: Distinguish between 64bit counter and 64bit overflow
Date: Thu, 1 Dec 2022 08:47:47 -0800	[thread overview]
Message-ID: <Y4jasyxvFRNvvmox@google.com> (raw)
In-Reply-To: <20221113163832.3154370-5-maz@kernel.org>

On Sun, Nov 13, 2022 at 04:38:20PM +0000, Marc Zyngier wrote:
> The PMU architecture makes a subtle difference between a 64bit
> counter and a counter that has a 64bit overflow. This is for example
> the case of the cycle counter, which can generate an overflow on
> a 32bit boundary if PMCR_EL0.LC==0 despite the accumulation being
> done on 64 bits.
> 
> Use this distinction in the few cases where it matters in the code,
> as we will reuse this with PMUv3p5 long counters.
> 
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
>  arch/arm64/kvm/pmu-emul.c | 43 ++++++++++++++++++++++++++++-----------
>  1 file changed, 31 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index 69b67ab3c4bf..d050143326b5 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -50,6 +50,11 @@ static u32 kvm_pmu_event_mask(struct kvm *kvm)
>   * @select_idx: The counter index
>   */
>  static bool kvm_pmu_idx_is_64bit(struct kvm_vcpu *vcpu, u64 select_idx)
> +{
> +	return (select_idx == ARMV8_PMU_CYCLE_IDX);
> +}
> +
> +static bool kvm_pmu_idx_has_64bit_overflow(struct kvm_vcpu *vcpu, u64 select_idx)
>  {
>  	return (select_idx == ARMV8_PMU_CYCLE_IDX &&
>  		__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_LC);
> @@ -57,7 +62,8 @@ static bool kvm_pmu_idx_is_64bit(struct kvm_vcpu *vcpu, u64 select_idx)
>  
>  static bool kvm_pmu_counter_can_chain(struct kvm_vcpu *vcpu, u64 idx)
>  {
> -	return (!(idx & 1) && (idx + 1) < ARMV8_PMU_CYCLE_IDX);
> +	return (!(idx & 1) && (idx + 1) < ARMV8_PMU_CYCLE_IDX &&
> +		!kvm_pmu_idx_has_64bit_overflow(vcpu, idx));
>  }
>  
>  static struct kvm_vcpu *kvm_pmc_to_vcpu(struct kvm_pmc *pmc)
> @@ -97,7 +103,7 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)
>  		counter += perf_event_read_value(pmc->perf_event, &enabled,
>  						 &running);
>  
> -	if (select_idx != ARMV8_PMU_CYCLE_IDX)
> +	if (!kvm_pmu_idx_is_64bit(vcpu, select_idx))
>  		counter = lower_32_bits(counter);
>  
>  	return counter;
> @@ -423,6 +429,23 @@ static void kvm_pmu_counter_increment(struct kvm_vcpu *vcpu,
>  	}
>  }
>  
> +/* Compute the sample period for a given counter value */
> +static u64 compute_period(struct kvm_vcpu *vcpu, u64 select_idx, u64 counter)
> +{
> +	u64 val;
> +
> +	if (kvm_pmu_idx_is_64bit(vcpu, select_idx)) {
> +		if (!kvm_pmu_idx_has_64bit_overflow(vcpu, select_idx))
> +			val = -(counter & GENMASK(31, 0));

If I understand things correctly, this might be missing another mask:

+		if (!kvm_pmu_idx_has_64bit_overflow(vcpu, select_idx)) {
+			val = -(counter & GENMASK(31, 0));
+			val &= GENMASK(31, 0);
+		} else {

For example, if the counter is 64-bits wide, it overflows at 32-bits,
and it is _one_ sample away from overflowing at 32-bits:

	0x01010101_ffffffff

Then "val = (-counter) & GENMASK(63, 0)" would return 0xffffffff_00000001.
But the right period is 0x00000000_00000001 (it's one sample away from
overflowing).

> +		else
> +			val = (-counter) & GENMASK(63, 0);
> +	} else {
> +		val = (-counter) & GENMASK(31, 0);
> +	}
> +
> +	return val;
> +}
> +
>  /**
>   * When the perf event overflows, set the overflow status and inform the vcpu.
>   */
> @@ -442,10 +465,7 @@ static void kvm_pmu_perf_overflow(struct perf_event *perf_event,
>  	 * Reset the sample period to the architectural limit,
>  	 * i.e. the point where the counter overflows.
>  	 */
> -	period = -(local64_read(&perf_event->count));
> -
> -	if (!kvm_pmu_idx_is_64bit(vcpu, pmc->idx))
> -		period &= GENMASK(31, 0);
> +	period = compute_period(vcpu, idx, local64_read(&perf_event->count));
>  
>  	local64_set(&perf_event->hw.period_left, 0);
>  	perf_event->attr.sample_period = period;
> @@ -571,14 +591,13 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx)
>  
>  	/*
>  	 * If counting with a 64bit counter, advertise it to the perf
> -	 * code, carefully dealing with the initial sample period.
> +	 * code, carefully dealing with the initial sample period
> +	 * which also depends on the overflow.
>  	 */
> -	if (kvm_pmu_idx_is_64bit(vcpu, select_idx)) {
> +	if (kvm_pmu_idx_is_64bit(vcpu, select_idx))
>  		attr.config1 |= PERF_ATTR_CFG1_COUNTER_64BIT;
> -		attr.sample_period = (-counter) & GENMASK(63, 0);
> -	} else {
> -		attr.sample_period = (-counter) & GENMASK(31, 0);
> -	}
> +
> +	attr.sample_period = compute_period(vcpu, select_idx, counter);
>  
>  	event = perf_event_create_kernel_counter(&attr, -1, current,
>  						 kvm_pmu_perf_overflow, pmc);
> -- 
> 2.34.1
> 
> 
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WARNING: multiple messages have this Message-ID (diff)
From: Ricardo Koller <ricarkol@google.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvmarm@lists.linux.dev,
	kvm@vger.kernel.org, James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Reiji Watanabe <reijiw@google.com>
Subject: Re: [PATCH v4 04/16] KVM: arm64: PMU: Distinguish between 64bit counter and 64bit overflow
Date: Thu, 1 Dec 2022 08:47:47 -0800	[thread overview]
Message-ID: <Y4jasyxvFRNvvmox@google.com> (raw)
Message-ID: <20221201164747.CZDnSKg4W-OqgxhPAz-uZ4s9aTGEZB2wSkG4gz2bkR0@z> (raw)
In-Reply-To: <20221113163832.3154370-5-maz@kernel.org>

On Sun, Nov 13, 2022 at 04:38:20PM +0000, Marc Zyngier wrote:
> The PMU architecture makes a subtle difference between a 64bit
> counter and a counter that has a 64bit overflow. This is for example
> the case of the cycle counter, which can generate an overflow on
> a 32bit boundary if PMCR_EL0.LC==0 despite the accumulation being
> done on 64 bits.
> 
> Use this distinction in the few cases where it matters in the code,
> as we will reuse this with PMUv3p5 long counters.
> 
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
>  arch/arm64/kvm/pmu-emul.c | 43 ++++++++++++++++++++++++++++-----------
>  1 file changed, 31 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index 69b67ab3c4bf..d050143326b5 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -50,6 +50,11 @@ static u32 kvm_pmu_event_mask(struct kvm *kvm)
>   * @select_idx: The counter index
>   */
>  static bool kvm_pmu_idx_is_64bit(struct kvm_vcpu *vcpu, u64 select_idx)
> +{
> +	return (select_idx == ARMV8_PMU_CYCLE_IDX);
> +}
> +
> +static bool kvm_pmu_idx_has_64bit_overflow(struct kvm_vcpu *vcpu, u64 select_idx)
>  {
>  	return (select_idx == ARMV8_PMU_CYCLE_IDX &&
>  		__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_LC);
> @@ -57,7 +62,8 @@ static bool kvm_pmu_idx_is_64bit(struct kvm_vcpu *vcpu, u64 select_idx)
>  
>  static bool kvm_pmu_counter_can_chain(struct kvm_vcpu *vcpu, u64 idx)
>  {
> -	return (!(idx & 1) && (idx + 1) < ARMV8_PMU_CYCLE_IDX);
> +	return (!(idx & 1) && (idx + 1) < ARMV8_PMU_CYCLE_IDX &&
> +		!kvm_pmu_idx_has_64bit_overflow(vcpu, idx));
>  }
>  
>  static struct kvm_vcpu *kvm_pmc_to_vcpu(struct kvm_pmc *pmc)
> @@ -97,7 +103,7 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)
>  		counter += perf_event_read_value(pmc->perf_event, &enabled,
>  						 &running);
>  
> -	if (select_idx != ARMV8_PMU_CYCLE_IDX)
> +	if (!kvm_pmu_idx_is_64bit(vcpu, select_idx))
>  		counter = lower_32_bits(counter);
>  
>  	return counter;
> @@ -423,6 +429,23 @@ static void kvm_pmu_counter_increment(struct kvm_vcpu *vcpu,
>  	}
>  }
>  
> +/* Compute the sample period for a given counter value */
> +static u64 compute_period(struct kvm_vcpu *vcpu, u64 select_idx, u64 counter)
> +{
> +	u64 val;
> +
> +	if (kvm_pmu_idx_is_64bit(vcpu, select_idx)) {
> +		if (!kvm_pmu_idx_has_64bit_overflow(vcpu, select_idx))
> +			val = -(counter & GENMASK(31, 0));

If I understand things correctly, this might be missing another mask:

+		if (!kvm_pmu_idx_has_64bit_overflow(vcpu, select_idx)) {
+			val = -(counter & GENMASK(31, 0));
+			val &= GENMASK(31, 0);
+		} else {

For example, if the counter is 64-bits wide, it overflows at 32-bits,
and it is _one_ sample away from overflowing at 32-bits:

	0x01010101_ffffffff

Then "val = (-counter) & GENMASK(63, 0)" would return 0xffffffff_00000001.
But the right period is 0x00000000_00000001 (it's one sample away from
overflowing).

> +		else
> +			val = (-counter) & GENMASK(63, 0);
> +	} else {
> +		val = (-counter) & GENMASK(31, 0);
> +	}
> +
> +	return val;
> +}
> +
>  /**
>   * When the perf event overflows, set the overflow status and inform the vcpu.
>   */
> @@ -442,10 +465,7 @@ static void kvm_pmu_perf_overflow(struct perf_event *perf_event,
>  	 * Reset the sample period to the architectural limit,
>  	 * i.e. the point where the counter overflows.
>  	 */
> -	period = -(local64_read(&perf_event->count));
> -
> -	if (!kvm_pmu_idx_is_64bit(vcpu, pmc->idx))
> -		period &= GENMASK(31, 0);
> +	period = compute_period(vcpu, idx, local64_read(&perf_event->count));
>  
>  	local64_set(&perf_event->hw.period_left, 0);
>  	perf_event->attr.sample_period = period;
> @@ -571,14 +591,13 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx)
>  
>  	/*
>  	 * If counting with a 64bit counter, advertise it to the perf
> -	 * code, carefully dealing with the initial sample period.
> +	 * code, carefully dealing with the initial sample period
> +	 * which also depends on the overflow.
>  	 */
> -	if (kvm_pmu_idx_is_64bit(vcpu, select_idx)) {
> +	if (kvm_pmu_idx_is_64bit(vcpu, select_idx))
>  		attr.config1 |= PERF_ATTR_CFG1_COUNTER_64BIT;
> -		attr.sample_period = (-counter) & GENMASK(63, 0);
> -	} else {
> -		attr.sample_period = (-counter) & GENMASK(31, 0);
> -	}
> +
> +	attr.sample_period = compute_period(vcpu, select_idx, counter);
>  
>  	event = perf_event_create_kernel_counter(&attr, -1, current,
>  						 kvm_pmu_perf_overflow, pmc);
> -- 
> 2.34.1
> 
> 

  parent reply	other threads:[~2022-12-01 16:47 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-13 16:38 [PATCH v4 00/16] KVM: arm64: PMU: Fixing chained events, and PMUv3p5 support Marc Zyngier
2022-11-13 16:38 ` Marc Zyngier
2022-11-13 16:38 ` [PATCH v4 01/16] arm64: Add ID_DFR0_EL1.PerfMon values for PMUv3p7 and IMP_DEF Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-13 16:38 ` [PATCH v4 02/16] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-16  7:15   ` Reiji Watanabe
2022-11-16  7:15     ` Reiji Watanabe
2022-11-13 16:38 ` [PATCH v4 03/16] KVM: arm64: PMU: Always advertise the CHAIN event Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-13 16:38 ` [PATCH v4 04/16] KVM: arm64: PMU: Distinguish between 64bit counter and 64bit overflow Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-12-01 16:47   ` Ricardo Koller [this message]
2022-12-01 16:47     ` Ricardo Koller
2022-12-01 16:51     ` Ricardo Koller
2022-12-01 16:51       ` Ricardo Koller
2022-12-05 12:05       ` Marc Zyngier
2022-12-05 12:05         ` Marc Zyngier
2022-12-05 18:50         ` Ricardo Koller
2022-12-05 18:50           ` Ricardo Koller
2022-11-13 16:38 ` [PATCH v4 05/16] KVM: arm64: PMU: Narrow the overflow checking when required Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-17  6:50   ` Reiji Watanabe
2022-11-17  6:50     ` Reiji Watanabe
2022-11-13 16:38 ` [PATCH v4 06/16] KVM: arm64: PMU: Only narrow counters that are not 64bit wide Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-17  6:54   ` Reiji Watanabe
2022-11-17  6:54     ` Reiji Watanabe
2022-11-13 16:38 ` [PATCH v4 07/16] KVM: arm64: PMU: Add counter_index_to_*reg() helpers Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-18  6:16   ` Reiji Watanabe
2022-11-18  6:16     ` Reiji Watanabe
2022-11-13 16:38 ` [PATCH v4 08/16] KVM: arm64: PMU: Simplify setting a counter to a specific value Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-13 16:38 ` [PATCH v4 09/16] KVM: arm64: PMU: Do not let AArch32 change the counters' top 32 bits Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-18  7:45   ` Reiji Watanabe
2022-11-18  7:45     ` Reiji Watanabe
2022-11-19 12:32     ` Marc Zyngier
2022-11-19 12:32       ` Marc Zyngier
2022-11-13 16:38 ` [PATCH v4 10/16] KVM: arm64: PMU: Move the ID_AA64DFR0_EL1.PMUver limit to VM creation Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-13 16:38 ` [PATCH v4 11/16] KVM: arm64: PMU: Allow ID_AA64DFR0_EL1.PMUver to be set from userspace Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-19  5:31   ` Reiji Watanabe
2022-11-19  5:31     ` Reiji Watanabe
2022-11-13 16:38 ` [PATCH v4 12/16] KVM: arm64: PMU: Allow ID_DFR0_EL1.PerfMon " Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-19  5:52   ` Reiji Watanabe
2022-11-19  5:52     ` Reiji Watanabe
2022-11-19 12:54     ` Marc Zyngier
2022-11-19 12:54       ` Marc Zyngier
2022-11-13 16:38 ` [PATCH v4 13/16] KVM: arm64: PMU: Implement PMUv3p5 long counter support Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-23  5:58   ` Reiji Watanabe
2022-11-23  5:58     ` Reiji Watanabe
2022-11-23 11:11     ` Marc Zyngier
2022-11-23 11:11       ` Marc Zyngier
2022-11-23 17:11       ` Reiji Watanabe
2022-11-23 17:11         ` Reiji Watanabe
2022-11-24 10:17         ` Marc Zyngier
2022-11-24 10:17           ` Marc Zyngier
2022-11-29  3:03           ` Reiji Watanabe
2022-11-29  3:03             ` Reiji Watanabe
2022-11-13 16:38 ` [PATCH v4 14/16] KVM: arm64: PMU: Allow PMUv3p5 to be exposed to the guest Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-23  6:07   ` Reiji Watanabe
2022-11-23  6:07     ` Reiji Watanabe
2022-11-13 16:38 ` [PATCH v4 15/16] KVM: arm64: PMU: Simplify vcpu computation on perf overflow notification Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier
2022-11-23  6:27   ` Reiji Watanabe
2022-11-23  6:27     ` Reiji Watanabe
2022-11-13 16:38 ` [PATCH v4 16/16] KVM: arm64: PMU: Make kvm_pmc the main data structure Marc Zyngier
2022-11-13 16:38   ` Marc Zyngier

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