Re: [PATCH v5 28/49] Documentation: KVM: Extend VGICv5 device attribute docs

[Sascha Bischoff <Sascha.Bischoff@arm.com>]

On Fri, 2026-08-07 at 15:29 +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential
> issue(s) to consider:
> - [Medium] Reusing KVM_DEV_ARM_VGIC_GRP_NR_IRQS with conflicting
> semantics for VGICv5 creates a UAPI inconsistency that breaks generic
> VMM initialization.
> --
> 
> --- Patch [28]: [PATCH v5 28/49] Documentation: KVM: Extend VGICv5
> device attribute docs ---
> commit b29b54b5c700b9d3c2f478e0ca8a49cc3cef29a7
> Author: Sascha Bischoff <Sascha.Bischoff@arm.com>
> 
> Documentation: KVM: Extend VGICv5 device attribute docs
> 
> This commit updates the VGICv5 documentation to cover PPI, SPI, and
> LPI
> interrupts. It documents the GICv5 IRS address attribute and its GPA
> layout,
> as well as a GICv5-specific interpretation of the
> KVM_DEV_ARM_VGIC_GRP_NR_IRQS
> attribute.
> 
> > diff --git a/Documentation/virt/kvm/devices/arm-vgic-v5.rst
> > b/Documentation/virt/kvm/devices/arm-vgic-v5.rst
> > index 70b9162755c7e..c782ea4d4609c 100644
> > --- a/Documentation/virt/kvm/devices/arm-vgic-v5.rst
> > +++ b/Documentation/virt/kvm/devices/arm-vgic-v5.rst
> 
> [ ... ]
> 
> > +  KVM_DEV_ARM_VGIC_GRP_NR_IRQS
> > +   Attributes:
> > +
> > +    A value describing the number of SPIs for this GIC instance.
> > This is
> > +    GICv5-specific: unlike GICv2/v3, the value does not include
> > SGIs or PPIs.
> 
> [Severity: Medium]
> Does reusing the KVM_DEV_ARM_VGIC_GRP_NR_IRQS attribute with
> conflicting
> semantics for VGICv5 create a UAPI inconsistency that breaks generic
> VMM
> initialization?

They are different GICs with different limitations. There's no way to
consolidate those two views here. GICv3 has 16 SGIs, then 16 PPIs, then
a number of SPIs, all while using range-based interrupt types. GICv5
has separate "namespaces" for the different interrupt types so they are
not sequential.

For non-GICv5 GICs, it makes sense to include the SGIs and PPIs in the
count as they effectively shift the base index of SPIs by 32. For
GICv5, that's just not a thing, and it would be strange to mandate that
the 128 potential PPIs are included in this count.

> 
> VMMs that use shared, generic GIC initialization code will likely
> pass
> num_spis + 32 (the standard for GICv2/v3) to this attribute. Will
> this
> cause them to incorrectly provision the number of IRQs for VGICv5,
> either
> allocating an unintended number of SPIs or failing initialization
> entirely
> if the value exceeds the GICv5 SPI limit?

That's fine. The VMM NEEDS to be aware that a different GIC is being
used and that it comes with a different set of requirements. It can't
just blindly treat GICv5 the same as other GICs.

> 
> > +    The value ranges from 32 to KVM's VGICv5 maximum of 1024 SPIs,
> > in
> > +    increments of 32. If userspace does not set this attribute,
> > KVM uses 32
> > +    SPIs by default.
> > +
> > +    kvm_device_attr.addr points to a __u32 value.
> 
> [ ... ]
> 

Thanks,
Sascha