From: Jinjie Ruan <ruanjinjie@huawei.com>
To: Vladimir Murzin <vladimir.murzin@arm.com>,
<linux-arm-kernel@lists.infradead.org>
Cc: mark.rutland@arm.com, maz@kernel.org, will@kernel.org,
catalin.marinas@arm.com
Subject: Re: [RFC PATCH 10/36] arm64: irqflags: save and use both DAIF and PMR
Date: Fri, 10 Jul 2026 16:47:26 +0800 [thread overview]
Message-ID: <00f0b907-bab7-4f18-970f-25e2e7071b0a@huawei.com> (raw)
In-Reply-To: <20260709121333.23507-11-vladimir.murzin@arm.com>
On 7/9/2026 8:13 PM, Vladimir Murzin wrote:
> From: Ada Couprie Diaz <ada.coupriediaz@arm.com>
>
> With pseudo-NMIs enabled, both DAIF and the PMR affect interrupt masking.
> Now that we have a type which can track both of them at the same time,
> update our irqflags implementation to use it.
>
> Save DAIF flags in all cases, as they can be manipulated directly by other
> code, and the PMR if it is in use.
>
> When checking if IRQs are disabled, now that we always save DAIF we can
> check that the I flag is set and bypass checking the PMR if it is.
> We can also properly check if PMR masks interrupts (PMR < GIC_PRIO_IRQON),
> now that we don't need to rely on the GIC_PRIO_PSR_I_SET bit being set in
> the PMR to know if DAIF is already masking interrupts.
> Update `irqs_priority_unmasked()` to align with this change.
>
> This allows us to remove the `__daif_...` and `__pmr_...` versions
> of the save and check functions, as they are now unified.
>
> We can reasonably merge the two `__{daif,pmr}_irq_restore()` functions
> in the main one, as the DAIF and PMR values are properly split now.
>
> Signed-off-by: Ada Couprie Diaz <ada.coupriediaz@arm.com>
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> ---
> arch/arm64/include/asm/irqflags.h | 110 ++++++------------------------
> arch/arm64/include/asm/ptrace.h | 2 +-
> 2 files changed, 23 insertions(+), 89 deletions(-)
>
> diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h
> index 7775904ba6a9..62f047702493 100644
> --- a/arch/arm64/include/asm/irqflags.h
> +++ b/arch/arm64/include/asm/irqflags.h
> @@ -95,117 +95,48 @@ static __always_inline void arch_local_irq_disable(void)
> }
> }
>
> -static __always_inline arm64_exc_hwstate_t __daif_local_save_flags(void)
> -{
> - return (arm64_exc_hwstate_t){ .daif = read_sysreg(daif) };
> -}
> -
> -static __always_inline arm64_exc_hwstate_t __pmr_local_save_flags(void)
> -{
> - return (arm64_exc_hwstate_t){ .pmr = read_sysreg_s(SYS_ICC_PMR_EL1) };
> -}
> -
> /*
> * Save the current interrupt enable state.
> */
> static __always_inline unsigned long arch_local_save_flags(void)
> {
> - if (system_uses_irq_prio_masking()) {
> - return __pmr_local_save_flags().flags;
> - } else {
> - return __daif_local_save_flags().flags;
> - }
> -}
> + arm64_exc_hwstate_t hwstate = { .daif = read_sysreg(daif) };
>
> -static __always_inline
> -bool __daif_irqs_disabled_flags(arm64_exc_hwstate_t hwstate)
> -{
> - return hwstate.daif & PSR_I_BIT;
> -}
> + if (system_uses_irq_prio_masking())
> + hwstate.pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
>
> -static __always_inline
> -bool __pmr_irqs_disabled_flags(arm64_exc_hwstate_t hwstate)
> -{
> - return hwstate.pmr != GIC_PRIO_IRQON;
> + return hwstate.flags;
> }
>
> static __always_inline bool arch_irqs_disabled_flags(unsigned long flags)
> {
> arm64_exc_hwstate_t hwstate = { .flags = flags };
>
> - if (system_uses_irq_prio_masking()) {
> - return __pmr_irqs_disabled_flags(hwstate);
> - } else {
> - return __daif_irqs_disabled_flags(hwstate);
> - }
> -}
> + /* If I is set, the PMR doesn't matter: interrupts will not be taken. */
> + if (hwstate.daif & PSR_I_BIT)
> + return true;
>
> -static __always_inline bool __daif_irqs_disabled(void)
> -{
> - return __daif_irqs_disabled_flags(__daif_local_save_flags());
> -}
> + if (system_uses_irq_prio_masking() && hwstate.pmr < GIC_PRIO_IRQON)
This concept of being less than or greater than is not easy to understand.
> + return true;
>
> -static __always_inline bool __pmr_irqs_disabled(void)
> -{
> - return __pmr_irqs_disabled_flags(__pmr_local_save_flags());
> + return false;
> }
>
> static __always_inline bool arch_irqs_disabled(void)
> {
> - if (system_uses_irq_prio_masking()) {
> - return __pmr_irqs_disabled();
> - } else {
> - return __daif_irqs_disabled();
> - }
> -}
> -
> -static __always_inline arm64_exc_hwstate_t __daif_local_irq_save(void)
> -{
> - arm64_exc_hwstate_t hwstate = __daif_local_save_flags();
> -
> - __daif_local_irq_disable();
> -
> - return hwstate;
> -}
> -
> -static __always_inline arm64_exc_hwstate_t __pmr_local_irq_save(void)
> -{
> - arm64_exc_hwstate_t hwstate = __pmr_local_save_flags();
> -
> - /*
> - * There are too many states with IRQs disabled, just keep the current
> - * state if interrupts are already disabled/masked.
> - */
> - if (!__pmr_irqs_disabled_flags(hwstate))
> - __pmr_local_irq_disable();
> -
> - return hwstate;
> + return arch_irqs_disabled_flags(arch_local_save_flags());
> }
>
> static __always_inline unsigned long arch_local_irq_save(void)
> {
> - if (system_uses_irq_prio_masking()) {
> - return __pmr_local_irq_save().flags;
> - } else {
> - return __daif_local_irq_save().flags;
> - }
> -}
> + unsigned long flags = arch_local_save_flags();
>
> -static __always_inline
> -void __daif_local_irq_restore(arm64_exc_hwstate_t hwstate)
> -{
> - barrier();
> - write_sysreg(hwstate.daif, daif);
> - barrier();
> -}
> + if (system_uses_irq_prio_masking())
> + __pmr_local_irq_disable();
> + else
> + __daif_local_irq_disable();
>
> -static __always_inline
> -void __pmr_local_irq_restore(arm64_exc_hwstate_t hwstate)
> -{
> - barrier();
> - write_sysreg_s(hwstate.pmr, SYS_ICC_PMR_EL1);
> - pmr_sync();
> - barrier();
> + return flags;
> }
>
> /*
> @@ -215,11 +146,14 @@ static __always_inline void arch_local_irq_restore(unsigned long flags)
> {
> arm64_exc_hwstate_t hwstate = { .flags = flags };
>
> + barrier();
> if (system_uses_irq_prio_masking()) {
> - __pmr_local_irq_restore(hwstate);
> + write_sysreg_s(hwstate.pmr, SYS_ICC_PMR_EL1);
> + pmr_sync();
> } else {
> - __daif_local_irq_restore(hwstate);
> + write_sysreg(hwstate.daif, daif);
> }
> + barrier();
> }
>
> #endif /* __ASM_IRQFLAGS_H */
> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
> index f7dc5fb9427d..192eb97cd50b 100644
> --- a/arch/arm64/include/asm/ptrace.h
> +++ b/arch/arm64/include/asm/ptrace.h
> @@ -205,7 +205,7 @@ static inline void forget_syscall(struct pt_regs *regs)
>
> #define irqs_priority_unmasked(regs) \
> (system_uses_irq_prio_masking() ? \
> - (regs)->pmr == GIC_PRIO_IRQON : \
> + (regs)->pmr >= GIC_PRIO_IRQON : \
> true)
>
> static __always_inline bool regs_irqs_disabled(const struct pt_regs *regs)
next prev parent reply other threads:[~2026-07-10 8:48 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 12:12 [RFC PATCH 00/36] arm64: Add support for FEAT_NMI Vladimir Murzin
2026-07-09 12:12 ` [RFC PATCH 01/36] arm64: ptrace: Remove INIT_PSTATE_EL2 Vladimir Murzin
2026-07-09 12:36 ` Jinjie Ruan
2026-07-09 12:12 ` [RFC PATCH 02/36] arm64: debug: don't mask DAIF for mdscr_write() Vladimir Murzin
2026-07-09 13:06 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 03/36] arm64: hibernate: mask DAIF before restoring hibernated kernel Vladimir Murzin
2026-07-09 13:19 ` Jinjie Ruan
2026-07-10 3:00 ` Jinjie Ruan
2026-07-10 3:28 ` Jinjie Ruan
2026-07-10 3:40 ` Liao, Chang
2026-07-09 12:13 ` [RFC PATCH 04/36] arm64: suspend: rely on daif helpers to handle PMR Vladimir Murzin
2026-07-10 3:41 ` Jinjie Ruan
2026-07-10 4:06 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 05/36] arm64: suspend: Initialize PMR on resume Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 06/36] arm64: irq: introduce a helper for GIC priority initialization Vladimir Murzin
2026-07-10 4:16 ` Jinjie Ruan
2026-07-10 7:29 ` Jinjie Ruan
2026-07-10 7:44 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 07/36] arm64: entry: mask DAIF before returning from C EL1 handlers Vladimir Murzin
2026-07-10 7:57 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 08/36] irqchip/gic-v3: make the unmasking of pseudo-NMIs explicit when handling IRQs Vladimir Murzin
2026-07-10 8:04 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 09/36] arm64: irqflags: introduce arm64-specific irqflags type Vladimir Murzin
2026-07-10 8:40 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 10/36] arm64: irqflags: save and use both DAIF and PMR Vladimir Murzin
2026-07-10 3:53 ` Liao, Chang
2026-07-10 8:11 ` Jinjie Ruan
2026-07-10 8:47 ` Jinjie Ruan [this message]
2026-07-10 9:02 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 11/36] arm64: interrupts: introduce interrupt masking helpers for entry code Vladimir Murzin
2026-07-10 9:19 ` Jinjie Ruan
2026-07-10 9:39 ` Liao, Chang
2026-07-10 9:39 ` Jinjie Ruan
2026-07-10 9:44 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 12/36] arm64: entry: replace DAIF helpers with entry helpers Vladimir Murzin
2026-07-10 9:36 ` Jinjie Ruan
2026-07-10 10:01 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 13/36] arm64: process: Use helper to check exception state Vladimir Murzin
2026-07-10 10:00 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 14/36] arm64: interrupts: introduce generic interrupt masking helpers Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 15/36] arm64: replace local_daif helpers Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 16/36] arm64: cpuidle: use new helpers to bypass interrupt priority masking Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 17/36] arm64: remove daifflags.h Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 18/36] arm64: gicv3: remove GIC_PRIO_PSR_I_SET Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 19/36] arm64: cpufeature: Remove system_has_prio_mask_debugging() Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 20/36] arm64: irqflags: Switch to CONFIG_DEBUG_IRQFLAGS Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 21/36] arm64: Kconfig: Remove CONFIG_ARM64_DEBUG_PRIORITY_MASKING Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 22/36] efi/runtime-wrappers: Permit architectures to override IRQ flags checks Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 23/36] arm64/efi: Implement override for " Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 24/36] arm64: booting: Document boot requirements for FEAT_NMI Vladimir Murzin
2026-07-10 2:39 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 25/36] arm64: sysreg: Add definitions for immediate versions of MSR ALLINT Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 26/36] arm64: ptrace: Add PSR_ALLINT_BIT Vladimir Murzin
2026-07-10 2:16 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 27/36] arm64: idreg: Add an override for FEAT_NMI Vladimir Murzin
2026-07-10 2:17 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 28/36] arm64: cpufeature: Detect PE support " Vladimir Murzin
2026-07-10 2:25 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 29/36] arm64: nmi: Manage masking for superpriority interrupts Vladimir Murzin
2026-07-10 10:04 ` Jinjie Ruan
2026-07-10 10:08 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 30/36] arm64: irq: Report FEAT_NMI masking local IRQs Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 31/36] arm64: nmi: Add handling of superpriority interrupts as NMIs Vladimir Murzin
2026-07-10 10:13 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 32/36] arm64: suspend: Always initialise PSTATE.ALLINT Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 33/36] arm64/efi: Add ALLINT to IRQ flags checks Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 34/36] arm64: kprobes: Disable NMIs Vladimir Murzin
2026-07-09 12:13 ` [RFC PATCH 35/36] arm64: nmi: Add Kconfig for NMI Vladimir Murzin
2026-07-10 2:41 ` Jinjie Ruan
2026-07-09 12:13 ` [RFC PATCH 36/36] irqchip/gic-v3: Implement FEAT_GICv3_NMI support Vladimir Murzin
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