From: Josef Lusticky <josef@lusticky.cz>
To: linux-arm-kernel@lists.infradead.org
Cc: maxime.ripard@bootlin.com, wens@csie.org,
Josef Lusticky <josef@lusticky.cz>
Subject: [PATCH 1/3] ARM: dts: sun5i: Add SPI0 pins
Date: Wed, 23 Jan 2019 10:43:32 +0100 [thread overview]
Message-ID: <20190123094334.11030-2-josef@lusticky.cz> (raw)
In-Reply-To: <20190123094334.11030-1-josef@lusticky.cz>
Add a separate pinctrl nodes for the SPI0 pins shared between
the A10s, A13 and GR8.
Signed-off-by: Josef Lusticky <josef@lusticky.cz>
---
arch/arm/boot/dts/sun5i.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 5497d985c54a..897340ee27c7 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -536,6 +536,16 @@
function = "nand0";
};
+ spi0_pc_pins: spi0-pc-pins {
+ pins = "PC2", "PC0", "PC1";
+ function = "spi0";
+ };
+
+ spi0_cs0_pc_pin: spi0-cs0-pc-pin {
+ pins = "PC3";
+ function = "spi0";
+ };
+
spi2_pe_pins: spi2-pe-pins {
pins = "PE1", "PE2", "PE3";
function = "spi2";
--
2.20.1
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next prev parent reply other threads:[~2019-01-23 9:44 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-23 9:43 [PATCH 0/3] Add SPI pinctrl nodes to sun5i SoCs Josef Lusticky
2019-01-23 9:43 ` Josef Lusticky [this message]
2019-01-23 9:43 ` [PATCH 2/3] ARM: dts: sun5i: GR8: Add SPI2 PB pins Josef Lusticky
2019-01-23 9:43 ` [PATCH 3/3] ARM: dts: sun5i: A10s: Add SPI1_CS1 PG13 pin Josef Lusticky
2019-01-23 10:36 ` [PATCH 0/3] Add SPI pinctrl nodes to sun5i SoCs Maxime Ripard
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