From: Josef Lusticky <josef@lusticky.cz>
To: linux-arm-kernel@lists.infradead.org
Cc: maxime.ripard@bootlin.com, wens@csie.org,
Josef Lusticky <josef@lusticky.cz>
Subject: [PATCH 3/3] ARM: dts: sun5i: A10s: Add SPI1_CS1 PG13 pin
Date: Wed, 23 Jan 2019 10:43:34 +0100 [thread overview]
Message-ID: <20190123094334.11030-4-josef@lusticky.cz> (raw)
In-Reply-To: <20190123094334.11030-1-josef@lusticky.cz>
Add a separate pinctrl node for the SPI1_CS1 pin on the A10s PG bank.
Signed-off-by: Josef Lusticky <josef@lusticky.cz>
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 09c486b608b2..156fefc045ac 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -153,6 +153,11 @@
drive-strength = <30>;
};
+ spi1_cs1_pg_pin: spi1-cs1-pg-pin {
+ pins = "PG13";
+ function = "spi2";
+ };
+
spi2_pb_pins: spi2-pb-pins {
pins = "PB12", "PB13", "PB14";
function = "spi2";
--
2.20.1
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next prev parent reply other threads:[~2019-01-23 9:45 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-23 9:43 [PATCH 0/3] Add SPI pinctrl nodes to sun5i SoCs Josef Lusticky
2019-01-23 9:43 ` [PATCH 1/3] ARM: dts: sun5i: Add SPI0 pins Josef Lusticky
2019-01-23 9:43 ` [PATCH 2/3] ARM: dts: sun5i: GR8: Add SPI2 PB pins Josef Lusticky
2019-01-23 9:43 ` Josef Lusticky [this message]
2019-01-23 10:36 ` [PATCH 0/3] Add SPI pinctrl nodes to sun5i SoCs Maxime Ripard
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