Re: [PATCH v6 04/13] coresight: etm4x: exclude ss_status from drvdata->config

[Leo Yan <leo.yan@arm.com>]

On Sat, May 09, 2026 at 12:55:19PM +0100, Yeoreum Yun wrote:

> > >  	caps->nr_ss_cmp = FIELD_GET(TRCIDR4_NUMSSCC_MASK, etmidr4);
> > >  	for (i = 0; i < caps->nr_ss_cmp; i++) {
> > > -		drvdata->config.ss_status[i] =
> > > -			etm4x_relaxed_read32(csa, TRCSSCSRn(i));
> > > +		drvdata->ss_status[i] = etm4x_relaxed_read32(csa, TRCSSCSRn(i));
> > > +		drvdata->ss_status[i] &= (TRCSSCSRn_PC | TRCSSCSRn_DV |
> > > +					  TRCSSCSRn_DA | TRCSSCSRn_INST);
> > 
> > It is fine for read these capacity bits when probe, but we need to clear
> > status when a session is starting to avoid the stale value left from
> > previous session:
> > 
> >   drvdata->ss_status[idx] &= ~(TRCSSCSRn_STATUS | TRCSSCSRn_PENDING);

> But, I want to clarify that the perf is one of exceptional case
> since the "etm4_parse_event_config()" is called at the "resume" of session
> for per-thread mode event.

Good point!

The right way would move etm4_parse_event_config() to setup AUX phase
(e.g., call it when build path).

> Anyway as we discussed, since now there have been no issue
> relavant for those bits, let the clear drvdata->ss_status at the
> etm4_parse_event_config().

I am fine to clear status in etm4_parse_event_config() in this series.

Thanks,
Leo