[PATCH net-next v2 0/2] net: stmmac: dwmac-rk: refclk for crystal-less RGMII PHY

[PATCH net-next v2 0/2] net: stmmac: dwmac-rk: refclk for crystal-less RGMII PHY

[Jiaxing Hu]

The ArmSoM CM5 has an on-module MotorComm YT8531 RGMII PHY with no
crystal. It takes its 25 MHz reference from the SoC (clk_mac_refout /
REFCLKO25M), but rk_gmac_clk_init() only requests that clock group for
RMII, so in RGMII the clock stayed off and the PHY did not answer on
MDIO.

Patch 2 requests the group whenever the SoC drives the clock
(clock_in_out = "output"). Patch 1 updates the binding, since RGMII with
clock_in_out = "output" is now valid.

Changes in v2:
- Add patch 1 documenting clock_in_out = "output" for RGMII in the
  rockchip-dwmac binding (Maxime Chevallier).

Jiaxing Hu (2):
  dt-bindings: net: rockchip-dwmac: allow output clock_in_out for RGMII
  net: stmmac: dwmac-rk: enable the reference clock for output mode

 Documentation/devicetree/bindings/net/rockchip-dwmac.yaml | 5 +++--
 drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c            | 4 ++--
 2 files changed, 5 insertions(+), 4 deletions(-)

-- 
2.43.0

[PATCH net-next v2 1/2] dt-bindings: net: rockchip-dwmac: allow output clock_in_out for RGMII

[Jiaxing Hu]

The clock_in_out description said RGMII must use "input". That is no
longer true: an RGMII PHY with no crystal can take its 25 MHz reference
from the SoC, in which case clock_in_out is "output". Document it.

Signed-off-by: Jiaxing Hu <gahing@gahingwoo.com>
---
 Documentation/devicetree/bindings/net/rockchip-dwmac.yaml | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml
index 80c252845..d5816d6dc 100644
--- a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml
@@ -89,8 +89,9 @@ properties:
 
   clock_in_out:
     description:
-      For RGMII, it must be "input", means main clock(125MHz)
-      is not sourced from SoC's PLL, but input from PHY.
+      For RGMII, "input" means the 125MHz main clock is input from the
+      PHY, not sourced from the SoC PLL; "output" means the SoC provides
+      a 25MHz reference clock out to a crystal-less PHY.
       For RMII, "input" means PHY provides the reference clock(50MHz),
       "output" means GMAC provides the reference clock.
     $ref: /schemas/types.yaml#/definitions/string
-- 
2.43.0

[PATCH net-next v2 2/2] net: stmmac: dwmac-rk: enable the reference clock for output mode

[Jiaxing Hu]

rk_gmac_clk_init() only requests the refout clock group for RMII. The
ArmSoM CM5 has an on-module YT8531 RGMII PHY with no crystal that needs
the SoC 25 MHz reference (clk_mac_refout), so in RGMII the clock was
never enabled and the PHY did not respond on MDIO.

Request the group whenever the SoC drives the clock (clock_in_out =
"output"), not just for RMII. The clocks are optional, so other boards
are unaffected.

Signed-off-by: Jiaxing Hu <gahing@gahingwoo.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 8d7042e68..dd060e4b8 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -1112,7 +1112,7 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)
 	bsp_priv->clk_enabled = false;
 
 	bsp_priv->num_clks = ARRAY_SIZE(rk_clocks);
-	if (phy_iface == PHY_INTERFACE_MODE_RMII)
+	if (phy_iface == PHY_INTERFACE_MODE_RMII || !bsp_priv->clock_input)
 		bsp_priv->num_clks += ARRAY_SIZE(rk_rmii_clocks);
 
 	bsp_priv->clks = devm_kcalloc(dev, bsp_priv->num_clks,
@@ -1123,7 +1123,7 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)
 	for (i = 0; i < ARRAY_SIZE(rk_clocks); i++)
 		bsp_priv->clks[i].id = rk_clocks[i];
 
-	if (phy_iface == PHY_INTERFACE_MODE_RMII) {
+	if (phy_iface == PHY_INTERFACE_MODE_RMII || !bsp_priv->clock_input) {
 		for (j = 0; j < ARRAY_SIZE(rk_rmii_clocks); j++)
 			bsp_priv->clks[i++].id = rk_rmii_clocks[j];
 	}
-- 
2.43.0