* [PATCH 1/3] arm64: dts: ti: k3-am625: add standby cpu idle state
2026-08-20 19:28 [PATCH 0/3] arm64: dts: ti: add standby cpu idle state to AM62 SoCs Kendall Willis
@ 2026-08-20 19:28 ` Kendall Willis
2026-09-07 10:30 ` Scaria Kochidanadu
2026-08-20 19:28 ` [PATCH 2/3] arm64: dts: ti: k3-am62a7: " Kendall Willis
2026-08-20 19:28 ` [PATCH 3/3] arm64: dts: ti: k3-am62p5: " Kendall Willis
2 siblings, 1 reply; 8+ messages in thread
From: Kendall Willis @ 2026-08-20 19:28 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: s-kochidanadu, a-kaur, s-tripathi1, vishalm, k-willis,
linux-arm-kernel, devicetree, linux-kernel
Allow the A53 cores to enter standby mode on the AM62x SoC.
The standby idle state enables the CPU cores to enter WFI through the
CPUIdle framework.
Signed-off-by: Kendall Willis <k-willis@ti.com>
---
arch/arm64/boot/dts/ti/k3-am625.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am625.dtsi b/arch/arm64/boot/dts/ti/k3-am625.dtsi
index c249883a8a8d846aa21092c4c341fd443cfcec15..7ba339d5875926717896fc92fb2fa6d2b8d0026a 100644
--- a/arch/arm64/boot/dts/ti/k3-am625.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am625.dtsi
@@ -51,6 +51,7 @@ cpu0: cpu@0 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 135 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
};
cpu1: cpu@1 {
@@ -68,6 +69,7 @@ cpu1: cpu@1 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 136 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
};
cpu2: cpu@2 {
@@ -85,6 +87,7 @@ cpu2: cpu@2 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 137 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
};
cpu3: cpu@3 {
@@ -102,6 +105,20 @@ cpu3: cpu@3 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 138 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
+ };
+
+ cpu_idle_states: idle-states {
+ entry-method = "psci";
+
+ CPU_STANDBY: cpu-standby {
+ compatible = "arm,idle-state";
+ entry-latency-us = <100>;
+ exit-latency-us = <50>;
+ idle-state-name = "standby";
+ min-residency-us = <500>;
+ arm,psci-suspend-param = <0x00000001>;
+ };
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH 1/3] arm64: dts: ti: k3-am625: add standby cpu idle state
2026-08-20 19:28 ` [PATCH 1/3] arm64: dts: ti: k3-am625: add standby cpu idle state Kendall Willis
@ 2026-09-07 10:30 ` Scaria Kochidanadu
2026-09-09 11:22 ` Nishanth Menon
0 siblings, 1 reply; 8+ messages in thread
From: Scaria Kochidanadu @ 2026-09-07 10:30 UTC (permalink / raw)
To: Kendall Willis, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: a-kaur, s-tripathi1, vishalm, linux-arm-kernel, devicetree,
linux-kernel
On 21/08/26 00:58, Kendall Willis wrote:
> Allow the A53 cores to enter standby mode on the AM62x SoC.
> The standby idle state enables the CPU cores to enter WFI through the
> CPUIdle framework.
>
> Signed-off-by: Kendall Willis <k-willis@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-am625.dtsi | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am625.dtsi b/arch/arm64/boot/dts/ti/k3-am625.dtsi
> index c249883a8a8d846aa21092c4c341fd443cfcec15..7ba339d5875926717896fc92fb2fa6d2b8d0026a 100644
> --- a/arch/arm64/boot/dts/ti/k3-am625.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am625.dtsi
> @@ -51,6 +51,7 @@ cpu0: cpu@0 {
> operating-points-v2 = <&a53_opp_table>;
> clocks = <&k3_clks 135 0>;
> #cooling-cells = <2>;
> + cpu-idle-states = <&CPU_STANDBY>;
> };
>
> cpu1: cpu@1 {
> @@ -68,6 +69,7 @@ cpu1: cpu@1 {
> operating-points-v2 = <&a53_opp_table>;
> clocks = <&k3_clks 136 0>;
> #cooling-cells = <2>;
> + cpu-idle-states = <&CPU_STANDBY>;
> };
>
> cpu2: cpu@2 {
> @@ -85,6 +87,7 @@ cpu2: cpu@2 {
> operating-points-v2 = <&a53_opp_table>;
> clocks = <&k3_clks 137 0>;
> #cooling-cells = <2>;
> + cpu-idle-states = <&CPU_STANDBY>;
> };
>
> cpu3: cpu@3 {
> @@ -102,6 +105,20 @@ cpu3: cpu@3 {
> operating-points-v2 = <&a53_opp_table>;
> clocks = <&k3_clks 138 0>;
> #cooling-cells = <2>;
> + cpu-idle-states = <&CPU_STANDBY>;
> + };
> +
> + cpu_idle_states: idle-states {
> + entry-method = "psci";
> +
> + CPU_STANDBY: cpu-standby {
nit: The property ordering looks a bit unusual. Could we move the
'idle-state-name' immediately after 'compatible'
Scaria
> + compatible = "arm,idle-state";
> + entry-latency-us = <100>;
> + exit-latency-us = <50>;
> + idle-state-name = "standby";
> + min-residency-us = <500>;
> + arm,psci-suspend-param = <0x00000001>;
> + };
> };
> };
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 1/3] arm64: dts: ti: k3-am625: add standby cpu idle state
2026-09-07 10:30 ` Scaria Kochidanadu
@ 2026-09-09 11:22 ` Nishanth Menon
2026-09-11 16:02 ` Kendall Willis
0 siblings, 1 reply; 8+ messages in thread
From: Nishanth Menon @ 2026-09-09 11:22 UTC (permalink / raw)
To: Scaria Kochidanadu
Cc: Kendall Willis, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, a-kaur, s-tripathi1, vishalm,
linux-arm-kernel, devicetree, linux-kernel
On 16:00-20260907, Scaria Kochidanadu wrote:
>
> On 21/08/26 00:58, Kendall Willis wrote:
> > Allow the A53 cores to enter standby mode on the AM62x SoC.
> > The standby idle state enables the CPU cores to enter WFI through the
> > CPUIdle framework.
A very basic question: Default Idle in kernel *is* WFI. So, what kind of
savings are we seeing by explicitly enabling a cpuidle state that goes
to WFI and more importantly why?
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
https://ti.com/opensource
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] arm64: dts: ti: k3-am625: add standby cpu idle state
2026-09-09 11:22 ` Nishanth Menon
@ 2026-09-11 16:02 ` Kendall Willis
2026-09-11 19:24 ` Nishanth Menon
0 siblings, 1 reply; 8+ messages in thread
From: Kendall Willis @ 2026-09-11 16:02 UTC (permalink / raw)
To: Nishanth Menon
Cc: Scaria Kochidanadu, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, a-kaur, s-tripathi1, vishalm,
linux-arm-kernel, devicetree, linux-kernel
Hi Nishanth,
On 06:22-20260909, Nishanth Menon wrote:
> On 16:00-20260907, Scaria Kochidanadu wrote:
> >
> > On 21/08/26 00:58, Kendall Willis wrote:
> > > Allow the A53 cores to enter standby mode on the AM62x SoC.
> > > The standby idle state enables the CPU cores to enter WFI through the
> > > CPUIdle framework.
>
> A very basic question: Default Idle in kernel *is* WFI. So, what kind of
> savings are we seeing by explicitly enabling a cpuidle state that goes
> to WFI and more importantly why?
>
There is no additional power savings from the added cpuidle state.
Adding the cpuidle state allows users to use cpuidle to see see stats
about WFI from userspace.
Best,
Kendall
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] arm64: dts: ti: k3-am625: add standby cpu idle state
2026-09-11 16:02 ` Kendall Willis
@ 2026-09-11 19:24 ` Nishanth Menon
0 siblings, 0 replies; 8+ messages in thread
From: Nishanth Menon @ 2026-09-11 19:24 UTC (permalink / raw)
To: Kendall Willis
Cc: Scaria Kochidanadu, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, a-kaur, s-tripathi1, vishalm,
linux-arm-kernel, devicetree, linux-kernel
On 11:02-20260911, Kendall Willis wrote:
> Hi Nishanth,
> On 06:22-20260909, Nishanth Menon wrote:
> > On 16:00-20260907, Scaria Kochidanadu wrote:
> > >
> > > On 21/08/26 00:58, Kendall Willis wrote:
> > > > Allow the A53 cores to enter standby mode on the AM62x SoC.
> > > > The standby idle state enables the CPU cores to enter WFI through the
> > > > CPUIdle framework.
> >
> > A very basic question: Default Idle in kernel *is* WFI. So, what kind of
> > savings are we seeing by explicitly enabling a cpuidle state that goes
> > to WFI and more importantly why?
> >
>
> There is no additional power savings from the added cpuidle state.
> Adding the cpuidle state allows users to use cpuidle to see see stats
> about WFI from userspace.
If you mean how many times the processor hit WFI? mpstat -P ALL 1 ?
cat /proc/uptime (second field)?
Will drop the series for want of better justification to carry these
patches.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
https://ti.com/opensource
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/3] arm64: dts: ti: k3-am62a7: add standby cpu idle state
2026-08-20 19:28 [PATCH 0/3] arm64: dts: ti: add standby cpu idle state to AM62 SoCs Kendall Willis
2026-08-20 19:28 ` [PATCH 1/3] arm64: dts: ti: k3-am625: add standby cpu idle state Kendall Willis
@ 2026-08-20 19:28 ` Kendall Willis
2026-08-20 19:28 ` [PATCH 3/3] arm64: dts: ti: k3-am62p5: " Kendall Willis
2 siblings, 0 replies; 8+ messages in thread
From: Kendall Willis @ 2026-08-20 19:28 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: s-kochidanadu, a-kaur, s-tripathi1, vishalm, k-willis,
linux-arm-kernel, devicetree, linux-kernel
Allow the A53 cores to enter standby mode on the AM62AX SoC.
The standby idle state enables the CPU cores to enter WFI through the
CPUIdle framework.
Signed-off-by: Kendall Willis <k-willis@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62a7.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi
index b6e5eee993706d6e868ead810202c90e69cd0394..c3adb7027560b4269927517ac4788e354ae2027e 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi
@@ -51,6 +51,7 @@ cpu0: cpu@0 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 135 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
};
cpu1: cpu@1 {
@@ -68,6 +69,7 @@ cpu1: cpu@1 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 136 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
};
cpu2: cpu@2 {
@@ -85,6 +87,7 @@ cpu2: cpu@2 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 137 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
};
cpu3: cpu@3 {
@@ -102,6 +105,20 @@ cpu3: cpu@3 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 138 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
+ };
+
+ cpu_idle_states: idle-states {
+ entry-method = "psci";
+
+ CPU_STANDBY: cpu-standby {
+ compatible = "arm,idle-state";
+ entry-latency-us = <100>;
+ exit-latency-us = <50>;
+ idle-state-name = "standby";
+ min-residency-us = <500>;
+ arm,psci-suspend-param = <0x00000001>;
+ };
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 3/3] arm64: dts: ti: k3-am62p5: add standby cpu idle state
2026-08-20 19:28 [PATCH 0/3] arm64: dts: ti: add standby cpu idle state to AM62 SoCs Kendall Willis
2026-08-20 19:28 ` [PATCH 1/3] arm64: dts: ti: k3-am625: add standby cpu idle state Kendall Willis
2026-08-20 19:28 ` [PATCH 2/3] arm64: dts: ti: k3-am62a7: " Kendall Willis
@ 2026-08-20 19:28 ` Kendall Willis
2 siblings, 0 replies; 8+ messages in thread
From: Kendall Willis @ 2026-08-20 19:28 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: s-kochidanadu, a-kaur, s-tripathi1, vishalm, k-willis,
linux-arm-kernel, devicetree, linux-kernel
Allow the A53 cores to enter standby mode on the AM62PX SoC.
The standby idle state enables the CPU cores to enter WFI through the
CPUIdle framework.
Signed-off-by: Kendall Willis <k-willis@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62p5.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
index 8982a7b9f1a6a1d1a0eebe9342fdfa5d46245159..74a588e94e22a9addb44b2df495d5a8ed75967d4 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
@@ -50,6 +50,7 @@ cpu0: cpu@0 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 135 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
};
cpu1: cpu@1 {
@@ -67,6 +68,7 @@ cpu1: cpu@1 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 136 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
};
cpu2: cpu@2 {
@@ -84,6 +86,7 @@ cpu2: cpu@2 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 137 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
};
cpu3: cpu@3 {
@@ -101,6 +104,20 @@ cpu3: cpu@3 {
operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 138 0>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_STANDBY>;
+ };
+
+ cpu_idle_states: idle-states {
+ entry-method = "psci";
+
+ CPU_STANDBY: cpu-standby {
+ compatible = "arm,idle-state";
+ entry-latency-us = <100>;
+ exit-latency-us = <50>;
+ idle-state-name = "standby";
+ min-residency-us = <500>;
+ arm,psci-suspend-param = <0x00000001>;
+ };
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread