From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com
Subject: Re: [PATCH V2 0/3] aarch64: Enable access for FEAT_D128 registers in EL1/EL2
Date: Mon, 29 Jul 2024 10:10:32 +0530 [thread overview]
Message-ID: <22011be2-484d-47ec-9f5b-6b3104e47c9f@arm.com> (raw)
In-Reply-To: <20240729043606.871451-1-anshuman.khandual@arm.com>
On 7/29/24 10:06, Anshuman Khandual wrote:
> This series enables access for FEAT_D128 relevant registers in EL1/EL2 via
> setting respective bits in SCR_EL3, when their corresponding features are
> detected.
>
> --------------------------------------------------------------
> | FEAT_D128 | ID_AA64MMFR3_EL1_D128 | SCR_EL3_D128En |
> | FEAT_SCTLR2 | ID_AA64MMFR3_EL1_SCTLRX | SCR_EL3_SCTLR2En |
> | FEAT_THE | ID_AA64PFR1_EL1_THE | SCR_EL3_RCWMASKEn |
> --------------------------------------------------------------
>
> Changes in V2:
>
> - Moved up the patch related to SCTLR2_ELx from [PATCH 2/3] to [PATCH 1/3]
> - Updated the commit message for the above mentioned patch
> - Fixed the commit message s/D128En/SCTLR2En as the enabling bit
> - Reset SCTLR2_ELx registers so that unaware kernels do not get surprises
>
> Changes in V1:
>
> https://lore.kernel.org/all/20240723110630.483871-1-anshuman.khandual@arm.com/
>
> Anshuman Khandual (3):
> aarch64: Enable access into SCTLR2_ELx registers from EL2 and below
> aarch64: Enable access into 128 bit system registers from EL2 and below
> aarch64: Enable access into RCW[S]MASK_EL1 registers from EL2 and below
>
> arch/aarch64/include/asm/cpu.h | 11 ++++++++++-
> arch/aarch64/init.c | 12 ++++++++++++
> 2 files changed, 22 insertions(+), 1 deletion(-)
>
Oops, forgot to change PATCH as boot-wrapper for differentiation once again.
next prev parent reply other threads:[~2024-07-29 4:41 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-29 4:36 [PATCH V2 0/3] aarch64: Enable access for FEAT_D128 registers in EL1/EL2 Anshuman Khandual
2024-07-29 4:36 ` [PATCH V2 1/3] aarch64: Enable access into SCTLR2_ELx registers from EL2 and below Anshuman Khandual
2024-07-29 4:36 ` [PATCH V2 2/3] aarch64: Enable access into 128 bit system " Anshuman Khandual
2024-07-29 4:36 ` [PATCH V2 3/3] aarch64: Enable access into RCW[S]MASK_EL1 " Anshuman Khandual
2024-07-29 4:40 ` Anshuman Khandual [this message]
2024-07-29 13:29 ` [PATCH V2 0/3] aarch64: Enable access for FEAT_D128 registers in EL1/EL2 Mark Rutland
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=22011be2-484d-47ec-9f5b-6b3104e47c9f@arm.com \
--to=anshuman.khandual@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=mark.rutland@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox