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From: Meghana Malladi <m-malladi@ti.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: <vigneshr@ti.com>, <horms@kernel.org>, <jan.kiszka@siemens.com>,
	<diogo.ivo@siemens.com>, <pabeni@redhat.com>, <kuba@kernel.org>,
	<edumazet@google.com>, <davem@davemloft.net>,
	<andrew+netdev@lunn.ch>, <linux-kernel@vger.kernel.org>,
	<vadim.fedorenko@linux.dev>, <netdev@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <srk@ti.com>,
	Roger Quadros <rogerq@kernel.org>, <danishanwar@ti.com>
Subject: Re: [PATCH net v2] net: ti: icssg-prueth: Fix 1 PPS sync
Date: Mon, 28 Oct 2024 16:35:07 +0530	[thread overview]
Message-ID: <a2848e9f-028e-4d58-87e4-50848fe4bca1@ti.com> (raw)
In-Reply-To: <2288a9a9-f9d0-4414-80a2-e11ba66fad50@lunn.ch>



On 25/10/24 18:52, Andrew Lunn wrote:
> On Fri, Oct 25, 2024 at 11:17:44AM +0530, Meghana Malladi wrote:
>>
>>
>> On 25/10/24 01:25, Andrew Lunn wrote:
>>>> +static inline u64 icssg_readq(const void __iomem *addr)
>>>> +{
>>>> +	return readl(addr) + ((u64)readl(addr + 4) << 32);
>>>> +}
>>>> +
>>>> +static inline void icssg_writeq(u64 val, void __iomem *addr)
>>>> +{
>>>> +	writel(lower_32_bits(val), addr);
>>>> +	writel(upper_32_bits(val), addr + 4);
>>>> +}
>>>
>>> Could readq() and writeq() be used, rather than your own helpers?
>>>
>>> 	Andrew
>>>
>> The addresses we are trying to read here are not 64-bit aligned, hence using
>> our own helpers to read the 64-bit value.
> 
> Ah, you should document this, because somebody might do a drive by
> patch converting this to readq()/write(q).
> 
> Alternatively, i think hi_lo_writeq() would work.
> 
> 	Andrew
I tried hi_lo_readq() and hi_lo_writeq(), and it is fitting my 
requirement. Thanks, I will update it.

Regards,
Meghana


      reply	other threads:[~2024-10-28 11:09 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-24 11:31 [PATCH net v2] net: ti: icssg-prueth: Fix 1 PPS sync Meghana Malladi
2024-10-24 13:16 ` Vadim Fedorenko
2024-10-24 13:33 ` Anwar, Md Danish
2024-10-24 19:55 ` Andrew Lunn
2024-10-25  5:47   ` Meghana Malladi
2024-10-25 13:22     ` Andrew Lunn
2024-10-28 11:05       ` Meghana Malladi [this message]

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