From: Frank Li <Frank.li@nxp.com>
To: Marek Vasut <marek.vasut@mailbox.org>
Cc: dri-devel@lists.freedesktop.org, Abel Vesa <abelvesa@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Liu Ying <victor.liu@nxp.com>,
Lucas Stach <l.stach@pengutronix.de>, Peng Fan <peng.fan@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Rob Herring <robh@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH 04/39] drm/imx: dc: Use bulk clock
Date: Mon, 13 Oct 2025 12:54:12 -0400 [thread overview]
Message-ID: <aO0utF930vhlJFl8@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20251011170213.128907-5-marek.vasut@mailbox.org>
On Sat, Oct 11, 2025 at 06:51:19PM +0200, Marek Vasut wrote:
> Switch to bulk clock operations, as many of the blocks present in DC
s/operations/API
> use multiple clock on i.MX95. The use of bulk clock operations allows
> the driver to seamlessly handle one or multiple clock.
>
> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
> ---
> Cc: Abel Vesa <abelvesa@kernel.org>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> Cc: Liu Ying <victor.liu@nxp.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: devicetree@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-clk@vger.kernel.org
> ---
> drivers/gpu/drm/imx/dc/dc-drv.c | 14 ++++++++------
> drivers/gpu/drm/imx/dc/dc-ic.c | 14 ++++++++------
> drivers/gpu/drm/imx/dc/dc-pe.c | 12 ++++++------
> drivers/gpu/drm/imx/dc/dc-pe.h | 3 ++-
> 4 files changed, 24 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/imx/dc/dc-drv.c b/drivers/gpu/drm/imx/dc/dc-drv.c
> index f108964bf89f4..2717c92aba6c5 100644
> --- a/drivers/gpu/drm/imx/dc/dc-drv.c
> +++ b/drivers/gpu/drm/imx/dc/dc-drv.c
> @@ -31,7 +31,8 @@
>
> struct dc_priv {
> struct drm_device *drm;
> - struct clk *clk_cfg;
> + struct clk_bulk_data *clk_cfg;
> + int clk_cfg_count;
> };
>
> DEFINE_DRM_GEM_DMA_FOPS(dc_drm_driver_fops);
> @@ -163,10 +164,11 @@ static int dc_probe(struct platform_device *pdev)
> if (!priv)
> return -ENOMEM;
>
> - priv->clk_cfg = devm_clk_get(&pdev->dev, NULL);
> - if (IS_ERR(priv->clk_cfg))
> - return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk_cfg),
> + ret = devm_clk_bulk_get_all(&pdev->dev, &priv->clk_cfg);
> + if (ret < 0)
> + return dev_err_probe(&pdev->dev, ret,
> "failed to get cfg clock\n");
> + priv->clk_cfg_count = ret;
>
> dev_set_drvdata(&pdev->dev, priv);
>
> @@ -201,7 +203,7 @@ static int dc_runtime_suspend(struct device *dev)
> {
> struct dc_priv *priv = dev_get_drvdata(dev);
>
> - clk_disable_unprepare(priv->clk_cfg);
> + clk_bulk_disable_unprepare(priv->clk_cfg_count, priv->clk_cfg);
>
> return 0;
> }
> @@ -211,7 +213,7 @@ static int dc_runtime_resume(struct device *dev)
> struct dc_priv *priv = dev_get_drvdata(dev);
> int ret;
>
> - ret = clk_prepare_enable(priv->clk_cfg);
> + ret = clk_bulk_prepare_enable(priv->clk_cfg_count, priv->clk_cfg);
> if (ret)
> dev_err(dev, "failed to enable cfg clock: %d\n", ret);
>
> diff --git a/drivers/gpu/drm/imx/dc/dc-ic.c b/drivers/gpu/drm/imx/dc/dc-ic.c
> index a270ae4030cdc..67441b349a7d2 100644
> --- a/drivers/gpu/drm/imx/dc/dc-ic.c
> +++ b/drivers/gpu/drm/imx/dc/dc-ic.c
> @@ -30,7 +30,8 @@
>
> struct dc_ic_data {
> struct regmap *regs;
> - struct clk *clk_axi;
> + struct clk_bulk_data *clk_axi;
I am not sure if "axi' is good name for bulk clks. Maybe use 'clks'. _axi
quite specific to special 'axi' clocks.
Frank
> + int clk_axi_count;
> int irq[IRQ_COUNT];
> struct irq_domain *domain;
> };
> @@ -136,10 +137,11 @@ static int dc_ic_probe(struct platform_device *pdev)
> if (IS_ERR(data->regs))
> return PTR_ERR(data->regs);
>
> - data->clk_axi = devm_clk_get(dev, NULL);
> - if (IS_ERR(data->clk_axi))
> - return dev_err_probe(dev, PTR_ERR(data->clk_axi),
> + ret = devm_clk_bulk_get_all(dev, &data->clk_axi);
> + if (ret < 0)
> + return dev_err_probe(dev, ret,
> "failed to get AXI clock\n");
> + data->clk_axi_count = ret;
>
> for (i = 0; i < IRQ_COUNT; i++) {
> /* skip the reserved IRQ */
> @@ -242,7 +244,7 @@ static int dc_ic_runtime_suspend(struct device *dev)
> {
> struct dc_ic_data *data = dev_get_drvdata(dev);
>
> - clk_disable_unprepare(data->clk_axi);
> + clk_bulk_disable_unprepare(data->clk_axi_count, data->clk_axi);
>
> return 0;
> }
> @@ -252,7 +254,7 @@ static int dc_ic_runtime_resume(struct device *dev)
> struct dc_ic_data *data = dev_get_drvdata(dev);
> int ret;
>
> - ret = clk_prepare_enable(data->clk_axi);
> + ret = clk_bulk_prepare_enable(data->clk_axi_count, data->clk_axi);
> if (ret)
> dev_err(dev, "failed to enable AXI clock: %d\n", ret);
>
> diff --git a/drivers/gpu/drm/imx/dc/dc-pe.c b/drivers/gpu/drm/imx/dc/dc-pe.c
> index 6676c22f3f458..eb96a6206cc6d 100644
> --- a/drivers/gpu/drm/imx/dc/dc-pe.c
> +++ b/drivers/gpu/drm/imx/dc/dc-pe.c
> @@ -27,10 +27,10 @@ static int dc_pe_bind(struct device *dev, struct device *master, void *data)
> if (!pe)
> return -ENOMEM;
>
> - pe->clk_axi = devm_clk_get(dev, NULL);
> - if (IS_ERR(pe->clk_axi))
> - return dev_err_probe(dev, PTR_ERR(pe->clk_axi),
> - "failed to get AXI clock\n");
> + ret = devm_clk_bulk_get_all(dev, &pe->clk_axi);
> + if (ret < 0)
> + return dev_err_probe(dev, ret, "failed to get AXI clock\n");
> + pe->clk_axi_count = ret;
>
> pe->dev = dev;
>
> @@ -99,7 +99,7 @@ static int dc_pe_runtime_suspend(struct device *dev)
> {
> struct dc_pe *pe = dev_get_drvdata(dev);
>
> - clk_disable_unprepare(pe->clk_axi);
> + clk_bulk_disable_unprepare(pe->clk_axi_count, pe->clk_axi);
>
> return 0;
> }
> @@ -109,7 +109,7 @@ static int dc_pe_runtime_resume(struct device *dev)
> struct dc_pe *pe = dev_get_drvdata(dev);
> int i, ret;
>
> - ret = clk_prepare_enable(pe->clk_axi);
> + ret = clk_bulk_prepare_enable(pe->clk_axi_count, pe->clk_axi);
> if (ret) {
> dev_err(dev, "failed to enable AXI clock: %d\n", ret);
> return ret;
> diff --git a/drivers/gpu/drm/imx/dc/dc-pe.h b/drivers/gpu/drm/imx/dc/dc-pe.h
> index f5e01a6eb9e91..ffeb1c7af1c9f 100644
> --- a/drivers/gpu/drm/imx/dc/dc-pe.h
> +++ b/drivers/gpu/drm/imx/dc/dc-pe.h
> @@ -67,7 +67,8 @@ struct dc_lb {
>
> struct dc_pe {
> struct device *dev;
> - struct clk *clk_axi;
> + struct clk_bulk_data *clk_axi;
> + int clk_axi_count;
> struct dc_cf *cf_safe[DC_DISPLAYS];
> struct dc_cf *cf_cont[DC_DISPLAYS];
> struct dc_ed *ed_safe[DC_DISPLAYS];
> --
> 2.51.0
>
next prev parent reply other threads:[~2025-10-13 16:54 UTC|newest]
Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-11 16:51 [PATCH 00/39] Add i.MX95 DPU/DSI/LVDS support Marek Vasut
2025-10-11 16:51 ` [PATCH 01/39] dt-bindings: display: imx: Document i.MX95 Display Controller DomainBlend Marek Vasut
2025-10-15 13:24 ` Rob Herring
2025-10-16 2:07 ` Liu Ying
2025-10-17 15:15 ` Marek Vasut
2025-10-18 6:09 ` Ying Liu
2025-11-02 16:41 ` Marek Vasut
2025-11-04 3:31 ` Liu Ying
2025-10-21 6:52 ` Krzysztof Kozlowski
2025-10-11 16:51 ` [PATCH 02/39] drm/imx: Add " Marek Vasut
2025-10-13 16:38 ` Frank Li
2025-10-14 11:50 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 03/39] dt-bindings: display: imx: Document i.MX95 Display Controller processing units Marek Vasut
2025-10-13 16:49 ` Frank Li
2025-10-14 11:52 ` Marek Vasut
2025-10-15 8:59 ` Liu Ying
2025-10-15 10:19 ` Marek Vasut
2025-10-16 2:28 ` Liu Ying
2025-10-16 2:58 ` Liu Ying
2025-10-17 15:18 ` Marek Vasut
2025-10-18 5:44 ` Ying Liu
2025-10-11 16:51 ` [PATCH 04/39] drm/imx: dc: Use bulk clock Marek Vasut
2025-10-13 16:54 ` Frank Li [this message]
2025-10-14 12:02 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 05/39] drm/imx: dc: Rework dc_subdev_get_id() to drop ARRAY_SIZE() use Marek Vasut
2025-10-13 16:56 ` Frank Li
2025-10-14 14:03 ` Marek Vasut
2025-10-14 15:11 ` Frank Li
2025-10-14 21:11 ` Marek Vasut
2025-10-15 9:14 ` Liu Ying
2025-10-15 14:31 ` Frank Li
2025-10-16 2:50 ` Liu Ying
2025-10-11 16:51 ` [PATCH 06/39] drm/imx: dc: Rename i.MX8QXP specific Link IDs Marek Vasut
2025-10-13 16:58 ` Frank Li
2025-10-11 16:51 ` [PATCH 07/39] drm/imx: dc: cf: Pass struct dc_subdev_info via OF match data Marek Vasut
2025-10-13 17:01 ` Frank Li
2025-10-11 16:51 ` [PATCH 08/39] drm/imx: dc: de: Pass struct dc_de_subdev_match_data " Marek Vasut
2025-10-13 17:05 ` Frank Li
2025-10-11 16:51 ` [PATCH 09/39] drm/imx: dc: ed: Rework dc_ed_pec_src_sel() to drop ARRAY_SIZE() use Marek Vasut
2025-10-13 18:24 ` Frank Li
2025-10-11 16:51 ` [PATCH 10/39] drm/imx: dc: ed: Pass struct dc_ed_subdev_match_data via OF match data Marek Vasut
2025-10-13 18:26 ` Frank Li
2025-10-11 16:51 ` [PATCH 11/39] drm/imx: dc: fg: Parametrize register access Marek Vasut
2025-10-13 18:29 ` Frank Li
2025-10-11 16:51 ` [PATCH 12/39] drm/imx: dc: ed: Pass struct dc_fg_subdev_match_data via OF match data Marek Vasut
2025-10-13 18:31 ` Frank Li
2025-10-11 16:51 ` [PATCH 13/39] drm/imx: dc: fu: Describe remaining register offsets Marek Vasut
2025-10-13 18:34 ` Frank Li
2025-10-11 16:51 ` [PATCH 14/39] drm/imx: dc: fu: Inline FRAC_OFFSET into FetchLayer and FetchWrap Marek Vasut
2025-10-13 18:39 ` Frank Li
2025-10-11 16:51 ` [PATCH 15/39] drm/imx: dc: fu: Pass struct dc_fu_subdev_match_data via OF match data Marek Vasut
2025-10-13 18:43 ` Frank Li
2025-10-11 16:51 ` [PATCH 16/39] drm/imx: dc: lb: Pass struct dc_lb_subdev_match_data " Marek Vasut
2025-10-13 18:45 ` Frank Li
2025-10-11 16:51 ` [PATCH 17/39] drm/imx: dc: tc: Pass struct dc_tc_subdev_match_data " Marek Vasut
2025-10-11 16:51 ` [PATCH 18/39] drm/imx: dc: ic: Pass struct dc_ic_subdev_match_data " Marek Vasut
2025-10-11 16:51 ` [PATCH 19/39] drm/imx: dc: ic: Use DT node as interrupt controller name Marek Vasut
2025-10-11 16:51 ` [PATCH 20/39] drm/imx: dc: Configure display CSR clock feed select Marek Vasut
2025-10-13 18:48 ` Frank Li
2025-10-17 15:20 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 21/39] drm/imx: dc: crtc: Do not check disabled CRTCs Marek Vasut
2025-10-13 18:50 ` Frank Li
2025-10-14 21:41 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 22/39] drm/imx: dc: Keep FU unit running on i.MX95 Marek Vasut
2025-10-13 18:52 ` Frank Li
2025-10-11 16:51 ` [PATCH 23/39] drm/imx: dc: Add OF match data for i.MX95 Marek Vasut
2025-10-13 18:54 ` Frank Li
2025-10-11 16:51 ` [PATCH 24/39] drm/imx: Add more RGB swizzling options Marek Vasut
2025-10-11 16:51 ` [PATCH 25/39] dt-bindings: display: bridge: Document NXP i.MX95 pixel interleaver support Marek Vasut
2025-10-13 18:57 ` Frank Li
2025-10-17 14:55 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 26/39] drm/bridge: imx: Add " Marek Vasut
2025-10-13 19:02 ` Frank Li
2025-10-11 16:51 ` [PATCH 27/39] dt-bindings: display: bridge: Document NXP i.MX95 pixel link support Marek Vasut
2025-10-13 19:08 ` Frank Li
2025-10-17 15:01 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 28/39] drm/bridge: imx: Add " Marek Vasut
2025-10-13 19:10 ` Frank Li
2025-10-11 16:51 ` [PATCH 29/39] dt-bindings: display: bridge: Document Freescale i.MX95 MIPI DSI Marek Vasut
2025-10-13 19:13 ` Frank Li
2025-10-17 15:37 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 30/39] drm/bridge: imx93-mipi-dsi: Add i.MX95 PLL initialization Marek Vasut
2025-10-11 16:51 ` [PATCH 31/39] dt-bindings: clock: Split support for i.MX95 LVDS CSR Marek Vasut
2025-10-13 19:17 ` Frank Li
2025-10-17 15:49 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 32/39] dt-bindings: display: bridge: Document i.MX95 LVDS display bridge binding Marek Vasut
2025-10-13 19:20 ` Frank Li
2025-10-17 15:04 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 33/39] drm: bridge: imx: Add i.MX95 LVDS Display Bridge (LDB) driver Marek Vasut
2025-10-11 16:51 ` [PATCH 34/39] dt-bindings: display: bridge: ldb: Add an i.MX95 entry Marek Vasut
2025-10-13 11:34 ` Rob Herring (Arm)
2025-10-11 16:51 ` [PATCH 35/39] drm/bridge: fsl-ldb: Parse register offsets from DT Marek Vasut
2025-10-13 19:23 ` Frank Li
2025-10-17 15:39 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 36/39] drm/bridge: fsl-ldb: Add i.MX95 support Marek Vasut
2025-10-13 19:24 ` Frank Li
2025-10-11 16:51 ` [PATCH 37/39] dt-bindings: interrupt-controller: fsl,irqsteer: " Marek Vasut
2025-10-13 19:25 ` Frank Li
2025-10-15 13:31 ` Rob Herring (Arm)
2025-10-11 16:51 ` [PATCH 38/39] dt-bindings: clock: support i.MX95 Display Stream CSR module Marek Vasut
2025-10-13 19:26 ` Frank Li
2025-10-17 15:05 ` Marek Vasut
2025-10-15 13:33 ` Rob Herring
2025-10-17 15:08 ` Marek Vasut
2025-10-11 16:51 ` [PATCH 39/39] arm64: dts: imx95: Describe display pipeline Marek Vasut
2025-10-14 8:51 ` [PATCH 00/39] Add i.MX95 DPU/DSI/LVDS support Liu Ying
2025-10-14 21:55 ` Marek Vasut
2025-10-15 10:00 ` Liu Ying
2025-10-15 16:18 ` Marek Vasut
2025-10-20 2:15 ` Ying Liu
2025-11-02 16:33 ` Marek Vasut
2025-11-04 7:00 ` Liu Ying
2025-10-14 9:13 ` Liu Ying
2025-10-14 22:09 ` Marek Vasut
2025-10-15 10:09 ` Liu Ying
2025-10-17 15:54 ` Marek Vasut
2025-10-20 2:35 ` Liu Ying
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