Re: [PATCH 20/39] drm/imx: dc: Configure display CSR clock feed select

[Frank Li <Frank.li@nxp.com>]

On Sat, Oct 11, 2025 at 06:51:35PM +0200, Marek Vasut wrote:
> Configure DISPLAY_CSR clock feed selector on i.MX95 accordingly
> for either DSI and LVDS serializers. This is especially important
> to make LVDS displays operational, the default selector setting
> of 0 only works for DSI serializer.
>
> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
> ---
> Cc: Abel Vesa <abelvesa@kernel.org>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> Cc: Liu Ying <victor.liu@nxp.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: devicetree@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-clk@vger.kernel.org
> ---
>  drivers/gpu/drm/imx/dc/dc-drv.c | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
>
> diff --git a/drivers/gpu/drm/imx/dc/dc-drv.c b/drivers/gpu/drm/imx/dc/dc-drv.c
> index 2717c92aba6c5..dec8ad19bad42 100644
> --- a/drivers/gpu/drm/imx/dc/dc-drv.c
> +++ b/drivers/gpu/drm/imx/dc/dc-drv.c
> @@ -7,6 +7,7 @@
>  #include <linux/component.h>
>  #include <linux/device.h>
>  #include <linux/dma-mapping.h>
> +#include <linux/mfd/syscon.h>
>  #include <linux/mod_devicetable.h>
>  #include <linux/module.h>
>  #include <linux/of.h>
> @@ -29,8 +30,15 @@
>  #include "dc-drv.h"
>  #include "dc-pe.h"
>
> +#define DISPLAY_ENGINES_CLOCK_CONTROL	0x00
> +#define  DISP_CLK1_SEL			GENMASK(3, 2)
> +#define  DISP_CLK0_SEL			GENMASK(1, 0)
> +#define  DISP_CLK_SEL_CCM		0
> +#define  DISP_CLK_SEL_LVDS		2
> +
>  struct dc_priv {
>  	struct drm_device *drm;
> +	struct regmap *regmap;
>  	struct clk_bulk_data *clk_cfg;
>  	int clk_cfg_count;
>  };
> @@ -119,6 +127,17 @@ static int dc_drm_bind(struct device *dev)
>  	if (ret)
>  		return ret;
>
> +	if (priv->regmap) {
> +		regmap_write_bits(priv->regmap, DISPLAY_ENGINES_CLOCK_CONTROL,
> +				  DISP_CLK0_SEL | DISP_CLK1_SEL,
> +				  FIELD_PREP(DISP_CLK0_SEL,
> +				             ((dc_drm->encoder[0].encoder_type == DRM_MODE_ENCODER_DSI) ?
> +					     DISP_CLK_SEL_CCM : DISP_CLK_SEL_LVDS)) |
> +				  FIELD_PREP(DISP_CLK1_SEL,
> +				             ((dc_drm->encoder[1].encoder_type == DRM_MODE_ENCODER_DSI) ?
> +					     DISP_CLK_SEL_CCM : DISP_CLK_SEL_LVDS)));
> +	}
> +

why not export as clock providor and use clk API to do that?

Frank
>  	ret = drm_dev_register(drm, 0);
>  	if (ret) {
>  		dev_err(dev, "failed to register drm device: %d\n", ret);
> @@ -157,6 +176,7 @@ static const struct component_master_ops dc_drm_ops = {
>  static int dc_probe(struct platform_device *pdev)
>  {
>  	struct component_match *match = NULL;
> +	struct device_node *np = pdev->dev.of_node;
>  	struct dc_priv *priv;
>  	int ret;
>
> @@ -170,6 +190,12 @@ static int dc_probe(struct platform_device *pdev)
>  				     "failed to get cfg clock\n");
>  	priv->clk_cfg_count = ret;
>
> +	if (of_device_is_compatible(np, "fsl,imx95-dc")) {
> +		priv->regmap = syscon_regmap_lookup_by_phandle(np, "fsl,syscon");
> +		if (IS_ERR(priv->regmap))
> +			return dev_err_probe(&pdev->dev, PTR_ERR(priv->regmap), "failed to get regmap\n");
> +	}
> +
>  	dev_set_drvdata(&pdev->dev, priv);
>
>  	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
> --
> 2.51.0
>