* [RFC] arm: use built-in byte swap function
From: Woodhouse, David @ 2013-02-01 7:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130201011712.GF23505@n2100.arm.linux.org.uk>
On Fri, 2013-02-01 at 01:17 +0000, Russell King - ARM Linux wrote:
>
> > I've tried both gcc 4.6.3 [1] and 4.6.4 [2]. If you can point me to
> > a 4.5.x, I'll try that, too, but as it stands now, if one moves the
> > code added to swab.h below outside of its armv6 protection,
> > gcc adds calls to __bswapsi2.
>
> Take a look at the message I sent on the 29th towards the beginning of
> this thread for details of gcc 4.5.4 behaviour.
I'd like to see a comment (with PR# if appropriate) explaining clearly
*why* it isn't enabled for <ARMv6 even with a bleeding-edge compiler.
Russell's test also seemed to indicate that the 32-bit and 64-bit swap
support was present and functional in GCC 4.5.4 (as indeed it should
have been since 4.4), so I'm still not quite sure why you require 4.6
for that.
--
Sent with MeeGo's ActiveSync support.
David Woodhouse Open Source Technology Centre
David.Woodhouse@intel.com Intel Corporation
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^ permalink raw reply
* [RFC PATCH 0/4] Add support for LZ4-compressed kernels
From: kyungsik.lee @ 2013-02-01 7:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130129225508.GC30535@twin.jikos.cz>
On 2013-01-30 ?? 7:55, David Sterba wrote:
> On Sat, Jan 26, 2013 at 02:50:43PM +0900, Kyungsik Lee wrote:
>> This patchset is for supporting LZ4 compressed kernel and initial ramdisk on
>> the x86 and ARM architectures.
> Have you considered the 'high compression' mode of lz4?
> http://code.google.com/p/lz4/source/browse/trunk/lz4hc.c
>
> The compression format remains the same, the compressor tries harder
> (but is slower), resulting compression ratio is better.
>
> an examle compression for vmlinux.bin of x86_64 build:
>
> input size: 16509520 bytes
>
> lz4 (svn 88):
> output size: 6393684 (38.7%)
> compression time: 41.7 ms (395 MB/s)
> decompression time: 13.7 ms (1204 MB/s)
>
> lz4hc (svn 88):
> output size: 5319137 (32.2%)
> compression time: 683 ms (24 MB/s)
> decompression time: 13.1 ms (1259 MB/s)
>
> compressed file delta: 6393684 - 5319137 = 1074547 ~ 1MB
>
> tested on a Nehalem box; same test on my slow desktop gives
>
> lz4:
> compression time: 97 ms (169 MB/s)
> decompression time: 25.7 ms (643 MB/s)
>
> lz4hc:
> compression time: 1386 ms (11 MB/s)
> decompression time: 26 ms (619 MB/s)
>
> While the decompression time is almost the same, image size is smaller.
> The kernel image compression is run in userspace and the low speed is
> not much of concern for a one-time operation.
>
> For the reference, lzo (current kernel version) run on the destktop:
>
> output size: 6026256 (36.5%)
> decompression time: 79.6 ms (207 MB/s)
>
>> It seems that it?s worth trying LZ4 compressed kernel image or ramdisk
>> for making the kernel boot more faster.
> There's another potential user of lz4: btrfs. I've submitted a feature
> preview integrating lz4 compression
> http://thread.gmane.org/gmane.comp.file-systems.btrfs/15744
> and we have tried to integrate the HC mode as well
> http://thread.gmane.org/gmane.comp.file-systems.btrfs/18165
> .
> So far it's on a slow track, conceptually it works, but I the code needs
> some work so it could live under lib/* (we've used the svn sources
> with minor changes, no kernel coding style). It would be easier for me
> to enhance the existing lib/lz4/* codebase.
>
> Also zram could consider lz4, I'm not sure if there are other potential
> users.
Yes, I guess squash fs and crypto would also benefit from lz4.
Thanks,
Kyungsik
^ permalink raw reply
* [PATCH v4 8/8] ARM: dts: add the watchdog nodes for at91sam9g25ek and at91sam9m10g45ek boards
From: Wenyou Yang @ 2013-02-01 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359702386-21284-1-git-send-email-wenyou.yang@atmel.com>
Tested on the at91sam9g25ek and at91sam9m10g45ek boards
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: linux at arm.linux.org.uk
Cc: linux-kernel at vger.kernel.org
---
arch/arm/boot/dts/at91sam9m10g45ek.dts | 4 ++++
arch/arm/boot/dts/at91sam9x5ek.dtsi | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 20c3191..0832c7a 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -59,6 +59,10 @@
status = "okay";
};
+ watchdog at fffffd40 {
+ status = "okay";
+ };
+
mmc0: mmc at fff80000 {
pinctrl-0 = <
&pinctrl_board_mmc0
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index 8a7cf1d..afddf75 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -69,6 +69,10 @@
status = "okay";
};
+ watchdog at fffffe40 {
+ status = "okay";
+ };
+
pinctrl@fffff400 {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 7/8] ARM: dts: add the watchdog nodes for at91sam9x5 and at91sam9n12 SoC
From: Wenyou Yang @ 2013-02-01 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359702386-21284-1-git-send-email-wenyou.yang@atmel.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: linux at arm.linux.org.uk
Cc: linux-kernel at vger.kernel.org
---
arch/arm/boot/dts/at91sam9n12.dtsi | 6 ++++++
arch/arm/boot/dts/at91sam9x5.dtsi | 6 ++++++
2 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 80e29c6..8fecdd1 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -381,6 +381,12 @@
#size-cells = <0>;
status = "disabled";
};
+
+ watchdog at fffffe40 {
+ compatible = "atmel,at91sam9260-wdt";
+ reg = <0xfffffe40 0x10>;
+ status = "disabled";
+ };
};
nand0: nand at 40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 8ecca69..eadba6d 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -511,6 +511,12 @@
trigger-value = <0x6>;
};
};
+
+ watchdog at fffffe40 {
+ compatible = "atmel,at91sam9260-wdt";
+ reg = <0xfffffe40 0x10>;
+ status = "disabled";
+ };
};
nand0: nand at 40000000 {
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 6/8] watchdog/at91sam9_wdt: Remove the __initdata of at91wdt_wdd
From: Wenyou Yang @ 2013-02-01 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359702386-21284-1-git-send-email-wenyou.yang@atmel.com>
For this variable will be used in the timer handler.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: wim at iguana.be
Cc: linux-watchdog at vger.kernel.org
Cc: linux-kernel at vger.kernel.org
---
drivers/watchdog/at91sam9_wdt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index e60a718..3fc90ba 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -199,7 +199,7 @@ static struct watchdog_ops at91wdt_ops = {
.ping = at91wdt_ping,
};
-static struct watchdog_device at91wdt_wdd __initdata = {
+static struct watchdog_device at91wdt_wdd = {
.timeout = WDT_HEARTBEAT,
.min_timeout = MIN_HEARTBEAT,
.max_timeout = MAX_HEARTBEAT,
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 5/8] watchdog/at91sam9_wdt: Add nowayout helpers to Watchdog Timer Driver Kernel API
From: Wenyou Yang @ 2013-02-01 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359702386-21284-1-git-send-email-wenyou.yang@atmel.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: wim at iguana.be
Cc: linux-watchdog at vger.kernel.org
Cc: linux-kernel at vger.kernel.org
---
drivers/watchdog/at91sam9_wdt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index c6d9f1f..e60a718 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -238,6 +238,8 @@ static int __init at91wdt_probe(struct platform_device *pdev)
return ret;
}
+ watchdog_set_nowayout(&at91wdt_wdd, nowayout);
+
watchdog_init_timeout(&at91wdt_wdd, heartbeat, pdev->dev.of_node);
ret = at91wdt_enable(&at91wdt_wdd, ms_to_ticks(WDT_HW_TIMEOUT * 1000));
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 4/8] watchdog/at91sam9_wdt: Adjust the options of watchdog_info
From: Wenyou Yang @ 2013-02-01 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359702386-21284-1-git-send-email-wenyou.yang@atmel.com>
Since the Watchdog Timer Mode Register can be only written only once,
so the watchdog_info shall not support WDIOF_SETTIMEOUT
and WDIOF_MAGICCLOSE options, remove them.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: wim at iguana.be
Cc: linux-watchdog at vger.kernel.org
Cc: linux-kernel at vger.kernel.org
---
drivers/watchdog/at91sam9_wdt.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index ce7930b..c6d9f1f 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -152,8 +152,7 @@ static int at91wdt_enable(struct watchdog_device *wddev, unsigned int timeout)
static const struct watchdog_info at91_wdt_info = {
.identity = DRV_NAME,
- .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
- WDIOF_MAGICCLOSE,
+ .options = WDIOF_KEEPALIVEPING,
};
static int at91wdt_start(struct watchdog_device *wddev)
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 3/8] watchdog/at91sam9_wdt: Convert to use the watchdog framework
From: Wenyou Yang @ 2013-02-01 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359702386-21284-1-git-send-email-wenyou.yang@atmel.com>
According to Documentation/watchdog/convert_drivers_to_kernel_api.txt,
remove the file_operations struct, miscdevice, and obsolete includes
Since the at91sam watchdog inherent characteristics, add the watchdog
operations: at91wdt_start, at91wdt_stop and at91wdt_ping.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: wim at iguana.be
Cc: linux-watchdog at vger.kernel.org
Cc: linux-kernel at vger.kernel.org
---
drivers/watchdog/at91sam9_wdt.c | 199 ++++++++++++++-------------------------
1 file changed, 72 insertions(+), 127 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 66d3afb..ce7930b 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -13,16 +13,17 @@
* The Watchdog Timer Mode Register can be only written to once. If the
* timeout need to be set from Linux, be sure that the bootstrap or the
* bootloader doesn't write to this register.
+ * The Watchdog Timer default is running with maximum counter value
+ * (WDV=0xfff) at reset, i.e., at power-up. It MUST be either disabled
+ * or be reprogrammed within the maxinum margin(16s).
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/errno.h>
-#include <linux/fs.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
-#include <linux/miscdevice.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
@@ -31,7 +32,6 @@
#include <linux/jiffies.h>
#include <linux/timer.h>
#include <linux/bitops.h>
-#include <linux/uaccess.h>
#include <linux/of.h>
#include "at91sam9_wdt.h"
@@ -65,8 +65,6 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-static void at91_ping(unsigned long data);
-
struct at91wdt_drvdata {
void __iomem *phybase;
bool is_enable; /* indicate if the watchdog is eabled */
@@ -99,7 +97,7 @@ static inline void at91_wdt_reset(struct at91wdt_drvdata *driver_data)
/*
* Timer tick
*/
-static void at91_ping(unsigned long data)
+static void at91wdt_timer_tick(unsigned long data)
{
struct watchdog_device *wddev = (struct watchdog_device *)data;
struct at91wdt_drvdata *driver_data = watchdog_get_drvdata(wddev);
@@ -107,45 +105,31 @@ static void at91_ping(unsigned long data)
if (time_before(jiffies, driver_data->next_heartbeat)) {
at91_wdt_reset(driver_data);
mod_timer(&driver_data->timer, jiffies + WDT_TIMEOUT);
- } else
- pr_crit("I will reset your machine !\n");
-}
-
-/*
- * Watchdog device is opened, and watchdog starts running.
- */
-static int at91_wdt_open(struct inode *inode, struct file *file)
-{
- driver_data->next_heartbeat = jiffies + heartbeat * HZ;
- mod_timer(&driver_data->timer, jiffies + WDT_TIMEOUT);
- return nonseekable_open(inode, file);
-}
-
-/*
- * Close the watchdog device.
- */
-static int at91_wdt_close(struct inode *inode, struct file *file)
-{
- del_timer(&driver_data->timer);
-
- return 0;
+ if (!watchdog_is_open(wddev))
+ driver_data->next_heartbeat = jiffies
+ + wddev->timeout * HZ;
+ } else {
+ pr_crit("I will reset your machine !\n");
+ }
}
-/*
- * Set the watchdog time interval in 1/256Hz (write-once)
- * Counter is 12 bit.
- */
-static int at91_wdt_settimeout(unsigned int timeout)
+static int at91wdt_enable(struct watchdog_device *wddev, unsigned int timeout)
{
+ struct at91wdt_drvdata *driver_data = watchdog_get_drvdata(wddev);
unsigned int reg;
- unsigned int mr;
- /* Check if disabled */
- mr = wdt_read(AT91_WDT_MR);
- if (mr & AT91_WDT_WDDIS) {
- pr_err("sorry, watchdog is disabled\n");
- return -EIO;
+ /*
+ * Check if the watchdog is disabled,
+ * if disabled, the reason is the bootstrap or the bootloader has
+ * written the Watchdog Timer Mode Register to disable the
+ * watchdog timer
+ */
+ reg = wdt_read(driver_data, AT91_WDT_MR);
+ if (reg & AT91_WDT_WDDIS) {
+ driver_data->is_enable = false;
+ pr_info("sorry, watchdog is disabled\n");
+ return -1;
}
/*
@@ -159,7 +143,9 @@ static int at91_wdt_settimeout(unsigned int timeout)
| AT91_WDT_WDDBGHLT /* disabled in debug mode */
| AT91_WDT_WDD /* restart at any time */
| (timeout & AT91_WDT_WDV); /* timer value */
- wdt_write(AT91_WDT_MR, reg);
+ wdt_write(driver_data, AT91_WDT_MR, reg);
+
+ driver_data->is_enable = true;
return 0;
}
@@ -170,99 +156,63 @@ static const struct watchdog_info at91_wdt_info = {
WDIOF_MAGICCLOSE,
};
-/*
- * Handle commands from user-space.
- */
-static long at91_wdt_ioctl(struct file *file,
- unsigned int cmd, unsigned long arg)
+static int at91wdt_start(struct watchdog_device *wddev)
{
- void __user *argp = (void __user *)arg;
- int __user *p = argp;
- int new_value;
-
- switch (cmd) {
- case WDIOC_GETSUPPORT:
- return copy_to_user(argp, &at91_wdt_info,
- sizeof(at91_wdt_info)) ? -EFAULT : 0;
-
- case WDIOC_GETSTATUS:
- case WDIOC_GETBOOTSTATUS:
- return put_user(0, p);
+ struct at91wdt_drvdata *driver_data = watchdog_get_drvdata(wddev);
- case WDIOC_KEEPALIVE:
- driver_data->next_heartbeat = jiffies + heartbeat * HZ;
+ if (driver_data->is_enable) {
+ driver_data->next_heartbeat = jiffies + wddev->timeout * HZ;
+ mod_timer(&driver_data->timer, jiffies + WDT_TIMEOUT);
return 0;
-
- case WDIOC_SETTIMEOUT:
- if (get_user(new_value, p))
- return -EFAULT;
-
- heartbeat = new_value;
- driver_data->next_heartbeat = jiffies + heartbeat * HZ;
-
- return put_user(new_value, p); /* return current value */
-
- case WDIOC_GETTIMEOUT:
- return put_user(heartbeat, p);
+ } else {
+ return -EIO;
}
- return -ENOTTY;
}
-/*
- * Pat the watchdog whenever device is written to.
- */
-static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len,
- loff_t *ppos)
+static int at91wdt_stop(struct watchdog_device *wddev)
{
- if (!len)
- return 0;
+ struct at91wdt_drvdata *driver_data = watchdog_get_drvdata(wddev);
- /* Scan for magic character */
- if (!nowayout) {
- size_t i;
+ if (driver_data->is_enable)
+ return -EIO;
+ else
+ return 0;
+}
+static int at91wdt_ping(struct watchdog_device *wddev)
+{
+ struct at91wdt_drvdata *driver_data = watchdog_get_drvdata(wddev);
- for (i = 0; i < len; i++) {
- char c;
- if (get_user(c, data + i))
- return -EFAULT;
- }
- }
+ if (driver_data->is_enable) {
+ driver_data->next_heartbeat = jiffies + wddev->timeout * HZ;
+ mod_timer(&driver_data->timer, jiffies + WDT_TIMEOUT);
+ return 0;
+ } else {
+ return -EIO;
}
-
- driver_data->next_heartbeat = jiffies + heartbeat * HZ;
-
- return len;
}
-
/* ......................................................................... */
-static const struct file_operations at91wdt_fops = {
- .owner = THIS_MODULE,
- .llseek = no_llseek,
- .unlocked_ioctl = at91_wdt_ioctl,
- .open = at91_wdt_open,
- .release = at91_wdt_close,
- .write = at91_wdt_write,
-};
-
-static struct miscdevice at91wdt_miscdev = {
- .minor = WATCHDOG_MINOR,
- .name = "watchdog",
- .fops = &at91wdt_fops,
+static struct watchdog_ops at91wdt_ops = {
+ .owner = THIS_MODULE,
+ .start = at91wdt_start,
+ .stop = at91wdt_stop,
+ .ping = at91wdt_ping,
};
static struct watchdog_device at91wdt_wdd __initdata = {
.timeout = WDT_HEARTBEAT,
.min_timeout = MIN_HEARTBEAT,
.max_timeout = MAX_HEARTBEAT,
+ .info = &at91_wdt_info,
+ .ops = &at91wdt_ops,
};
static int __init at91wdt_probe(struct platform_device *pdev)
{
struct at91wdt_drvdata *driver_data;
struct resource *r;
- int res;
+ int ret;
driver_data = devm_kzalloc(&pdev->dev,
sizeof(*driver_data), GFP_KERNEL);
@@ -273,32 +223,32 @@ static int __init at91wdt_probe(struct platform_device *pdev)
watchdog_set_drvdata(&at91wdt_wdd, driver_data);
- if (at91wdt_miscdev.parent)
- return -EBUSY;
- at91wdt_miscdev.parent = &pdev->dev;
-
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!r)
return -ENODEV;
+
driver_data->phybase = ioremap(r->start, resource_size(r));
if (!driver_data->phybase) {
dev_err(&pdev->dev, "failed to map registers, aborting.\n");
return -ENOMEM;
}
- watchdog_init_timeout(&at91wdt_wdd, heartbeat, pdev->dev.of_node);
+ ret = watchdog_register_device(&at91wdt_wdd);
+ if (ret) {
+ dev_err(&pdev->dev, "cannot register watchdog (%d)\n", ret);
+ return ret;
+ }
- /* Set watchdog */
- res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
- if (res)
- return res;
+ watchdog_init_timeout(&at91wdt_wdd, heartbeat, pdev->dev.of_node);
- res = misc_register(&at91wdt_miscdev);
- if (res)
- return res;
+ ret = at91wdt_enable(&at91wdt_wdd, ms_to_ticks(WDT_HW_TIMEOUT * 1000));
+ if (ret) {
+ pr_info("the watchdog has been disabled\n");
+ return 0;
+ }
driver_data->next_heartbeat = jiffies + at91wdt_wdd.timeout * HZ;
- setup_timer(&driver_data->timer, at91_ping,
+ setup_timer(&driver_data->timer, at91wdt_timer_tick,
(unsigned long)&at91wdt_wdd);
mod_timer(&driver_data->timer, jiffies + WDT_TIMEOUT);
@@ -310,13 +260,9 @@ static int __init at91wdt_probe(struct platform_device *pdev)
static int __exit at91wdt_remove(struct platform_device *pdev)
{
- int res;
-
- res = misc_deregister(&at91wdt_miscdev);
- if (!res)
- at91wdt_miscdev.parent = NULL;
+ watchdog_unregister_device(&at91wdt_wdd);
- return res;
+ return 0;
}
#if defined(CONFIG_OF)
@@ -353,4 +299,3 @@ module_exit(at91sam_wdt_exit);
MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
MODULE_LICENSE("GPL");
-MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 2/8] watchdog/at91sam9_wdt: Remove at91wdt_private and add at91wdt_drvdata struct
From: Wenyou Yang @ 2013-02-01 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359702386-21284-1-git-send-email-wenyou.yang@atmel.com>
Remove the global variable at91wdt_private, add the struct at91wdt_drvdata
as a substitute, and set it as the driver data of the at91wdt_wdd.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: wim at iguana.be
Cc: linux-watchdog at vger.kernel.org
Cc: linux-kernel at vger.kernel.org
---
drivers/watchdog/at91sam9_wdt.c | 88 +++++++++++++++++++++------------------
1 file changed, 47 insertions(+), 41 deletions(-)
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 61129fc..66d3afb 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -38,11 +38,6 @@
#define DRV_NAME "AT91SAM9 Watchdog"
-#define wdt_read(field) \
- __raw_readl(at91wdt_private.base + field)
-#define wdt_write(field, val) \
- __raw_writel((val), at91wdt_private.base + field)
-
/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
* use this to convert a watchdog
* value from/to milliseconds.
@@ -72,23 +67,33 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
static void at91_ping(unsigned long data);
-static struct {
- void __iomem *base;
- unsigned long next_heartbeat; /* the next_heartbeat for the timer */
- unsigned long open;
- char expect_close;
- struct timer_list timer; /* The timer that pings the watchdog */
-} at91wdt_private;
+struct at91wdt_drvdata {
+ void __iomem *phybase;
+ bool is_enable; /* indicate if the watchdog is eabled */
+ unsigned long next_heartbeat; /* the next_heartbeat for the timer */
+ struct timer_list timer; /* The timer that pings the watchdog */
+};
/* ......................................................................... */
+static inline unsigned int wdt_read(struct at91wdt_drvdata *driver_data,
+ unsigned int field)
+{
+ return readl_relaxed(driver_data->phybase + field);
+}
+
+static inline void wdt_write(struct at91wdt_drvdata *driver_data,
+ unsigned int field, unsigned int val)
+{
+ writel_relaxed((val), driver_data->phybase + field);
+}
/*
* Reload the watchdog timer. (ie, pat the watchdog)
*/
-static inline void at91_wdt_reset(void)
+static inline void at91_wdt_reset(struct at91wdt_drvdata *driver_data)
{
- wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+ wdt_write(driver_data, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
}
/*
@@ -96,10 +101,12 @@ static inline void at91_wdt_reset(void)
*/
static void at91_ping(unsigned long data)
{
- if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
- (!nowayout && !at91wdt_private.open)) {
- at91_wdt_reset();
- mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
+ struct watchdog_device *wddev = (struct watchdog_device *)data;
+ struct at91wdt_drvdata *driver_data = watchdog_get_drvdata(wddev);
+
+ if (time_before(jiffies, driver_data->next_heartbeat)) {
+ at91_wdt_reset(driver_data);
+ mod_timer(&driver_data->timer, jiffies + WDT_TIMEOUT);
} else
pr_crit("I will reset your machine !\n");
}
@@ -109,11 +116,8 @@ static void at91_ping(unsigned long data)
*/
static int at91_wdt_open(struct inode *inode, struct file *file)
{
- if (test_and_set_bit(0, &at91wdt_private.open))
- return -EBUSY;
-
- at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
- mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
+ driver_data->next_heartbeat = jiffies + heartbeat * HZ;
+ mod_timer(&driver_data->timer, jiffies + WDT_TIMEOUT);
return nonseekable_open(inode, file);
}
@@ -123,13 +127,8 @@ static int at91_wdt_open(struct inode *inode, struct file *file)
*/
static int at91_wdt_close(struct inode *inode, struct file *file)
{
- clear_bit(0, &at91wdt_private.open);
+ del_timer(&driver_data->timer);
- /* stop internal ping */
- if (!at91wdt_private.expect_close)
- del_timer(&at91wdt_private.timer);
-
- at91wdt_private.expect_close = 0;
return 0;
}
@@ -191,7 +190,7 @@ static long at91_wdt_ioctl(struct file *file,
return put_user(0, p);
case WDIOC_KEEPALIVE:
- at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
+ driver_data->next_heartbeat = jiffies + heartbeat * HZ;
return 0;
case WDIOC_SETTIMEOUT:
@@ -199,7 +198,7 @@ static long at91_wdt_ioctl(struct file *file,
return -EFAULT;
heartbeat = new_value;
- at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
+ driver_data->next_heartbeat = jiffies + heartbeat * HZ;
return put_user(new_value, p); /* return current value */
@@ -222,20 +221,16 @@ static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len,
if (!nowayout) {
size_t i;
- at91wdt_private.expect_close = 0;
for (i = 0; i < len; i++) {
char c;
if (get_user(c, data + i))
return -EFAULT;
- if (c == 'V') {
- at91wdt_private.expect_close = 42;
- break;
}
}
}
- at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
+ driver_data->next_heartbeat = jiffies + heartbeat * HZ;
return len;
}
@@ -265,9 +260,19 @@ static struct watchdog_device at91wdt_wdd __initdata = {
static int __init at91wdt_probe(struct platform_device *pdev)
{
+ struct at91wdt_drvdata *driver_data;
struct resource *r;
int res;
+ driver_data = devm_kzalloc(&pdev->dev,
+ sizeof(*driver_data), GFP_KERNEL);
+ if (!driver_data) {
+ dev_err(&pdev->dev, "Unable to alloacate watchdog device\n");
+ return -ENOMEM;
+ }
+
+ watchdog_set_drvdata(&at91wdt_wdd, driver_data);
+
if (at91wdt_miscdev.parent)
return -EBUSY;
at91wdt_miscdev.parent = &pdev->dev;
@@ -275,8 +280,8 @@ static int __init at91wdt_probe(struct platform_device *pdev)
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!r)
return -ENODEV;
- at91wdt_private.base = ioremap(r->start, resource_size(r));
- if (!at91wdt_private.base) {
+ driver_data->phybase = ioremap(r->start, resource_size(r));
+ if (!driver_data->phybase) {
dev_err(&pdev->dev, "failed to map registers, aborting.\n");
return -ENOMEM;
}
@@ -292,9 +297,10 @@ static int __init at91wdt_probe(struct platform_device *pdev)
if (res)
return res;
- at91wdt_private.next_heartbeat = jiffies + at91wdt_wdd.timeout * HZ;
- setup_timer(&at91wdt_private.timer, at91_ping, 0);
- mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
+ driver_data->next_heartbeat = jiffies + at91wdt_wdd.timeout * HZ;
+ setup_timer(&driver_data->timer, at91_ping,
+ (unsigned long)&at91wdt_wdd);
+ mod_timer(&driver_data->timer, jiffies + WDT_TIMEOUT);
pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
at91wdt_wdd.timeout, nowayout);
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 1/8] watchdog: add the function watchdog_is_open
From: Wenyou Yang @ 2013-02-01 7:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359702386-21284-1-git-send-email-wenyou.yang@atmel.com>
Add the function watchdog_is_open to check whether or not
the /dev/watchdog? is opened
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Cc: wim at iguana.be
Cc: linux-watchdog at vger.kernel.org
Cc: linux-kernel at vger.kernel.org
---
include/linux/watchdog.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/linux/watchdog.h b/include/linux/watchdog.h
index e40cc2b..7ea4465 100644
--- a/include/linux/watchdog.h
+++ b/include/linux/watchdog.h
@@ -111,6 +111,14 @@ static inline bool watchdog_active(struct watchdog_device *wdd)
return test_bit(WDOG_ACTIVE, &wdd->status);
}
+/* Use the following function to check whether or not
+ * the /dev/watchdog? is opened
+ */
+static inline bool watchdog_is_open(struct watchdog_device *wddev)
+{
+ return test_bit(WDOG_DEV_OPEN, &wddev->status);
+}
+
/* Use the following function to set the nowayout feature */
static inline void watchdog_set_nowayout(struct watchdog_device *wdd, bool nowayout)
{
--
1.7.9.5
^ permalink raw reply related
* [PATCH v4 0/8] watchdog/at91sam9_wdt: Convert to use the new framework
From: Wenyou Yang @ 2013-02-01 7:06 UTC (permalink / raw)
To: linux-arm-kernel
Hi, All
The purpose of the patch series is to convert at91sam9_wdt to use the watchdog framework,
Because the Watchdog Mode Register(WDT_MR) which WDDIS bit to disable or disable the watchdog
can be written only once after reset. so if you want to use the watchdog in the kernel,
you must be sure the watchdog doesn't be disabled in the at91bootstrap.
It is tested on at91sam9m10g45ek both DT and non-DT support, at91sam9g25ek with DT support
by building Documentation/watchdog/src/watchdog-simple.c.
It is based on v3.8-rc6 + Arnd Bergmann's at91_wdt_dt_ids cannot be __init
+ Fabio Porcedda's add timeout-sec property binding
ChangeLog
v4:
- remove the patch: Use module_platform_driver().
- add tested on at91sam9m10g45ek both DT and non-DT support.
- rebase on v3.8-rc6
v3:
- The helper function 'watchdog_is_open' is moved to include/linux/watchdog.h
- Remove '__init' annotation from the function 'at91wdt_probe'
- Rebase on v3.8-rc2
v2:
- Remove the patches to add devive tree support which Fabio Porcedda has applied.
- Replace __raw_readl, __raw_writel with readl_relaxed, writel_relaxed.
- Rebase on v3.7-rc8.
Best Regards
Wenyou Yang
Wenyou Yang (8):
watchdog: add the function watchdog_is_open
watchdog/at91sam9_wdt: Remove at91wdt_private and add at91wdt_drvdata
struct
watchdog/at91sam9_wdt: Convert to use the watchdog framework
watchdog/at91sam9_wdt: Adjust the options of watchdog_info
watchdog/at91sam9_wdt: Add nowayout helpers to Watchdog Timer Driver
Kernel API
watchdog/at91sam9_wdt: Remove the __initdata of at91wdt_wdd
ARM: dts: add the watchdog nodes for at91sam9x5 and at91sam9n12 SoC
ARM: dts: add the watchdog nodes for at91sam9g25ek and
at91sam9m10g45ek boards
arch/arm/boot/dts/at91sam9m10g45ek.dts | 4 +
arch/arm/boot/dts/at91sam9n12.dtsi | 6 +
arch/arm/boot/dts/at91sam9x5.dtsi | 6 +
arch/arm/boot/dts/at91sam9x5ek.dtsi | 4 +
drivers/watchdog/at91sam9_wdt.c | 272 +++++++++++++-------------------
include/linux/watchdog.h | 8 +
6 files changed, 140 insertions(+), 160 deletions(-)
--
1.7.9.5
^ permalink raw reply
* [PATCH V2 1/6] pinctrl: pinctrl-single: use arch_initcall and module_exit
From: Sekhar Nori @ 2013-02-01 7:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdbf7TwrjfT2rhqQFGc3yh_Nt117RtzQO2y6g5Ddx5Ay_w@mail.gmail.com>
On 1/29/2013 4:29 PM, Linus Walleij wrote:
> On Tue, Jan 29, 2013 at 8:38 AM, Vishwanathrao Badarkhe, Manish
> <manishv.b@ti.com> wrote:
>
>> Currently, I2C driver gets probed before pinctrl driver.
>> To achieve I2C pin muxing via pinctrl driver before I2C
>> probe get called, register pinctrl driver in arch_initcall.
>> Also, add module_exit to unregister pinctrl driver.
>>
>> Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
>
> So your I2C driver is not returning -EPROBE_DEFER
> if it cannot find its pins?
>
> Hm, well I can live with this, if Tony ACKs it.
FWIW, most of the other pinctrl drivers seem to be using arch_initcall()
already.
$ grep -r arch_initcall drivers/pinctrl/*
drivers/pinctrl/pinctrl-at91.c:arch_initcall(at91_pinctrl_init);
drivers/pinctrl/pinctrl-coh901.c:arch_initcall(u300_gpio_init);
drivers/pinctrl/pinctrl-imx35.c:arch_initcall(imx35_pinctrl_init);
drivers/pinctrl/pinctrl-imx51.c:arch_initcall(imx51_pinctrl_init);
drivers/pinctrl/pinctrl-imx53.c:arch_initcall(imx53_pinctrl_init);
drivers/pinctrl/pinctrl-imx6q.c:arch_initcall(imx6q_pinctrl_init);
drivers/pinctrl/pinctrl-sirf.c:arch_initcall(sirfsoc_pinmux_init);
drivers/pinctrl/pinctrl-tegra20.c:arch_initcall(tegra20_pinctrl_init);
drivers/pinctrl/pinctrl-tegra30.c:arch_initcall(tegra30_pinctrl_init);
drivers/pinctrl/pinctrl-u300.c:arch_initcall(u300_pmx_init);
drivers/pinctrl/spear/pinctrl-spear300.c:arch_initcall(spear300_pinctrl_init);
drivers/pinctrl/spear/pinctrl-spear320.c:arch_initcall(spear320_pinctrl_init);
drivers/pinctrl/spear/pinctrl-spear310.c:arch_initcall(spear310_pinctrl_init);
drivers/pinctrl/spear/pinctrl-spear1340.c:arch_initcall(spear1340_pinctrl_init);
drivers/pinctrl/spear/pinctrl-spear1310.c:arch_initcall(spear1310_pinctrl_init);
Thanks,
Sekhar
^ permalink raw reply
* [RFC PATCH 0/4] Add support for LZ4-compressed kernels
From: kyungsik.lee @ 2013-02-01 7:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <254788880.18003.1359493798737.JavaMail.tomcat@be12>
On 2013-01-30 ?? 6:09, Rajesh Pawar wrote:
>> Andrew Morton <akpm@linux-foundation.org> wrote:
>>
>> On Sat, 26 Jan 2013 14:50:43 +0900
>> Kyungsik Lee <kyungsik.lee@lge.com> wrote:
>>> This patchset is for supporting LZ4 compressed kernel and initial ramdisk on
>>> the x86 and ARM architectures.
>>>
>>> According to [[http://code.google.com/p/lz4/,]] LZ4 is a very fast lossless
>>> compression algorithm and also features an extremely fast decoder.
>>>
>>> Kernel Decompression APIs are based on implementation by Yann Collet
>>> ([[http://code.google.com/p/lz4/source/checkout]]).
>>> De/compression Tools are also provided from the site above.
>>>
>>> The initial test result on ARM(v7) based board shows that the size of kernel
>>> with LZ4 compressed is 8% bigger than LZO compressed but the decompressing
>>> speed is faster(especially under the enabled unaligned memory access).
>>>
>>> Test: 3.4 based kernel built with many modules
>>> Uncompressed kernel size: 13MB
>>> lzo: 6.3MB, 301ms
>>> lz4: 6.8MB, 251ms(167ms, with enabled unaligned memory access)
>>>
>>> It seems that it___s worth trying LZ4 compressed kernel image or ramdisk
>>> for making the kernel boot more faster.
>>>
>>> ...
>>>
>>> 20 files changed, 663 insertions(+), 3 deletions(-)
>>>
>>> ...
>>>
>> What's this "with enabled unaligned memory access" thing? You mean "if
>> the arch supports CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS"? If so,
>> that's only x86, which isn't really in the target market for this
>> patch, yes?
>> It's a lot of code for a 50ms boot-time improvement. Does anyone have
>> any opinions on whether or not the benefits are worth the cost?
> BTW, what happened to the proposed LZO update - woudn't it better to merge this first?
>
> Also, under the hood LZ4 seems to be quite similar to LZO, so probably
> LZO speed would also greatly benefit from unaligned access and some other
> ARM optimisations
>
I didn't test with the proposed LZO update you mentioned. Sorry, which
one do you mean?
I did some tests with the latest LZO in the mainline.
As a result, LZO is not faster in an unaligned access enabled on ARM.
Actually Slower.
Decompression time: 336ms(383ms, with unaligned access enabled)
You may refer to https://lkml.org/lkml/2012/10/7/85 to know more about it.
Thanks,
Kyungsik
Thanks,
Kyungsik
^ permalink raw reply
* [PATCH,RFC] usb: add devicetree helpers for determining dr_mode and phy_type
From: Sascha Hauer @ 2013-02-01 6:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130201011153.GE14629@nchen-desktop>
On Fri, Feb 01, 2013 at 09:11:54AM +0800, Peter Chen wrote:
> On Thu, Jan 31, 2013 at 11:29:13AM +0100, Sascha Hauer wrote:
> > On Thu, Jan 31, 2013 at 10:05:44AM +0800, Peter Chen wrote:
> > > On Wed, Jan 30, 2013 at 03:00:15PM +0100, Sascha Hauer wrote:
> > > > On Wed, Jan 30, 2013 at 10:06:28AM +0800, Peter Chen wrote:
> > > > > On Tue, Jan 29, 2013 at 01:55:04PM +0200, Alexander Shishkin wrote:
> > > > > > Sascha Hauer <s.hauer@pengutronix.de> writes:
> > > > > >
> > > > > > > From: Michael Grzeschik <m.grzeschik@pengutronix.de>
> > > > > > >
> > > > > > > This adds two little devicetree helper functions for determining the
> > > > > > > dr_mode (host, peripheral, otg) and phy_type (utmi, ulpi,...) from
> > > > > > > the devicetree.
> > > > > > >
> > > > > > > Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
> > > > > > > Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
> > > > > > > ---
> > > > > > >
> > > > > > > The properties and their values have been taken from the fsl-mph-dr driver.
> > > > > > > This binding is also documented (though currently not used) for the tegra
> > > > > > > ehci driver (Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt).
> > > > > > > This is a first attempt to parse these bindings at a common place so that
> > > > > > > others can make use of it.
> > > > > > >
> > > > > > > Basically I want to know whether this binding is recommended for new drivers
> > > > > > > since normally the devicetree uses '-' instead of '_', and maybe there are
> > > > > > > other problems with it.
> > > > > > >
> > > > > > > I need this binding for the chipidea driver. I suspect that the fsl-mph-dr
> > > > > > > driver also really handles a chipidea core.
> > > > > >
> > > > > > As far as I know, it is a chipidea core. Adding Peter to Cc list, he can
> > > > > > probably confirm.
> > > > >
> > > > > The fsl-mph-dr can't be used for chipdiea as it handles three platform
> > > > > drivers for three roles (peripheral , host, otg). But chipidea only has
> > > > > two platform drivers, one is the chipidea core, the other is related
> > > > > controller wrapper.
> > > >
> > > > What do you mean by 'three platform drivers'? That's only how the driver
> > > > is built, no? I was talking about the hardware the fsl-mph-dr driver
> > > > handles which definitely smells like chipidea.
> > >
> > > It creates host/device/otg platform device according to dr_mode from
> > > the device tree.
> >
> > Again, that's software specific. What I'd like to know is whether the
> > *hardware* could be handled by the chipidea driver.
> not understand u, you mean the DT information at there? Those DT information
> may not be used for i.mx hardware.
The original question was:
There is a driver in the tree called fsl-mph-dr-of.c. Does this driver
handle a hardware which is compatible to the hardware the chipidea
driver handles?
I think the answer is yes, because said driver registers a ehci device,
or fsl-usb2-udc device (the same we used on i.MX). This hardware also
has a PORTSC register. All this seems to suggest that
drivers/usb/host/fsl-mph-dr-of.c
drivers/usb/host/ehci-fsl.c
drivers/usb/otg/fsl_otg.c
drivers/usb/gadget/fsl_usb2_udc.h
drivers/usb/gadget/fsl_udc_core.c
Could be replaced by the chipidea driver.
Sascha
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* [PATCH v2 1/2] ARM: kirkwood: Ensure that kirkwood_ge0[01]_init() finds its clock
From: Jason Gunthorpe @ 2013-02-01 6:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130201061450.GS29973@lunn.ch>
On Fri, Feb 01, 2013 at 07:14:50AM +0100, Andrew Lunn wrote:
> > My guesses would be the RTC and/or GPIO blocks (the GPIO blinker needs
> > a clock), based on table 94.
>
> I've used AT91 parts where you can do GPO with the clock disabled, but
> GPI needed a ticking clock. So, yes, GPIO is a good candidate for
> ruint clock as well.
>
> Looking through the data sheets, and comparing against the gated
> clocks, we have the following without their own clock:
>
> RTC, I2C (a.k.a. TWI), UART, NAND, SPI, Watchdog, eFuse,
Hmm..
If watchdog is on the runit clock then the bridge registers and thus
the timer are on the runit clock, so the whole point would be moot.
Any easy test would be to boot a system with a minimal DT, basically
serial only, and have the kernel disable the runit clock, read a
register from one of those blocks, enable the clock and print OK. The
ones that lock up need the runit clock for sure. 7 boots should answer
the question :)
My guess is that all the peripherals behind mbus unit 0x1 (see table
94, and table 96) are controlled by that clock gate. The other gates
seem to be organized by mbus unit, and there is something very tidy
about that from a hardware perspective :)
Jason
^ permalink raw reply
* [PATCH 2/2] ARM: imx: set CKO1 parent clock source in imx6q sabresd
From: Gary Zhang @ 2013-02-01 6:46 UTC (permalink / raw)
To: linux-arm-kernel
in imx6q sabresd board, set ahb as CKO1 parent clock sourrce
Signed-off-by: Gary Zhang <b13634@freescale.com>
---
arch/arm/mach-imx/mach-imx6q.c | 15 ++++++++++++---
1 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 4eb1b3a..860e272 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -119,7 +119,7 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev)
return 0;
}
-static void __init imx6q_sabrelite_cko1_setup(void)
+static void __init cko1_setup(unsigned long freq)
{
struct clk *cko1_sel, *ahb, *cko1;
unsigned long rate;
@@ -132,8 +132,10 @@ static void __init imx6q_sabrelite_cko1_setup(void)
goto put_clk;
}
clk_set_parent(cko1_sel, ahb);
- rate = clk_round_rate(cko1, 16000000);
+ rate = clk_round_rate(cko1, freq);
clk_set_rate(cko1, rate);
+
+ return;
put_clk:
if (!IS_ERR(cko1_sel))
clk_put(cko1_sel);
@@ -148,7 +150,12 @@ static void __init imx6q_sabrelite_init(void)
if (IS_BUILTIN(CONFIG_PHYLIB))
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
ksz9021rn_phy_fixup);
- imx6q_sabrelite_cko1_setup();
+ cko1_setup(16000000);
+}
+
+static void __init imx6q_sabresd_init(void)
+{
+ cko1_setup(24000000);
}
static void __init imx6q_1588_init(void)
@@ -193,6 +200,8 @@ static void __init imx6q_init_machine(void)
{
if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
imx6q_sabrelite_init();
+ else if (of_machine_is_compatible("fsl,imx6q-sabresd"))
+ imx6q_sabresd_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
--
1.7.0.4
^ permalink raw reply related
* [PATCH 1/2] ARM: dts: add support for some modules in imx6q sabresd
From: Gary Zhang @ 2013-02-01 6:46 UTC (permalink / raw)
To: linux-arm-kernel
add I2C/I2S/clk/fixed regulator/sound card and
other related supports in imx6q sabresd
Signed-off-by: Gary Zhang <b13634@freescale.com>
---
arch/arm/boot/dts/imx6q-sabresd.dts | 76 +++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/imx6q.dtsi | 23 ++++++++++
2 files changed, 99 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index a424025..383fcf0 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -29,6 +29,10 @@
pinctrl-0 = <&pinctrl_uart1_1>;
status = "okay";
};
+ ssi2: ssi at 0202c000 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+ };
};
iomuxc at 020e0000 {
@@ -73,6 +77,33 @@
wp-gpios = <&gpio2 1 0>;
status = "okay";
};
+
+ audmux at 021d8000 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux_2>;
+ };
+
+ i2c at 021a0000 { /* I2C1 */
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_2>;
+
+ codec: wm8962 at 1a {
+ compatible = "fsl,wm8962";
+ reg = <0x1a>;
+ clocks = <&clks 169>;
+ DCVDD-supply = <®_1p8v>;
+ DBVDD-supply = <®_1p8v>;
+ AVDD-supply = <®_1p8v>;
+ CPVDD-supply = <®_1p8v>;
+ MICVDD-supply = <®_3p3v>;
+ PLLVDD-supply = <®_1p8v>;
+ SPKVDD1-supply = <®_4p2v>;
+ SPKVDD2-supply = <®_4p2v>;
+ };
+ };
};
};
@@ -91,4 +122,49 @@
linux,code = <114>; /* KEY_VOLUMEDOWN */
};
};
+ regulators {
+ compatible = "simple-bus";
+
+ reg_1p8v: 1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ enable-active-high;
+ };
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ enable-active-high;
+ };
+ reg_4p2v: 4p2v {
+ compatible = "regulator-fixed";
+ regulator-name = "4P2V";
+ regulator-min-microvolt = <4200000>;
+ regulator-max-microvolt = <4200000>;
+ gpio = <&gpio4 10 0>;
+ regulator-always-on;
+ regulator-boot-on;
+ enable-active-high;
+ };
+ };
+
+ sound {
+ compatible = "fsl,imx6q-sabresd-wm8962",
+ "fsl,imx-audio-wm8962";
+ model = "imx6q-sabresd-wm8962";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_clko_1>;
+ ssi-controller = <&ssi2>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "Headphone Jack", "HPOUTL",
+ "Headphone Jack", "HPOUTR";
+ mux-int-port = <2>;
+ mux-ext-port = <3>;
+ };
};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index d6265ca..b612269 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -582,6 +582,23 @@
3 0x80000000 /* MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS */
>;
};
+
+ pinctrl_audmux_2: audmux-2 {
+ fsl,pins = <
+ 1117 0x80000000 /* MX6Q_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD */
+ 1093 0x80000000 /* MX6Q_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC */
+ 1101 0x80000000 /* MX6Q_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD */
+ 1109 0x80000000 /* MX6Q_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS */
+ >;
+ };
+ };
+
+ clko {
+ pinctrl_clko_1: clkogrp-1 {
+ fsl,pins = <
+ 953 0x130b0 /* MX6Q_PAD_GPIO_0__CCM_CLKO */
+ >;
+ };
};
ecspi1 {
@@ -670,6 +687,12 @@
196 0x4001b8b1 /* MX6Q_PAD_EIM_D28__I2C1_SDA */
>;
};
+ pinctrl_i2c1_2: i2c1grp-2 {
+ fsl,pins = <
+ 1125 0x4001b8b1 /* MX6Q_PAD_CSI0_DAT8__I2C1_SDA */
+ 1133 0x4001b8b1 /* MX6Q_PAD_CSI0_DAT9__I2C1_SCL */
+ >;
+ };
};
uart1 {
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH 0/4] Add support for LZ4-compressed kernels
From: H. Peter Anvin @ 2013-02-01 6:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <alpine.LFD.2.02.1301312117240.6300@xanadu.home>
On 01/31/2013 06:28 PM, Nicolas Pitre wrote:
>>
>> Well, it is too nasty for public confession, but it's called
>> "paravirtualization".
>
> The fact that you are aware of it means we're not going to break them.
>
> But my point is that we must not be held back just in case someone out
> there might have painted himself in a corner without telling anyone.
>
Yes. However, it makes it more questionable to simply rip out
compression methods without warning. Not that warnings help, as we have
learned.
-hpa
^ permalink raw reply
* [PATCH v4] ARM: LPAE: Fix mapping in alloc_init_pte for unaligned addresses
From: Santosh Shilimkar @ 2013-02-01 6:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359472036-7613-1-git-send-email-r.sricharan@ti.com>
Catalin, Russell,
On Tuesday 29 January 2013 08:37 PM, R Sricharan wrote:
> With LPAE enabled, alloc_init_section() does not map the
> entire address space for unaligned addresses.
>
> The issue also reproduced with CMA + LPAE. CMA tries to map 16MB
> with page granularity mappings during boot. alloc_init_pte()
> is called and out of 16MB, only 2MB gets mapped and rest remains
> unaccessible.
>
> Because of this OMAP5 boot is broken with CMA + LPAE enabled.
> Fix the issue by ensuring that the entire addresses are
> mapped.
>
> Signed-off-by: R Sricharan <r.sricharan@ti.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Christoffer Dall <chris@cloudcar.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Tested-by: Christoffer Dall <chris@cloudcar.com>
> ---
This patch has been on the list for quite some time. Its
a bug fix and should into mainline. Christoffer already
stumbled on the same issue and has to spend debugging the
known issue.
Can you please give your ack's if it is fine to get into
patch system ?
> [V2] Moved the loop to alloc_init_pte as per Russell's
> feedback and changed the subject accordingly.
> Using PMD_XXX instead of SECTION_XXX to avoid
> different loop increments with/without LPAE.
>
> [v3] Removed the dummy variable phys and updated
> the commit log for CMA case.
>
> [v4] Resending with updated change log and
> updating the tags.
>
> arch/arm/mm/mmu.c | 20 ++++++++++++++++----
> 1 file changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> index f8388ad..b94c313 100644
> --- a/arch/arm/mm/mmu.c
> +++ b/arch/arm/mm/mmu.c
> @@ -569,11 +569,23 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr,
> unsigned long end, unsigned long pfn,
> const struct mem_type *type)
> {
> - pte_t *pte = early_pte_alloc(pmd, addr, type->prot_l1);
> + unsigned long next;
> + pte_t *pte;
> +
> do {
> - set_pte_ext(pte, pfn_pte(pfn, __pgprot(type->prot_pte)), 0);
> - pfn++;
> - } while (pte++, addr += PAGE_SIZE, addr != end);
> + if ((end-addr) & PMD_MASK)
> + next = (addr + PMD_SIZE) & PMD_MASK;
> + else
> + next = end;
> +
> + pte = early_pte_alloc(pmd, addr, type->prot_l1);
> + do {
> + set_pte_ext(pte, pfn_pte(pfn,
> + __pgprot(type->prot_pte)), 0);
> + pfn++;
> + } while (pte++, addr += PAGE_SIZE, addr != next);
> +
> + } while (pmd++, addr = next, addr != end);
> }
>
> static void __init alloc_init_section(pud_t *pud, unsigned long addr,
>
^ permalink raw reply
* [PATCH] ARM: EXYNOS5: Fix PMU register configuration for local power blocks
From: Abhilash Kesavan @ 2013-02-01 6:20 UTC (permalink / raw)
To: linux-arm-kernel
For the six local power blocks - MFC, DISP1, GSC, MAU, G3D and ISP
the respective CMU_RESET, CMU_SYSCLK and CMU_CLKSTOP registers need
to be low initially for normal mode on Exynos5250.
Also fix the corresponding AFTR and LPA configurations.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
---
arch/arm/mach-exynos/pmu.c | 66 ++++++++++++++++++++++++++++++++------------
1 file changed, 48 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index daebc1a..61cedd7 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -295,24 +295,24 @@ static struct exynos_pmu_conf exynos5250_pmu_config[] = {
{ EXYNOS5_G3D_SYS_PWR_REG, { 0x7, 0x0, 0x0} },
{ EXYNOS5_DISP1_SYS_PWR_REG, { 0x7, 0x0, 0x0} },
{ EXYNOS5_MAU_SYS_PWR_REG, { 0x7, 0x7, 0x0} },
- { EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
- { EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
- { EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
- { EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
+ { EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+ { EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
{ PMU_TABLE_END,},
};
@@ -336,6 +336,27 @@ static void __iomem *exynos5_list_diable_wfi_wfe[] = {
EXYNOS5_ISP_ARM_OPTION,
};
+void __iomem *exynos5_list_disable_pmu_reg[] = {
+ EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG,
+ EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG,
+ EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG,
+ EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG,
+ EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG,
+ EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG,
+ EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG,
+ EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG,
+ EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG,
+ EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG,
+ EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG,
+ EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG,
+ EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG,
+ EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG,
+ EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG,
+ EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG,
+ EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG,
+ EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG,
+};
+
static void exynos5_init_pmu(void)
{
unsigned int i;
@@ -392,6 +413,7 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
static int __init exynos_pmu_init(void)
{
unsigned int value;
+ unsigned int i;
exynos_pmu_config = exynos4210_pmu_config;
@@ -414,6 +436,14 @@ static int __init exynos_pmu_init(void)
value &= ~EXYNOS5_SYS_WDTRESET;
__raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
+ /*
+ * Set the CMU_RESET, CMU_SYSCLK and CMU_CLKSTOP registers for
+ * local power blocks to Low initially as per the "System-Level
+ * Power-Down Configuration Registers" table.
+ */
+ for (i = 0; i < ARRAY_SIZE(exynos5_list_disable_pmu_reg); i++)
+ __raw_writel(0x0, exynos5_list_disable_pmu_reg[i]);
+
exynos_pmu_config = exynos5250_pmu_config;
pr_info("EXYNOS5250 PMU Initialize\n");
} else {
--
1.7.9.5
^ permalink raw reply related
* [PATCH v3 14/15] ARM: vexpress/dcscb: handle platform coherency exit/setup and CCI
From: Santosh Shilimkar @ 2013-02-01 6:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359445870-18925-15-git-send-email-nicolas.pitre@linaro.org>
On Tuesday 29 January 2013 01:21 PM, Nicolas Pitre wrote:
> From: Dave Martin <dave.martin@linaro.org>
>
> Add the required code to properly handle race free platform coherency exit
> to the DCSCB power down method.
>
> The power_up_setup callback is used to enable the CCI interface for
> the cluster being brought up. This must be done in assembly before
> the kernel environment is entered.
>
> Thanks to Achin Gupta and Nicolas Pitre for their help and
> contributions.
>
> Signed-off-by: Dave Martin <dave.martin@linaro.org>
> Signed-off-by: Nicolas Pitre <nico@linaro.org>
> ---
My concerns on this patch are already highlighted by Lorenzo.
Apart from that patch looks fine to me.
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
^ permalink raw reply
* [PATCH v2 1/2] ARM: kirkwood: Ensure that kirkwood_ge0[01]_init() finds its clock
From: Andrew Lunn @ 2013-02-01 6:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20130201001932.GA13044@obsidianresearch.com>
> My guesses would be the RTC and/or GPIO blocks (the GPIO blinker needs
> a clock), based on table 94.
I've used AT91 parts where you can do GPO with the clock disabled, but
GPI needed a ticking clock. So, yes, GPIO is a good candidate for
ruint clock as well.
Looking through the data sheets, and comparing against the gated
clocks, we have the following without their own clock:
RTC, I2C (a.k.a. TWI), UART, NAND, SPI, Watchdog, eFuse,
Andrew
^ permalink raw reply
* [PATCH v3 13/15] ARM: CCI: ensure powerdown-time data is flushed from cache
From: Santosh Shilimkar @ 2013-02-01 6:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359445870-18925-14-git-send-email-nicolas.pitre@linaro.org>
On Tuesday 29 January 2013 01:21 PM, Nicolas Pitre wrote:
> From: Dave Martin <dave.martin@linaro.org>
>
> Non-local variables used by the CCI management function called after
> disabling the cache must be flushed out to main memory in advance,
> otherwise incoherency of those values may occur if they are sitting
> in the cache of some other CPU when cci_disable() executes.
>
Any CPU calling cci_disable() would have already cleaned its local
cache and the snoop unit should take care of syncing the shared data
before hand from other CPU local caches for shared accesses.
May be I am unable to visualize the issue here or missing some key
point.
> This patch adds the appropriate flushing to the CCI driver to ensure
> that the relevant data is available in RAM ahead of time.
>
> Because this creates a dependency on arch-specific cacheflushing
> functions, this patch also makes ARM_CCI depend on ARM.
>
You should do that otherwise to avoid other arch building this
driver for random builds and breaking their builds.
> Signed-off-by: Dave Martin <dave.martin@linaro.org>
> Signed-off-by: Nicolas Pitre <nico@linaro.org>
> ---
Patch is fine apart from the question.
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
^ permalink raw reply
* [PATCH] ARM: dts: AM33XX: Corrects typo in interrupt field in SPI node
From: Philip, Avinash @ 2013-02-01 6:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359697047-1816-1-git-send-email-avinashphilip@ti.com>
On Fri, Feb 01, 2013 at 11:07:27, Philip, Avinash wrote:
> DT field of "interrupts" was mentioned wrongly as "interrupt" in SPI
> node. This went unnoticed as spi-omap2 driver not making use of
> interrupt. Fixes the typo.
>
> Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Reported-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Typo mistake was reported by Vaibhav. I forgot to mention "Reported-by"
tag while posting. Add the same on his behalf.
Thanks
Avinash
> ---
> arch/arm/boot/dts/am33xx.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
> index fbcb90b..cece3ad 100644
> --- a/arch/arm/boot/dts/am33xx.dtsi
> +++ b/arch/arm/boot/dts/am33xx.dtsi
> @@ -309,7 +309,7 @@
> #address-cells = <1>;
> #size-cells = <0>;
> reg = <0x48030000 0x400>;
> - interrupt = <65>;
> + interrupts = <65>;
> ti,spi-num-cs = <2>;
> ti,hwmods = "spi0";
> status = "disabled";
> @@ -320,7 +320,7 @@
> #address-cells = <1>;
> #size-cells = <0>;
> reg = <0x481a0000 0x400>;
> - interrupt = <125>;
> + interrupts = <125>;
> ti,spi-num-cs = <2>;
> ti,hwmods = "spi1";
> status = "disabled";
> --
> 1.7.9.5
>
>
^ permalink raw reply
* [PATCH v3 12/15] drivers/bus: add ARM CCI support
From: Santosh Shilimkar @ 2013-02-01 6:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1359445870-18925-13-git-send-email-nicolas.pitre@linaro.org>
On Tuesday 29 January 2013 01:21 PM, Nicolas Pitre wrote:
> From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>
> On ARM multi-cluster systems coherency between cores running on
> different clusters is managed by the cache-coherent interconnect (CCI).
> It allows broadcasting of TLB invalidates and memory barriers and it
> guarantees cache coherency at system level.
>
> This patch enables the basic infrastructure required in Linux to
> handle and programme the CCI component. The first implementation is
> based on a platform device, its relative DT compatible property and
> a simple programming interface.
>
> Signed-off-by: Nicolas Pitre <nico@linaro.org>
> ---
> drivers/bus/Kconfig | 4 ++
> drivers/bus/Makefile | 2 +
> drivers/bus/arm-cci.c | 107 ++++++++++++++++++++++++++++++++++++++++++++++++
> include/linux/arm-cci.h | 30 ++++++++++++++
> 4 files changed, 143 insertions(+)
> create mode 100644 drivers/bus/arm-cci.c
> create mode 100644 include/linux/arm-cci.h
>
> diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
> index 0f51ed687d..d032f74ff2 100644
> --- a/drivers/bus/Kconfig
> +++ b/drivers/bus/Kconfig
> @@ -19,4 +19,8 @@ config OMAP_INTERCONNECT
>
> help
> Driver to enable OMAP interconnect error handling driver.
> +
> +config ARM_CCI
> + bool "ARM CCI driver support"
> +
> endmenu
> diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
> index 45d997c854..55aac809e5 100644
> --- a/drivers/bus/Makefile
> +++ b/drivers/bus/Makefile
> @@ -6,3 +6,5 @@ obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
>
> # Interconnect bus driver for OMAP SoCs.
> obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o
> +
> +obj-$(CONFIG_ARM_CCI) += arm-cci.o
> diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
> new file mode 100644
> index 0000000000..25ae156924
> --- /dev/null
> +++ b/drivers/bus/arm-cci.c
> @@ -0,0 +1,107 @@
> +/*
> + * ARM Cache Coherency Interconnect (CCI400) support
> + *
> + * Copyright (C) 2012-2013 ARM Ltd.
> + * Author: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
> + * kind, whether express or implied; without even the implied warranty
> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/device.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/arm-cci.h>
> +
> +#define CCI400_EAG_OFFSET 0x4000
> +#define CCI400_KF_OFFSET 0x5000
> +
> +#define DRIVER_NAME "CCI"
> +struct cci_drvdata {
> + void __iomem *baseaddr;
> + spinlock_t lock;
> +};
> +
> +static struct cci_drvdata *info;
> +
> +void disable_cci(int cluster)
> +{
> + u32 cci_reg = cluster ? CCI400_KF_OFFSET : CCI400_EAG_OFFSET;
> + writel_relaxed(0x0, info->baseaddr + cci_reg);
> +
> + while (readl_relaxed(info->baseaddr + 0xc) & 0x1)
0xc ? Is that a status register ? A define for the same would be
good. Rest of the patch looks fine.
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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