* [GIT PULL 5/6] ARM: SoC board updates for 3.14
From: Olof Johansson @ 2014-01-23 18:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390502188-16896-1-git-send-email-olof@lixom.net>
This branch is reducing in size for every release since most board-related
changes have started happening in devicetrees now. Still, we have some things
going on here.
* Renesas platforms are still adding a bit more legacy device support, something
that should trail off shortly as they move to full DT.
* We group most defconfig updates into this branch out of old habits
* Removal of legacy OMAP2 platforms over to DT continues, and a handful of old
code is being removed here.
Conflicts:
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c:
Bugfix in later -rc conflicts with code removal. Remove both irqs[]
arrays.
----------------------------------------------------------------
The following changes since commit aef07284ff26becdff4ac000f05ab020a5cfe29c:
Merge branch 'next/dt' into HEAD
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/boards-for-linus
for you to fetch changes up to e41006c22eab8eb7763995e8a0be089b900b620b:
Merge tag 'omap-for-v3.14/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/boards
----------------------------------------------------------------
Aaro Koskinen (1):
ARM: OMAP2+: dts: add n8x0 onenand
Bartlomiej Zolnierkiewicz (1):
ARM: exynos_defconfig: increase CONFIG_NR_CPUS value to 8
Ezequiel Garcia (2):
ARM: mvebu: config: Add GPIO connected LEDs support to defconfig
ARM: mvebu: config: Enable NAND support
Hiep Cao Minh (1):
ARM: shmobile: Lager:add SPI FLASH support on QSPI
Kevin Hilman (1):
Merge tag 'omap-for-v3.14/board-removal-safe' of git://git.kernel.org/.../tmlind/linux-omap into next/boards
Kuninori Morimoto (9):
ARM: shmobile: bockw: enable CONFIG_REGULATOR
ARM: shmobile: lager: add gpio regulator support on defconfig
ARM: shmobile: lager: fixup I2C device on defconfig
ARM: shmobile: bockw: use regulator for MMCIF
ARM: shmobile: bockw: fixup FPGA ioremap area
ARM: shmobile: bockw: add pin pull-up setting for SDHI
ARM: shmobile: armadillo: fixup FSI address size
ARM: shmobile: bockw: remove unused RSND_SSI_CLK_FROM_ADG
ARM: shmobile: lager: add gpio/fixed regulator for SDHI
Laurent Pinchart (16):
ARM: shmobile: genmai: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
ARM: shmobile: mackerel: Use pinconf API to configure pin pull-down
ARM: Kconfig: Mention Renesas ARM SoCs instead of SH-Mobile
ARM: shmobile: armadillo800eva: Enable backlight control in defconfig
ARM: shmobile: koelsch: Add DU device
ARM: shmobile: armadillo: Set backlight enable GPIO
ARM: shmobile: lager-reference: Enable multiplaform kernel support
ARM: shmobile: koelsch-reference: Remove duplicate CCF initialization
ARM: shmobile: lager-reference: Instantiate clkdevs for SCIF and CMT
ARM: shmobile: koelsch-reference: Instantiate clkdevs for SCIF and CMT
ARM: shmobile: Remove non-multiplatform Lager reference support
ARM: shmobile: Remove non-multiplatform Koelsch reference support
ARM: shmobile: Let Lager multiplatform boot with Lager DTB
ARM: shmobile: Let Koelsch multiplatform boot with Koelsch DTB
ARM: shmobile: mackerel: Fix USBHS pinconf entry
ARM: dts: Split omap3 pinmux core device
Magnus Damm (14):
ARM: shmobile: Genmai defconfig
ARM: shmobile: Enable PFC/GPIO on the Koelsch board
ARM: shmobile: Add Koelsch LED6, LED7 and LED8 support
ARM: shmobile: Add Koelsch SW2 support
ARM: shmobile: r8a7791 Koelsch DT reference C bits
ARM: shmobile: Initial r8a7791 and Koelsch multiplatform support
ARM: shmobile: r7s72100 Genmai DT reference DTS bits
ARM: shmobile: r7s72100 Genmai DT reference C bits
ARM: shmobile: r7s72100 Genmai Multiplatform
ARM: shmobile: Use ->init_late() on Koelsch
ARM: shmobile: koelsch: mark GPIO keys as wake-up sources
ARM: shmobile: Hook up SW30-SW36 on Koelsch
ARM: shmobile: Use ->init_late() on Lager
ARM: shmobile: Add pinctrl_register_mappings() for Koelsch
Olof Johansson (13):
Merge tag 'renesas-defconfig-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/boards
Merge tag 'mvebu-defconfig-3.14' of git://git.infradead.org/linux-mvebu into next/boards
Merge tag 'samsung-defconfig' of git://git.kernel.org/.../kgene/linux-samsung into next/boards
Merge tag 'mvebu-defconfig-3.14-2' of git://git.infradead.org/linux-mvebu into next/boards
Merge tag 'tegra-for-3.14-defconfig' of git://git.kernel.org/.../tegra/linux into next/boards
Merge tag 'tegra-for-3.14-defconfig-2' of git://git.kernel.org/.../tegra/linux into next/boards
Merge tag 'v3.13-rc5' into next/boards
Merge tag 'samsung-defconfig-2' of git://git.kernel.org/.../kgene/linux-samsung into next/boards
Merge tag 'renesas-boards-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/boards
Merge tag 'renesas-defconfig2-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/boards
Merge branch 'qcom/boards' into next/boards
Merge tag 'renesas-boards2-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/boards
Merge tag 'omap-for-v3.14/dt-signed' of git://git.kernel.org/.../tmlind/linux-omap into next/boards
Paul Walmsley (1):
ARM: shmobile: mackerel: clk_round_rate() can return a zero to indicate an error
Rohit Vaswani (2):
ARM: msm: Add support for APQ8074 Dragonboard
defconfig: msm_defconfig: Enable CONFIG_ARCH_MSM8974
Sachin Kamat (1):
ARM: exynos_defconfig: Enable S2MPS11 voltage regulator
Sergei Shtylyov (4):
ARM: shmobile: marzen: enable HPB-DMAC in defconfig
ARM: shmobile: bockw: enable HPB-DMAC in defconfig
ARM: shmobile: Koelsch: enable Ether in defconfig
ARM: shmobile: Koelsch: add Ether support
Shinya Kuribayashi (2):
ARM: shmobile: lager: set .debounce_interval
ARM: shmobile: lager: mark GPIO keys as wake-up sources
Simon Horman (17):
ARM: shmobile: bockw: Do not set command line in defconfig
ARM: shmobile: marzen: Do not set command line in defconfig
ARM: shmobile: bockw: Do not disable CONFIG_INOTIFY_USER in defconfig
ARM: shmobile: marzen: Do not disable CONFIG_INOTIFY_USER in defconfig
ARM: shmobile: bockw: Enable CONFIG_VFP in defconfig
ARM: shmobile: marzen: Enable CONFIG_VFP in defconfig
ARM: shmobile: bockw: Do not enable CONFIG_DEVTMPFS defconfig
ARM: shmobile: marzen: Do not enable CONFIG_DEVTMPFS defconfig
ARM: shmobile: bockw: Enable CONFIG_PACKET in defconfig
ARM: shmobile: marzen: Enable CONFIG_PACKET in defconfig
ARM: shmobile: marzen: Do not enable CONFIG_SMC911X in defconfig
ARM: shmobile: kzm9d: Enable AUTO_ZRELADDR in defconfig
Merge tag 'renesas-cleanup-for-v3.14' into boards-base
ARM: shmobile: koelsch: set .debounce_interval
ARM: shmobile: koelsch: Enable CONFIG_PACKET in defconfig
ARM: shmobile: koelsch: Do not disable CONFIG_{INOTIFY_USER,UNIX} in defconfig
Merge branch 'heads/soc2' into boards2-base
Srinivas Kandagatla (1):
ARM: multi_v7_defconfig: Fix STi support
Stephen Boyd (1):
ARM: msm_defconfig: Enable restart driver
Stephen Warren (2):
ARM: tegra: tegra_defconfig updates
ARM: bcm2835: bcm2835_defconfig updates
Suman Anna (1):
ARM: dts: OMAP2: fix interrupt number for rng
Thierry Reding (1):
ARM: tegra: Enable DRM panel support
Thomas Petazzoni (1):
ARM: kirkwood: enable HIGHMEM in defconfig
Tony Lindgren (22):
mfd: twl-core: Fix passing of platform data in the device tree case
Merge branch 'dt-regressions' into omap-for-v3.13/fixes-take4
ARM: dts: Add basic device tree support for omap2430 sdp
ARM: dts: Add basic Nokia N8X0 support
ARM: dts: Add basic support for omap3 LDP zoom1 labrador
Merge branch 'omap-for-v3.13/fixes-take4' into omap-for-v3.14/board-removal
Merge branch 'omap-for-v3.14/dt' into omap-for-v3.14/board-removal
ARM: OMAP2+: Add support for board specific auxdata quirks
ARM: OMAP2+: Add device tree compatible revision checks for n8x0
ARM: OMAP2+: Make n8x0 behave better with device tree based booting
ARM: OMAP2+: Add quirks support for n8x0
ARM: OMAP2+: Remove legacy booting support for n8x0
ARM: OMAP2+: Remove board file for H4
ARM: OMAP2+: Remove legacy board file for 2430sdp
ARM: OMAP2+: Remove legacy mux code for omap2
ARM: OMAP2+: Remove legacy hwmod entries for omap2
Merge branch 'omap-for-v3.14/board-removal' into omap-for-v3.14/omap3-board-removal
ARM: OMAP2+: Add support for legacy auxdata for twl
ARM: OMAP2+: Use pdata quirks for emac on am3517
ARM: dts: Add basic devices on am3517-evm
ARM: dts: Add support for sbc-3xxx with cm-t3730
ARM: dts: Add omap specific pinctrl defines to use padconf addresses
arch/arm/Kconfig | 7 +-
arch/arm/boot/dts/Makefile | 17 +-
arch/arm/boot/dts/am3517-evm.dts | 29 +
arch/arm/boot/dts/omap2.dtsi | 2 +-
arch/arm/boot/dts/omap2420-n800.dts | 8 +
arch/arm/boot/dts/omap2420-n810-wimax.dts | 8 +
arch/arm/boot/dts/omap2420-n810.dts | 8 +
arch/arm/boot/dts/omap2420-n8x0-common.dtsi | 99 +++
arch/arm/boot/dts/omap2430-sdp.dts | 49 ++
arch/arm/boot/dts/omap3-beagle-xm.dts | 40 +-
arch/arm/boot/dts/omap3-beagle.dts | 40 +-
arch/arm/boot/dts/omap3-cm-t3730.dts | 104 +++
arch/arm/boot/dts/omap3-cm-t3x30.dtsi | 95 +++
arch/arm/boot/dts/omap3-igep.dtsi | 2 -
arch/arm/boot/dts/omap3-igep0020.dts | 52 +-
arch/arm/boot/dts/omap3-igep0030.dts | 10 +-
arch/arm/boot/dts/omap3-ldp.dts | 231 ++++++
arch/arm/boot/dts/omap3-sb-t35.dtsi | 40 +
arch/arm/boot/dts/omap3-sbc-t3730.dts | 30 +
arch/arm/boot/dts/omap3-zoom3.dts | 23 +-
arch/arm/boot/dts/omap3.dtsi | 2 +-
arch/arm/boot/dts/omap34xx.dtsi | 13 +
arch/arm/boot/dts/omap36xx.dtsi | 11 +
arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 6 +
arch/arm/boot/dts/r7s72100-genmai-reference.dts | 31 +
arch/arm/configs/armadillo800eva_defconfig | 3 +
arch/arm/configs/bcm2835_defconfig | 37 +-
arch/arm/configs/bockw_defconfig | 10 +-
arch/arm/configs/exynos_defconfig | 3 +-
arch/arm/configs/genmai_defconfig | 116 +++
arch/arm/configs/kirkwood_defconfig | 1 +
arch/arm/configs/koelsch_defconfig | 25 +-
arch/arm/configs/kzm9d_defconfig | 1 +
arch/arm/configs/lager_defconfig | 3 +-
arch/arm/configs/marzen_defconfig | 10 +-
arch/arm/configs/msm_defconfig | 3 +
arch/arm/configs/multi_v7_defconfig | 3 +
arch/arm/configs/mvebu_defconfig | 3 +
arch/arm/configs/tegra_defconfig | 22 +-
arch/arm/mach-msm/board-dt.c | 9 +
arch/arm/mach-omap2/Kconfig | 13 -
arch/arm/mach-omap2/Makefile | 4 -
arch/arm/mach-omap2/board-2430sdp.c | 273 -------
arch/arm/mach-omap2/board-h4.c | 365 ---------
arch/arm/mach-omap2/board-n8x0.c | 234 ++----
arch/arm/mach-omap2/common-board-devices.h | 1 +
arch/arm/mach-omap2/common.h | 1 +
arch/arm/mach-omap2/msdi.c | 69 --
arch/arm/mach-omap2/mux.h | 2 -
arch/arm/mach-omap2/mux2420.c | 690 ----------------
arch/arm/mach-omap2/mux2420.h | 282 -------
arch/arm/mach-omap2/mux2430.c | 793 -------------------
arch/arm/mach-omap2/mux2430.h | 370 ---------
arch/arm/mach-omap2/omap_device.c | 2 +
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 137 ----
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 266 -------
.../omap_hwmod_2xxx_interconnect_data.c | 165 +---
.../mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 72 +-
arch/arm/mach-omap2/omap_hwmod_common_data.h | 5 -
arch/arm/mach-omap2/pdata-quirks.c | 138 +++-
arch/arm/mach-shmobile/Kconfig | 63 +-
arch/arm/mach-shmobile/Makefile | 5 +-
arch/arm/mach-shmobile/Makefile.boot | 4 +-
arch/arm/mach-shmobile/board-armadillo800eva.c | 7 +-
arch/arm/mach-shmobile/board-bockw-reference.c | 19 +-
arch/arm/mach-shmobile/board-bockw.c | 17 +-
arch/arm/mach-shmobile/board-genmai-reference.c | 49 ++
.../arm/mach-shmobile/board-koelsch-reference.c | 79 ++
arch/arm/mach-shmobile/board-koelsch.c | 190 ++++-
arch/arm/mach-shmobile/board-lager-reference.c | 34 +
arch/arm/mach-shmobile/board-lager.c | 151 +++-
arch/arm/mach-shmobile/board-mackerel.c | 21 +-
arch/arm/mach-shmobile/sh-gpio.h | 19 -
include/dt-bindings/pinctrl/omap.h | 20 +
include/sound/rcar_snd.h | 1 -
75 files changed, 1899 insertions(+), 3868 deletions(-)
create mode 100644 arch/arm/boot/dts/omap2420-n800.dts
create mode 100644 arch/arm/boot/dts/omap2420-n810-wimax.dts
create mode 100644 arch/arm/boot/dts/omap2420-n810.dts
create mode 100644 arch/arm/boot/dts/omap2420-n8x0-common.dtsi
create mode 100644 arch/arm/boot/dts/omap2430-sdp.dts
create mode 100644 arch/arm/boot/dts/omap3-cm-t3730.dts
create mode 100644 arch/arm/boot/dts/omap3-cm-t3x30.dtsi
create mode 100644 arch/arm/boot/dts/omap3-ldp.dts
create mode 100644 arch/arm/boot/dts/omap3-sb-t35.dtsi
create mode 100644 arch/arm/boot/dts/omap3-sbc-t3730.dts
create mode 100644 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
create mode 100644 arch/arm/boot/dts/r7s72100-genmai-reference.dts
create mode 100644 arch/arm/configs/genmai_defconfig
delete mode 100644 arch/arm/mach-omap2/board-2430sdp.c
delete mode 100644 arch/arm/mach-omap2/board-h4.c
delete mode 100644 arch/arm/mach-omap2/mux2420.c
delete mode 100644 arch/arm/mach-omap2/mux2420.h
delete mode 100644 arch/arm/mach-omap2/mux2430.c
delete mode 100644 arch/arm/mach-omap2/mux2430.h
create mode 100644 arch/arm/mach-shmobile/board-genmai-reference.c
create mode 100644 arch/arm/mach-shmobile/board-koelsch-reference.c
^ permalink raw reply
* [GIT PULL 4/6] ARM: SoC DT updates for 3.14
From: Olof Johansson @ 2014-01-23 18:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390502188-16896-1-git-send-email-olof@lixom.net>
DT and DT-conversion-related changes for various ARM platforms. Most
of these are to enable various devices on various boards, etc, and not
necessarily worth enumerating.
New boards and systems continue to come in as new devicetree files that
don't require corresponding C changes any more, which is indicating that
the system is starting to work fairly well.
A few things worth pointing out:
* ST Ericsson ux500 platforms have made the major push to move over to fully
support the platform with DT.
* Renesas platforms continue their conversion over from legacy platform devices
to DT-based for hardware description.
Conflicts:
arch/arm/boot/dts/armada-370-xp.dtsi:
Conflict with the sorting of the file combined with a compatible string
rename coming in through the SATA tree. Carry down the new compatible
string (marvell,armada-370-sata) to the moved entry further down the file,
the USB node stays where it is.
----------------------------------------------------------------
The following changes since commit 796e6948528f45d2bbc5698d0ea673ea18efdb8d:
Merge branch 'next/soc' into HEAD
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/dt-for-linus
for you to fetch changes up to 310c85476d5047f5ace4d1c527e1bbbc0c7ad672:
Merge tag 'davinci-for-v3.14/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
----------------------------------------------------------------
Alex Ling (1):
ARM: dts: add support for EXYNOS4412 based TINY4412 board
Andrew Lunn (5):
ARM: Dove: Add DT node for PMU interrupt controller.
ARM: Dove: Add RTC interrupt via PMU interrupt controller.
ARM: DT: Kirkwood: Use symbolic names from input.h
ARM: DT: Kirkwood: Use symbolic names from gpio.h
Phy: Add DT nodes on kirkwood and Dove for the SATA PHY
Arnaud Ebalard (14):
ARM: mvebu: Add RN104 SATA LEDs driven via NXP PCA9554 I2C to GPIO muxer
ARM: mvebu: Add DT entry for ReadyNAS Duo v2 to use gpio-poweroff driver
ARM: kirkwood: NETGEAR ReadyNAS Duo v2 .dts cleanup
ARM: mvebu: NETGEAR ReadyNAS 102 .dts cleanup
ARM: mvebu: NETGEAR ReadyNAS 104 .dts cleanup
ARM: mvebu: Fix whitespace in NETGEAR ReadyNAS .dts files
ARM: mvebu: Add Netgear ReadyNAS 2120 board
ARM: kirkwood: Add support for NETGEAR ReadyNAS NV+ v2
ARM: mvebu: Enable NAND controller in ReadyNAS 102 .dts file
ARM: mvebu: Enable NAND controller in ReadyNAS 104 .dts file
ARM: mvebu: Enable NAND controller in ReadyNAS 2120 .dts file
ARM: mvebu: Enable ISL12057 RTC chip in ReadyNAS 102 .dts file
ARM: mvebu: Enable ISL12057 RTC chip in ReadyNAS 104 .dts file
ARM: mvebu: Enable ISL12057 RTC chip in ReadyNAS 2120 .dts file
Ashwini Ghuge (1):
ARM: tegra: add port FF to GPIO IDs
Barry Song (1):
ARM: dts: sirf: add lost clocks for cphifbg
Bin Shi (1):
ARM: dts: sirf: add lost bus_width, clock and status for sdhci
Bo Shen (3):
ARM: at91: sama5d3: enable qt1070 as a wakeup source
ARM: at91: add PWM device node
ARM: at91: at91sam9m10g45ek: switch to PWM leds
Boris BREZILLON (5):
ARM: at91/dt: add ethernet phy to at91rm9200ek board
ARM: at91/dt: add atmel,pullup-gpio to at91rm9200ek usb1 definition
ARM: at91/dt: add clk properties to sama5d3 SHA device node
ARM: at91/dt: add clk properties to sama5d3 AES device node
ARM: at91/dt: add clk properties to sama5d3 TDES device node
Carlo Caione (1):
ARM: dts: sun4i/sun7i: add RTC node
Chander Kashyap (2):
clocksource: mct: extend mct to support 8 local interrupts for Exynos5420
ARM: dts: populate cpu node entries to 8 cpus for exynos5420
Chen-Yu Tsai (4):
ARM: dts: sun7i: Add pin muxing options for clock outputs
ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk at N style
ARM: dts: sun7i: external clock outputs
arm: sun7i: cubietruck: Enable the i2c controllers
Dinh Nguyen (1):
ARM: dts: socfpga: update L2 tag and data latency
Emilio L?pez (7):
ARM: sunxi: dt: add EMAC aliases
ARM: sunxi: add PLL4 support
ARM: sunxi: add PLL5 and PLL6 support
ARM: sun4i: dt: mod0 clocks
ARM: sun5i: dt: mod0 clocks
ARM: sun7i: dt: mod0 clocks
ARM: sunxi: dt: add nodes for the mbus clock
Eric Brower (2):
ARM: tegra: modify Tegra30 USB2 default phy_type to UTMI
ARM: tegra: enable USB2 on Tegra30 Beaver
Ezequiel Garcia (4):
ARM: mvebu: Add support for NAND controller in Armada 370/XP
ARM: mvebu: Enable NAND controller in Armada XP GP board
ARM: mvebu: Enable NAND controller in Armada 370 Mirabox
ARM: mvebu: Enable NAND controller in A370 Reference Design board
Hans de Goede (4):
ARM: dts: sun5i: Add new sun5i-a13-olinuxino-micro board
ARM: dts: sun4i: Add rtp controller node
ARM: dts: sun5i: Add rtp controller node
ARM: dts: sun7i: Add rtp controller node
Jason Cooper (6):
ARM: mvebu: dts: remove unneeded linux,default-state from led nodes
ARM: kirkwood: sort dt nodes by address
ARM: dove: sort DT nodes by address
ARM: orion5x: sort DT nodes by address
ARM: mvebu: sort DT nodes by address
ARM: kirkwood: 6282: sort DT nodes by address
Jean-Christophe PLAGNIOL-VILLARD (6):
ARM: at91: sam9g45: add fb dt support
ARM: at91: sam9263: add fb dt support
ARM: at91: at9sam9m10g45ek: add dt lcd support
ARM: at91: sam9263ek: add dt lcd support
ARM: at91: Animeo IP: fix mtd partition table
ARM: at91: dt: at91rm9200ek: add emac and nor flash support
Jonas Jensen (1):
ARM: moxart: add MOXA ART SoC device tree files
Joseph Lo (1):
ARM: tegra: add clock properties for devices of Tegra124
Josh Wu (1):
ARM: at91: sama5d3/dt: add sama5d36ek dts files
KV Sujith (2):
ARM: davinci: da850: add GPIO DT node
ARM: davinci: da850 evm: add GPIO pinumux entries DT node
Kevin Hilman (13):
Merge tag 'mvebu-dt-3.14-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge branch 'next/cleanup' into next/dt
Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
Merge tag 'integrator-v3.14-1' of git://git.kernel.org/.../linusw/linux-integrator into next/dt
Merge tag 'nomadik-dt-v3.14' of git://git.kernel.org/.../linusw/linux-nomadik into next/dt
Merge tag 'mvebu-dt-3.14-3' of git://git.infradead.org/linux-mvebu into next/dt
Merge branch 'mvebu/dt-4' into next/dt
Merge tag 'keystone-dts' of git://git.kernel.org/.../ssantosh/linux-keystone into next/dt
Merge tag 'renesas-dt-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/dt
Merge tag 'sunxi-dt-for-3.14-2' of https://github.com/mripard/linux into next/dt
Merge tag 'socfpga-dt-for-3.14' of git://git.rocketboards.org/linux-socfpga-next into next/dt
Merge tag 'sirf-dts-for-3.14' of git://git.kernel.org/.../baohua/linux into next/dt
Merge tag 'davinci-for-v3.14/dt' of git://git.kernel.org/.../nsekhar/linux-davinci into next/dt
Kukjin Kim (1):
Merge branch 'v3.14-next/fixes-samsung-2' into v3.14-next/dt-exynos-2
Kuninori Morimoto (35):
ARM: shmobile: r8a7778: add I2C support on DTSI
ARM: shmobile: r8a7779: tidyup I2C driver name on DTSI
ARM: shmobile: lager: add default PFC settings on DTS
ARM: shmobile: lager: add MMCIF support on DTS
ARM: shmobile: bockw: add default PFC settings on DTS
ARM: shmobile: bockw: remove manual PFC settings on reference
ARM: shmobile: r8a7778: add MMCIF support on DTSI
ARM: shmobile: bockw: add MMCIF support on DTS
ARM: shmobile: bockw: fixup MMC pin conflict on DTS
ARM: shmobile: r8a7778: add SDHI support on DTSI
ARM: shmobile: bockw: add SDHI support on DTS
ARM: shmobile: r8a7779: add SDHI support on DTSI
ARM: shmobile: marzen: add SDHI support on DTS
ARM: shmobile: r8a7740: tidyup DT node naming
ARM: shmobile: r8a73a4: tidyup DT node naming
ARM: shmobile: r8a7778: tidyup DT node naming
ARM: shmobile: r8a7779: tidyup DT node naming
ARM: shmobile: r8a7790: tidyup DT node naming
ARM: shmobile: sh73a0: tidyup DT node naming
ARM: shmobile: armadillo: tidyup DT node naming
ARM: shmobile: ape6evm: tidyup DT node naming
ARM: shmobile: kzm9g: tidyup DT node naming
ARM: shmobile: bockw: tidyup DT node naming
ARM: shmobile: marzen: tidyup DT node naming
ARM: shmobile: lager: tidyup DT node naming
ARM: shmobile: r8a7778: add I2C support on DTSI
ARM: shmobile: r8a7778: add HSPI suppport on DTSI
ARM: shmobile: bockw: enable HSPI0 on DTS
ARM: shmobile: marzen: remove SDHI0 WP pin setting from DTS
ARM: shmobile: marzen: remove SDHI0 WP pin setting
ARM: shmobile: sh73a0: fixup sdhi compatible name
ARM: shmobile: r8a7740: add FSI support via DTSI
ARM: shmobile: armadillo: add FSI support for DTS
ARM: shmobile: sh73a0: add FSI support via DTSI
ARM: shmobile: kzm9g: add FSI support for DTS
Laurent Pinchart (38):
ARM: shmobile: r8a7778: Fix pin control device address in DT
ARM: shmobile: Use #include in device tree sources
ARM: shmobile: Use interrupt macros in SoC DT files
ARM: shmobile: Use interrupt macros in board DT files
ARM: shmobile: marzen-reference: Use falling edge IRQ for LAN9221
ARM: shmobile: bockw-reference: Use falling edge IRQ for LAN9221
ARM: shmobile: kzm9g-reference: Use falling edge IRQ for LAN9221
ARM: shmobile: armadillo-reference: Use low level IRQ for ST1231
ARM: shmobile: kzm9g-reference: Add PCF8575 GPIO extender to DT
ARM: shmobile: kzm9g-reference: Add GPIO keys to DT
ARM: shmobile: Use interrupt macros in r8a73a4 and r8a7778 DT files
ARM: shmobile: emev2: Use interrupt macros in DT files
ARM: shmobile: emev2: Setup internal peripheral interrupts as level high
ARM: shmobile: koelsch: dts: Add gpio-keys device
clk: shmobile: Add R-Car Gen2 clocks support
clk: shmobile: Add DIV6 clock support
clk: shmobile: Add MSTP clock support
ARM: shmobile: armadillo: dts: Add PWM backlight power supply
ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIO
ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
ARM: shmobile: r8a7740: Specify PFC interrupts in DT
ARM: shmobile: sh73a0: Specify PFC interrupts in DT
ARM: shmobile: armadillo: dts: Add gpio-keys device
ARM: shmobile: r8a7790: Add clocks
ARM: shmobile: r8a7790: Reference clocks
ARM: shmobile: r8a7791: Add clocks
ARM: shmobile: Sync Lager DTS with Lager reference DTS
ARM: shmobile: Sync Koelsch DTS with Koelsch reference DTS
ARM: shmobile: lager: Specify external clock frequency in DT
ARM: shmobile: koelsch: Specify external clock frequency in DT
ARM: shmobile: Remove Lager reference DTS
ARM: shmobile: Remove Koelsch reference DTS
ARM: shmobile: r8a7790: Add MSIOF clocks in device tree
ARM: shmobile: r8a7791: Add MSIOF clocks in device tree
ARM: shmobile: r8a7790: Add QSPI module clock in device tree
ARM: shmobile: r8a7791: Add QSPI module clock in device tree
ARM: shmobile: r8a7790: Add SSI clocks in device tree
ARM: shmobile: r8a7791: Add SSI clocks in device tree
Laxman Dewangan (8):
ARM: tegra: convert device tree files to use key defines
ARM: tegra: Add header file for pinctrl constants
ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl defines
ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines
ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
ARM: tegra: add default pinctrl nodes for Venice2
ARM: tegra: fix missing pincontrol configuration for Venice2
ARM: tegra: add ams AS3722 device to Venice2 DT
Lee Jones (10):
ARM: ux500: Remove legacy ATAG SSP support
ARM: ux500: Consolidate [A|D]B8500 platform data
ARM: ux500: Add DMA config bindings for MSP devices
ARM: ux500: Clean-up non-DT IRQ initialisation
ARM: ux500: Remove unused call to register AMBA devices
ARM: ux500: Clean-up legacy extern prototype
ARM: ux500: Remove checking for DT during timer init
dma: ste_dma40: Expand DT binding to accept 'high-priority channel' flag
dma: ste_dma40: Parse flags property for new 'high priority channel' request
ARM: nomadik: Remove '0x's from nomadik stn8815 DTS file
Leela Krishna Amudala (3):
ARM: dts: Add device nodes for GScaler blocks for exynos5420
ARM: dts: Add SPI nodes to the exynos5420 device tree file
ARM: dts: add pwm DT nodes to Exynos5250 and Exynos5420
Linus Walleij (34):
ARM: ux500: adjust the TC3589x devices to the binding
ARM: ux500: move UART pin control to the device tree
ARM: ux500: move I2C pin control to the device tree
ARM: ux500: move MMC/SD/SDIO pin control to the device tree
ARM: ux500: move MSP pin control to the device tree
ARM: ux500: move GPIO217/218 config to device tree
ARM: ux500: move MUSB pin config to device tree
ARM: ux500: move SPI pin config to device tree
ARM: ux500: create MCDE node to collect resources
ARM: ux500: move MCDE pin config to device tree
ARM: ux500: move SKE pin config to device tree
ARM: ux500: drop STM pinmap settings
ARM: ux500: move old HREF ipgpio to the device tree
ARM: ux500: move GPIO key configuration to device tree
ARM: ux500: move the WLAN GPIO pin setup to the device tree
ARM: ux500: move the HREFv60plus IPGPIO pins to device tree
ARM: ux500: move final HREFv60 LCD pins to device tree
ARM: ux500: move HREFv60plus pin configs to device tree
ARM: ux500: move snowball ethernet config to device tree
ARM: ux500: convert Snowball SPI pin reference
ARM: ux500: move snowball LED pin control to device tree
ARM: ux500: move snowball pin configs to device tree
ARM: ux500: delete remnant pin config macros
ARM: ux500: delete Nomadik pinctrl AUXDATA
ARM: ux500: get rid of unused header
pinctrl: nomadik: move platform data handling into driver
pinctrl: nomadik: decomission non-DT boot path
ARM: ux500: decomission the non-DT MTU init sequence
clksrc: delete nomadik MTU non-DT boot path
ARM: ux500: decomission custom SMP TWD timer init
ARM: nomadik: get rid of explicit ethernet GPIO management
ARM: integrator: delete static core module mappings
ARM: integrator: move EBI to the device tree
ARM: ux500: delete U8540 UART auxdata
Ludovic Desroches (2):
ARM: at91: at91sam9g45: set default mmc pinctrl-names
ARM: at91: at91sam9g45: add i2c pinctrl
Magnus Damm (19):
ARM: shmobile: r8a7791 PFC device tree node
ARM: shmobile: r8a7791 GPIO device tree node
ARM: shmobile: r8a7791 Koelsch DT reference DTS bits
ARM: shmobile: Use r8a7791 suffix for IRQC compat string
ARM: shmobile: Configure r8a7791 PFC on Koelsch via DTS
ARM: shmobile: Add r8a7790 thermal device node to DTS
ARM: shmobile: Add r8a7791 thermal device node to DTS
ARM: shmobile: Use r8a7790 suffix for MMCIF compat string
ARM: shmobile: Use r8a7790 suffix for IRQC compat string
ARM: shmobile: Enable DSW2 with gpio-keys on KZM9D
ARM: shmobile: Koelsch DT reference GPIO LED support
ARM: shmobile: Include all 2 GiB of memory on APE6EVM DT Ref
ARM: shmobile: Include all 4 GiB of memory on Lager
ARM: shmobile: Include all 4 GiB of memory on Lager DT Ref
ARM: shmobile: Fix r8a7791 GPIO resources in DTS
ARM: shmobile: Use sh73a0 suffix for INTC compat string
ARM: shmobile: Use r8a7740 suffix for INTC compat string
ARM: shmobile: Use r8a7778 suffix for INTC compat string
ARM: shmobile: Use r8a7779 suffix for INTC compat string
Mark Brown (4):
ARM: dts: Add CODEC MCLK for SMDK5250
ARM: dts: Leave Exynos5250 SPI controller disabled by default
ARM: dts: Disable I2C controllers by default on Exynos5250
ARM: dts: Rename Exynos5250 ChromeOS common file to have exynos prefix
Maxime COQUELIN (3):
ARM: STi: Supply I2C configuration to STiH416 SoC
ARM: STi: Supply I2C configuration to STiH415 SoC
ARM: STi: Add I2C config to B2000 and B2020 boards
Maxime Hadjinlian (2):
ARM: Kirkwood: Add 6192 DTSI file
ARM: Kirkwood: DT board setup for LaPlug
Maxime Ripard (5):
ARM: sun6i: Add the reset controller to the DTSI
ARM: sun6i: dt: Add IP needed to bring up the additional cores
Merge tag 'sunxi-clk-3.14-for-maxime' of https://bitbucket.org/emiliolopez/linux into sunxi/dt-for-3.14
ARM: sun4i: dt: Move the aliases to the DTSI
ARM: sun4i: dt: Remove chosen nodes
Mike Dunn (1):
ARM: pxa: add PWM nodes to pxa27x.dtsi
Mikko Perttunen (2):
ARM: tegra: Add host1x, DC and HDMI to Tegra114 device tree
ARM: tegra: Enable HDMI support on Dalmore
Murali Karicheri (3):
ARM: keystone: dts: add a k2hk-evm specific dts file
ARM: keystone: dts: fix typo in the ddr3 pllclk node name
ARM: keystone: dts: add paclk divider clock node
Naveen Krishna Chatradhi (1):
ARM: dts: Add device nodes for TMU blocks for exynos5420
Nicolas Ferre (9):
ARM: at91/trivial: fix at91rm9200 rts/cts pinctrl definitions
ARM: at91/dt: binding: add precision to AIC documentation
ARM: at91/dt: binding: add missing compatibility string in SDRAM/DDR documentation
ARM: at91/dt/trivial: use macro for AES irq type
ARM: at91/dt/trivial: before sama5d3, Atmel MPU were using at91 prefix
ARM: at91/dt/sama5d3: add DMA information to SHA/AES/TDES nodes
ARM: at91: add i2c2 pinctrl speficifation to sama5d3 DT
ARM: at91: add uart aliases to sama5d3 dtsi
ARM: at91/at91rm9200ek.dts: rearrange nodes in address ascending order
Olof Johansson (18):
Merge tag 'ux500-devicetree-v3.14-1' of git://git.kernel.org/.../linusw/linux-stericsson into next/dt
Merge tag 'mvebu-dt-3.14' of git://git.infradead.org/linux-mvebu into next/dt
Merge tag 'DT-for-v3.14-part-1' of http://git.stlinux.com/devel/kernel/linux-sti into next/dt
Merge tag 'zynq-dt-for-3.14' of git://git.xilinx.com/linux-xlnx into next/dt
Merge tag 'samsung-dt' of git://git.kernel.org/.../kgene/linux-samsung into next/dt
Merge tag 'at91-dt2' of git://github.com/at91linux/linux-at91 into next/dt
Merge tag 'samsung-dt-2' of git://git.kernel.org/.../kgene/linux-samsung into next/dt
Merge branch 'tegra/dma-reset-rework' into next/dt
Merge tag 'tegra-for-3.14-dt' of git://git.kernel.org/.../tegra/linux into next/dt
Merge tag 'tegra-for-3.14-dt-2' of git://git.kernel.org/.../tegra/linux into next/dt
Merge tag 'renesas-dt2-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/dt
Merge branch 'qcom/dt' into next/dt
Merge tag 'mvebu-dt-3.14-5' of git://git.infradead.org/linux-mvebu into next/dt
Merge tag 'sunxi-dt-for-3.14' of https://github.com/mripard/linux into next/dt
Merge tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/dt
Merge tag 'samsung-dt-3' of git://git.kernel.org/.../kgene/linux-samsung into next/dt
Merge tag 'renesas-dt-fixes-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/dt
Merge tag 'ux500-devicetree-v3.14-2' of git://git.kernel.org/.../linusw/linux-stericsson into next/dt
Padmavathi Venna (1):
ARM: dts: Add DMA controller node info on Exynos5420
Qipan Li (1):
ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
Rodolfo Giometti (1):
ARM: at91: add support for Cosino board series by HCE Engineering
Rongjun Ying (2):
ARM: dts: sirf: add clock, frequence-voltage table for CPU0
ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
Sachin Kamat (5):
ARM: dts: Update min voltage for vdd_arm on Arndale
ARM: dts: Add hs-i2c nodes to exynos5420
ARM: dts: Fix sysreg node name in exynos4.dtsi
ARM: dts: Update Samsung sysreg binding document
ARM: dts: Add initial support for Arndale Octa board
Santosh Shilimkar (2):
ARM: dts: keystone: Add the GICV and GICH address space
ARM: dts: keystone: Add guestos maintenance interrupt
Sebastian Hesselbarth (2):
ARM: kirkwood: provide pinctrl default to sdio nodes
ARM: kirkwood: mark guruplug sdio as non-removable
Simon Baatz (1):
ARM: kirkwood: Cleanup comments in Sheevaplug dts files
Simon Horman (10):
ARM: shmobile: r8a7779: add HSPI support to DTSI
ARM: shmobile: marzen: enable HSPI0 in DTS
Merge commit '70c8f01' into dt3-base
Merge remote-tracking branch 'mike-turquette/clk-next-shmobile' into dt3-base
Merge remote-tracking branch 'daniel-lezcano/clockevents/for-Simon-3.13-rc2' into dt3-base
Merge tag 'v3.13-rc3' into dt3-base
Merge branch 'heads/sh-sci' into dt3-base
Merge branch 'heads/soc2' into dt3-base
Revert "ARM: shmobile: r8a7790: Add SSI clocks in device tree"
Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree"
Soren Brinkmann (2):
arm: dt: zynq: Remove 'clock-ranges' from TTC nodes
arm: dt: zynq: Add 'cpus' node
Srinivas Kandagatla (3):
ARM: orion5x: Fix typo in device_type property of phy node
ARM: dove: Fix typo in device_type property of phy node
ARM: STi: OF: Fix a typo in pincfg header
Stefan Agner (1):
ARM: tegra: correct Colibri T20 regulator settings
Steffen Trumtrar (2):
ARM: zynq: add gem support
ARM: dts: socfpga: add pl330 clock
Stephen Boyd (2):
ARM: dts: MSM8974: Add restart node
ARM: dts: MSM8974: Add MMIO architected timer node
Stephen Warren (14):
ARM: tegra: add missing unit addresses to DT
ARM: tegra: fix node sort order
ARM: tegra: add reset properties to Tegra124 DTs
ARM: tegra: add APB DMA controller to Tegra124 DT
ARM: tegra: add Tegra124 pinmux node to DT
ARM: tegra: add MMC controllers to Tegra124 DT
ARM: tegra: add I2C controllers to Tegra124 DT
ARM: tegra: enable I2C controllers on Venice2
ARM: tegra: add audio-related device to Tegra124 DT
ARM: tegra: add sound card to Venice2 DT
ARM: tegra: fix pinctrl misconfiguration on Venice2
ARM: tegra: set up /aliases entries for RTCs
ARM: tegra: set up /aliases for RTCs on Venice2
ARM: bcm2835: add USB controller to device tree
Takashi Yoshii (2):
ARM: shmobile: emev2: Add clock tree description in DT
ARM: shmobile: Include all 2 GiB of memory on APE6EVM
Thierry Reding (13):
ARM: tegra: Add Tegra124 PWM support
ARM: tegra: Enable PWM on Venice2
ARM: tegra: Fix misconfiguration of pin PH2 on Venice2
ARM: tegra: Add SPI controller nodes for Tegra124
ARM: tegra: Enable LVDS on Harmony
ARM: tegra: Enable LVDS on Cardhu
ARM: tegra: Add MIPI calibration DT entries for Tegra114
ARM: tegra: Add Tegra114 DSI support
ARM: tegra: Add Tegra114 gr2d support
ARM: tegra: Add Tegra114 gr3d support
ARM: tegra: Enable DSI support on Dalmore
ARM: tegra: Enable Venice2 keyboard
ARM: tegra: Enable power key on Venice2
Thomas Petazzoni (1):
ARM: mvebu: fix register length for Armada XP PMSU
Tomasz Figa (5):
Documentation: devicetree: Update Exynos MCT bindings description
ARM: dts: Drop interrupt controller properties from MCT nodes for exynos4 SoCs
ARM: dts: Move MCT node to exynos4x12.dtsi
ARM: dts: Simplify MCT interrupt map for exynos4 SoCs
ARM: dts: Fix missing spaces after labels for exynos
Ulf Hansson (3):
ARM: ux500: Refactor common DT configs for sdi[n] devices
ARM: ux500: Configure regulator for I/O voltage for SD-card slot
ARM: ux500: regulators: Remove dead code for SD-card regulator
WingMan Kwok (2):
ARM: dts: keystone: Add usb phy devicetree bindings
ARM: dts: keystone: Add usb devicetree bindings
Xianglong Du (1):
ARM: dts: sirf: add lost minigpsrtc device node
Yuvaraj Kumar C D (6):
ARM: dts: Move dwmmc nodes from exynos5.dtsi to exynos5250.dtsi
ARM: dts: change status property of dwmmc nodes for exynos5250
ARM: dts: Move fifo-depth property from exynos5250 board dts
ARM: dts: rename mmc dts node for exynos5 series
ARM: dts: Add dwmmc DT nodes for exynos5420 SOC
ARM: dts: Fix status property of mmc nodes for snow board
.../devicetree/bindings/arm/arm-boards | 8 +
.../devicetree/bindings/arm/atmel-aic.txt | 1 +
.../devicetree/bindings/arm/atmel-at91.txt | 3 +-
.../devicetree/bindings/arm/moxart.txt | 12 +
.../devicetree/bindings/arm/samsung/sysreg.txt | 7 +-
.../bindings/clock/renesas,cpg-div6-clocks.txt | 28 +
.../bindings/clock/renesas,cpg-mstp-clocks.txt | 51 +
.../clock/renesas,rcar-gen2-cpg-clocks.txt | 32 +
.../devicetree/bindings/dma/ste-dma40.txt | 3 +
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 2 +
.../bindings/timer/samsung,exynos4210-mct.txt | 54 +-
.../devicetree/bindings/usb/keystone-phy.txt | 20 +
.../devicetree/bindings/usb/keystone-usb.txt | 42 +
arch/arm/boot/dts/Makefile | 10 +
arch/arm/boot/dts/animeo_ip.dts | 31 +-
arch/arm/boot/dts/armada-370-mirabox.dts | 25 +-
arch/arm/boot/dts/armada-370-netgear-rn102.dts | 125 +-
arch/arm/boot/dts/armada-370-netgear-rn104.dts | 131 ++-
arch/arm/boot/dts/armada-370-rd.dts | 21 +
arch/arm/boot/dts/armada-370-xp.dtsi | 167 +--
arch/arm/boot/dts/armada-370.dtsi | 74 +-
arch/arm/boot/dts/armada-xp-gp.dts | 8 +
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts | 327 ++++++
.../arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 3 +-
arch/arm/boot/dts/armada-xp.dtsi | 100 +-
arch/arm/boot/dts/at91-cosino.dtsi | 122 ++
arch/arm/boot/dts/at91-cosino_mega2560.dts | 84 ++
arch/arm/boot/dts/at91rm9200.dtsi | 4 +-
arch/arm/boot/dts/at91rm9200ek.dts | 57 +-
arch/arm/boot/dts/at91sam9263.dtsi | 46 +
arch/arm/boot/dts/at91sam9263ek.dts | 30 +
arch/arm/boot/dts/at91sam9g45.dtsi | 76 ++
arch/arm/boot/dts/at91sam9m10g45ek.dts | 54 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 9 +
arch/arm/boot/dts/at91sam9x5.dtsi | 9 +
arch/arm/boot/dts/atlas6.dtsi | 26 +
arch/arm/boot/dts/bcm2835-rpi-b.dts | 9 +-
arch/arm/boot/dts/bcm2835.dtsi | 6 +
arch/arm/boot/dts/da850-evm.dts | 3 +
arch/arm/boot/dts/da850.dtsi | 14 +
arch/arm/boot/dts/dove-cubox.dts | 2 +-
arch/arm/boot/dts/dove.dtsi | 500 ++++----
arch/arm/boot/dts/emev2-kzm9d.dts | 42 +-
arch/arm/boot/dts/emev2.dtsi | 116 +-
arch/arm/boot/dts/exynos4.dtsi | 6 +-
arch/arm/boot/dts/exynos4210.dtsi | 23 +-
arch/arm/boot/dts/exynos4212.dtsi | 24 +-
arch/arm/boot/dts/exynos4412-tiny4412.dts | 93 ++
arch/arm/boot/dts/exynos4412.dtsi | 28 +-
arch/arm/boot/dts/exynos4x12.dtsi | 20 +
arch/arm/boot/dts/exynos5.dtsi | 25 +-
arch/arm/boot/dts/exynos5250-arndale.dts | 62 +-
...-common.dtsi => exynos5250-cros-common.dtsi} | 34 +-
arch/arm/boot/dts/exynos5250-smdk5250.dts | 62 +-
arch/arm/boot/dts/exynos5250-snow.dts | 13 +-
arch/arm/boot/dts/exynos5250.dtsi | 58 +-
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 66 ++
arch/arm/boot/dts/exynos5420-smdk5420.dts | 33 +
arch/arm/boot/dts/exynos5420.dtsi | 346 +++++-
arch/arm/boot/dts/exynos5440.dtsi | 2 +-
arch/arm/boot/dts/integrator.dtsi | 5 +
arch/arm/boot/dts/k2hk-evm.dts | 63 ++
arch/arm/boot/dts/keystone-clocks.dtsi | 36 +-
.../boot/dts/{keystone.dts => keystone.dtsi} | 35 +-
arch/arm/boot/dts/kirkwood-6192.dtsi | 107 ++
arch/arm/boot/dts/kirkwood-6281.dtsi | 4 +
arch/arm/boot/dts/kirkwood-6282.dtsi | 39 +-
arch/arm/boot/dts/kirkwood-cloudbox.dts | 10 +-
arch/arm/boot/dts/kirkwood-db.dtsi | 4 +-
arch/arm/boot/dts/kirkwood-dns320.dts | 12 +-
arch/arm/boot/dts/kirkwood-dns325.dts | 12 +-
arch/arm/boot/dts/kirkwood-dnskw.dtsi | 18 +-
arch/arm/boot/dts/kirkwood-dockstar.dts | 6 +-
arch/arm/boot/dts/kirkwood-dreamplug.dts | 6 +-
arch/arm/boot/dts/kirkwood-goflexnet.dts | 24 +-
.../boot/dts/kirkwood-guruplug-server-plus.dts | 12 +-
arch/arm/boot/dts/kirkwood-ib62x0.dts | 18 +-
arch/arm/boot/dts/kirkwood-iconnect.dts | 28 +-
arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts | 22 +-
arch/arm/boot/dts/kirkwood-km_kirkwood.dts | 4 +-
arch/arm/boot/dts/kirkwood-laplug.dts | 175 +++
arch/arm/boot/dts/kirkwood-lsxl.dtsi | 30 +-
arch/arm/boot/dts/kirkwood-mplcec4.dts | 14 +-
arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts | 14 +-
.../dts/kirkwood-netgear_readynas_duo_v2.dts | 111 +-
.../dts/kirkwood-netgear_readynas_nv+_v2.dts | 268 +++++
arch/arm/boot/dts/kirkwood-ns2-common.dtsi | 8 +-
arch/arm/boot/dts/kirkwood-ns2lite.dts | 4 +-
arch/arm/boot/dts/kirkwood-ns2max.dts | 10 +-
arch/arm/boot/dts/kirkwood-ns2mini.dts | 10 +-
arch/arm/boot/dts/kirkwood-nsa310-common.dtsi | 4 +-
arch/arm/boot/dts/kirkwood-nsa310.dts | 32 +-
arch/arm/boot/dts/kirkwood-nsa310a.dts | 30 +-
arch/arm/boot/dts/kirkwood-openblocks_a6.dts | 10 +-
arch/arm/boot/dts/kirkwood-openblocks_a7.dts | 10 +-
.../boot/dts/kirkwood-sheevaplug-common.dtsi | 2 +-
arch/arm/boot/dts/kirkwood-sheevaplug-esata.dts | 8 +-
arch/arm/boot/dts/kirkwood-sheevaplug.dts | 8 +-
arch/arm/boot/dts/kirkwood-topkick.dts | 10 +-
arch/arm/boot/dts/kirkwood-ts219-6281.dts | 8 +-
arch/arm/boot/dts/kirkwood-ts219-6282.dts | 8 +-
arch/arm/boot/dts/kirkwood.dtsi | 160 +--
arch/arm/boot/dts/moxart-uc7112lx.dts | 109 ++
arch/arm/boot/dts/moxart.dtsi | 154 +++
.../dts/orion5x-lacie-ethernet-disk-mini-v2.dts | 2 +-
arch/arm/boot/dts/orion5x.dtsi | 106 +-
arch/arm/boot/dts/prima2.dtsi | 41 +
arch/arm/boot/dts/pxa27x.dtsi | 24 +
arch/arm/boot/dts/qcom-msm8974.dtsi | 64 ++
arch/arm/boot/dts/r7s72100-genmai.dts | 2 +-
arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 15 +-
arch/arm/boot/dts/r8a73a4-ape6evm.dts | 10 +-
arch/arm/boot/dts/r8a73a4.dtsi | 184 ++-
.../dts/r8a7740-armadillo800eva-reference.dts | 90 +-
arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 2 +-
arch/arm/boot/dts/r8a7740.dtsi | 144 ++-
arch/arm/boot/dts/r8a7778-bockw-reference.dts | 57 +-
arch/arm/boot/dts/r8a7778-bockw.dts | 2 +-
arch/arm/boot/dts/r8a7778.dtsi | 172 ++-
arch/arm/boot/dts/r8a7779-marzen-reference.dts | 36 +-
arch/arm/boot/dts/r8a7779-marzen.dts | 2 +-
arch/arm/boot/dts/r8a7779.dtsi | 114 +-
arch/arm/boot/dts/r8a7790-lager-reference.dts | 45 -
arch/arm/boot/dts/r8a7790-lager.dts | 64 +-
arch/arm/boot/dts/r8a7790.dtsi | 413 ++++++-
arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 115 ++
arch/arm/boot/dts/r8a7791-koelsch.dts | 35 +-
arch/arm/boot/dts/r8a7791.dtsi | 467 +++++++-
arch/arm/boot/dts/sama5d3.dtsi | 44 +-
arch/arm/boot/dts/sama5d36.dtsi | 20 +
arch/arm/boot/dts/sama5d36ek.dts | 53 +
arch/arm/boot/dts/sama5d3_uart.dtsi | 5 +
arch/arm/boot/dts/sama5d3xdm.dtsi | 1 +
arch/arm/boot/dts/sh7372-mackerel.dts | 2 +-
arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 103 +-
arch/arm/boot/dts/sh73a0-kzm9g.dts | 2 +-
arch/arm/boot/dts/sh73a0.dtsi | 168 +--
arch/arm/boot/dts/socfpga.dtsi | 4 +
arch/arm/boot/dts/st-pincfg.h | 2 +-
arch/arm/boot/dts/ste-dbx5x0.dtsi | 32 +
arch/arm/boot/dts/ste-href-family-pinctrl.dtsi | 745 ++++++++++++
arch/arm/boot/dts/ste-href-stuib.dtsi | 41 +
arch/arm/boot/dts/ste-href-tvk1281618.dtsi | 90 +-
arch/arm/boot/dts/ste-href.dtsi | 80 +-
arch/arm/boot/dts/ste-hrefprev60.dtsi | 78 +-
arch/arm/boot/dts/ste-hrefv60plus.dtsi | 251 ++++-
arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi | 80 ++
arch/arm/boot/dts/ste-nomadik-s8815.dts | 4 -
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 4 +-
arch/arm/boot/dts/ste-snowball.dts | 231 +++-
arch/arm/boot/dts/stih415-pinctrl.dtsi | 36 +
arch/arm/boot/dts/stih415.dtsi | 53 +
arch/arm/boot/dts/stih416-pinctrl.dtsi | 35 +
arch/arm/boot/dts/stih416.dtsi | 53 +
arch/arm/boot/dts/stih41x-b2000.dtsi | 9 +
arch/arm/boot/dts/stih41x-b2020.dtsi | 22 +
arch/arm/boot/dts/sun4i-a10-a1000.dts | 4 -
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 9 -
arch/arm/boot/dts/sun4i-a10-hackberry.dts | 4 -
arch/arm/boot/dts/sun4i-a10-mini-xplus.dts | 4 -
arch/arm/boot/dts/sun4i-a10.dtsi | 164 ++-
arch/arm/boot/dts/sun5i-a10s.dtsi | 132 ++-
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 68 ++
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 4 -
arch/arm/boot/dts/sun5i-a13.dtsi | 128 ++-
arch/arm/boot/dts/sun6i-a31.dtsi | 34 +
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 18 +
arch/arm/boot/dts/sun7i-a20.dtsi | 222 +++-
arch/arm/boot/dts/tegra114-dalmore.dts | 630 ++++++-----
arch/arm/boot/dts/tegra114.dtsi | 138 ++-
arch/arm/boot/dts/tegra124-venice2.dts | 1064 ++++++++++++++++++
arch/arm/boot/dts/tegra124.dtsi | 418 +++++++
arch/arm/boot/dts/tegra20-colibri-512.dtsi | 205 ++--
arch/arm/boot/dts/tegra20-harmony.dts | 316 +++---
arch/arm/boot/dts/tegra20-iris-512.dts | 30 +-
arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +-
arch/arm/boot/dts/tegra20-paz00.dts | 50 +-
arch/arm/boot/dts/tegra20-plutux.dts | 4 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 353 +++---
arch/arm/boot/dts/tegra20-tamonten.dtsi | 47 +-
arch/arm/boot/dts/tegra20-tec.dts | 6 +-
arch/arm/boot/dts/tegra20-trimslice.dts | 54 +-
arch/arm/boot/dts/tegra20-ventana.dts | 62 +-
arch/arm/boot/dts/tegra20-whistler.dts | 84 +-
arch/arm/boot/dts/tegra20.dtsi | 55 +-
arch/arm/boot/dts/tegra30-beaver.dts | 126 ++-
arch/arm/boot/dts/tegra30-cardhu-a02.dts | 14 +-
arch/arm/boot/dts/tegra30-cardhu-a04.dts | 14 +-
arch/arm/boot/dts/tegra30-cardhu.dtsi | 104 +-
arch/arm/boot/dts/tegra30.dtsi | 72 +-
arch/arm/boot/dts/zynq-7000.dtsi | 39 +-
arch/arm/boot/dts/zynq-zc702.dts | 5 +
arch/arm/boot/dts/zynq-zc706.dts | 5 +
arch/arm/boot/dts/zynq-zed.dts | 5 +
arch/arm/mach-integrator/integrator_ap.c | 60 +-
arch/arm/mach-integrator/integrator_cp.c | 14 -
arch/arm/mach-nomadik/cpu-8815.c | 32 -
arch/arm/mach-shmobile/board-bockw-reference.c | 12 -
arch/arm/mach-shmobile/board-marzen.c | 2 -
arch/arm/mach-shmobile/clock-r8a73a4.c | 10 +-
arch/arm/mach-shmobile/clock-r8a7740.c | 8 +-
arch/arm/mach-shmobile/clock-r8a7778.c | 8 +-
arch/arm/mach-shmobile/clock-r8a7779.c | 8 +-
arch/arm/mach-shmobile/clock-r8a7790.c | 12 +-
arch/arm/mach-shmobile/clock-sh73a0.c | 8 +-
arch/arm/mach-ux500/Makefile | 6 +-
arch/arm/mach-ux500/board-mop500-audio.c | 3 -
arch/arm/mach-ux500/board-mop500-pins.c | 804 -------------
arch/arm/mach-ux500/board-mop500-regulators.c | 14 -
arch/arm/mach-ux500/board-mop500-regulators.h | 1 -
arch/arm/mach-ux500/board-mop500-sdi.c | 2 -
arch/arm/mach-ux500/board-mop500.c | 78 --
arch/arm/mach-ux500/board-mop500.h | 1 -
arch/arm/mach-ux500/cpu-db8500.c | 26 +-
arch/arm/mach-ux500/cpu.c | 23 +-
arch/arm/mach-ux500/devices-db8500.c | 28 -
arch/arm/mach-ux500/devices-db8500.h | 19 -
arch/arm/mach-ux500/devices.c | 26 -
arch/arm/mach-ux500/devices.h | 15 -
arch/arm/mach-ux500/setup.h | 6 -
arch/arm/mach-ux500/timer.c | 76 +-
drivers/clk/Makefile | 1 +
drivers/clk/shmobile/Makefile | 7 +
drivers/clk/shmobile/clk-div6.c | 185 +++
drivers/clk/shmobile/clk-mstp.c | 229 ++++
drivers/clk/shmobile/clk-rcar-gen2.c | 298 +++++
drivers/clocksource/exynos_mct.c | 4 +
drivers/clocksource/nomadik-mtu.c | 23 +-
drivers/dma/ste_dma40.c | 4 +
drivers/pinctrl/pinctrl-nomadik.c | 296 ++++-
drivers/pinctrl/pinctrl-nomadik.h | 14 +-
include/dt-bindings/clock/r8a7790-clock.h | 7 +
include/dt-bindings/clock/r8a7791-clock.h | 6 +
include/dt-bindings/gpio/tegra-gpio.h | 1 +
include/dt-bindings/pinctrl/pinctrl-tegra.h | 45 +
include/linux/clk/shmobile.h | 19 +
.../platform_data/clocksource-nomadik-mtu.h | 9 -
include/linux/platform_data/pinctrl-nomadik.h | 242 ----
238 files changed, 12679 insertions(+), 4211 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/moxart.txt
create mode 100644 Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
create mode 100644 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
create mode 100644 Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
create mode 100644 Documentation/devicetree/bindings/usb/keystone-phy.txt
create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt
create mode 100644 arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
create mode 100644 arch/arm/boot/dts/at91-cosino.dtsi
create mode 100644 arch/arm/boot/dts/at91-cosino_mega2560.dts
create mode 100644 arch/arm/boot/dts/exynos4412-tiny4412.dts
rename arch/arm/boot/dts/{cros5250-common.dtsi => exynos5250-cros-common.dtsi} (95%)
create mode 100644 arch/arm/boot/dts/exynos5420-arndale-octa.dts
create mode 100644 arch/arm/boot/dts/k2hk-evm.dts
rename arch/arm/boot/dts/{keystone.dts => keystone.dtsi} (82%)
create mode 100644 arch/arm/boot/dts/kirkwood-6192.dtsi
create mode 100644 arch/arm/boot/dts/kirkwood-laplug.dts
create mode 100644 arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dts
create mode 100644 arch/arm/boot/dts/moxart-uc7112lx.dts
create mode 100644 arch/arm/boot/dts/moxart.dtsi
delete mode 100644 arch/arm/boot/dts/r8a7790-lager-reference.dts
create mode 100644 arch/arm/boot/dts/r8a7791-koelsch-reference.dts
create mode 100644 arch/arm/boot/dts/sama5d36.dtsi
create mode 100644 arch/arm/boot/dts/sama5d36ek.dts
create mode 100644 arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
delete mode 100644 arch/arm/mach-ux500/board-mop500.c
delete mode 100644 arch/arm/mach-ux500/devices-db8500.c
delete mode 100644 arch/arm/mach-ux500/devices-db8500.h
delete mode 100644 arch/arm/mach-ux500/devices.c
delete mode 100644 arch/arm/mach-ux500/devices.h
create mode 100644 drivers/clk/shmobile/Makefile
create mode 100644 drivers/clk/shmobile/clk-div6.c
create mode 100644 drivers/clk/shmobile/clk-mstp.c
create mode 100644 drivers/clk/shmobile/clk-rcar-gen2.c
create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra.h
create mode 100644 include/linux/clk/shmobile.h
delete mode 100644 include/linux/platform_data/clocksource-nomadik-mtu.h
delete mode 100644 include/linux/platform_data/pinctrl-nomadik.h
^ permalink raw reply
* [GIT PULL 3/6] ARM: SoC platform changes for 3.14
From: Olof Johansson @ 2014-01-23 18:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390502188-16896-1-git-send-email-olof@lixom.net>
New core SoC-specific changes.
New platforms:
* Introduction of a vendor, Hisilicon, and one of their SoCs with some
random numerical product name.
* Introduction of EFM32, embedded platform from Silicon Labs (ARMv7m, i.e. !MMU).
* Marvell Berlin series of SoCs, which include the one in Chromecast.
* MOXA platform support, ARM9-based platform used mostly in industrial products
* Support for Freescale's i.MX50 SoC.
Other work:
* Renesas work for new platforms and drivers, and conversion over to
more multiplatform-friendly device registration schemes.
* SMP support for Allwinner sunxi platforms.
* ... plus a bunch of other stuff across various platforms.
Conflicts:
arch/arm/mach-u300/timer.c:
Keep ticks_per_jiffy calculation and the sched_clock_register() call,
ditch setup_sched_clock().
----------------------------------------------------------------
The following changes since commit fa4409f1f575945e7dee3a52fb4842b215c7581d:
Merge branch 'next/cleanup' into HEAD
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/soc-for-linus
for you to fetch changes up to 6373bb71875b3f9f73f375952f92e68140b75657:
Merge tag 'davinci-for-v3.14/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
----------------------------------------------------------------
Alexander Shiyan (2):
ARM: i.MX5x: Add SAHARA clock for i.MX5x CPUs
ARM: imx: pllv1: Fix PLL calculation for i.MX27
Alexandre Courbot (1):
ARM: tegra: switch FUSE clock on before usage
Anson Huang (4):
ARM: imx: clk: correct arm clock usecount
ARM: imx: add necessary interface for pfd
ARM: imx: improve status check of clock gate
ARM: imx: improve the comment of CCM lpm SW workaround
Baruch Siach (1):
dt-bindings: fix example of allwinner interrupt controller
Ben Dooks (2):
ARM: rcar-gen2: Do not setup timer in non-secure mode
ARM: shmobile: Add select MIGHT_HAVE_PCI for PCI-AHB bridge code
Christian Daudt (1):
rename ARCH_BCM to ARCH_BCM_MOBILE (clocksource)
Denis Carikli (3):
ARM: imx_v4_v5_defconfig: Enable gpio regulator and gpio button/keyboard.
ARM: imx_v6_v7_defconfig: Enable tsc2007 support.
ARM i.MX25: build in pinctrl support.
Fabio Estevam (3):
ARM: imx_v6_v7_defconfig: Select CONFIG_HIGHMEM
ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support
ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100
Greg Ungerer (4):
ARM: imx: add debug uart support for IMX50 SoC
ARM: imx: add clocking support code for the IMX50 SoC
ARM: imx: allow configuration of the IMX50 SoC
ARM: imx: add support code for IMX50 based machines
H Hartley Sweeten (1):
ARM: ep93xx: use soc bus
Haojian Zhuang (8):
ARM: hi3xxx: add board support with device tree
ARM: dts: enable hi4511 with device tree
ARM: config: enable hi3xxx in multi_v7_defconfig
ARM: config: add defconfig for Hi3xxx
ARM: dts: enable clock binding on Hi3620
ARM: hisi: rename hi3xxx to hisi
ARM: hisi: remove init_time
ARM: dts: rename hi4511 dts file
Hiep Cao Minh (1):
ARM: shmobile: r8a7790: add QSPI support
Jingchang Lu (1):
ARM: imx: Add DMAMUX clock for Vybrid vf610 SoC
John Tobias (1):
ARM: imx: Add cpu frequency scaling support
Jonas Jensen (1):
ARM: moxart: add MOXA ART SoC platform files
Josh Wu (1):
ARM: at91: sama5d3: add support for sama5d36 chip
Kevin Hilman (12):
Merge branch 'soc/sched_clock' into next/soc
ARM: hi3xxx: add smp support
Merge branch 'berlin/soc' into next/soc
Merge branch 'efm32/soc' into next/soc
Merge branch 'keystone/soc' into next/soc
Merge tag 'renesas-soc-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/soc
Merge branch 'hisi/soc' into next/soc
Merge branch 'qcom/soc2' into next/soc
Merge tag 'renesas-soc-fixes-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/soc
Merge tag 'sunxi-core-for-3.14-2' of https://github.com/mripard/linux into next/soc
Merge tag 'versatile-for-v3.14' of git://git.kernel.org/.../linusw/linux-integrator into next/soc
Merge tag 'davinci-for-v3.14/soc' of git://git.kernel.org/.../nsekhar/linux-davinci into next/soc
Kuninori Morimoto (19):
ARM: shmobile: r8a7778: add I2C clock for DT
ARM: shmobile: r8a7779: add I2C clock for DT
ARM: shmobile: r8a73a4: don't use named irq for DMAEngine
ARM: shmobile: r8a7778: add MMCIF clock support for DT
ARM: shmobile: r8a7778: add SDHI clock support for DT
ARM: shmobile: r8a7779: add SDHI clock support for DT
ARM: shmobile: r8a7778: add HSPI clock support for DT
ARM: shmobile: r8a7790: care EXTAL divider settings
ARM: shmobile: r8a7790: fixup I2C clock source
ARM: shmobile: r8a7790: tidyup clock table order
ARM: shmobile: r8a7778: add HPBIFx DMAEngine support
ARM: shmobile: r8a7790: add SSI MSTP clocks
ARM: shmobile: r8a7740: add FSI clock support for DT
ARM: shmobile: r8a7778: add SSIx DMAEngine support
ARM: shmobile: r8a7790: add I2C support
ARM: shmobile: sh73a0: add FSI clock support for DT
ARM: shmobile: r8a7778: camera-rcar header cleanup
ARM: shmobile: r8a7778: add USB Func DMAEngine support
ARM: shmobile: r8a7778: add sound SCU clock support
Laurent Pinchart (32):
ARM: shmobile: r8a7791: Add DU and LVDS clocks
ARM: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
ARM: shmobile: r8a7790: Add clock index macros for DT sources
ARM: shmobile: r8a7791: Add clock index macros for DT sources
ARM: shmobile: rcar-gen2: Initialize CCF before clock sources
ARM: shmobile: sh7372: Use macros to declare SCIF devices
ARM: shmobile: sh73a0: Use macros to declare SCIF devices
ARM: shmobile: r8a7740: Use macros to declare SCIF devices
ARM: shmobile: r8a7779: Use macros to declare SCIF devices
ARM: shmobile: r8a73a4: Don't define SCIF platform data in an array
ARM: shmobile: r7s72100: Don't define SCIF platform data in an array
ARM: shmobile: r8a7778: Don't define SCIF platform data in an array
ARM: shmobile: r8a7791: Don't define SCIF platform data in an array
ARM: shmobile: r8a7790: Don't define SCIF platform data in an array
ARM: shmobile: sh7372: Declare SCIF register base and IRQ as resources
ARM: shmobile: sh73a0: Declare SCIF register base and IRQ as resources
ARM: shmobile: r7s72100: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a73a4: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7740: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7779: Declare SCIF register base and IRQ as resources
ARM: shmobile: sh7372: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7778: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7791: Declare SCIF register base and IRQ as resources
ARM: shmobile: r8a7790: Declare SCIF register base and IRQ as resources
ARM: shmobile: sh73a0: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r7s72100: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7778: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a73a4: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7740: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7790: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7779: Don't set plat_sci_port scbrr_algo_id field
ARM: shmobile: r8a7791: Don't set plat_sci_port scbrr_algo_id field
Laxman Dewangan (1):
ARM: tegra: select PINCTRL_TEGRA124 for Tegra124 SoC
Linus Walleij (5):
ARM: versatile: move GPIO2 and GPIO3 to core
ARM: versatile: update defconfig
ARM: versatile: enable GPIOLIB and PL061 by default
ARM: versatile: build using EABI
ARM: versatile: enable LEDs by default
Lothar Wa?mann (1):
ARM i.MX5: fix obvious typo in ldb_di0_gate clk definition
Lucas Stach (1):
ARM: imx5: introduce DT includes for clock provider
Magnus Damm (14):
ARM: shmobile: Select IRQC in case of the r8a7791 SoC
ARM: shmobile: r8a7791 PFC platform device support
ARM: shmobile: Select GPIO in case of the r8a7791 SoC
ARM: shmobile: r8a7791 GPIO platform device support
ARM: shmobile: Select GPIO in case of the r7s72100 SoC
ARM: shmobile: Enable MTU2 on r7s72100
ARM: shmobile: Add shared EMEV2 code for ->init_machine()
ARM: shmobile: Use ->init_late() in shared EMEV2 case
ARM: shmobile: Remove legacy KZM9D board code
ARM: shmobile: Remove legacy platform devices from EMEV2 SoC code
ARM: shmobile: Select USE_OF on EMEV2
ARM: shmobile: Add r8a7790 clocks for thermal devices
ARM: shmobile: Add r8a7791 thermal platform device
ARM: shmobile: Add r8a7791 clocks for thermal devices
Marc Kleine-Budde (2):
ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53
ARM i.MX5: set CAN peripheral clock to 24 MHz parent
Marek Vasut (2):
ARM: imx_v6_v7_defconfig: Enable STMPE touchscreen
ARM: imx: imx53: Add SATA PHY clock
Markus Pargmann (1):
ARM: imx27: enable pinctrl
Mateusz Krawczuk (1):
ARM: SAMSUNG: if detected device tree skip irq init for S5P
Maxime Ripard (7):
reset: Add Allwinner SoCs Reset Controller Driver
Merge branch 'sunxi/drivers-for-3.14' into sunxi/core-for-3.14
ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER
ARM: sunxi: Register the A31 reset IP in init_time
ARM: sun6i: Add SMP support for the Allwinner A31
ARM: sunxi: Select RESET_CONTROLLER
MAINTAINERS: Update Allwinner sunXi maintainer files
Michael Opdenacker (1):
ARM: ep93xx: remove deprecated IRQF_DISABLED
Nicolin Chen (3):
ARM: imx6: Derive spdif clock from pll3_pfd3_454m
ARM: imx6sl: Add missing pll4_audio_div to the clock tree
ARM: imx6sl: Add missing spba clock to clock tree
Olof Johansson (12):
Merge tag 'samsung-dev' of git://git.kernel.org/.../kgene/linux-samsung into next/soc
Merge branch 'tegra/dma-reset-rework' into next/soc
Merge tag 'tegra-for-3.14-powergate' of git://git.kernel.org/.../tegra/linux into next/soc
Merge tag 'tegra-for-3.14-soc' of git://git.kernel.org/.../tegra/linux into next/soc
Merge tag 'renesas-soc2-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/soc
Merge branch 'qcom/soc' into next/soc
Merge tag 'renesas-soc3-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/soc
Merge tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
ARM: ux500: turn on PRINTK_TIME in u8500_defconfig
Merge tag 'bcm-for-3.14-soc' of git://github.com/broadcom/bcm11351 into next/soc
Merge tag 'ux500-core-v3.14' of git://git.kernel.org/.../linusw/linux-stericsson into next/soc
Merge branch 'qcom/soc2' into next/soc
Paul Walmsley (1):
ARM: davinci: clock: return 0 upon error from clk_round_rate()
Rohit Vaswani (1):
ARM: msm: Add support for MSM8974 SoC
Russell King (1):
ARM: imx: update imx_v6_v7_defconfig
Santosh Shilimkar (3):
ARM: keystone: enable DMA zone for LPAE
ARM: keystone: Make PM bus ready before populating platform devices
ARM: keystone: Avoid calling of_clk_init() twice
Sebastian Hesselbarth (8):
irqchip: add DesignWare APB ICTL interrupt controller
MAINTAINERS: add ARM Marvell Berlin SoC
ARM: add Marvell Berlin SoC familiy to Marvell doc
ARM: add Marvell Berlin SoCs to multi_v7_defconfig
ARM: add Marvell Berlin UART0 lowlevel debug
ARM: add Armada 1500 and Sony NSZ-GS7 device tree files
ARM: add Armada 1500-mini and Chromecast device tree files
ARM: add initial support for Marvell Berlin SoCs
Sergei Shtylyov (1):
ARM: shmobile: r8a7791: add Ether clock
Shawn Guo (4):
ARM: imx: remove mxc_iomux_v3_init() call from imx53_init_early()
ARM: imx: select PINCTRL at sub-architecure level
ARM: imx: rename IMX6SL_CLK_CLK_END to IMX6SL_CLK_END
ARM: imx: use __initconst for const init definition
Simon Horman (4):
ARM: shmobile: Select AUTO_ZRELADDR for EMEV2
ARM: shmobile: r8a7779: add HSPI clock support for DT
ARM: shmobile: koelsch: Conditionally select MICREL_PHY
Merge branch 'sh-sci' into soc3-base
Steffen Trumtrar (1):
ARM i.MX35: Add devicetree support.
Stephen Boyd (22):
ARM: timer-sp: Switch to sched_clock_register()
ARM: clps711x: Switch to sched_clock_register()
ARM: davinci: Switch to sched_clock_register()
ARM: imx: Switch to sched_clock_register()
ARM: integrator: Switch to sched_clock_register()
ARM: IXP4xx: Switch to sched_clock_register()
ARM: mmp: Switch to sched_clock_register()
ARM: msm: Switch to sched_clock_register()
ARM: OMAP1: Switch to sched_clock_register()
ARM: OMAP2+: Switch to sched_clock_register()
ARM: pxa: Switch to sched_clock_register()
ARM: sa1100: Switch to sched_clock_register()
ARM: u300: Switch to sched_clock_register()
ARM: iop: Switch to sched_clock_register()
ARM: OMAP: Switch to sched_clock_register()
ARM: orion: Switch to sched_clock_register()
ARM: versatile: Switch to sched_clock_register()
ARM: msm: Simplify ARCH_MSM_DT config
ARM: msm: Only build clock.c on proc_comm based platforms
ARM: msm: Only build timer.c if required
ARM: msm: Move MSM's DT based hardware to multi-platform support
ARM: msm_defconfig: Update for multi-platform
Stephen Warren (4):
ARM: tegra: fix DEBUG_LL combined with LPAE
ARM: tegra: don't hard-code DEBUG_LL baud rate
ARM: tegra: use section-sized static mappings for LPAE too
ARM: tegra: fix tegra_powergate_sequence_power_up() inline
Taras Kondratiuk (1):
ARM: keystone: enable big endian support
Thierry Reding (7):
ARM: tegra: Fix some whitespace oddities
ARM: tegra: Rename cpu0 powergate to crail
ARM: tegra: Export tegra_powergate_power_off()
ARM: tegra: Export tegra_powergate_remove_clamping()
ARM: tegra: Add Tegra124 powergate support
ARM: tegra: Special-case the 3D clamps on Tegra124
ARM: tegra: Add IO rail support
Tim Harvey (1):
ARM: imx: add PCI fixup for PEX860X on Gateworks board
Tim Kryger (3):
ARM: bcm_defconfig: CONFIG_OABI_COMPAT default off
ARM: bcm_defconfig: Do not expect appended DTB
ARM: bcm_defconfig: Unset CONFIG_CRYPTO_ANSI_CPRNG
Tomasz Figa (1):
ARM: S3C64XX: Select CPU_V6K instead of CPU_V6
Ulf Hansson (1):
ARM: ux500: Enable system suspend with WFI support
Uwe Kleine-K?nig (4):
ARM: imx: drop support for irq priorisation
ARM: new platform for Energy Micro's EFM32 Cortex-M3 SoCs
ARM: device trees for Energy Micro's EFM32 Cortex-M3 SoCs
MAINTAINERS: take maintainership for Energy Micro efm32 SoCs
Valentine Barshak (2):
ARM: shmobile: r8a7790: Add USBHS clock support
ARM: shmobile: r8a7790: Fix I2C controller names
Wei Yongjun (1):
ARM i.MX53: remove duplicated include from clk-imx51-imx53.c
WingMan Kwok (1):
ARM: keystone: defconfig: enable USB support
Wolfram Sang (2):
arm: shmobile: clks: remove duplicated clock from r7s72100
arm: shmobile: r7s72100: add i2c clocks
Zalan Blenessy (1):
ARM: sunxi: select ARM_PSCI
Zhangfei Gao (1):
ARM: hi3xxx: add hotplug support
Documentation/arm/Marvell/README | 24 +
.../bindings/arm/hisilicon/hisilicon.txt | 32 +
.../devicetree/bindings/arm/marvell,berlin.txt | 24 +
.../devicetree/bindings/clock/imx35-clock.txt | 113 +++
.../devicetree/bindings/clock/imx5-clock.txt | 195 +----
.../interrupt-controller/allwinner,sun4i-ic.txt | 2 +-
.../interrupt-controller/snps,dw-apb-ictl.txt | 32 +
MAINTAINERS | 19 +-
arch/arm/Kconfig | 48 +-
arch/arm/Kconfig.debug | 19 +
arch/arm/Makefile | 5 +-
arch/arm/boot/compressed/Makefile | 2 +-
arch/arm/boot/dts/Makefile | 7 +-
arch/arm/boot/dts/armv7-m.dtsi | 18 +
arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts | 29 +
arch/arm/boot/dts/berlin2.dtsi | 227 ++++++
.../boot/dts/berlin2cd-google-chromecast.dts | 29 +
arch/arm/boot/dts/berlin2cd.dtsi | 210 +++++
arch/arm/boot/dts/efm32gg-dk3750.dts | 86 ++
arch/arm/boot/dts/efm32gg.dtsi | 172 ++++
arch/arm/boot/dts/hi3620-hi4511.dts | 649 +++++++++++++++
arch/arm/boot/dts/hi3620.dtsi | 565 +++++++++++++
arch/arm/boot/dts/qcom-msm8974.dtsi | 33 +
arch/arm/common/timer-sp.c | 4 +-
arch/arm/configs/ape6evm_defconfig | 2 +-
arch/arm/configs/armadillo800eva_defconfig | 2 +-
arch/arm/configs/bcm_defconfig | 3 +-
arch/arm/configs/bockw_defconfig | 2 +-
arch/arm/configs/efm32_defconfig | 102 +++
arch/arm/configs/hi3xxx_defconfig | 56 ++
arch/arm/configs/imx_v4_v5_defconfig | 2 +
arch/arm/configs/imx_v6_v7_defconfig | 13 +-
arch/arm/configs/keystone_defconfig | 20 +-
arch/arm/configs/koelsch_defconfig | 2 +-
arch/arm/configs/kzm9d_defconfig | 2 +-
arch/arm/configs/kzm9g_defconfig | 2 +-
arch/arm/configs/lager_defconfig | 2 +-
arch/arm/configs/mackerel_defconfig | 2 +-
arch/arm/configs/marzen_defconfig | 2 +-
arch/arm/configs/moxart_defconfig | 149 ++++
arch/arm/configs/msm_defconfig | 11 +-
arch/arm/configs/multi_v7_defconfig | 4 +
arch/arm/configs/u8500_defconfig | 1 +
arch/arm/configs/versatile_defconfig | 26 +-
arch/arm/include/debug/imx-uart.h | 10 +
arch/arm/include/debug/tegra.S | 34 +-
arch/arm/mach-at91/Kconfig | 2 +-
arch/arm/mach-at91/include/mach/cpu.h | 3 +-
arch/arm/mach-at91/setup.c | 4 +
arch/arm/mach-berlin/Kconfig | 29 +
arch/arm/mach-berlin/Makefile | 1 +
arch/arm/mach-berlin/berlin.c | 39 +
arch/arm/mach-clps711x/common.c | 4 +-
arch/arm/mach-davinci/clock.c | 2 +-
arch/arm/mach-davinci/time.c | 4 +-
arch/arm/mach-efm32/Makefile | 1 +
arch/arm/mach-efm32/Makefile.boot | 3 +
arch/arm/mach-efm32/dtmachine.c | 15 +
arch/arm/mach-efm32/include/mach/entry-macro.S | 4 +
arch/arm/mach-efm32/include/mach/timex.h | 3 +
arch/arm/mach-ep93xx/Kconfig | 1 +
arch/arm/mach-ep93xx/core.c | 110 ++-
arch/arm/mach-ep93xx/include/mach/platform.h | 3 +-
arch/arm/mach-hisi/Kconfig | 17 +
arch/arm/mach-hisi/Makefile | 7 +
arch/arm/mach-hisi/core.h | 15 +
arch/arm/mach-hisi/hisilicon.c | 90 +++
arch/arm/mach-hisi/hotplug.c | 200 +++++
arch/arm/mach-hisi/platsmp.c | 89 ++
arch/arm/mach-imx/Kconfig | 35 +-
arch/arm/mach-imx/Makefile | 2 +
arch/arm/mach-imx/avic.c | 25 -
arch/arm/mach-imx/clk-gate2.c | 2 +-
arch/arm/mach-imx/clk-imx35.c | 14 +
arch/arm/mach-imx/clk-imx51-imx53.c | 804 ++++++++++---------
arch/arm/mach-imx/clk-imx6q.c | 5 +-
arch/arm/mach-imx/clk-imx6sl.c | 11 +-
arch/arm/mach-imx/clk-pfd.c | 11 +
arch/arm/mach-imx/clk-pllv1.c | 23 +-
arch/arm/mach-imx/clk-vf610.c | 5 +
arch/arm/mach-imx/common.h | 1 +
arch/arm/mach-imx/imx31-dt.c | 2 +-
arch/arm/mach-imx/imx35-dt.c | 50 ++
arch/arm/mach-imx/imx51-dt.c | 2 +-
arch/arm/mach-imx/irq-common.h | 1 -
arch/arm/mach-imx/mach-imx50.c | 38 +
arch/arm/mach-imx/mach-imx53.c | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 32 +-
arch/arm/mach-imx/mach-imx6sl.c | 10 +-
arch/arm/mach-imx/mach-vf610.c | 2 +-
arch/arm/mach-imx/mm-imx5.c | 8 -
arch/arm/mach-imx/pm-imx6q.c | 16 +-
arch/arm/mach-imx/time.c | 4 +-
arch/arm/mach-integrator/integrator_ap.c | 4 +-
arch/arm/mach-ixp4xx/common.c | 4 +-
arch/arm/mach-keystone/Kconfig | 2 +
arch/arm/mach-keystone/keystone.c | 4 +
arch/arm/mach-keystone/keystone.h | 1 +
arch/arm/mach-keystone/pm_domain.c | 2 -
arch/arm/mach-mmp/time.c | 4 +-
arch/arm/mach-moxart/Kconfig | 31 +
arch/arm/mach-moxart/Makefile | 3 +
arch/arm/mach-moxart/moxart.c | 15 +
arch/arm/mach-msm/Kconfig | 74 +-
arch/arm/mach-msm/Makefile | 4 +-
arch/arm/mach-msm/timer.c | 4 +-
arch/arm/mach-omap1/time.c | 4 +-
arch/arm/mach-omap2/timer.c | 4 +-
arch/arm/mach-pxa/time.c | 4 +-
arch/arm/mach-sa1100/time.c | 4 +-
arch/arm/mach-shmobile/Kconfig | 24 +-
arch/arm/mach-shmobile/Makefile | 1 -
arch/arm/mach-shmobile/Makefile.boot | 1 -
arch/arm/mach-shmobile/board-bockw.c | 1 +
arch/arm/mach-shmobile/board-kzm9d.c | 92 ---
arch/arm/mach-shmobile/clock-r7s72100.c | 8 +-
arch/arm/mach-shmobile/clock-r8a7740.c | 1 +
arch/arm/mach-shmobile/clock-r8a7778.c | 31 +
arch/arm/mach-shmobile/clock-r8a7779.c | 11 +
arch/arm/mach-shmobile/clock-r8a7790.c | 62 +-
arch/arm/mach-shmobile/clock-r8a7791.c | 17 +-
arch/arm/mach-shmobile/clock-sh73a0.c | 1 +
arch/arm/mach-shmobile/include/mach/emev2.h | 5 -
arch/arm/mach-shmobile/include/mach/r8a7778.h | 39 +-
arch/arm/mach-shmobile/include/mach/r8a7791.h | 1 +
arch/arm/mach-shmobile/setup-emev2.c | 163 +---
arch/arm/mach-shmobile/setup-r7s72100.c | 82 +-
arch/arm/mach-shmobile/setup-r8a73a4.c | 68 +-
arch/arm/mach-shmobile/setup-r8a7740.c | 195 +----
arch/arm/mach-shmobile/setup-r8a7778.c | 166 +++-
arch/arm/mach-shmobile/setup-r8a7779.c | 128 +--
arch/arm/mach-shmobile/setup-r8a7790.c | 141 ++--
arch/arm/mach-shmobile/setup-r8a7791.c | 188 +++--
arch/arm/mach-shmobile/setup-rcar-gen2.c | 29 +-
arch/arm/mach-shmobile/setup-sh7372.c | 160 +---
arch/arm/mach-shmobile/setup-sh73a0.c | 191 +----
arch/arm/mach-sunxi/Kconfig | 3 +
arch/arm/mach-sunxi/Makefile | 1 +
arch/arm/mach-sunxi/common.h | 19 +
arch/arm/mach-sunxi/headsmp.S | 9 +
arch/arm/mach-sunxi/platsmp.c | 124 +++
arch/arm/mach-sunxi/sunxi.c | 14 +
arch/arm/mach-tegra/Kconfig | 1 +
arch/arm/mach-tegra/fuse.c | 41 +-
arch/arm/mach-tegra/iomap.h | 14 +-
arch/arm/mach-tegra/powergate.c | 195 ++++-
arch/arm/mach-tegra/tegra.c | 4 +-
arch/arm/mach-u300/timer.c | 4 +-
arch/arm/mach-ux500/pm.c | 27 +
arch/arm/mach-versatile/core.c | 16 +
arch/arm/mach-versatile/versatile_pb.c | 21 -
arch/arm/plat-iop/time.c | 4 +-
arch/arm/plat-omap/counter_32k.c | 4 +-
arch/arm/plat-orion/time.c | 4 +-
arch/arm/plat-samsung/s5p-irq-eint.c | 4 +
arch/arm/plat-versatile/sched-clock.c | 4 +-
drivers/Makefile | 2 +-
drivers/clocksource/Makefile | 2 +-
drivers/irqchip/Kconfig | 4 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-dw-apb-ictl.c | 150 ++++
drivers/reset/Makefile | 1 +
drivers/reset/reset-sunxi.c | 175 ++++
include/dt-bindings/clock/imx5-clock.h | 203 +++++
include/dt-bindings/clock/imx6sl-clock.h | 4 +-
include/dt-bindings/clock/r8a7790-clock.h | 100 +++
include/dt-bindings/clock/r8a7791-clock.h | 105 +++
include/dt-bindings/clock/vf610-clock.h | 6 +-
include/linux/tegra-powergate.h | 50 +-
169 files changed, 6147 insertions(+), 1887 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
create mode 100644 Documentation/devicetree/bindings/arm/marvell,berlin.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx35-clock.txt
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
create mode 100644 arch/arm/boot/dts/armv7-m.dtsi
create mode 100644 arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
create mode 100644 arch/arm/boot/dts/berlin2.dtsi
create mode 100644 arch/arm/boot/dts/berlin2cd-google-chromecast.dts
create mode 100644 arch/arm/boot/dts/berlin2cd.dtsi
create mode 100644 arch/arm/boot/dts/efm32gg-dk3750.dts
create mode 100644 arch/arm/boot/dts/efm32gg.dtsi
create mode 100644 arch/arm/boot/dts/hi3620-hi4511.dts
create mode 100644 arch/arm/boot/dts/hi3620.dtsi
create mode 100644 arch/arm/boot/dts/qcom-msm8974.dtsi
create mode 100644 arch/arm/configs/efm32_defconfig
create mode 100644 arch/arm/configs/hi3xxx_defconfig
create mode 100644 arch/arm/configs/moxart_defconfig
create mode 100644 arch/arm/mach-berlin/Kconfig
create mode 100644 arch/arm/mach-berlin/Makefile
create mode 100644 arch/arm/mach-berlin/berlin.c
create mode 100644 arch/arm/mach-efm32/Makefile
create mode 100644 arch/arm/mach-efm32/Makefile.boot
create mode 100644 arch/arm/mach-efm32/dtmachine.c
create mode 100644 arch/arm/mach-efm32/include/mach/entry-macro.S
create mode 100644 arch/arm/mach-efm32/include/mach/timex.h
create mode 100644 arch/arm/mach-hisi/Kconfig
create mode 100644 arch/arm/mach-hisi/Makefile
create mode 100644 arch/arm/mach-hisi/core.h
create mode 100644 arch/arm/mach-hisi/hisilicon.c
create mode 100644 arch/arm/mach-hisi/hotplug.c
create mode 100644 arch/arm/mach-hisi/platsmp.c
create mode 100644 arch/arm/mach-imx/imx35-dt.c
create mode 100644 arch/arm/mach-imx/mach-imx50.c
create mode 100644 arch/arm/mach-moxart/Kconfig
create mode 100644 arch/arm/mach-moxart/Makefile
create mode 100644 arch/arm/mach-moxart/moxart.c
delete mode 100644 arch/arm/mach-shmobile/board-kzm9d.c
create mode 100644 arch/arm/mach-sunxi/common.h
create mode 100644 arch/arm/mach-sunxi/headsmp.S
create mode 100644 arch/arm/mach-sunxi/platsmp.c
create mode 100644 drivers/irqchip/irq-dw-apb-ictl.c
create mode 100644 drivers/reset/reset-sunxi.c
create mode 100644 include/dt-bindings/clock/imx5-clock.h
create mode 100644 include/dt-bindings/clock/r8a7790-clock.h
create mode 100644 include/dt-bindings/clock/r8a7791-clock.h
^ permalink raw reply
* [GIT PULL 2/6] ARM: SoC cleanups for 3.14
From: Olof Johansson @ 2014-01-23 18:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390502188-16896-1-git-send-email-olof@lixom.net>
This is the branch where we usually queue up cleanup efforts, moving
drivers out of the architecture directory, header file restructuring,
etc. Sometimes they tangle with new development so it's hard to keep it
strictly to cleanups.
Some of the things included in this branch are:
* Atmel SAMA5 conversion to common clock
* Reset framework conversion for tegra platforms
- Some of this depends on tegra clock driver reworks that are shared with Mike
Turquette's clk tree.
* Tegra DMA refactoring, which are shared branches with the DMA tree.
* Removal of some header files on exynos to prepare for multiplatform
----------------------------------------------------------------
The following changes since commit 2efe1a5937f3d7d9f7baeaca34fc9082e747a41e:
Merge branch 'next/fixes-non-critical' into HEAD
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/cleanup-for-linus
for you to fetch changes up to 273c2279ca502267fac40bcaecb35942380c429c:
Merge tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91 into next/cleanup
----------------------------------------------------------------
Alexandre Courbot (1):
clk: tegra: add FUSE clock device
Andrew Chew (1):
clk: tegra: Set the clk parent of host1x to pll_p
Andrew Lunn (3):
ARM: Orion: Add missing includes
ARM: Orion5x: Fix warnings when using C=1.
ARM: Dove: Fix compiler warnings with C=1 builds
Arnaud Patard (1):
ARM: kirkwood: stop printk TCLK value at boot for DT boards
Boris BREZILLON (23):
ARM: at91: move at91_pmc.h to include/linux/clk/at91_pmc.h
ARM: at91: add Kconfig options for common clk support
clk: at91: add PMC base support
clk: at91: add PMC macro file for dt definitions
clk: at91: add PMC main clock
clk: at91: add PMC pll clocks
clk: at91: add PMC master clock
clk: at91: add PMC system clocks
clk: at91: add PMC peripheral clocks
clk: at91: add PMC programmable clocks
clk: at91: add PMC utmi clock
clk: at91: add PMC usb clock
clk: at91: add PMC smd clock
dt: binding: add at91 clks dt bindings documentation
ARM: at91: move pit timer to common clk framework
ARM: at91: add new compatible strings for pmc driver
ARM: at91: prepare sama5 dt boards transition to common clk
ARM: at91: prepare common clk transition for sama5d3 SoC
ARM: at91/dt: define sama5d3 clocks
ARM: at91/dt: define sama5d3xek's main clk frequency
ARM: at91: move sama5d3 SoC to common clk
ARM: at91/dt: remove old clk material
clk: at91: fix pmc_clk_ids data type attriubte
Dan Carpenter (1):
spi: tegra: checking for ERR_PTR instead of NULL
Daniel Kurtz (3):
ARM: EXYNOS: Constify data tables for pmu
ARM: SAMSUNG: Let s3c_pm_do_restore_*() take const sleep_save
ARM: EXYNOS: Constify clksrc immutable register restore tables
Jean-Christophe PLAGNIOL-VILLARD (1):
ARM: at91: switch Calao QIL-A9260 board to DT
Jisheng Zhang (1):
ARM: mvebu: fix some sparse warnings
Joseph Lo (2):
clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_ops
clk: tegra124: add suspend/resume function for tegra_cpu_car_ops
Kevin Hilman (1):
Merge tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91 into next/cleanup
Kukjin Kim (11):
ARM: EXYNOS: cleanup <mach/regs-pmu.h>
ARM: EXYNOS: remove inclusion <mach/regs-pmu.h> into another headers
ARM: EXYNOS: local regs-pmu.h header file
ARM: EXYNOS: cleanup <mach/regs-irq.h>
ARM: EXYNOS: cleanup <mach/regs-clock.h>
PM / devfreq: move definitions for exynos4_bus into drivers/devfreq
ARM: EXYNOS: local definitions for pm.c into mach-exynos dir
cpufreq: exynos: move definitions for exynos-cpufreq into drivers/cpufreq/
ARM: EXYNOS: local definitions for cpuidle.c into mach-exynos dir
ARM: EXYNOS: remove <mach/regs-clock.h> for exynos
PM / devfreq: use inclusion <mach/map.h> instead of <plat/map-s5p.h>
Kuninori Morimoto (14):
ARM: shmobile: ape6evm: don't use named resource for MMCIF
ARM: shmobile: ape6evm: don't use named resource for SDHI
ARM: shmobile: lager: don't use named resource for MMCIF
ARM: shmobile: sh73a0: don't use named resource for TMU
ARM: shmobile: sh73a0: don't use named resource for I2C
ARM: shmobile: sh73a0: don't use named resource for IPMMU
ARM: shmobile: bockw: header cleanup
ARM: shmobile: r8a7779: cleanup registration of VIN
ARM: shmobile: r8a7779: camera-rcar header cleanup
ARM: shmobile: r8a7779: cleanup registration of sh_eth
ARM: shmobile: sh73a0: tidyup clock table order
ARM: shmobile: r7s72100: tidyup clock table order
ARM: shmobile: sh7372: tidyup clock table order
ARM: shmobile: remove unnecessary platform_device as header cleanup
Laurent Pinchart (14):
serial: sh-sci: Fix warnings due to improper casts and printk formats
serial: sh-sci: Don't enable/disable port from within break timer
serial: sh-sci: Convert to clk_prepare/unprepare
serial: sh-sci: Sort headers alphabetically
serial: sh-sci: Remove baud rate calculation algorithm 5
serial: sh-sci: Simplify baud rate calculation algorithms
serial: sh-sci: Remove duplicate interrupt check in verify port op
serial: sh-sci: Set the UPF_FIXED_PORT flag
serial: sh-sci: Don't check IRQ in verify port operation
serial: sh-sci: Support resources passed through platform resources
serial: sh-sci: Move overrun_bit and error_mask fields out of pdata
serial: sh-sci: Remove unused GPIO request code
serial: sh-sci: Compute overrun_bit without using baud rate algo
serial: sh-sci: Rework baud rate calculation
Magnus Damm (2):
ARM: shmobile: Cosmetic update of Lager DT Reference
ARM: shmobile: Add r8a7790_register_pfc() function
Mark Zhang (3):
clk: tegra: Correct sbc mux width & parent
clk: tegra: Fix vde/2d/3d clock src offset
clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2
Michael Opdenacker (4):
arm: plat-orion: remove deprecated IRQF_DISABLED
ARM: SAMSUNG: remove unused SAMSUNG_GPIOLIB_4BIT Kconfig parameter
ARM: SAMSUNG: remove IRQF_DISABLED
ARM: pxa: remove IRQF_DISABLED
Michal Simek (1):
arm: zynq: Add support for zynq_cpu_kill function
Mikko Perttunen (1):
clk: tegra114: Initialize clocks needed for HDMI
Nicolas Ferre (1):
ARM: at91: remove AT91_PROGRAMMABLE_CLOCKS configuration option
Nicolas Pitre (1):
ARM: clean up cache handling in platform code
Olof Johansson (14):
Merge tag 'renesas-cleanup-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/cleanup
Merge tag 'mvebu-soc-3.14' of git://git.infradead.org/linux-mvebu into next/cleanup
Merge commit 'fixes' into next/cleanup
Merge tag 'at91-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup
Merge tag 'zynq-cleanup-for-3.14' of git://git.xilinx.com/linux-xlnx into next/cleanup
Merge tag 'samsung-cleanup' of git://git.kernel.org/.../kgene/linux-samsung into next/cleanup
Merge tag 'v3.13-rc4' into next/cleanup
Merge branches 'depends/asoc-dma', 'depends/dma-of' and 'depends/tegra-clk' into next/cleanup
Merge tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/.../tegra/linux into next/cleanup
Merge tag 'samsung-cleanup-2' of git://git.kernel.org/.../kgene/linux-samsung into next/cleanup
Merge tag 'renesas-cleanup2-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/cleanup
Merge tag 'renesas-sh-sci-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/cleanup
Merge tag 'renesas-sh-sci2-for-v3.14' of git://git.kernel.org/.../horms/renesas into next/cleanup
Merge tag 'mvebu-soc-3.14-2' of git://git.infradead.org/linux-mvebu into next/cleanup
Peter De Schrijver (27):
ARM: tegra114: add missing clocks to binding
clk: tegra: replace enum tegra114_clk by binding header
clk: tegra: add TEGRA_DIVIDER_ROUND_UP for periph clks
clk: tegra: PLLE spread spectrum control
ARM: tegra30: add missing CLK IDs
clk: tegra: simplify periph clock data
clk: tegra: common periph_clk_enb_refcnt and clks
clk: tegra: Add TEGRA_PERIPH_NO_DIV flag
clk: tegra: move some PLLC and PLLXC init to clk-pll.c
clk: tegra: use pll_ref as the pll_e parent
clk: tegra: move fields to tegra_clk_pll_params
clk: tegra: add header for common tegra clock IDs
clk: tegra: add common infra for DT clocks
clk: tegra: add clkdev registration infra
clk: tegra: move audio clk to common file
clk: tegra: move periph clocks to common file
clk: tegra: move PMC, fixed clocks to common files
clk: tegra: introduce common gen4 super clock
clk: tegra: move tegra30 to common infra
clk: tegra: move tegra20 to common infra
clk: tegra: Add support for PLLSS
clk: tegra: Add periph regs bank X
clk: tegra: add locking to periph clks
clk: tegra: add TEGRA_PERIPH_NO_GATE
clk: tegra124: Add common clk IDs to clk-id.h
clk: tegra124: Add new peripheral clocks
clk: tegra124: Add support for Tegra124 clocks
Qiao Zhou (1):
ARM: mmp: build sram driver alone
Sebastian Hesselbarth (1):
ARM: kirkwood: remove lagacy clk workarounds
Simon Horman (1):
ARM: shmobile: r8a7790: Correct typo in clocks
Soren Brinkmann (4):
arm: zynq: platsmp: Remove CPU presence check
arm: zynq: Invalidate L1 in secondary boot
arm: zynq: Use of_platform_populate instead of bus_probe
arm: zynq: Set proper GIC flags
Stephen Warren (34):
dma: add dma_get_any_slave_channel(), for use in of_xlate()
Merge branch 'for-3.14/deps-from-dma-defer_probe' into for-3.14/dmas-resets-rework
Merge branch 'for-3.14/deps-from-dma-of' into for-3.14/dmas-resets-rework
Merge tag 'asoc-dma-v3.14' into for-3.14/dmas-resets-rework
Merge tag 'clk-tegra-for-3.14' into for-3.14/dmas-resets-rework
ARM: tegra: add missing clock documentation to DT bindings
ARM: tegra: document reset properties in DT bindings
ARM: tegra: document use of standard DMA DT bindings
ARM: tegra: update DT files to add reset properties
ARM: tegra: update DT files to add DMA properties
ARM: tegra: select the reset framework
clk: tegra: implement a reset driver
pci: tegra: use reset framework
drm/tegra: use reset framework
ARM: tegra: pass reset to tegra_powergate_sequence_power_up()
dma: tegra: use reset framework
dma: tegra: register as an OF DMA controller
ASoC: tegra: use reset framework
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: convert to standard DMA DT bindings
i2c: tegra: use reset framework
staging: nvec: use reset framework
spi: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
serial: tegra: convert to standard DMA DT bindings
Input: tegra-kbc - use reset framework
USB: EHCI: tegra: use reset framework
ARM: tegra: remove legacy clock entries from DT
ARM: tegra: remove legacy DMA entries from DT
clk: tegra: remove legacy reset APIs
clk: tegra: remove bogus PCIE_XCLK
ASoC: tegra: update module reset list for Tegra124
Sudeep KarkadaNagesha (1):
ARM: zynq: remove unnecessary setting of cpu_present_mask
Sylwester Nawrocki (2):
ARM: EXYNOS: Consolidate selection of PM_GENERIC_DOMAINS for Exynos4
ARM: EXYNOS: Kill exynos_pm_late_initcall()
Thierry Reding (7):
clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3d
clk: tegra: Fix clock rate computation
clk: tegra: Initialize secondary gr3d clock on Tegra30
clk: tegra: Properly setup PWM clock on Tegra30
clk: tegra: Initialize DSI low-power clocks
clk: tegra: Do not print errors for clk_round_rate()
ARM: pxa: Remove unused variables
Thomas Petazzoni (3):
ARM: mvebu: move ARMADA_XP_MAX_CPUS to armada-370-xp.h
ARM: mvebu: remove prototypes of non-existing functions from common.h
ARM: mvebu: move Armada 370/XP specific definitions to armada-370-xp.h
Uwe Kleine-K?nig (1):
ARM: orion5x: drop unused include from common.c
Wei Yongjun (1):
clk: tegra: fix __clk_lookup() return value checks
Yanis Moreno (1):
ARM: at91: remove redundant dependency
.../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 1 +
.../devicetree/bindings/clock/at91-clock.txt | 339 ++++
.../bindings/clock/nvidia,tegra114-car.txt | 4 +
.../bindings/clock/nvidia,tegra124-car.txt | 63 +
.../bindings/clock/nvidia,tegra20-car.txt | 4 +
.../bindings/clock/nvidia,tegra30-car.txt | 4 +
.../devicetree/bindings/dma/tegra20-apbdma.txt | 14 +
.../bindings/gpu/nvidia,tegra20-host1x.txt | 122 ++
.../bindings/i2c/nvidia,tegra20-i2c.txt | 27 +-
.../bindings/input/nvidia,tegra20-kbc.txt | 9 +
.../bindings/mmc/nvidia,tegra20-sdhci.txt | 9 +
.../devicetree/bindings/nvec/nvidia,nvec.txt | 12 +
.../bindings/pci/nvidia,tegra20-pcie.txt | 26 +-
.../bindings/pwm/nvidia,tegra20-pwm.txt | 9 +
.../bindings/rtc/nvidia,tegra20-rtc.txt | 3 +
.../bindings/serial/nvidia,tegra20-hsuart.txt | 19 +-
.../sound/nvidia,tegra-audio-alc5632.txt | 7 +-
.../sound/nvidia,tegra-audio-rt5640.txt | 7 +-
.../sound/nvidia,tegra-audio-wm8753.txt | 7 +-
.../sound/nvidia,tegra-audio-wm8903.txt | 7 +-
.../sound/nvidia,tegra-audio-wm9712.txt | 7 +-
.../bindings/sound/nvidia,tegra20-ac97.txt | 20 +-
.../bindings/sound/nvidia,tegra20-i2s.txt | 19 +-
.../bindings/sound/nvidia,tegra30-ahub.txt | 63 +-
.../bindings/sound/nvidia,tegra30-i2s.txt | 11 +-
.../bindings/spi/nvidia,tegra114-spi.txt | 24 +-
.../bindings/spi/nvidia,tegra20-sflash.txt | 20 +-
.../bindings/spi/nvidia,tegra20-slink.txt | 20 +-
.../bindings/timer/nvidia,tegra20-timer.txt | 3 +
.../bindings/timer/nvidia,tegra30-timer.txt | 3 +
.../bindings/usb/nvidia,tegra20-ehci.txt | 7 +-
arch/arm/Kconfig | 1 -
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/at91-qil_a9260.dts | 185 ++
arch/arm/boot/dts/sama5d3.dtsi | 379 +++-
arch/arm/boot/dts/sama5d3_can.dtsi | 20 +
arch/arm/boot/dts/sama5d3_emac.dtsi | 11 +
arch/arm/boot/dts/sama5d3_gmac.dtsi | 11 +
arch/arm/boot/dts/sama5d3_lcd.dtsi | 17 +
arch/arm/boot/dts/sama5d3_mci2.dtsi | 12 +
arch/arm/boot/dts/sama5d3_tcb1.dtsi | 12 +
arch/arm/boot/dts/sama5d3_uart.dtsi | 21 +
arch/arm/boot/dts/sama5d3xcm.dtsi | 17 +-
arch/arm/boot/dts/tegra114.dtsi | 157 +-
arch/arm/boot/dts/tegra20-paz00.dts | 2 +
arch/arm/boot/dts/tegra20.dtsi | 136 +-
arch/arm/boot/dts/tegra30.dtsi | 175 +-
arch/arm/configs/at91_dt_defconfig | 1 -
arch/arm/configs/at91rm9200_defconfig | 1 -
arch/arm/configs/at91sam9260_9g20_defconfig | 2 -
arch/arm/configs/at91sam9261_9g10_defconfig | 1 -
arch/arm/configs/at91sam9g45_defconfig | 1 -
arch/arm/configs/at91sam9rl_defconfig | 1 -
arch/arm/configs/sama5_defconfig | 1 -
arch/arm/mach-at91/Kconfig | 50 +-
arch/arm/mach-at91/Kconfig.non_dt | 12 +-
arch/arm/mach-at91/Makefile | 3 +-
arch/arm/mach-at91/at91rm9200.c | 2 +-
arch/arm/mach-at91/at91sam9260.c | 2 +-
arch/arm/mach-at91/at91sam9261.c | 2 +-
arch/arm/mach-at91/at91sam9263.c | 2 +-
arch/arm/mach-at91/at91sam926x_time.c | 14 +-
arch/arm/mach-at91/at91sam9g45.c | 2 +-
arch/arm/mach-at91/at91sam9n12.c | 2 +-
arch/arm/mach-at91/at91sam9rl.c | 2 +-
arch/arm/mach-at91/at91sam9x5.c | 2 +-
arch/arm/mach-at91/board-dt-sama5.c | 10 +-
arch/arm/mach-at91/board-qil-a9260.c | 266 ---
arch/arm/mach-at91/clock.c | 13 +-
arch/arm/mach-at91/generic.h | 3 +-
arch/arm/mach-at91/pm.c | 5 +-
arch/arm/mach-at91/pm_slowclock.S | 2 +-
arch/arm/mach-at91/sama5d3.c | 344 +---
arch/arm/mach-at91/setup.c | 8 +-
arch/arm/mach-dove/common.c | 15 +-
arch/arm/mach-exynos/Kconfig | 4 +-
arch/arm/mach-exynos/common.c | 8 +-
arch/arm/mach-exynos/common.h | 6 -
arch/arm/mach-exynos/cpuidle.c | 25 +-
arch/arm/mach-exynos/hotplug.c | 2 +-
arch/arm/mach-exynos/include/mach/pm-core.h | 5 +-
arch/arm/mach-exynos/include/mach/regs-clock.h | 372 ----
arch/arm/mach-exynos/include/mach/regs-irq.h | 19 -
arch/arm/mach-exynos/mach-exynos5-dt.c | 2 +-
arch/arm/mach-exynos/platsmp.c | 6 +-
arch/arm/mach-exynos/pm.c | 33 +-
arch/arm/mach-exynos/pm_domains.c | 9 +-
arch/arm/mach-exynos/pmu.c | 17 +-
.../mach-exynos/{include/mach => }/regs-pmu.h | 53 -
arch/arm/mach-imx/platsmp.c | 3 +-
arch/arm/mach-kirkwood/board-dt.c | 40 +-
arch/arm/mach-mmp/Kconfig | 3 +
arch/arm/mach-mmp/Makefile | 3 +-
arch/arm/mach-msm/platsmp.c | 3 +-
arch/arm/mach-mvebu/armada-370-xp.h | 4 +
arch/arm/mach-mvebu/coherency.c | 1 +
arch/arm/mach-mvebu/coherency.h | 4 +-
arch/arm/mach-mvebu/common.h | 10 +-
arch/arm/mach-mvebu/hotplug.c | 1 +
arch/arm/mach-mvebu/platsmp.c | 4 +-
arch/arm/mach-mvebu/pmsu.c | 3 +-
arch/arm/mach-mvebu/system-controller.c | 5 +-
arch/arm/mach-orion5x/board-dt.c | 2 +-
arch/arm/mach-orion5x/common.c | 7 +-
arch/arm/mach-orion5x/db88f5281-setup.c | 2 +-
arch/arm/mach-orion5x/irq.c | 1 +
arch/arm/mach-orion5x/pci.c | 4 +-
arch/arm/mach-orion5x/rd88f5182-setup.c | 2 +-
arch/arm/mach-orion5x/terastation_pro2-setup.c | 2 +-
arch/arm/mach-orion5x/ts209-setup.c | 2 +-
arch/arm/mach-orion5x/ts78xx-setup.c | 2 +-
arch/arm/mach-prima2/platsmp.c | 3 +-
arch/arm/mach-pxa/am200epd.c | 3 +-
arch/arm/mach-pxa/am300epd.c | 3 +-
arch/arm/mach-pxa/em-x270.c | 3 +-
arch/arm/mach-pxa/irq.c | 4 -
arch/arm/mach-pxa/magician.c | 2 +-
arch/arm/mach-pxa/mainstone.c | 2 +-
arch/arm/mach-pxa/pcm990-baseboard.c | 2 +-
arch/arm/mach-pxa/sharpsl_pm.c | 8 +-
arch/arm/mach-pxa/time.c | 2 +-
arch/arm/mach-pxa/trizeps4.c | 3 +-
arch/arm/mach-s3c24xx/dma.c | 2 +-
arch/arm/mach-s3c24xx/simtec-usb.c | 3 +-
arch/arm/mach-s3c64xx/mach-smartq.c | 2 +-
arch/arm/mach-shmobile/board-ape6evm.c | 6 +-
arch/arm/mach-shmobile/board-bockw-reference.c | 1 -
arch/arm/mach-shmobile/board-lager-reference.c | 5 +-
arch/arm/mach-shmobile/board-lager.c | 2 +-
arch/arm/mach-shmobile/board-marzen.c | 25 +-
arch/arm/mach-shmobile/clock-r7s72100.c | 3 +
arch/arm/mach-shmobile/clock-r8a7790.c | 2 +-
arch/arm/mach-shmobile/clock-sh7372.c | 9 +-
arch/arm/mach-shmobile/clock-sh73a0.c | 14 +-
arch/arm/mach-shmobile/include/mach/r8a7779.h | 7 -
arch/arm/mach-shmobile/setup-r8a7779.c | 57 -
arch/arm/mach-shmobile/setup-r8a7790.c | 7 +-
arch/arm/mach-shmobile/setup-sh73a0.c | 16 +-
arch/arm/mach-sti/platsmp.c | 3 +-
arch/arm/mach-tegra/Kconfig | 2 +
arch/arm/mach-tegra/powergate.c | 8 +-
arch/arm/mach-ux500/platsmp.c | 3 +-
arch/arm/mach-zynq/common.c | 16 +-
arch/arm/mach-zynq/common.h | 2 +
arch/arm/mach-zynq/headsmp.S | 6 +-
arch/arm/mach-zynq/platsmp.c | 25 +-
arch/arm/plat-orion/common.c | 9 +-
arch/arm/plat-orion/time.c | 3 +-
arch/arm/plat-pxa/dma.c | 2 +-
arch/arm/plat-samsung/Kconfig | 8 -
arch/arm/plat-samsung/include/plat/pm.h | 4 +-
arch/arm/plat-samsung/pm.c | 6 +-
arch/arm/plat-samsung/s5p-irq-pm.c | 3 +
arch/arm/plat-versatile/platsmp.c | 3 +-
drivers/clk/Makefile | 1 +
drivers/clk/at91/Makefile | 11 +
drivers/clk/at91/clk-main.c | 187 ++
drivers/clk/at91/clk-master.c | 270 +++
drivers/clk/at91/clk-peripheral.c | 410 +++++
drivers/clk/at91/clk-pll.c | 531 ++++++
drivers/clk/at91/clk-plldiv.c | 135 ++
drivers/clk/at91/clk-programmable.c | 366 ++++
drivers/clk/at91/clk-smd.c | 171 ++
drivers/clk/at91/clk-system.c | 135 ++
drivers/clk/at91/clk-usb.c | 398 +++++
drivers/clk/at91/clk-utmi.c | 159 ++
drivers/clk/at91/pmc.c | 395 ++++
drivers/clk/at91/pmc.h | 114 ++
drivers/clk/tegra/Makefile | 7 +-
drivers/clk/tegra/clk-id.h | 235 +++
drivers/clk/tegra/clk-periph-gate.c | 30 +-
drivers/clk/tegra/clk-periph.c | 72 +-
drivers/clk/tegra/clk-pll.c | 407 ++++-
drivers/clk/tegra/clk-tegra-audio.c | 215 +++
drivers/clk/tegra/clk-tegra-fixed.c | 111 ++
drivers/clk/tegra/clk-tegra-periph.c | 674 +++++++
drivers/clk/tegra/clk-tegra-pmc.c | 132 ++
drivers/clk/tegra/clk-tegra-super-gen4.c | 149 ++
drivers/clk/tegra/clk-tegra114.c | 1688 ++++--------------
drivers/clk/tegra/clk-tegra124.c | 1424 +++++++++++++++
drivers/clk/tegra/clk-tegra20.c | 817 ++++-----
drivers/clk/tegra/clk-tegra30.c | 1504 +++++-----------
drivers/clk/tegra/clk.c | 214 +++
drivers/clk/tegra/clk.h | 116 +-
drivers/cpufreq/exynos-cpufreq.h | 22 +
drivers/cpufreq/exynos4210-cpufreq.c | 2 -
drivers/cpufreq/exynos4x12-cpufreq.c | 2 -
drivers/cpufreq/exynos5250-cpufreq.c | 1 -
drivers/devfreq/exynos/exynos4_bus.c | 4 +-
drivers/devfreq/exynos/exynos4_bus.h | 110 ++
drivers/dma/Kconfig | 2 +
drivers/dma/dmaengine.c | 28 +
drivers/dma/mmp_pdma.c | 30 +-
drivers/dma/tegra20-apb-dma.c | 52 +-
drivers/gpu/drm/tegra/Kconfig | 1 +
drivers/gpu/drm/tegra/dc.c | 10 +-
drivers/gpu/drm/tegra/drm.h | 3 +
drivers/gpu/drm/tegra/gr3d.c | 22 +-
drivers/gpu/drm/tegra/hdmi.c | 15 +-
drivers/i2c/busses/i2c-tegra.c | 13 +-
drivers/input/keyboard/tegra-kbc.c | 13 +-
drivers/pci/host/pci-tegra.c | 53 +-
drivers/spi/Kconfig | 3 +
drivers/spi/spi-tegra114.c | 66 +-
drivers/spi/spi-tegra20-sflash.c | 18 +-
drivers/spi/spi-tegra20-slink.c | 66 +-
drivers/staging/nvec/nvec.c | 11 +-
drivers/staging/nvec/nvec.h | 5 +-
drivers/tty/serial/serial-tegra.c | 38 +-
drivers/tty/serial/sh-sci.c | 320 ++--
drivers/tty/serial/sh-sci.h | 2 +-
drivers/usb/gadget/atmel_usba_udc.c | 2 +-
drivers/usb/host/ehci-tegra.c | 14 +-
include/dt-bindings/clk/at91.h | 22 +
include/dt-bindings/clock/tegra114-car.h | 8 +-
include/dt-bindings/clock/tegra124-car.h | 341 ++++
include/dt-bindings/clock/tegra20-car.h | 2 +-
include/dt-bindings/clock/tegra30-car.h | 12 +-
.../mach => include/linux/clk}/at91_pmc.h | 4 +-
include/linux/clk/tegra.h | 7 -
include/linux/dmaengine.h | 1 +
include/linux/serial_sci.h | 34 +-
include/linux/tegra-powergate.h | 7 +-
sound/soc/atmel/Kconfig | 2 +-
sound/soc/tegra/Kconfig | 2 +
sound/soc/tegra/tegra20_ac97.c | 11 -
sound/soc/tegra/tegra20_i2s.c | 20 +-
sound/soc/tegra/tegra30_ahub.c | 138 +-
sound/soc/tegra/tegra30_ahub.h | 11 +-
sound/soc/tegra/tegra30_i2s.c | 97 +-
sound/soc/tegra/tegra30_i2s.h | 3 +
sound/soc/tegra/tegra_pcm.c | 17 +-
sound/soc/tegra/tegra_pcm.h | 5 +
233 files changed, 11389 insertions(+), 5145 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
create mode 100644 arch/arm/boot/dts/at91-qil_a9260.dts
delete mode 100644 arch/arm/mach-at91/board-qil-a9260.c
delete mode 100644 arch/arm/mach-exynos/include/mach/regs-clock.h
delete mode 100644 arch/arm/mach-exynos/include/mach/regs-irq.h
rename arch/arm/mach-exynos/{include/mach => }/regs-pmu.h (88%)
create mode 100644 drivers/clk/at91/Makefile
create mode 100644 drivers/clk/at91/clk-main.c
create mode 100644 drivers/clk/at91/clk-master.c
create mode 100644 drivers/clk/at91/clk-peripheral.c
create mode 100644 drivers/clk/at91/clk-pll.c
create mode 100644 drivers/clk/at91/clk-plldiv.c
create mode 100644 drivers/clk/at91/clk-programmable.c
create mode 100644 drivers/clk/at91/clk-smd.c
create mode 100644 drivers/clk/at91/clk-system.c
create mode 100644 drivers/clk/at91/clk-usb.c
create mode 100644 drivers/clk/at91/clk-utmi.c
create mode 100644 drivers/clk/at91/pmc.c
create mode 100644 drivers/clk/at91/pmc.h
create mode 100644 drivers/clk/tegra/clk-id.h
create mode 100644 drivers/clk/tegra/clk-tegra-audio.c
create mode 100644 drivers/clk/tegra/clk-tegra-fixed.c
create mode 100644 drivers/clk/tegra/clk-tegra-periph.c
create mode 100644 drivers/clk/tegra/clk-tegra-pmc.c
create mode 100644 drivers/clk/tegra/clk-tegra-super-gen4.c
create mode 100644 drivers/clk/tegra/clk-tegra124.c
create mode 100644 drivers/devfreq/exynos/exynos4_bus.h
create mode 100644 include/dt-bindings/clk/at91.h
create mode 100644 include/dt-bindings/clock/tegra124-car.h
rename {arch/arm/mach-at91/include/mach => include/linux/clk}/at91_pmc.h (98%)
^ permalink raw reply
* [GIT PULL 1/6] ARM: SoC non-critical fixes for 3.14
From: Olof Johansson @ 2014-01-23 18:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390502188-16896-1-git-send-email-olof@lixom.net>
As usual, we have a batch of fixes that weren't considered significant
enough to warrant going into the later -rcs for previous release, so
they are queued up on this branch.
A handful of these are for various DT fixups for Samsung platforms,
and a handful of other minor things.
There are also a couple of stable-marked patches for mvebu -- they came in
quite late and we decided to keep them deferred until the first -stable
release to get more coverage instead of squeezing them into 3.13.
----------------------------------------------------------------
The following changes since commit 0dc3fd0249a295863900984e02dd4bb89204205b:
Merge tag 'modules-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git tags/fixes-nc-for-linus
for you to fetch changes up to 099c2e9ef671519d4c7f9d49782845adc4f54a39:
Merge tag 'omap-for-v3.14/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
----------------------------------------------------------------
Alexander Shiyan (1):
ARM: SAMSUNG: Fix switching FIFO in arch_enable_uart_fifo function
Barry Song (1):
irqchip: sirf: set IRQ_LEVEL status_flags
Doug Anderson (2):
ARM: dts: Add the missing "\" key in non-US keyboards for exynos5250-snow
ARM: dts: Fix exynos5250-snow's search key to be L_META
Ezequiel Garcia (4):
ARM: OMAP2+: Select USB PHY for AM335x SoC
ARM: OMAP2+: gpmc: Move initialization outside the gpmc_t condition
ARM: OMAP2+: gpmc: Introduce gpmc_set_legacy()
ARM: OMAP2+: gpmc: Move legacy GPMC width setting
Gregory CLEMENT (4):
ARM: mvebu: Add support to get the ID and the revision of a SoC
ARM: mvebu: Add quirk for i2c for the OpenBlocks AX3-4 board
i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs
i2c: mv64xxx: Document the newly introduced Armada XP A0 compatible
Jean-Jacques Hiblot (1):
ARM: at91: smc: bug fix in sam9_smc_cs_read()
Josh Cartwright (1):
ARM: msm: trout: fix uninit var warning
Jyri Sarha (1):
ARM: OMAP2+: enable AM33xx SOC EVM audio
Kevin Hilman (3):
Merge branch 'qcom/fixes' into next/fixes-non-critical
Merge tag 'mvebu-fixes-3.13' of git://git.infradead.org/linux-mvebu into next/fixes-non-critical
Merge tag 'omap-for-v3.14/fixes-not-urgent-signed' of git://git.kernel.org/.../tmlind/linux-omap into next/fixes-non-critical
Lee Jones (1):
ARM: u300: Remove '0x's from U300 DTS file
Nishanth Menon (2):
Documentation: dt: OMAP: explicitly state SoC compatible strings
ARM: OMAP2+: board-generic: update SoC compatibility strings
Olof Johansson (4):
Merge tag 'samsung-fixes' of git://git.kernel.org/.../kgene/linux-samsung into next/fixes-non-critical
Merge tag 'samsung-fixes-2' of git://git.kernel.org/.../kgene/linux-samsung into next/fixes-non-critical
Merge branch 'qcom/fixes' into next/fixes-non-critical
Merge tag 'u300-for-arm-soc-1' of git://git.kernel.org/.../linusw/linux-stericsson into next/fixes-non-critical
Sachin Kamat (4):
ARM: dts: Add missing op_mode property to PMIC on Arndale
ARM: dts: Add missing frequency property to exynos5250
ARM: dts: Fix a typo in exynos5420-pinctrl.dtsi
ARM: dts: Update display clock frequency for Origen-4412
Seungwon Jeon (1):
ARM: dts: add clock provider for mshc node for Exynos4412 SOC
Stefan Weil (1):
ARM: bcm2835: Fix grammar in help message
Stephen Boyd (1):
ARM: dts: msm: Fix gpio interrupt and reg length
Tomasz Figa (4):
ARM: S3C64XX: Correct card detect type for HSMMC1 for MINI6410
clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider
ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12
ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2
Tushar Behera (1):
ARM: dts: Update display clock frequency for Origen-4210
Uwe Kleine-K?nig (1):
ARM: u300: fix timekeeping when periodic mode is used
Wei Yongjun (1):
ARM: u300: fix return value check in __u300_init_boardpower()
.../devicetree/bindings/arm/omap/omap.txt | 53 +++++++++
.../devicetree/bindings/i2c/i2c-mv64xxx.txt | 6 +-
arch/arm/boot/dts/exynos4210-origen.dts | 2 +-
arch/arm/boot/dts/exynos4412-odroidx.dts | 5 +-
arch/arm/boot/dts/exynos4412-origen.dts | 7 +-
arch/arm/boot/dts/exynos4412-trats2.dts | 20 +++-
arch/arm/boot/dts/exynos4412.dtsi | 7 --
arch/arm/boot/dts/exynos4x12.dtsi | 13 ++
arch/arm/boot/dts/exynos5250-arndale.dts | 2 +
arch/arm/boot/dts/exynos5250-snow.dts | 3 +-
arch/arm/boot/dts/exynos5250.dtsi | 2 +
arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 2 +-
arch/arm/boot/dts/qcom-msm8660-surf.dts | 4 +-
arch/arm/boot/dts/qcom-msm8960-cdp.dts | 2 +-
arch/arm/boot/dts/ste-u300.dts | 6 +-
arch/arm/configs/omap2plus_defconfig | 3 +
arch/arm/mach-at91/sam9_smc.c | 2 +-
arch/arm/mach-bcm2835/Kconfig | 2 +-
arch/arm/mach-msm/board-trout.c | 12 +-
arch/arm/mach-mvebu/Makefile | 2 +-
arch/arm/mach-mvebu/armada-370-xp.c | 32 +++++
arch/arm/mach-mvebu/mvebu-soc-id.c | 119 +++++++++++++++++++
arch/arm/mach-mvebu/mvebu-soc-id.h | 32 +++++
arch/arm/mach-omap2/board-generic.c | 7 ++
arch/arm/mach-omap2/gpmc-nand.c | 50 ++++----
arch/arm/mach-s3c64xx/mach-mini6410.c | 10 ++
arch/arm/mach-u300/regulator.c | 4 +-
arch/arm/mach-u300/timer.c | 38 +++---
arch/arm/plat-samsung/include/plat/uncompress.h | 2 +
drivers/clk/samsung/clk-exynos4.c | 3 +-
drivers/i2c/busses/i2c-mv64xxx.c | 5 +
drivers/irqchip/irq-sirfsoc.c | 3 +-
32 files changed, 381 insertions(+), 79 deletions(-)
create mode 100644 arch/arm/mach-mvebu/mvebu-soc-id.c
create mode 100644 arch/arm/mach-mvebu/mvebu-soc-id.h
^ permalink raw reply
* [GIT PULL 0/6] ARM: SoC changes for 3.14
From: Olof Johansson @ 2014-01-23 18:36 UTC (permalink / raw)
To: linux-arm-kernel
Here are the main branches for arm-soc for the 3.14 merge window. We'll have a
few more patches towards the end, but this is the bulk of it.
Nothing too surprising in any of it, and we've been able to stay away
from too much conflicts this release cycle, I think the total was around
3 and none of them are messy (proposed resolution in each pull request)
I've pushed up a "resolved-for-linus" branch in case you want to compare
resolutions.
Please pull. Thanks!
-Olof
^ permalink raw reply
* [PATCH 4/5] ARM: S3C24XX: convert boards to use common restart function
From: Heiko Stübner @ 2014-01-23 18:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E15B74.3040409@samsung.com>
Am Donnerstag, 23. Januar 2014, 19:12:04 schrieb Tomasz Figa:
> Hi Heiko,
>
> On 06.01.2014 19:40, Heiko St?bner wrote:
> > This converts all boards to use the new common restart function instead
> > of SoC specific ones.
> >
> > The mach-s3c2416-dt board now tries to setup either a swrst- or watchdog-
> > reset so that it will be able to handle more s3c24xx-SoCs later on.
>
> [snip]
>
> > diff --git a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
> > b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c index 0a86953..88716fa4 100644
> > --- a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
> > +++ b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
> > @@ -24,6 +24,7 @@
> >
> > #include <plat/cpu.h>
> > #include <plat/pm.h>
> >
> > +#include <plat/watchdog-reset.h>
> >
> > #include "common.h"
> >
> > @@ -34,6 +35,14 @@ static void __init s3c2416_dt_map_io(void)
> >
> > static void __init s3c2416_dt_machine_init(void)
> > {
> >
> > + s3c24xx_swrst_reset_of_init();
> > +
> > +#ifdef CONFIG_SAMSUNG_WDT_RESET
> > + /* if no special swrst-device exists try to find a watchdog */
> > + if (!s3c24xx_swrst_reset_available())
> > + samsung_wdt_reset_of_init();
> > +#endif
>
> Hmm... I think it would be safe to assume availability of soft reset,
> especially if you could move the restart code to the clock driver.
ok, so something like the following:
the boards would simply use samsung_watchdog_reset, which should according to
the manuals be available on all architectures. And the ccf-driver on
appropriate architectures would simple replace the arm_pm_restart callback
with its own SoC specific one?
For the s3c2412 this also means that the clock-logic would get simplified.
Like this, or do I overlook something?
Thanks
Heiko
^ permalink raw reply
* [PATCH] arm64: delete non-required instances of <linux/init.h>
From: Paul Gortmaker @ 2014-01-23 18:26 UTC (permalink / raw)
To: linux-arm-kernel
None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>. Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one place to the next.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel at lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
[Build tested on today's linux-next ; thanks to Will for the pointer
to a prebuilt toolchain. Patch to be added to init cleanup series:
http://git.kernel.org/cgit/linux/kernel/git/paulg/init.git ]
arch/arm64/include/asm/arch_timer.h | 1 -
arch/arm64/kernel/cputable.c | 2 --
arch/arm64/kernel/entry.S | 1 -
arch/arm64/kernel/hyp-stub.S | 1 -
arch/arm64/kernel/process.c | 1 -
arch/arm64/kernel/ptrace.c | 1 -
arch/arm64/kernel/smp_spin_table.c | 1 -
arch/arm64/kernel/vdso/vdso.S | 1 -
arch/arm64/lib/delay.c | 1 -
arch/arm64/mm/cache.S | 1 -
arch/arm64/mm/proc.S | 1 -
11 files changed, 12 deletions(-)
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index 9400596a0f39..c4a14de68523 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -21,7 +21,6 @@
#include <asm/barrier.h>
-#include <linux/init.h>
#include <linux/types.h>
#include <clocksource/arm_arch_timer.h>
diff --git a/arch/arm64/kernel/cputable.c b/arch/arm64/kernel/cputable.c
index fd3993cb060f..e1a39fcf2433 100644
--- a/arch/arm64/kernel/cputable.c
+++ b/arch/arm64/kernel/cputable.c
@@ -16,8 +16,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/init.h>
-
#include <asm/cputable.h>
extern unsigned long __cpu_setup(void);
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 39ac630d83de..3d255b05c48a 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -18,7 +18,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
index 0959611d9ff1..066d366cc850 100644
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -17,7 +17,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 248a15db37f2..1e5a17811648 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -31,7 +31,6 @@
#include <linux/reboot.h>
#include <linux/interrupt.h>
#include <linux/kallsyms.h>
-#include <linux/init.h>
#include <linux/cpu.h>
#include <linux/cpuidle.h>
#include <linux/elfcore.h>
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index 6a8928bba03c..8bde301f926f 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -26,7 +26,6 @@
#include <linux/ptrace.h>
#include <linux/user.h>
#include <linux/security.h>
-#include <linux/init.h>
#include <linux/signal.h>
#include <linux/uaccess.h>
#include <linux/perf_event.h>
diff --git a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c
index 44c22805d2e2..56a82775c612 100644
--- a/arch/arm64/kernel/smp_spin_table.c
+++ b/arch/arm64/kernel/smp_spin_table.c
@@ -17,7 +17,6 @@
*/
#include <linux/delay.h>
-#include <linux/init.h>
#include <linux/of.h>
#include <linux/smp.h>
diff --git a/arch/arm64/kernel/vdso/vdso.S b/arch/arm64/kernel/vdso/vdso.S
index 60c1db54b41a..662e53dbbb60 100644
--- a/arch/arm64/kernel/vdso/vdso.S
+++ b/arch/arm64/kernel/vdso/vdso.S
@@ -16,7 +16,6 @@
* Author: Will Deacon <will.deacon@arm.com>
*/
-#include <linux/init.h>
#include <linux/linkage.h>
#include <linux/const.h>
#include <asm/page.h>
diff --git a/arch/arm64/lib/delay.c b/arch/arm64/lib/delay.c
index dad4ec9bbfd1..11030dab2dc6 100644
--- a/arch/arm64/lib/delay.c
+++ b/arch/arm64/lib/delay.c
@@ -19,7 +19,6 @@
*/
#include <linux/delay.h>
-#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/timex.h>
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index 48a386094fa3..035a5a837287 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -18,7 +18,6 @@
*/
#include <linux/linkage.h>
-#include <linux/init.h>
#include <asm/assembler.h>
#include "proc-macros.S"
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index bed1f1de1caf..18a5f10417fd 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -18,7 +18,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
--
1.8.5.2
^ permalink raw reply related
* [PATCH v5 7/8] ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
From: Florian Fainelli @ 2014-01-23 18:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E074ED.5000906@gmail.com>
Hi Marc,
2014/1/22 Marc C <marc.ceeeee@gmail.com>:
> Hi Florian,
>
>> Do not we also need to update drivers/irqchip/irq-gic.c to look for
>> this compatible property? Alternatively should the example DTS contain
>> the following:
>>
>> compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic"?
>
> Patch #8 [1] of this series has the "compatible" string set exactly that way. I was
> following the pattern seen in the other reference DTS files, where "arm,cortex-a15-gic" is
> used as the fall-back.
Ah, I missed that, thanks! How about the CPU compatible property?
AFAIK it is only used by arch/arm/kernel/topology.c, I am not sure if
we have the exact same number to use as the "vanilla" Cortex-A15 here,
or if we should have another number match against "brcm,brahma-b15".
What do you think?
>
> Thanks,
> Marc C
>
> [1] https://lkml.org/lkml/2014/1/21/649
>
> On 01/22/2014 02:40 PM, Florian Fainelli wrote:
>> Hi Marc,
>>
>> 2014/1/21 Marc Carino <marc.ceeeee@gmail.com>:
>>> Document the Broadcom Brahma B15 GIC implementation as compatible
>>> with the ARM GIC standard.
>>>
>>> Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
>>> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
>>
>> Do not we also need to update drivers/irqchip/irq-gic.c to look for
>> this compatible property? Alternatively should the example DTS contain
>> the following:
>>
>> compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic"?
>>
>>> ---
>>> Documentation/devicetree/bindings/arm/gic.txt | 1 +
>>> 1 files changed, 1 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt
>>> index 3dfb0c0..d7409fd 100644
>>> --- a/Documentation/devicetree/bindings/arm/gic.txt
>>> +++ b/Documentation/devicetree/bindings/arm/gic.txt
>>> @@ -15,6 +15,7 @@ Main node required properties:
>>> "arm,cortex-a9-gic"
>>> "arm,cortex-a7-gic"
>>> "arm,arm11mp-gic"
>>> + "brcm,brahma-b15-gic"
>>> - interrupt-controller : Identifies the node as an interrupt controller
>>> - #interrupt-cells : Specifies the number of cells needed to encode an
>>> interrupt source. The type shall be a <u32> and the value shall be 3.
>>> --
>>> 1.7.1
>>>
>>
>>
>>
>
>
>
--
Florian
^ permalink raw reply
* [PATCH V2 04/10] clk/samsung: add support for multiple clock providers
From: Tomasz Figa @ 2014-01-23 18:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389099548-14649-5-git-send-email-rahul.sharma@samsung.com>
Hi Rahul,
The patch looks mostly fine now, but I still have one inline comment.
On 07.01.2014 13:59, Rahul Sharma wrote:
> Samsung CCF helper functions do not provide support to
> register multiple Clock Providers for a given SoC. Due to
> this limitation SoC platforms are not able to use these
> helpers for registering multiple clock providers and are
> forced to bypass this layer.
>
> This layer is modified accordingly to enable the support.
>
> Clock file for exynos4, exynos5250, exynos5420, exynos5440
[snip]
> /* setup the essentials required to support clock lookup using ccf */
> -void __init samsung_clk_init(struct device_node *np, void __iomem *base,
> - unsigned long nr_clks)
> +struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np,
> + void __iomem *base, unsigned long nr_clks)
> {
> - reg_base = base;
> + struct samsung_clk_provider *ctx;
> + struct clk **clk_table;
> + int ret;
> +
> + ctx = kzalloc(sizeof(struct samsung_clk_provider), GFP_KERNEL);
> + if (!ctx)
> + panic("could not allocate clock provider context.\n");
>
> clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL);
> if (!clk_table)
> panic("could not allocate clock lookup table\n");
>
> + ctx->reg_base = base;
> + ctx->clk_data.clks = clk_table;
> + ctx->clk_data.clk_num = nr_clks;
> + ctx->lock = __SPIN_LOCK_UNLOCKED(lock);
spin_lock_init(&ctx->lock);
Best regards,
Tomasz
^ permalink raw reply
* [PATCH V2 01/10] clk/exynos5410: move suspend/resume handling to SoC driver
From: Tomasz Figa @ 2014-01-23 18:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389099548-14649-2-git-send-email-rahul.sharma@samsung.com>
On 07.01.2014 13:58, Rahul Sharma wrote:
> Suspend/resume handling is already moved for all other Exynos
> SoCs other than Exynos5420 which is addressed in this patch.
>
> Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
> ---
> drivers/clk/samsung/clk-exynos5410.c | 49 ++++++++++++++++++++++++++++++----
> 1 file changed, 44 insertions(+), 5 deletions(-)
Acked-by: Tomasz Figa <t.figa@samsung.com>
Best regards,
Tomasz
^ permalink raw reply
* [PATCH 4/5] ARM: S3C24XX: convert boards to use common restart function
From: Tomasz Figa @ 2014-01-23 18:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2227259.2cNbl9uzOp@phil>
Hi Heiko,
On 06.01.2014 19:40, Heiko St?bner wrote:
> This converts all boards to use the new common restart function instead
> of SoC specific ones.
>
> The mach-s3c2416-dt board now tries to setup either a swrst- or watchdog-
> reset so that it will be able to handle more s3c24xx-SoCs later on.
[snip]
> diff --git a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
> index 0a86953..88716fa4 100644
> --- a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
> +++ b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
> @@ -24,6 +24,7 @@
>
> #include <plat/cpu.h>
> #include <plat/pm.h>
> +#include <plat/watchdog-reset.h>
>
> #include "common.h"
>
> @@ -34,6 +35,14 @@ static void __init s3c2416_dt_map_io(void)
>
> static void __init s3c2416_dt_machine_init(void)
> {
> + s3c24xx_swrst_reset_of_init();
> +
> +#ifdef CONFIG_SAMSUNG_WDT_RESET
> + /* if no special swrst-device exists try to find a watchdog */
> + if (!s3c24xx_swrst_reset_available())
> + samsung_wdt_reset_of_init();
> +#endif
Hmm... I think it would be safe to assume availability of soft reset,
especially if you could move the restart code to the clock driver.
Best regards,
Tomasz
^ permalink raw reply
* [PATCH 1/5] dt-bindings: document the s3c24xx software-reset register
From: Tomasz Figa @ 2014-01-23 18:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2635551.Gy9A9uhyAA@phil>
Hi Heiko,
On 06.01.2014 19:37, Heiko St?bner wrote:
> The S3C2412/S3C2413 as well as the S3C2443 and following contain a special
> register that restarts the system when written to. This adds a simple
> binding, so that it gets accessible on dt systems too.
>
> We distinguish between the two types (s3c2412, s3c2443) because the
> handling of the swrst register on the s3c2412 also needs to take care
> of a hardware glitch at reset time.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> .../devicetree/bindings/arm/samsung/s3c24xx-swrst.txt | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/samsung/s3c24xx-swrst.txt
Is there really a need to have separate bindings for this?
As far as I can see, the swreset register is a part of the clock
controller, so restart function could be provided by clock driver and
there would be no need to change anything in DT.
Best regards,
Tomasz
^ permalink raw reply
* [PATCH 03/20] ARM64 / ACPI: Introduce the skeleton of _PDC related for ARM64
From: Catalin Marinas @ 2014-01-23 18:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389961514-13562-4-git-send-email-hanjun.guo@linaro.org>
On Fri, Jan 17, 2014 at 12:24:57PM +0000, Hanjun Guo wrote:
> --- /dev/null
> +++ b/arch/arm64/include/asm/acpi.h
> @@ -0,0 +1,32 @@
> +/*
> + * Copyright (C) 2013, Al Stone <al.stone@linaro.org>
> + *
> + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> + */
> +
> +#ifndef _ASM_ARM64_ACPI_H
> +#define _ASM_ARM64_ACPI_H
Nitpick: please use __ASM_ACPI_H as a guard for consistency (the same
for all the other patches introducing new header files).
--
Catalin
^ permalink raw reply
* [PATCH 09/20] ARM64 / ACPI: Implement core functions for parsing MADT table
From: Marc Zyngier @ 2014-01-23 17:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389961514-13562-10-git-send-email-hanjun.guo@linaro.org>
Hi Hanjun,
On 17/01/14 12:25, Hanjun Guo wrote:
> Implement core functions for parsing MADT table to get the information
> about GIC cpu interface and GIC distributor to prepare for SMP and GIC
> initialization.
>
> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> ---
> arch/arm64/include/asm/acpi.h | 3 +
> drivers/acpi/plat/arm-core.c | 139 ++++++++++++++++++++++++++++++++++++++++-
> drivers/acpi/tables.c | 21 +++++++
> 3 files changed, 162 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
> index e108d9c..c335c6d 100644
> --- a/arch/arm64/include/asm/acpi.h
> +++ b/arch/arm64/include/asm/acpi.h
> @@ -83,6 +83,9 @@ void arch_fix_phys_package_id(int num, u32 slot);
> extern int (*acpi_suspend_lowlevel)(void);
> #define acpi_wakeup_address (0)
>
> +#define MAX_GIC_CPU_INTERFACE 256
I'll bite. Where on Earth is this value coming from? If that's for
GICv2, 8 is the maximum. For GICv3+, that's incredibly low, and should
be probed probed at runtime anyway.
> +#define MAX_GIC_DISTRIBUTOR 1 /* should be the same as MAX_GIC_NR */
No support for cascaded GICs?
> +
> #else /* !CONFIG_ACPI */
> #define acpi_disabled 1 /* ACPI sometimes enabled on ARM */
> #define acpi_noirq 1 /* ACPI sometimes enabled on ARM */
> diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c
> index 1835b21..8ba3e6f 100644
> --- a/drivers/acpi/plat/arm-core.c
> +++ b/drivers/acpi/plat/arm-core.c
> @@ -46,6 +46,16 @@ EXPORT_SYMBOL(acpi_disabled);
> int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
> EXPORT_SYMBOL(acpi_pci_disabled);
>
> +/*
> + * Local interrupt controller address,
> + * GIC cpu interface base address on ARM/ARM64
> + */
> +static u64 acpi_lapic_addr __initdata;
If that's a GIC address, why not call it as such?
> +#define BAD_MADT_ENTRY(entry, end) ( \
> + (!entry) || (unsigned long)entry + sizeof(*entry) > end || \
> + ((struct acpi_subtable_header *)entry)->length < sizeof(*entry))
> +
> #define PREFIX "ACPI: "
Just do:
#define pr_fmt(fmt) "ACPI: " fmt
and remove all the occurrences of PREFIX.
> /* FIXME: this function should be moved to topology.c when it is ready */
> @@ -92,6 +102,115 @@ void __init __acpi_unmap_table(char *map, unsigned long size)
> return;
> }
>
> +static int __init acpi_parse_madt(struct acpi_table_header *table)
> +{
> + struct acpi_table_madt *madt = NULL;
No need to initialize this to NULL, you're doing an assignment at the
next line...
> +
> + madt = (struct acpi_table_madt *)table;
> + if (!madt) {
> + pr_warn(PREFIX "Unable to map MADT\n");
There is no mapping here, please fix the message accordingly.
> + return -ENODEV;
> + }
> +
> + if (madt->address) {
> + acpi_lapic_addr = (u64) madt->address;
So you're updating this static variable, for the distributor and each
CPU interface? /me puzzled...
> + pr_info(PREFIX "Local APIC address 0x%08x\n", madt->address);
Away with this APIC madness. GICC and GICD are the concepts we're all
familiar with here, and using the proper terminology would certainly
help reviewing these patches...
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * GIC structures on ARM are somthing like Local APIC structures on x86,
> + * which means GIC cpu interfaces for GICv2/v3. Every GIC structure in
> + * MADT table represents a cpu in the system.
And what do you do when your GICv3 doesn't have a memory-mapped
interface, but only uses system registers?
> + * GIC distributor structures are somthing like IOAPIC on x86. GIC can
> + * be initialized with information in this structure.
> + *
> + * Please refer to chapter5.2.12.14/15 of ACPI 5.0
A pointer to that documentation?
> + */
> +
> +static int __init
> +acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end)
> +{
> + struct acpi_madt_generic_interrupt *processor = NULL;
> +
> + processor = (struct acpi_madt_generic_interrupt *)header;
> +
> + if (BAD_MADT_ENTRY(processor, end))
> + return -EINVAL;
> +
> + acpi_table_print_madt_entry(header);
> +
> + return 0;
> +}
> +
> +static int __init
> +acpi_parse_gic_distributor(struct acpi_subtable_header *header,
> + const unsigned long end)
> +{
> + struct acpi_madt_generic_distributor *distributor = NULL;
> +
> + distributor = (struct acpi_madt_generic_distributor *)header;
> +
> + if (BAD_MADT_ENTRY(distributor, end))
> + return -EINVAL;
> +
> + acpi_table_print_madt_entry(header);
> +
> + return 0;
> +}
> +
> +/*
> + * Parse GIC cpu interface related entries in MADT
> + * returns 0 on success, < 0 on error
> + */
> +static int __init acpi_parse_madt_gic_entries(void)
> +{
> + int count;
> +
> + /*
> + * do a partial walk of MADT to determine how many CPUs
> + * we have including disabled CPUs
> + */
> + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
> + acpi_parse_gic, MAX_GIC_CPU_INTERFACE);
> +
> + if (!count) {
> + pr_err(PREFIX "No GIC entries present\n");
> + return -ENODEV;
> + } else if (count < 0) {
> + pr_err(PREFIX "Error parsing GIC entry\n");
> + return count;
> + }
So you do a lot of parsing to count stuff, and then discard the number
of counted objects... You might as well check that there is at least one
valid object and stop there.
> + return 0;
> +}
> +
> +/*
> + * Parse GIC distributor related entries in MADT
> + * returns 0 on success, < 0 on error
> + */
> +static int __init acpi_parse_madt_gic_distributor_entries(void)
> +{
> + int count;
> +
> + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR,
> + acpi_parse_gic_distributor, MAX_GIC_DISTRIBUTOR);
> +
> + if (!count) {
> + pr_err(PREFIX "No GIC distributor entries present\n");
> + return -ENODEV;
> + } else if (count < 0) {
> + pr_err(PREFIX "Error parsing GIC distributor entry\n");
> + return count;
> + }
> +
> + return 0;
> +}
> +
> int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
> {
> *irq = gsi_to_irq(gsi);
> @@ -141,11 +260,29 @@ static int __init acpi_parse_fadt(struct acpi_table_header *table)
>
> static void __init early_acpi_process_madt(void)
> {
> - return;
> + acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt);
> }
>
> static void __init acpi_process_madt(void)
> {
> + int error;
> +
> + if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
How many times are you going to parse the same table? Surely you can
stash whatever information you need and be done with it?
> + /*
> + * Parse MADT GIC cpu interface entries
> + */
> + error = acpi_parse_madt_gic_entries();
> + if (!error) {
> + /*
> + * Parse MADT GIC distributor entries
> + */
> + acpi_parse_madt_gic_distributor_entries();
> + }
> + }
> +
> + pr_info("Using ACPI for processor (GIC) configuration information\n");
> +
> return;
> }
>
> diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c
> index d67a1fe..b3e4615 100644
> --- a/drivers/acpi/tables.c
> +++ b/drivers/acpi/tables.c
> @@ -191,6 +191,27 @@ void acpi_table_print_madt_entry(struct acpi_subtable_header *header)
> }
> break;
>
> + case ACPI_MADT_TYPE_GENERIC_INTERRUPT:
> + {
> + struct acpi_madt_generic_interrupt *p =
> + (struct acpi_madt_generic_interrupt *)header;
> + printk(KERN_INFO PREFIX
Use pr_info
> + "GIC (acpi_id[0x%04x] gic_id[0x%04x] %s)\n",
> + p->uid, p->gic_id,
> + (p->flags & ACPI_MADT_ENABLED) ? "enabled" : "disabled");
> + }
> + break;
> +
> + case ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR:
> + {
> + struct acpi_madt_generic_distributor *p =
> + (struct acpi_madt_generic_distributor *)header;
> + printk(KERN_INFO PREFIX
> + "GIC Distributor (id[0x%04x] address[0x%08llx] gsi_base[%d])\n",
> + p->gic_id, p->base_address, p->global_irq_base);
> + }
> + break;
> +
> default:
> printk(KERN_WARNING PREFIX
> "Found unsupported MADT entry (type = 0x%x)\n",
>
Most of that code seems to be repeatedly parsing and printing stuff, and
I fail to see what it actually does.
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply
* [PATCH] ARM: OMAP4+: move errata initialization to omap4_pm_init_early
From: Kevin Hilman @ 2014-01-23 17:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <52E139C5.3090207@ti.com>
Grygorii Strashko <grygorii.strashko@ti.com> writes:
> On 01/20/2014 10:06 PM, Nishanth Menon wrote:
>> Move all OMAP4 PM errata initializations to centralized location in
>> omap4_pm_init_early. This allows for users to utilize the erratas
>> in various submodules as needed.
>>
> Tested-by: Grygorii Strashko <grygorii.strashko@ti.com>
>
> This patch fixes build failure caused by patch
> https://patchwork.kernel.org/patch/3084521/
> in case if SMP is not enabled.
So does that mean that that patch can now be applied as is?
We could sure use that fix (or equivalent) for CPUidle breakage on 4460.
Kevin
^ permalink raw reply
* [PATCH v2] dma: Add Xilinx AXI Video Direct Memory Access Engine driver support
From: Srikanth Thokala @ 2014-01-23 17:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1390483954.7619.79.camel@smile>
Hi Andy,
On Thu, Jan 23, 2014 at 7:02 PM, Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
> On Wed, 2014-01-22 at 22:22 +0530, Srikanth Thokala wrote:
>> This is the driver for the AXI Video Direct Memory Access (AXI
>> VDMA) core, which is a soft Xilinx IP core that provides high-
>> bandwidth direct memory access between memory and AXI4-Stream
>> type video target peripherals. The core provides efficient two
>> dimensional DMA operations with independent asynchronous read
>> and write channel operation.
>>
>> This module works on Zynq (ARM Based SoC) and Microblaze platforms.
>
> Few comments below.
Ok,
>
>>
>> Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
>> ---
>> NOTE:
>> 1. Created a separate directory 'dma/xilinx' as Xilinx has two more
>> DMA IPs and we are also planning to upstream these drivers soon.
>> 2. Rebased on v3.13.0-rc8
>>
>> Changes in v2:
>> - Removed DMA Test client module from the patchset as suggested
>> by Andy Shevchenko
>> - Removed device-id DT property, as suggested by Arnd Bergmann
>> - Properly documented DT bindings as suggested by Arnd Bergmann
>> - Returning with error, if registration of DMA to node fails
>> - Fixed typo errors
>> - Used BIT() macro at applicable places
>> - Added missing header file to the patchset
>> - Changed copyright year to include 2014
>> ---
>> .../devicetree/bindings/dma/xilinx/xilinx_vdma.txt | 75 +
>> drivers/dma/Kconfig | 14 +
>> drivers/dma/Makefile | 1 +
>> drivers/dma/xilinx/Makefile | 1 +
>> drivers/dma/xilinx/xilinx_vdma.c | 1486 ++++++++++++++++++++
>> include/linux/amba/xilinx_dma.h | 50 +
>> 6 files changed, 1627 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
>> create mode 100644 drivers/dma/xilinx/Makefile
>> create mode 100644 drivers/dma/xilinx/xilinx_vdma.c
>> create mode 100644 include/linux/amba/xilinx_dma.h
>>
>> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
>> new file mode 100644
>> index 0000000..ab8be1a
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
>> @@ -0,0 +1,75 @@
>> +Xilinx AXI VDMA engine, it does transfers between memory and video devices.
>> +It can be configured to have one channel or two channels. If configured
>> +as two channels, one is to transmit to the video device and another is
>> +to receive from the video device.
>> +
>> +Required properties:
>> +- compatible: Should be "xlnx,axi-vdma-1.00.a"
>> +- #dma-cells: Should be <1>, see "dmas" property below
>> +- reg: Should contain VDMA registers location and length.
>> +- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
>> +- dma-channel child node: Should have atleast one channel and can have upto
>> + two channels per device. This node specifies the properties of each
>> + DMA channel (see child node properties below).
>> +
>> +Optional properties:
>> +- xlnx,include-sg: Tells whether configured for Scatter-mode in
>> + the hardware.
>> +- xlnx,flush-fsync: Tells whether which channel to Flush on Frame sync.
>> + It takes following values:
>> + {1}, flush both channels
>> + {2}, flush mm2s channel
>> + {3}, flush s2mm channel
>> +
>> +Required child node properties:
>> +- compatible: It should be either "xlnx,axi-vdma-mm2s-channel" or
>> + "xlnx,axi-vdma-s2mm-channel".
>> +- interrupts: Should contain per channel VDMA interrupts.
>> +- xlnx,data-width: Should contain the stream data width, take values
>> + {32,64...1024}.
>> +
>> +Option child node properties:
>> +- xlnx,include-dre: Tells whether hardware is configured for Data
>> + Realignment Engine.
>> +- xlnx,genlock-mode: Tells whether Genlock synchronization is
>> + enabled/disabled in hardware.
>> +
>> +Example:
>> +++++++++
>> +
>> +axi_vdma_0: axivdma at 40030000 {
>> + compatible = "xlnx,axi-vdma-1.00.a";
>> + #dma_cells = <1>;
>> + reg = < 0x40030000 0x10000 >;
>> + xlnx,num-fstores = <0x8>;
>> + xlnx,flush-fsync = <0x1>;
>> + dma-channel at 40030000 {
>> + compatible = "xlnx,axi-vdma-mm2s-channel";
>> + interrupts = < 0 54 4 >;
>> + xlnx,datawidth = <0x40>;
>> + } ;
>> + dma-channel at 40030030 {
>> + compatible = "xlnx,axi-vdma-s2mm-channel";
>> + interrupts = < 0 53 4 >;
>> + xlnx,datawidth = <0x40>;
>> + } ;
>> +} ;
>> +
>> +
>> +* DMA client
>> +
>> +Required properties:
>> +- dmas: a list of <[Video DMA device phandle] [Channel ID]> pairs,
>> + where Channel ID is '0' for write/tx and '1' for read/rx
>> + channel.
>> +- dma-names: a list of DMA channel names, one per "dmas" entry
>> +
>> +Example:
>> +++++++++
>> +
>> +vdmatest_0: vdmatest at 0 {
>> + compatible ="xlnx,axi-vdma-test-1.00.a";
>> + dmas = <&axi_vdma_0 0
>> + &axi_vdma_0 1>;
>> + dma-names = "vdma0", "vdma1";
>> +} ;
>> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
>> index c823daa..2a74651 100644
>> --- a/drivers/dma/Kconfig
>> +++ b/drivers/dma/Kconfig
>> @@ -334,6 +334,20 @@ config K3_DMA
>> Support the DMA engine for Hisilicon K3 platform
>> devices.
>>
>> +config XILINX_VDMA
>> + tristate "Xilinx AXI VDMA Engine"
>> + depends on (ARCH_ZYNQ || MICROBLAZE)
>> + select DMA_ENGINE
>> + help
>> + Enable support for Xilinx AXI VDMA Soft IP.
>> +
>> + This engine provides high-bandwidth direct memory access
>> + between memory and AXI4-Stream video type target
>> + peripherals including peripherals which support AXI4-
>> + Stream Video Protocol. It has two stream interfaces/
>> + channels, Memory Mapped to Stream (MM2S) and Stream to
>> + Memory Mapped (S2MM) for the data transfers.
>> +
>> config DMA_ENGINE
>> bool
>>
>> diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
>> index 0ce2da9..d84130b 100644
>> --- a/drivers/dma/Makefile
>> +++ b/drivers/dma/Makefile
>> @@ -42,3 +42,4 @@ obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o
>> obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o
>> obj-$(CONFIG_TI_CPPI41) += cppi41.o
>> obj-$(CONFIG_K3_DMA) += k3dma.o
>> +obj-y += xilinx/
>> diff --git a/drivers/dma/xilinx/Makefile b/drivers/dma/xilinx/Makefile
>> new file mode 100644
>> index 0000000..3c4e9f2
>> --- /dev/null
>> +++ b/drivers/dma/xilinx/Makefile
>> @@ -0,0 +1 @@
>> +obj-$(CONFIG_XILINX_VDMA) += xilinx_vdma.o
>> diff --git a/drivers/dma/xilinx/xilinx_vdma.c b/drivers/dma/xilinx/xilinx_vdma.c
>> new file mode 100644
>> index 0000000..4c0d04c
>> --- /dev/null
>> +++ b/drivers/dma/xilinx/xilinx_vdma.c
>> @@ -0,0 +1,1486 @@
>> +/*
>> + * DMA driver for Xilinx Video DMA Engine
>> + *
>> + * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
>> + *
>> + * Based on the Freescale DMA driver.
>> + *
>> + * Description:
>> + * The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP
>> + * core that provides high-bandwidth direct memory access between memory
>> + * and AXI4-Stream type video target peripherals. The core provides efficient
>> + * two dimensional DMA operations with independent asynchronous read (S2MM)
>> + * and write (MM2S) channel operation. It can be configured to have either
>> + * one channel or two channels. If configured as two channels, one is to
>> + * transmit to the video device (MM2S) and another is to receive from the
>> + * video device (S2MM). Initialization, status, interrupt and management
>> + * registers are accessed through an AXI4-Lite slave interface.
>> + *
>> + * This program is free software: you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation, either version 2 of the License, or
>> + * (at your option) any later version.
>> + */
>> +
>> +#include <linux/amba/xilinx_dma.h>
>> +#include <linux/bitops.h>
>> +#include <linux/dmapool.h>
>> +#include <linux/init.h>
>> +#include <linux/interrupt.h>
>> +#include <linux/io.h>
>> +#include <linux/module.h>
>> +#include <linux/of_address.h>
>> +#include <linux/of_dma.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/slab.h>
>> +
>> +/* Register/Descriptor Offsets */
>> +#define XILINX_VDMA_MM2S_CTRL_OFFSET 0x0000
>> +#define XILINX_VDMA_S2MM_CTRL_OFFSET 0x0030
>> +#define XILINX_VDMA_MM2S_DESC_OFFSET 0x0050
>> +#define XILINX_VDMA_S2MM_DESC_OFFSET 0x00a0
>> +
>> +/* Control Registers */
>> +#define XILINX_VDMA_REG_DMACR 0x0000
>> +#define XILINX_VDMA_DMACR_DELAY_MAX 0xff
>> +#define XILINX_VDMA_DMACR_DELAY_SHIFT 24
>> +#define XILINX_VDMA_DMACR_FRAME_COUNT_MAX 0xff
>> +#define XILINX_VDMA_DMACR_FRAME_COUNT_SHIFT 16
>> +#define XILINX_VDMA_DMACR_ERR_IRQ BIT(14)
>> +#define XILINX_VDMA_DMACR_DLY_CNT_IRQ BIT(13)
>> +#define XILINX_VDMA_DMACR_FRM_CNT_IRQ BIT(12)
>> +#define XILINX_VDMA_DMACR_MASTER_SHIFT 8
>> +#define XILINX_VDMA_DMACR_FSYNCSRC_SHIFT 5
>> +#define XILINX_VDMA_DMACR_FRAMECNT_EN BIT(4)
>> +#define XILINX_VDMA_DMACR_GENLOCK_EN BIT(3)
>> +#define XILINX_VDMA_DMACR_RESET BIT(2)
>> +#define XILINX_VDMA_DMACR_CIRC_EN BIT(1)
>> +#define XILINX_VDMA_DMACR_RUNSTOP BIT(0)
>> +#define XILINX_VDMA_DMACR_DELAY_MASK \
>> + (XILINX_VDMA_DMACR_DELAY_MAX << \
>> + XILINX_VDMA_DMACR_DELAY_SHIFT)
>> +#define XILINX_VDMA_DMACR_FRAME_COUNT_MASK \
>> + (XILINX_VDMA_DMACR_FRAME_COUNT_MAX << \
>> + XILINX_VDMA_DMACR_FRAME_COUNT_SHIFT)
>> +#define XILINX_VDMA_DMACR_MASTER_MASK \
>> + (0xf << XILINX_VDMA_DMACR_MASTER_SHIFT)
>> +#define XILINX_VDMA_DMACR_FSYNCSRC_MASK \
>> + (3 << XILINX_VDMA_DMACR_FSYNCSRC_SHIFT)
>> +
>> +#define XILINX_VDMA_REG_DMASR 0x0004
>> +#define XILINX_VDMA_DMASR_DELAY_SHIFT 24
>> +#define XILINX_VDMA_DMASR_FRAME_COUNT_SHIFT 16
>> +#define XILINX_VDMA_DMASR_EOL_LATE_ERR BIT(15)
>> +#define XILINX_VDMA_DMASR_ERR_IRQ BIT(14)
>> +#define XILINX_VDMA_DMASR_DLY_CNT_IRQ BIT(13)
>> +#define XILINX_VDMA_DMASR_FRM_CNT_IRQ BIT(12)
>> +#define XILINX_VDMA_DMASR_SOF_LATE_ERR BIT(11)
>> +#define XILINX_VDMA_DMASR_SG_DEC_ERR BIT(10)
>> +#define XILINX_VDMA_DMASR_SG_SLV_ERR BIT(9)
>> +#define XILINX_VDMA_DMASR_EOF_EARLY_ERR BIT(8)
>> +#define XILINX_VDMA_DMASR_SOF_EARLY_ERR BIT(7)
>> +#define XILINX_VDMA_DMASR_DMA_DEC_ERR BIT(6)
>> +#define XILINX_VDMA_DMASR_DMA_SLAVE_ERR BIT(5)
>> +#define XILINX_VDMA_DMASR_DMA_INT_ERR BIT(4)
>> +#define XILINX_VDMA_DMASR_IDLE BIT(1)
>> +#define XILINX_VDMA_DMASR_HALTED BIT(0)
>> +
>> +#define XILINX_VDMA_DMASR_DELAY_MASK \
>> + (0xff << XILINX_VDMA_DMASR_DELAY_SHIFT)
>> +#define XILINX_VDMA_DMASR_FRAME_COUNT_MASK \
>> + (0xff << XILINX_VDMA_DMASR_FRAME_COUNT_SHIFT)
>
> Does 0xff require to be a separate definition in both above cases?
Ok, will reuse DELAY/FRAME_MAX masks.
>
>> +
>> +#define XILINX_VDMA_REG_CURDESC 0x0008
>> +#define XILINX_VDMA_REG_TAILDESC 0x0010
>> +#define XILINX_VDMA_REG_REG_INDEX 0x0014
>> +#define XILINX_VDMA_REG_FRMSTORE 0x0018
>> +#define XILINX_VDMA_REG_THRESHOLD 0x001c
>> +#define XILINX_VDMA_REG_FRMPTR_STS 0x0024
>> +#define XILINX_VDMA_REG_PARK_PTR 0x0028
>> +#define XILINX_VDMA_PARK_PTR_WR_REF_SHIFT 8
>> +#define XILINX_VDMA_PARK_PTR_RD_REF_SHIFT 0
>> +#define XILINX_VDMA_REG_VDMA_VERSION 0x002c
>> +
>> +/* Register Direct Mode Registers */
>> +#define XILINX_VDMA_REG_VSIZE 0x0000
>> +#define XILINX_VDMA_REG_HSIZE 0x0004
>> +
>> +#define XILINX_VDMA_REG_FRMDLY_STRIDE 0x0008
>> +#define XILINX_VDMA_FRMDLY_STRIDE_FRMDLY_SHIFT 24
>> +#define XILINX_VDMA_FRMDLY_STRIDE_STRIDE_SHIFT 0
>> +#define XILINX_VDMA_FRMDLY_STRIDE_FRMDLY_MASK \
>> + (0x1f << \
>> + XILINX_VDMA_FRMDLY_STRIDE_FRMDLY_SHIFT)
>> +#define XILINX_VDMA_FRMDLY_STRIDE_STRIDE_MASK \
>> + (0xffff << \
>> + XILINX_VDMA_FRMDLY_STRIDE_STRIDE_MASK)
>> +
>> +#define XILINX_VDMA_REG_START_ADDRESS(n) (0x000c + 4 * (n))
>> +
>> +/* Hw specific definitions */
>
> HW or Hardware
Ok.
>
>> +#define XILINX_VDMA_MAX_CHANS_PER_DEVICE 0x2
>> +
>> +#define XILINX_VDMA_DMAXR_ALL_IRQ_MASK (XILINX_VDMA_DMASR_FRM_CNT_IRQ | \
>> + XILINX_VDMA_DMASR_DLY_CNT_IRQ | \
>> + XILINX_VDMA_DMASR_ERR_IRQ)
>> +
>> +#define XILINX_VDMA_DMASR_ALL_ERR_MASK (XILINX_VDMA_DMASR_EOL_LATE_ERR | \
>> + XILINX_VDMA_DMASR_SOF_LATE_ERR | \
>> + XILINX_VDMA_DMASR_SG_DEC_ERR | \
>> + XILINX_VDMA_DMASR_SG_SLV_ERR | \
>> + XILINX_VDMA_DMASR_EOF_EARLY_ERR | \
>> + XILINX_VDMA_DMASR_SOF_EARLY_ERR | \
>> + XILINX_VDMA_DMASR_DMA_DEC_ERR | \
>> + XILINX_VDMA_DMASR_DMA_SLAVE_ERR | \
>> + XILINX_VDMA_DMASR_DMA_INT_ERR)
>> +
>> +/*
>> + * Recoverable errors are DMA Internal error, SOF Early, EOF Early and SOF Late.
>> + * They are only recoverable when C_FLUSH_ON_FSYNC is enabled in the h/w system.
>> + */
>> +#define XILINX_VDMA_DMASR_ERR_RECOVER_MASK \
>> + (XILINX_VDMA_DMASR_SOF_LATE_ERR | \
>
> Do you need so many tabs for an indentation here and in other places?
> May be better to keep some style here (I mean on which line you start
> the value of the definition).
Ok.
>
>> + XILINX_VDMA_DMASR_EOF_EARLY_ERR | \
>> + XILINX_VDMA_DMASR_SOF_EARLY_ERR | \
>> + XILINX_VDMA_DMASR_DMA_INT_ERR)
>> +
>> +/* Axi VDMA Flush on Fsync bits */
>> +#define XILINX_VDMA_FLUSH_S2MM 3
>> +#define XILINX_VDMA_FLUSH_MM2S 2
>> +#define XILINX_VDMA_FLUSH_BOTH 1
>> +
>> +/* Delay loop counter to prevent hardware failure */
>> +#define XILINX_VDMA_LOOP_COUNT 1000000
>> +
>> +/**
>> + * struct xilinx_vdma_desc_hw - Hardware Descriptor
>> + * @next_desc: Next Descriptor Pointer @0x00
>> + * @pad1: Reserved @0x04
>> + * @buf_addr: Buffer address @0x08
>> + * @pad2: Reserved @0x0C
>> + * @vsize: Vertical Size @0x10
>> + * @hsize: Horizontal Size @0x14
>> + * @stride: Number of bytes between the first
>> + * pixels of each horizontal line @0x18
>> + */
>> +struct xilinx_vdma_desc_hw {
>> + u32 next_desc;
>> + u32 pad1;
>> + u32 buf_addr;
>> + u32 pad2;
>> + u32 vsize;
>> + u32 hsize;
>> + u32 stride;
>> +} __aligned(64);
>> +
>> +/**
>> + * struct xilinx_vdma_tx_segment - Descriptor segment
>> + * @hw: Hardware descriptor
>> + * @node: Node in the descriptor segments list
>> + * @cookie: Segment cookie
>> + * @phys: Physical address of segment
>> + */
>> +struct xilinx_vdma_tx_segment {
>> + struct xilinx_vdma_desc_hw hw;
>> + struct list_head node;
>> + dma_cookie_t cookie;
>> + dma_addr_t phys;
>> +} __aligned(64);
>> +
>> +/**
>> + * struct xilinx_vdma_tx_descriptor - Per Transaction structure
>> + * @async_tx: Async transaction descriptor
>> + * @segments: TX segments list
>> + * @node: Node in the channel descriptors list
>> + */
>> +struct xilinx_vdma_tx_descriptor {
>> + struct dma_async_tx_descriptor async_tx;
>> + struct list_head segments;
>> + struct list_head node;
>> +};
>> +
>> +#define to_vdma_tx_descriptor(tx) \
>> + container_of(tx, struct xilinx_vdma_tx_descriptor, async_tx)
>> +
>> +/**
>> + * struct xilinx_vdma_chan - Driver specific VDMA channel structure
>> + * @xdev: Driver specific device structure
>> + * @ctrl_offset: Control registers offset
>> + * @desc_offset: TX descriptor registers offset
>> + * @completed_cookie: Maximum cookie completed
>> + * @cookie: The current cookie
>> + * @lock: Descriptor operation lock
>> + * @pending_list: Descriptors waiting
>> + * @active_desc: Active descriptor
>> + * @done_list: Complete descriptors
>> + * @common: DMA common channel
>> + * @desc_pool: Descriptors pool
>> + * @dev: The dma device
>> + * @irq: Channel IRQ
>> + * @id: Channel ID
>> + * @direction: Transfer direction
>> + * @num_frms: Number of frames
>> + * @has_sg: Support scatter transfers
>> + * @genlock: Support genlock mode
>> + * @err: Channel has errors
>> + * @tasklet: Cleanup work after irq
>> + * @config: Device configuration info
>> + * @flush_on_fsync: Flush on Frame sync
>> + */
>> +struct xilinx_vdma_chan {
>> + struct xilinx_vdma_device *xdev;
>> + u32 ctrl_offset;
>> + u32 desc_offset;
>> + dma_cookie_t completed_cookie;
>> + dma_cookie_t cookie;
>> + spinlock_t lock;
>> + struct list_head pending_list;
>> + struct xilinx_vdma_tx_descriptor *active_desc;
>> + struct list_head done_list;
>> + struct dma_chan common;
>> + struct dma_pool *desc_pool;
>> + struct device *dev;
>> + int irq;
>> + int id;
>> + enum dma_transfer_direction direction;
>> + int num_frms;
>> + bool has_sg;
>> + bool genlock;
>> + bool err;
>> + struct tasklet_struct tasklet;
>> + struct xilinx_vdma_config config;
>> + bool flush_on_fsync;
>> +};
>> +
>> +/**
>> + * struct xilinx_vdma_device - VDMA device structure
>> + * @regs: I/O mapped base address
>> + * @dev: Device Structure
>> + * @common: DMA device structure
>> + * @chan: Driver specific VDMA channel
>> + * @has_sg: Specifies whether Scatter-Gather is present or not
>> + * @flush_on_fsync: Flush on frame sync
>> + */
>> +struct xilinx_vdma_device {
>> + void __iomem *regs;
>> + struct device *dev;
>> + struct dma_device common;
>> + struct xilinx_vdma_chan *chan[XILINX_VDMA_MAX_CHANS_PER_DEVICE];
>> + bool has_sg;
>> + u32 flush_on_fsync;
>> +};
>> +
>> +#define to_xilinx_chan(chan) \
>> + container_of(chan, struct xilinx_vdma_chan, common)
>> +
>> +/* IO accessors */
>> +static inline u32 vdma_read(struct xilinx_vdma_chan *chan, u32 reg)
>> +{
>> + return ioread32(chan->xdev->regs + reg);
>> +}
>> +
>> +static inline void vdma_write(struct xilinx_vdma_chan *chan, u32 reg, u32 value)
>> +{
>> + iowrite32(value, chan->xdev->regs + reg);
>> +}
>> +
>> +static inline void vdma_desc_write(struct xilinx_vdma_chan *chan, u32 reg,
>> + u32 value)
>> +{
>> + vdma_write(chan, chan->desc_offset + reg, value);
>> +}
>> +
>> +static inline u32 vdma_ctrl_read(struct xilinx_vdma_chan *chan, u32 reg)
>> +{
>> + return vdma_read(chan, chan->ctrl_offset + reg);
>> +}
>> +
>> +static inline void vdma_ctrl_write(struct xilinx_vdma_chan *chan, u32 reg,
>> + u32 value)
>> +{
>> + vdma_write(chan, chan->ctrl_offset + reg, value);
>> +}
>> +
>> +static inline void vdma_ctrl_clr(struct xilinx_vdma_chan *chan, u32 reg,
>> + u32 clr)
>> +{
>> + vdma_ctrl_write(chan, reg, vdma_ctrl_read(chan, reg) & ~clr);
>> +}
>> +
>> +static inline void vdma_ctrl_set(struct xilinx_vdma_chan *chan, u32 reg,
>> + u32 set)
>> +{
>> + vdma_ctrl_write(chan, reg, vdma_ctrl_read(chan, reg) | set);
>> +}
>> +
>> +/* -----------------------------------------------------------------------------
>> + * Descriptors and segments alloc and free
>> + */
>> +
>> +/**
>> + * xilinx_vdma_alloc_tx_segment - Allocate transaction segment
>> + * @chan: Driver specific VDMA channel
>> + *
>> + * Return: The allocated segment on success and NULL on failure.
>> + */
>> +static struct xilinx_vdma_tx_segment *
>> +xilinx_vdma_alloc_tx_segment(struct xilinx_vdma_chan *chan)
>> +{
>> + struct xilinx_vdma_tx_segment *segment;
>> + dma_addr_t phys;
>> +
>> + segment = dma_pool_alloc(chan->desc_pool, GFP_ATOMIC, &phys);
>> + if (!segment)
>> + return NULL;
>> +
>> + memset(segment, 0, sizeof(*segment));
>> + segment->phys = phys;
>> +
>> + return segment;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_free_tx_segment - Free transaction segment
>> + * @chan: Driver specific VDMA channel
>> + * @segment: VDMA transaction segment
>> + */
>> +static void xilinx_vdma_free_tx_segment(struct xilinx_vdma_chan *chan,
>> + struct xilinx_vdma_tx_segment *segment)
>> +{
>> + dma_pool_free(chan->desc_pool, segment, segment->phys);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_tx_descriptor - Allocate transaction descriptor
>> + * @chan: Driver specific VDMA channel
>> + *
>> + * Return: The allocated descriptor on success and NULL on failure.
>> + */
>> +static struct xilinx_vdma_tx_descriptor *
>> +xilinx_vdma_alloc_tx_descriptor(struct xilinx_vdma_chan *chan)
>> +{
>> + struct xilinx_vdma_tx_descriptor *desc;
>> +
>> + desc = kzalloc(sizeof(*desc), GFP_KERNEL);
>> + if (!desc)
>> + return NULL;
>> +
>> + INIT_LIST_HEAD(&desc->segments);
>> +
>> + return desc;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_free_tx_descriptor - Free transaction descriptor
>> + * @chan: Driver specific VDMA channel
>> + * @desc: VDMA transaction descriptor
>> + */
>> +static void
>> +xilinx_vdma_free_tx_descriptor(struct xilinx_vdma_chan *chan,
>> + struct xilinx_vdma_tx_descriptor *desc)
>> +{
>> + struct xilinx_vdma_tx_segment *segment, *next;
>> +
>> + if (!desc)
>> + return;
>> +
>> + list_for_each_entry_safe(segment, next, &desc->segments, node) {
>> + list_del(&segment->node);
>> + xilinx_vdma_free_tx_segment(chan, segment);
>> + }
>> +
>> + kfree(desc);
>> +}
>> +
>> +/* Required functions */
>> +
>> +/**
>> + * xilinx_vdma_free_descriptors - Free descriptors list
>> + * @chan: Driver specific VDMA channel
>> + * @list: List to parse and delete the descriptor
>> + */
>> +static void xilinx_vdma_free_desc_list(struct xilinx_vdma_chan *chan,
>> + struct list_head *list)
>> +{
>> + struct xilinx_vdma_tx_descriptor *desc, *next;
>> +
>> + list_for_each_entry_safe(desc, next, list, node) {
>> + list_del(&desc->node);
>> + xilinx_vdma_free_tx_descriptor(chan, desc);
>> + }
>> +}
>> +
>> +/**
>> + * xilinx_vdma_free_descriptors - Free channel descriptors
>> + * @chan: Driver specific VDMA channel
>> + */
>> +static void xilinx_vdma_free_descriptors(struct xilinx_vdma_chan *chan)
>> +{
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&chan->lock, flags);
>> +
>> + xilinx_vdma_free_desc_list(chan, &chan->pending_list);
>> + xilinx_vdma_free_desc_list(chan, &chan->done_list);
>> +
>> + xilinx_vdma_free_tx_descriptor(chan, chan->active_desc);
>> + chan->active_desc = NULL;
>> +
>> + spin_unlock_irqrestore(&chan->lock, flags);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_free_chan_resources - Free channel resources
>> + * @dchan: DMA channel
>> + */
>> +static void xilinx_vdma_free_chan_resources(struct dma_chan *dchan)
>> +{
>> + struct xilinx_vdma_chan *chan = to_xilinx_chan(dchan);
>> +
>> + dev_dbg(chan->dev, "Free all channel resources.\n");
>> +
>> + tasklet_kill(&chan->tasklet);
>> + xilinx_vdma_free_descriptors(chan);
>> + dma_pool_destroy(chan->desc_pool);
>> + chan->desc_pool = NULL;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_chan_desc_cleanup - Clean channel descriptors
>> + * @chan: Driver specific VDMA channel
>> + */
>> +static void xilinx_vdma_chan_desc_cleanup(struct xilinx_vdma_chan *chan)
>> +{
>> + struct xilinx_vdma_tx_descriptor *desc, *next;
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&chan->lock, flags);
>> +
>> + list_for_each_entry_safe(desc, next, &chan->done_list, node) {
>> + dma_async_tx_callback callback;
>> + void *callback_param;
>> +
>> + /* Remove from the list of running transactions */
>> + list_del(&desc->node);
>> +
>> + /* Run the link descriptor callback function */
>> + callback = desc->async_tx.callback;
>> + callback_param = desc->async_tx.callback_param;
>> + if (callback) {
>> + spin_unlock_irqrestore(&chan->lock, flags);
>> + callback(callback_param);
>> + spin_lock_irqsave(&chan->lock, flags);
>> + }
>> +
>> + /* Run any dependencies, then free the descriptor */
>> + dma_run_dependencies(&desc->async_tx);
>> + xilinx_vdma_free_tx_descriptor(chan, desc);
>> + }
>> +
>> + spin_unlock_irqrestore(&chan->lock, flags);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_do_tasklet - Schedule completion tasklet
>> + * @data: Pointer to the Xilinx VDMA channel structure
>> + */
>> +static void xilinx_vdma_do_tasklet(unsigned long data)
>> +{
>> + struct xilinx_vdma_chan *chan = (struct xilinx_vdma_chan *)data;
>> +
>> + xilinx_vdma_chan_desc_cleanup(chan);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_alloc_chan_resources - Allocate channel resources
>> + * @dchan: DMA channel
>> + *
>> + * Return: '1' on success and failure value on error
>
> May be return 0 on success as it usual practice? Here and in the other
> places as well.
Ok.
>
>> + */
>> +static int xilinx_vdma_alloc_chan_resources(struct dma_chan *dchan)
>> +{
>> + struct xilinx_vdma_chan *chan = to_xilinx_chan(dchan);
>> +
>> + /* Has this channel already been allocated? */
>> + if (chan->desc_pool)
>> + return 1;
>> +
>> + /*
>> + * We need the descriptor to be aligned to 64bytes
>> + * for meeting Xilinx VDMA specification requirement.
>> + */
>> + chan->desc_pool = dma_pool_create("xilinx_vdma_desc_pool",
>> + chan->dev,
>> + sizeof(struct xilinx_vdma_tx_segment),
>> + __alignof__(struct xilinx_vdma_tx_segment), 0);
>> + if (!chan->desc_pool) {
>> + dev_err(chan->dev,
>> + "unable to allocate channel %d descriptor pool\n",
>> + chan->id);
>> + return -ENOMEM;
>> + }
>> +
>> + tasklet_init(&chan->tasklet, xilinx_vdma_do_tasklet,
>> + (unsigned long)chan);
>> +
>> + chan->completed_cookie = DMA_MIN_COOKIE;
>> + chan->cookie = DMA_MIN_COOKIE;
>> +
>> + /* There is at least one descriptor free to be allocated */
>> + return 1;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_tx_status - Get VDMA transaction status
>> + * @dchan: DMA channel
>> + * @cookie: Transaction identifier
>> + * @txstate: Transaction state
>> + *
>> + * Return: DMA transaction status
>> + */
>> +static enum dma_status xilinx_vdma_tx_status(struct dma_chan *dchan,
>> + dma_cookie_t cookie,
>> + struct dma_tx_state *txstate)
>> +{
>> + struct xilinx_vdma_chan *chan = to_xilinx_chan(dchan);
>> + dma_cookie_t last_used;
>> + dma_cookie_t last_complete;
>> +
>> + xilinx_vdma_chan_desc_cleanup(chan);
>> +
>> + last_used = dchan->cookie;
>> + last_complete = chan->completed_cookie;
>> +
>> + dma_set_tx_state(txstate, last_complete, last_used, 0);
>> +
>> + return dma_async_is_complete(cookie, last_complete, last_used);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_is_running - Check if VDMA channel is running
>> + * @chan: Driver specific VDMA channel
>> + *
>> + * Return: '1' if running, '0' if not.
>> + */
>> +static int xilinx_vdma_is_running(struct xilinx_vdma_chan *chan)
>> +{
>> + return !(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
>> + XILINX_VDMA_DMASR_HALTED) &&
>> + (vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
>> + XILINX_VDMA_DMACR_RUNSTOP);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_is_idle - Check if VDMA channel is idle
>> + * @chan: Driver specific VDMA channel
>> + *
>> + * Return: '1' if idle, '0' if not.
>> + */
>> +static int xilinx_vdma_is_idle(struct xilinx_vdma_chan *chan)
>> +{
>> + return vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
>> + XILINX_VDMA_DMASR_IDLE;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_halt - Halt VDMA channel
>> + * @chan: Driver specific VDMA channel
>> + */
>> +static void xilinx_vdma_halt(struct xilinx_vdma_chan *chan)
>> +{
>> + int loop = XILINX_VDMA_LOOP_COUNT + 1;
>> +
>> + vdma_ctrl_clr(chan, XILINX_VDMA_REG_DMACR, XILINX_VDMA_DMACR_RUNSTOP);
>> +
>> + /* Wait for the hardware to halt */
>> + while (loop--)
>> + if (vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
>> + XILINX_VDMA_DMASR_HALTED)
>> + break;
>> +
>> + if (!loop) {
>> + dev_err(chan->dev, "Cannot stop channel %p: %x\n",
>> + chan, vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR));
>> + chan->err = true;
>> + }
>> +
>> + return;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_start - Start VDMA channel
>> + * @chan: Driver specific VDMA channel
>> + */
>> +static void xilinx_vdma_start(struct xilinx_vdma_chan *chan)
>> +{
>> + int loop = XILINX_VDMA_LOOP_COUNT + 1;
>> +
>> + vdma_ctrl_set(chan, XILINX_VDMA_REG_DMACR, XILINX_VDMA_DMACR_RUNSTOP);
>> +
>> + /* Wait for the hardware to start */
>> + while (loop--)
>> + if (!(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
>> + XILINX_VDMA_DMASR_HALTED))
>> + break;
>> +
>> + if (!loop) {
>> + dev_err(chan->dev, "Cannot start channel %p: %x\n",
>> + chan, vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR));
>> +
>> + chan->err = true;
>> + }
>> +
>> + return;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_start_transfer - Starts VDMA transfer
>> + * @chan: Driver specific channel struct pointer
>> + */
>> +static void xilinx_vdma_start_transfer(struct xilinx_vdma_chan *chan)
>> +{
>> + struct xilinx_vdma_config *config = &chan->config;
>> + struct xilinx_vdma_tx_descriptor *desc;
>> + unsigned long flags;
>> + u32 reg;
>> + struct xilinx_vdma_tx_segment *head, *tail = NULL;
>> +
>> + if (chan->err)
>> + return;
>> +
>> + spin_lock_irqsave(&chan->lock, flags);
>> +
>> + /* There's already an active descriptor, bail out. */
>> + if (chan->active_desc)
>> + goto out_unlock;
>> +
>> + if (list_empty(&chan->pending_list))
>> + goto out_unlock;
>> +
>> + desc = list_first_entry(&chan->pending_list,
>> + struct xilinx_vdma_tx_descriptor, node);
>> +
>> + /* If it is SG mode and hardware is busy, cannot submit */
>> + if (chan->has_sg && xilinx_vdma_is_running(chan) &&
>> + !xilinx_vdma_is_idle(chan)) {
>> + dev_dbg(chan->dev, "DMA controller still busy\n");
>> + goto out_unlock;
>> + }
>> +
>> + if (chan->err)
>> + goto out_unlock;
>> +
>> + /*
>> + * If hardware is idle, then all descriptors on the running lists are
>> + * done, start new transfers
>> + */
>> + if (chan->has_sg) {
>> + head = list_first_entry(&desc->segments,
>> + struct xilinx_vdma_tx_segment, node);
>> + tail = list_entry(desc->segments.prev,
>> + struct xilinx_vdma_tx_segment, node);
>> +
>> + vdma_ctrl_write(chan, XILINX_VDMA_REG_CURDESC, head->phys);
>> + }
>> +
>> + /* Configure the hardware using info in the config structure */
>> + reg = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR);
>> +
>> + if (config->frm_cnt_en)
>> + reg |= XILINX_VDMA_DMACR_FRAMECNT_EN;
>> + else
>> + reg &= ~XILINX_VDMA_DMACR_FRAMECNT_EN;
>> +
>> + /*
>> + * With SG, start with circular mode, so that BDs can be fetched.
>> + * In direct register mode, if not parking, enable circular mode
>> + */
>> + if (chan->has_sg || !config->park)
>> + reg |= XILINX_VDMA_DMACR_CIRC_EN;
>> +
>> + if (config->park)
>> + reg &= ~XILINX_VDMA_DMACR_CIRC_EN;
>> +
>> + vdma_ctrl_write(chan, XILINX_VDMA_REG_DMACR, reg);
>> +
>> + if (config->park && (config->park_frm >= 0) &&
>> + (config->park_frm < chan->num_frms)) {
>> + if (chan->direction == DMA_MEM_TO_DEV)
>> + vdma_write(chan, XILINX_VDMA_REG_PARK_PTR,
>> + config->park_frm <<
>> + XILINX_VDMA_PARK_PTR_RD_REF_SHIFT);
>> + else
>> + vdma_write(chan, XILINX_VDMA_REG_PARK_PTR,
>> + config->park_frm <<
>> + XILINX_VDMA_PARK_PTR_WR_REF_SHIFT);
>> + }
>> +
>> + /* Start the hardware */
>> + xilinx_vdma_start(chan);
>> +
>> + if (chan->err)
>> + goto out_unlock;
>> +
>> + /* Start the transfer */
>> + if (chan->has_sg) {
>> + vdma_ctrl_write(chan, XILINX_VDMA_REG_TAILDESC, tail->phys);
>> + } else {
>> + struct xilinx_vdma_tx_segment *segment;
>> + int i = 0;
>> +
>> + list_for_each_entry(segment, &desc->segments, node)
>> + vdma_desc_write(chan,
>> + XILINX_VDMA_REG_START_ADDRESS(i++),
>> + segment->hw.buf_addr);
>> +
>> + vdma_desc_write(chan, XILINX_VDMA_REG_HSIZE, config->hsize);
>> + vdma_desc_write(chan, XILINX_VDMA_REG_FRMDLY_STRIDE,
>> + (config->frm_dly <<
>> + XILINX_VDMA_FRMDLY_STRIDE_FRMDLY_SHIFT) |
>> + (config->stride <<
>> + XILINX_VDMA_FRMDLY_STRIDE_STRIDE_SHIFT));
>> + vdma_desc_write(chan, XILINX_VDMA_REG_VSIZE, config->vsize);
>> + }
>> +
>> + list_del(&desc->node);
>> + chan->active_desc = desc;
>> +
>> +out_unlock:
>> + spin_unlock_irqrestore(&chan->lock, flags);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_issue_pending - Issue pending transactions
>> + * @dchan: DMA channel
>> + */
>> +static void xilinx_vdma_issue_pending(struct dma_chan *dchan)
>> +{
>> + struct xilinx_vdma_chan *chan = to_xilinx_chan(dchan);
>> +
>> + xilinx_vdma_start_transfer(chan);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_complete_descriptor - Mark the active descriptor as complete
>> + * @chan : xilinx DMA channel
>> + *
>> + * CONTEXT: hardirq
>> + */
>> +static void xilinx_vdma_complete_descriptor(struct xilinx_vdma_chan *chan)
>> +{
>> + struct xilinx_vdma_tx_descriptor *desc;
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&chan->lock, flags);
>> +
>> + desc = chan->active_desc;
>> + if (!desc) {
>> + dev_dbg(chan->dev, "no running descriptors\n");
>> + goto out_unlock;
>> + }
>> +
>> + list_add_tail(&desc->node, &chan->done_list);
>> +
>> + /* Update the completed cookie and reset the active descriptor. */
>> + chan->completed_cookie = desc->async_tx.cookie;
>> + chan->active_desc = NULL;
>> +
>> +out_unlock:
>> + spin_unlock_irqrestore(&chan->lock, flags);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_reset - Reset VDMA channel
>> + * @chan: Driver specific VDMA channel
>> + *
>> + * Return: '0' on success and failure value on error
>> + */
>> +static int xilinx_vdma_reset(struct xilinx_vdma_chan *chan)
>> +{
>> + int loop = XILINX_VDMA_LOOP_COUNT + 1;
>> + u32 tmp;
>> +
>> + vdma_ctrl_set(chan, XILINX_VDMA_REG_DMACR, XILINX_VDMA_DMACR_RESET);
>> +
>> + tmp = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
>> + XILINX_VDMA_DMACR_RESET;
>> +
>> + /* Wait for the hardware to finish reset */
>> + while (loop-- && tmp)
>> + tmp = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
>> + XILINX_VDMA_DMACR_RESET;
>> +
>> + if (!loop) {
>> + dev_err(chan->dev, "reset timeout, cr %x, sr %x\n",
>> + vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR),
>> + vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR));
>> + return -ETIMEDOUT;
>> + }
>> +
>> + chan->err = false;
>> +
>> + return 0;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_chan_reset - Reset VDMA channel and enable interrupts
>> + * @chan: Driver specific VDMA channel
>> + *
>> + * Return: '0' on success and failure value on error
>> + */
>> +static int xilinx_vdma_chan_reset(struct xilinx_vdma_chan *chan)
>> +{
>> + int err;
>> +
>> + /* Reset VDMA */
>> + err = xilinx_vdma_reset(chan);
>> + if (err)
>> + return err;
>> +
>> + /* Enable interrupts */
>> + vdma_ctrl_set(chan, XILINX_VDMA_REG_DMACR,
>> + XILINX_VDMA_DMAXR_ALL_IRQ_MASK);
>> +
>> + return 0;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_irq_handler - VDMA Interrupt handler
>> + * @irq: IRQ number
>> + * @data: Pointer to the Xilinx VDMA channel structure
>> + *
>> + * Return: IRQ_HANDLED/IRQ_NONE
>> + */
>> +static irqreturn_t xilinx_vdma_irq_handler(int irq, void *data)
>> +{
>> + struct xilinx_vdma_chan *chan = data;
>> + u32 status;
>> +
>> + /* Read the status and ack the interrupts. */
>> + status = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR);
>> + if (!(status & XILINX_VDMA_DMAXR_ALL_IRQ_MASK))
>> + return IRQ_NONE;
>> +
>> + vdma_ctrl_write(chan, XILINX_VDMA_REG_DMASR,
>> + status & XILINX_VDMA_DMAXR_ALL_IRQ_MASK);
>> +
>> + if (status & XILINX_VDMA_DMASR_ERR_IRQ) {
>> + /*
>> + * An error occurred. If C_FLUSH_ON_FSYNC is enabled and the
>> + * error is recoverable, ignore it. Otherwise flag the error.
>> + *
>> + * Only recoverable errors can be cleared in the DMASR register,
>> + * make sure not to write to other error bits to 1.
>> + */
>> + u32 errors = status & XILINX_VDMA_DMASR_ALL_ERR_MASK;
>> + vdma_ctrl_write(chan, XILINX_VDMA_REG_DMASR,
>> + errors & XILINX_VDMA_DMASR_ERR_RECOVER_MASK);
>> +
>> + if (!chan->flush_on_fsync ||
>> + (errors & ~XILINX_VDMA_DMASR_ERR_RECOVER_MASK)) {
>> + dev_err(chan->dev,
>> + "Channel %p has errors %x, cdr %x tdr %x\n",
>> + chan, errors,
>> + vdma_ctrl_read(chan, XILINX_VDMA_REG_CURDESC),
>> + vdma_ctrl_read(chan, XILINX_VDMA_REG_TAILDESC));
>> + chan->err = true;
>> + }
>> + }
>> +
>> + if (status & XILINX_VDMA_DMASR_DLY_CNT_IRQ) {
>> + /*
>> + * Device takes too long to do the transfer when user requires
>> + * responsiveness.
>> + */
>> + dev_dbg(chan->dev, "Inter-packet latency too long\n");
>> + }
>> +
>> + if (status & XILINX_VDMA_DMASR_FRM_CNT_IRQ) {
>> + xilinx_vdma_complete_descriptor(chan);
>> + xilinx_vdma_start_transfer(chan);
>> + }
>> +
>> + tasklet_schedule(&chan->tasklet);
>> + return IRQ_HANDLED;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_tx_submit - Submit DMA transaction
>> + * @tx: Async transaction descriptor
>> + *
>> + * Return: cookie value on success and failure value on error
>> + */
>> +static dma_cookie_t xilinx_vdma_tx_submit(struct dma_async_tx_descriptor *tx)
>> +{
>> + struct xilinx_vdma_tx_descriptor *desc = to_vdma_tx_descriptor(tx);
>> + struct xilinx_vdma_chan *chan = to_xilinx_chan(tx->chan);
>> + struct xilinx_vdma_tx_segment *segment;
>> + dma_cookie_t cookie;
>> + unsigned long flags;
>> + int err;
>> +
>> + if (chan->err) {
>> + /*
>> + * If reset fails, need to hard reset the system.
>> + * Channel is no longer functional
>> + */
>> + err = xilinx_vdma_chan_reset(chan);
>> + if (err < 0)
>> + return err;
>> + }
>> +
>> + spin_lock_irqsave(&chan->lock, flags);
>> +
>> + /* Assign cookies to all of the segments that make up this transaction.
>> + * Use the cookie of the last segment as the transaction cookie.
>> + */
>
> Keep style of multiline comment the same over the code.
Sure.
>
>> + cookie = chan->cookie;
>> +
>> + list_for_each_entry(segment, &desc->segments, node) {
>> + if (cookie < DMA_MAX_COOKIE)
>> + cookie++;
>> + else
>> + cookie = DMA_MIN_COOKIE;
>> +
>> + segment->cookie = cookie;
>> + }
>> +
>> + tx->cookie = cookie;
>> + chan->cookie = cookie;
>> +
>> + /* Append the transaction to the pending transactions queue. */
>> + list_add_tail(&desc->node, &chan->pending_list);
>> +
>> + spin_unlock_irqrestore(&chan->lock, flags);
>> +
>> + return cookie;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_prep_slave_sg - prepare a descriptor for a DMA_SLAVE transaction
>> + * @dchan: DMA channel
>> + * @sgl: scatterlist to transfer to/from
>> + * @sg_len: number of entries in @sgl
>> + * @dir: DMA direction
>> + * @flags: transfer ack flags
>> + * @context: unused
>> + *
>> + * Return: Async transaction descriptor on success and NULL on failure
>> + */
>> +static struct dma_async_tx_descriptor *
>> +xilinx_vdma_prep_slave_sg(struct dma_chan *dchan, struct scatterlist *sgl,
>> + unsigned int sg_len, enum dma_transfer_direction dir,
>> + unsigned long flags, void *context)
>> +{
>> + struct xilinx_vdma_chan *chan = to_xilinx_chan(dchan);
>> + struct xilinx_vdma_tx_descriptor *desc;
>> + struct xilinx_vdma_tx_segment *segment;
>> + struct xilinx_vdma_tx_segment *prev = NULL;
>> + struct scatterlist *sg;
>> + int i;
>> +
>> + if (chan->direction != dir || sg_len == 0)
>> + return NULL;
>> +
>> + /* Enforce one sg entry for one frame. */
>> + if (sg_len != chan->num_frms) {
>> + dev_err(chan->dev,
>> + "number of entries %d not the same as num stores %d\n",
>> + sg_len, chan->num_frms);
>> + return NULL;
>> + }
>> +
>> + /* Allocate a transaction descriptor. */
>> + desc = xilinx_vdma_alloc_tx_descriptor(chan);
>> + if (!desc)
>> + return NULL;
>> +
>> + dma_async_tx_descriptor_init(&desc->async_tx, &chan->common);
>> + desc->async_tx.tx_submit = xilinx_vdma_tx_submit;
>> + desc->async_tx.cookie = 0;
>> + async_tx_ack(&desc->async_tx);
>> +
>> + /* Build the list of transaction segments. */
>> + for_each_sg(sgl, sg, sg_len, i) {
>> + struct xilinx_vdma_desc_hw *hw;
>> +
>> + /* Allocate the link descriptor from DMA pool */
>> + segment = xilinx_vdma_alloc_tx_segment(chan);
>> + if (!segment)
>> + goto error;
>> +
>> + /* Fill in the hardware descriptor */
>> + hw = &segment->hw;
>> + hw->buf_addr = sg_dma_address(sg);
>> + hw->vsize = chan->config.vsize;
>> + hw->hsize = chan->config.hsize;
>> + hw->stride = (chan->config.frm_dly <<
>> + XILINX_VDMA_FRMDLY_STRIDE_FRMDLY_SHIFT) |
>> + (chan->config.stride <<
>> + XILINX_VDMA_FRMDLY_STRIDE_STRIDE_SHIFT);
>> + if (prev)
>> + prev->hw.next_desc = segment->phys;
>> +
>> + /* Insert the segment into the descriptor segments list. */
>> + list_add_tail(&segment->node, &desc->segments);
>> +
>> + prev = segment;
>> + }
>> +
>> + /* Link the last hardware descriptor with the first. */
>> + segment = list_first_entry(&desc->segments,
>> + struct xilinx_vdma_tx_segment, node);
>> + prev->hw.next_desc = segment->phys;
>> +
>> + return &desc->async_tx;
>> +
>> +error:
>> + xilinx_vdma_free_tx_descriptor(chan, desc);
>> + return NULL;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_terminate_all - Halt the channel and free descriptors
>> + * @chan: Driver specific VDMA Channel pointer
>> + */
>> +static void xilinx_vdma_terminate_all(struct xilinx_vdma_chan *chan)
>> +{
>> + /* Halt the DMA engine */
>> + xilinx_vdma_halt(chan);
>> +
>> + /* Remove and free all of the descriptors in the lists */
>> + xilinx_vdma_free_descriptors(chan);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_slave_config - Configure VDMA channel
>> + * Run-time configuration for Axi VDMA, supports:
>> + * . halt the channel
>> + * . configure interrupt coalescing and inter-packet delay threshold
>> + * . start/stop parking
>> + * . enable genlock
>> + * . set transfer information using config struct
>> + *
>> + * @chan: Driver specific VDMA Channel pointer
>> + * @cfg: Channel configuration pointer
>> + *
>> + * Return: '0' on success and failure value on error
>> + */
>> +static int xilinx_vdma_slave_config(struct xilinx_vdma_chan *chan,
>> + struct xilinx_vdma_config *cfg)
>> +{
>> + u32 dmacr;
>> +
>> + if (cfg->reset)
>> + return xilinx_vdma_chan_reset(chan);
>> +
>> + dmacr = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR);
>> +
>> + /* If vsize is -1, it is park-related operations */
>> + if (cfg->vsize == -1) {
>> + if (cfg->park)
>> + dmacr &= ~XILINX_VDMA_DMACR_CIRC_EN;
>> + else
>> + dmacr |= XILINX_VDMA_DMACR_CIRC_EN;
>> +
>> + vdma_ctrl_write(chan, XILINX_VDMA_REG_DMACR, dmacr);
>> + return 0;
>> + }
>> +
>> + /* If hsize is -1, it is interrupt threshold settings */
>> + if (cfg->hsize == -1) {
>> + if (cfg->coalesc <= XILINX_VDMA_DMACR_FRAME_COUNT_MAX) {
>> + dmacr &= ~XILINX_VDMA_DMACR_FRAME_COUNT_MASK;
>> + dmacr |= cfg->coalesc <<
>> + XILINX_VDMA_DMACR_FRAME_COUNT_SHIFT;
>> + chan->config.coalesc = cfg->coalesc;
>> + }
>> +
>> + if (cfg->delay <= XILINX_VDMA_DMACR_DELAY_MAX) {
>> + dmacr &= ~XILINX_VDMA_DMACR_DELAY_MASK;
>> + dmacr |= cfg->delay << XILINX_VDMA_DMACR_DELAY_SHIFT;
>> + chan->config.delay = cfg->delay;
>> + }
>> +
>> + vdma_ctrl_write(chan, XILINX_VDMA_REG_DMACR, dmacr);
>> + return 0;
>> + }
>> +
>> + /* Transfer information */
>> + chan->config.vsize = cfg->vsize;
>> + chan->config.hsize = cfg->hsize;
>> + chan->config.stride = cfg->stride;
>> + chan->config.frm_dly = cfg->frm_dly;
>> + chan->config.park = cfg->park;
>> +
>> + /* genlock settings */
>> + chan->config.gen_lock = cfg->gen_lock;
>> + chan->config.master = cfg->master;
>> +
>> + if (cfg->gen_lock && chan->genlock) {
>> + dmacr |= XILINX_VDMA_DMACR_GENLOCK_EN;
>> + dmacr |= cfg->master << XILINX_VDMA_DMACR_MASTER_SHIFT;
>> + }
>> +
>> + chan->config.frm_cnt_en = cfg->frm_cnt_en;
>> + if (cfg->park)
>> + chan->config.park_frm = cfg->park_frm;
>> + else
>> + chan->config.park_frm = -1;
>> +
>> + chan->config.coalesc = cfg->coalesc;
>> + chan->config.delay = cfg->delay;
>> + if (cfg->coalesc <= XILINX_VDMA_DMACR_FRAME_COUNT_MAX) {
>> + dmacr |= cfg->coalesc << XILINX_VDMA_DMACR_FRAME_COUNT_SHIFT;
>> + chan->config.coalesc = cfg->coalesc;
>> + }
>> +
>> + if (cfg->delay <= XILINX_VDMA_DMACR_DELAY_MAX) {
>> + dmacr |= cfg->delay << XILINX_VDMA_DMACR_DELAY_SHIFT;
>> + chan->config.delay = cfg->delay;
>> + }
>> +
>> + /* FSync Source selection */
>> + dmacr &= ~XILINX_VDMA_DMACR_FSYNCSRC_MASK;
>> + dmacr |= cfg->ext_fsync << XILINX_VDMA_DMACR_FSYNCSRC_SHIFT;
>> +
>> + vdma_ctrl_write(chan, XILINX_VDMA_REG_DMACR, dmacr);
>> + return 0;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_device_control - Configure DMA channel of the device
>> + * @dchan: DMA Channel pointer
>> + * @cmd: DMA control command
>> + * @arg: Channel configuration
>> + *
>> + * Return: '0' on success and failure value on error
>> + */
>> +static int xilinx_vdma_device_control(struct dma_chan *dchan,
>> + enum dma_ctrl_cmd cmd, unsigned long arg)
>> +{
>> + struct xilinx_vdma_chan *chan = to_xilinx_chan(dchan);
>> +
>> + switch (cmd) {
>> + case DMA_TERMINATE_ALL:
>> + xilinx_vdma_terminate_all(chan);
>> + return 0;
>> + case DMA_SLAVE_CONFIG:
>> + return xilinx_vdma_slave_config(chan,
>> + (struct xilinx_vdma_config *)arg);
>> + default:
>> + return -ENXIO;
>> + }
>> +}
>> +
>> +/* -----------------------------------------------------------------------------
>> + * Probe and remove
>> + */
>> +
>> +/**
>> + * xilinx_vdma_chan_remove - Per Channel remove function
>> + * @chan: Driver specific VDMA channel
>> + */
>> +static void xilinx_vdma_chan_remove(struct xilinx_vdma_chan *chan)
>> +{
>> + /* Disable all interrupts */
>> + vdma_ctrl_clr(chan, XILINX_VDMA_REG_DMACR,
>> + XILINX_VDMA_DMAXR_ALL_IRQ_MASK);
>> +
>> + list_del(&chan->common.device_node);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_chan_probe - Per Channel Probing
>> + * It get channel features from the device tree entry and
>> + * initialize special channel handling routines
>> + *
>> + * @xdev: Driver specific device structure
>> + * @node: Device node
>> + *
>> + * Return: '0' on success and failure value on error
>> + */
>> +static int xilinx_vdma_chan_probe(struct xilinx_vdma_device *xdev,
>> + struct device_node *node)
>> +{
>> + struct xilinx_vdma_chan *chan;
>> + bool has_dre = false;
>> + u32 value;
>> + int err;
>> +
>> + /* Allocate and initialize the channel structure */
>> + chan = devm_kzalloc(xdev->dev, sizeof(*chan), GFP_KERNEL);
>> + if (!chan)
>> + return -ENOMEM;
>> +
>> + chan->dev = xdev->dev;
>> + chan->xdev = xdev;
>> + chan->has_sg = xdev->has_sg;
>> +
>> + spin_lock_init(&chan->lock);
>> + INIT_LIST_HEAD(&chan->pending_list);
>> + INIT_LIST_HEAD(&chan->done_list);
>> +
>> + /* Retrieve the channel properties from the device tree */
>> + has_dre = of_property_read_bool(node, "xlnx,include-dre");
>> +
>> + chan->genlock = of_property_read_bool(node, "xlnx,genlock-mode");
>> +
>> + err = of_property_read_u32(node, "xlnx,datawidth", &value);
>> + if (!err) {
>> + u32 width = value >> 3; /* Convert bits to bytes */
>> +
>> + /* If data width is greater than 8 bytes, DRE is not in hw */
>> + if (width > 8)
>> + has_dre = false;
>> +
>> + if (!has_dre)
>> + xdev->common.copy_align = fls(width - 1);
>> + } else {
>> + dev_err(xdev->dev, "missing xlnx,datawidth property\n");
>> + return err;
>> + }
>> +
>> + if (of_device_is_compatible(node, "xlnx,axi-vdma-mm2s-channel")) {
>> + chan->direction = DMA_MEM_TO_DEV;
>> + chan->id = 0;
>> +
>> + chan->ctrl_offset = XILINX_VDMA_MM2S_CTRL_OFFSET;
>> + chan->desc_offset = XILINX_VDMA_MM2S_DESC_OFFSET;
>> +
>> + if (xdev->flush_on_fsync == XILINX_VDMA_FLUSH_BOTH ||
>> + xdev->flush_on_fsync == XILINX_VDMA_FLUSH_MM2S)
>> + chan->flush_on_fsync = true;
>> + } else if (of_device_is_compatible(node,
>> + "xlnx,axi-vdma-s2mm-channel")) {
>> + chan->direction = DMA_DEV_TO_MEM;
>> + chan->id = 1;
>> +
>> + chan->ctrl_offset = XILINX_VDMA_S2MM_CTRL_OFFSET;
>> + chan->desc_offset = XILINX_VDMA_S2MM_DESC_OFFSET;
>> +
>> + if (xdev->flush_on_fsync == XILINX_VDMA_FLUSH_BOTH ||
>> + xdev->flush_on_fsync == XILINX_VDMA_FLUSH_S2MM)
>> + chan->flush_on_fsync = true;
>> + } else {
>> + dev_err(xdev->dev, "Invalid channel compatible node\n");
>> + return -EINVAL;
>> + }
>> +
>> + /* Request the interrupt */
>> + chan->irq = irq_of_parse_and_map(node, 0);
>> + err = devm_request_irq(xdev->dev, chan->irq, xilinx_vdma_irq_handler,
>> + IRQF_SHARED, "xilinx-vdma-controller", chan);
>> + if (err) {
>> + dev_err(xdev->dev, "unable to request IRQ\n");
>> + return err;
>> + }
>> +
>> + /* Initialize the DMA channel and add it to the DMA engine channels
>> + * list.
>> + */
>> + chan->common.device = &xdev->common;
>> +
>> + list_add_tail(&chan->common.device_node, &xdev->common.channels);
>> + xdev->chan[chan->id] = chan;
>> +
>> + /* Reset the channel */
>> + err = xilinx_vdma_chan_reset(chan);
>> + if (err < 0) {
>> + dev_err(xdev->dev, "Reset channel failed\n");
>> + return err;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +/**
>> + * struct of_dma_filter_xilinx_args - Channel filter args
>> + * @dev: DMA device structure
>> + * @chan_id: Channel id
>> + */
>> +struct of_dma_filter_xilinx_args {
>> + struct dma_device *dev;
>> + u32 chan_id;
>> +};
>> +
>> +/**
>> + * xilinx_vdma_dt_filter - VDMA channel filter function
>> + * @chan: DMA channel pointer
>> + * @param: Filter match value
>> + *
>> + * Return: true/false based on the result
>> + */
>> +static bool xilinx_vdma_dt_filter(struct dma_chan *chan, void *param)
>> +{
>> + struct of_dma_filter_xilinx_args *args = param;
>> +
>> + return chan->device == args->dev && chan->chan_id == args->chan_id;
>> +}
>> +
>> +/**
>> + * of_dma_xilinx_xlate - Translation function
>> + * @dma_spec: Pointer to DMA specifier as found in the device tree
>> + * @ofdma: Pointer to DMA controller data
>> + *
>> + * Return: DMA channel pointer on success and NULL on error
>> + */
>> +static struct dma_chan *of_dma_xilinx_xlate(struct of_phandle_args *dma_spec,
>> + struct of_dma *ofdma)
>> +{
>> + struct of_dma_filter_xilinx_args args;
>> + dma_cap_mask_t cap;
>> +
>> + args.dev = ofdma->of_dma_data;
>> + if (!args.dev)
>> + return NULL;
>> +
>> + if (dma_spec->args_count != 1)
>> + return NULL;
>> +
>> + dma_cap_zero(cap);
>> + dma_cap_set(DMA_SLAVE, cap);
>> +
>> + args.chan_id = dma_spec->args[0];
>> +
>> + return dma_request_channel(cap, xilinx_vdma_dt_filter, &args);
>> +}
>> +
>> +/**
>> + * xilinx_vdma_probe - Driver probe function
>> + * @pdev: Pointer to the platform_device structure
>> + *
>> + * Return: '0' on success and failure value on error
>> + */
>> +static int xilinx_vdma_probe(struct platform_device *pdev)
>> +{
>> + struct device_node *node = pdev->dev.of_node;
>> + struct xilinx_vdma_device *xdev;
>> + struct device_node *child;
>> + struct resource *io;
>> + u32 num_frames;
>> + int i, err;
>> +
>> + dev_info(&pdev->dev, "Probing xilinx axi vdma engine\n");
>> +
>> + /* Allocate and initialize the DMA engine structure */
>> + xdev = devm_kzalloc(&pdev->dev, sizeof(*xdev), GFP_KERNEL);
>> + if (!xdev)
>> + return -ENOMEM;
>> +
>> + xdev->dev = &pdev->dev;
>> +
>> + /* Request and map I/O memory */
>> + io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + xdev->regs = devm_ioremap_resource(&pdev->dev, io);
>> + if (IS_ERR(xdev->regs))
>> + return PTR_ERR(xdev->regs);
>> +
>> + /* Retrieve the DMA engine properties from the device tree */
>> + xdev->has_sg = of_property_read_bool(node, "xlnx,include-sg");
>> +
>> + err = of_property_read_u32(node, "xlnx,num-fstores", &num_frames);
>> + if (err < 0) {
>> + dev_err(xdev->dev, "missing xlnx,num-fstores property\n");
>> + return err;
>> + }
>> +
>> + of_property_read_u32(node, "xlnx,flush-fsync", &xdev->flush_on_fsync);
>> +
>> + /* Initialize the DMA engine */
>> + xdev->common.dev = &pdev->dev;
>> +
>> + INIT_LIST_HEAD(&xdev->common.channels);
>> + dma_cap_set(DMA_SLAVE, xdev->common.cap_mask);
>> + dma_cap_set(DMA_PRIVATE, xdev->common.cap_mask);
>> +
>> + xdev->common.device_alloc_chan_resources =
>> + xilinx_vdma_alloc_chan_resources;
>> + xdev->common.device_free_chan_resources =
>> + xilinx_vdma_free_chan_resources;
>> + xdev->common.device_prep_slave_sg = xilinx_vdma_prep_slave_sg;
>> + xdev->common.device_control = xilinx_vdma_device_control;
>> + xdev->common.device_tx_status = xilinx_vdma_tx_status;
>> + xdev->common.device_issue_pending = xilinx_vdma_issue_pending;
>> +
>> + platform_set_drvdata(pdev, xdev);
>> +
>> + /* Initialize the channels */
>> + for_each_child_of_node(node, child) {
>> + err = xilinx_vdma_chan_probe(xdev, child);
>> + if (err < 0)
>> + goto error;
>> + }
>> +
>> + for (i = 0; i < XILINX_VDMA_MAX_CHANS_PER_DEVICE; i++) {
>> + if (xdev->chan[i])
>> + xdev->chan[i]->num_frms = num_frames;
>> + }
>> +
>> + /* Register the DMA engine with the core */
>> + dma_async_device_register(&xdev->common);
>> +
>> + err = of_dma_controller_register(node, of_dma_xilinx_xlate,
>> + &xdev->common);
>> + if (err < 0) {
>> + dev_err(&pdev->dev, "Unable to register DMA to DT\n");
>> + dma_async_device_unregister(&xdev->common);
>> + goto error;
>> + }
>> +
>> + return 0;
>> +
>> +error:
>> + for (i = 0; i < XILINX_VDMA_MAX_CHANS_PER_DEVICE; i++) {
>> + if (xdev->chan[i])
>> + xilinx_vdma_chan_remove(xdev->chan[i]);
>> + }
>> +
>> + return err;
>> +}
>> +
>> +/**
>> + * xilinx_vdma_remove - Driver remove function
>> + * @pdev: Pointer to the platform_device structure
>> + *
>> + * Return: Always '0'
>> + */
>> +static int xilinx_vdma_remove(struct platform_device *pdev)
>> +{
>> + struct xilinx_vdma_device *xdev;
>> + int i;
>> +
>> + of_dma_controller_free(pdev->dev.of_node);
>> +
>> + xdev = platform_get_drvdata(pdev);
>
> You could move this assignment to a variables block, it's normal
> practice.
Ok. I will send v3 fixing the comments.
Srikanth
>
>> + dma_async_device_unregister(&xdev->common);
>> +
>> + for (i = 0; i < XILINX_VDMA_MAX_CHANS_PER_DEVICE; i++) {
>> + if (xdev->chan[i])
>> + xilinx_vdma_chan_remove(xdev->chan[i]);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static const struct of_device_id xilinx_vdma_of_ids[] = {
>> + { .compatible = "xlnx,axi-vdma-1.00.a",},
>> + {}
>> +};
>> +
>> +static struct platform_driver xilinx_vdma_driver = {
>> + .driver = {
>> + .name = "xilinx-vdma",
>> + .owner = THIS_MODULE,
>> + .of_match_table = xilinx_vdma_of_ids,
>> + },
>> + .probe = xilinx_vdma_probe,
>> + .remove = xilinx_vdma_remove,
>> +};
>> +
>> +module_platform_driver(xilinx_vdma_driver);
>> +
>> +MODULE_AUTHOR("Xilinx, Inc.");
>> +MODULE_DESCRIPTION("Xilinx VDMA driver");
>> +MODULE_LICENSE("GPL v2");
>> diff --git a/include/linux/amba/xilinx_dma.h b/include/linux/amba/xilinx_dma.h
>> new file mode 100644
>> index 0000000..48a8c8b
>> --- /dev/null
>> +++ b/include/linux/amba/xilinx_dma.h
>> @@ -0,0 +1,50 @@
>> +/*
>> + * Xilinx DMA Engine drivers support header file
>> + *
>> + * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
>> + *
>> + * This is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + */
>> +
>> +#ifndef __DMA_XILINX_DMA_H
>> +#define __DMA_XILINX_DMA_H
>> +
>> +#include <linux/dma-mapping.h>
>> +#include <linux/dmaengine.h>
>> +
>> +/**
>> + * struct xilinx_vdma_config - VDMA Configuration structure
>> + * @vsize: Vertical size
>> + * @hsize: Horizontal size
>> + * @stride: Stride
>> + * @frm_dly: Frame delay
>> + * @gen_lock: Whether in gen-lock mode
>> + * @master: Master that it syncs to
>> + * @frm_cnt_en: Enable frame count enable
>> + * @park: Whether wants to park
>> + * @park_frm: Frame to park on
>> + * @coalesc: Interrupt coalescing threshold
>> + * @delay: Delay counter
>> + * @reset: Reset Channel
>> + * @ext_fsync: External Frame Sync source
>> + */
>> +struct xilinx_vdma_config {
>> + int vsize;
>> + int hsize;
>> + int stride;
>> + int frm_dly;
>> + int gen_lock;
>> + int master;
>> + int frm_cnt_en;
>> + int park;
>> + int park_frm;
>> + int coalesc;
>> + int delay;
>> + int reset;
>> + int ext_fsync;
>> +};
>> +
>> +#endif
>
> --
> Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Intel Finland Oy
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply
* [PATCH 11/20] ARM64 / ACPI: Get the enable method for SMP initialization
From: Catalin Marinas @ 2014-01-23 17:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389961514-13562-12-git-send-email-hanjun.guo@linaro.org>
On Fri, Jan 17, 2014 at 12:25:05PM +0000, Hanjun Guo wrote:
> --- a/arch/arm64/kernel/smp.c
> +++ b/arch/arm64/kernel/smp.c
> @@ -48,6 +48,7 @@
> #include <asm/sections.h>
> #include <asm/tlbflush.h>
> #include <asm/ptrace.h>
> +#include <asm/acpi.h>
>
> /*
> * as from 2.5, kernels no longer have an init_tasks structure
> @@ -280,7 +281,7 @@ static void (*smp_cross_call)(const struct cpumask *, unsigned int);
> * cpu logical map array containing MPIDR values related to logical
> * cpus. Assumes that cpu_logical_map(0) has already been initialized.
> */
> -void __init smp_init_cpus(void)
> +static int __init of_smp_init_cpus(void)
> {
> struct device_node *dn = NULL;
> unsigned int i, cpu = 1;
> @@ -364,6 +365,10 @@ next:
> cpu++;
> }
>
> + /* No device tree or no CPU node in DT */
> + if (cpu == 1 && !bootcpu_valid)
> + return -ENODEV;
> +
> /* sanity check */
> if (cpu > NR_CPUS)
> pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
> @@ -371,7 +376,7 @@ next:
>
> if (!bootcpu_valid) {
> pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
> - return;
> + return -EINVAL;
> }
>
> /*
> @@ -381,6 +386,39 @@ next:
> for (i = 0; i < NR_CPUS; i++)
> if (cpu_logical_map(i) != INVALID_HWID)
> set_cpu_possible(i, true);
> +
> + return 0;
> +}
> +
> +/*
> + * In ACPI mode, the cpu possible map was enumerated before SMP
> + * initialization when MADT table was parsed, so we can get the
> + * possible map here to initialize CPUs.
> + */
> +static void __init acpi_smp_init_cpus(void)
> +{
> + int cpu;
> + const char *enable_method;
> +
> + for_each_possible_cpu(cpu) {
> + enable_method = acpi_get_enable_method(cpu);
> + if (!enable_method)
> + continue;
> +
> + cpu_ops[cpu] = cpu_get_ops(enable_method);
> + if (!cpu_ops[cpu])
> + continue;
> +
> + cpu_ops[cpu]->cpu_init(NULL, cpu);
> + }
> +}
> +
> +void __init smp_init_cpus(void)
> +{
> + if (!of_smp_init_cpus())
> + return;
> +
> + acpi_smp_init_cpus();
> }
With DT we initialise the cpu_ops[0] via cpu_read_bootcpu_ops() called
from setup_arch(). This is needed because with PSCI we use cpu_ops for
power management even if it's a UP system. Do you get a some kernel
warning about device node for the boot cpu not found?
> --- a/drivers/acpi/plat/arm-core.c
> +++ b/drivers/acpi/plat/arm-core.c
> @@ -367,6 +367,32 @@ static void __init acpi_process_madt(void)
> }
>
> /*
> + * To see PCSI is enabled or not.
> + *
> + * PSCI is not available for ACPI 5.0, return FALSE for now.
> + *
> + * FIXME: should we introduce early_param("psci", func) for test purpose?
> + */
> +static bool acpi_psci_smp_available(int cpu)
> +{
> + return FALSE;
> +}
> +
> +static const char *enable_method[] = {
> + "psci",
> + "spin-table",
> + NULL
> +};
> +
> +const char *acpi_get_enable_method(int cpu)
> +{
> + if (acpi_psci_smp_available(cpu))
> + return enable_method[0];
> + else
> + return enable_method[1];
> +}
You could just use literal strings here, actually even ignoring PSCI
until available.
--
Catalin
^ permalink raw reply
* [PATCH 1/2] PWM: let of_xlate handlers check args count
From: Russell King - ARM Linux @ 2014-01-23 17:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140123165349.GY15937@n2100.arm.linux.org.uk>
On Thu, Jan 23, 2014 at 04:53:50PM +0000, Russell King - ARM Linux wrote:
> On Thu, Jan 23, 2014 at 12:04:44PM +0100, Sascha Hauer wrote:
> > On Thu, Jan 23, 2014 at 11:56:32AM +0100, Lothar Wa?mann wrote:
> > > Hi,
> > >
> > > Sascha Hauer wrote:
> > > > of_pwm_n_cells for the of_xlate handler is stored in struct pwm_chip,
> > > > but it is only ever used by the of_xlate handler itsel. Remove
> > > > of_pwm_n_cells from struct pwm_chip and let the handler do the argument
> > > > count checking to simplify the code.
> > > >
> > > This still does not make the PWM_POLARITY flag in the pwms node
> > > optional as was the goal because of_parse_phandle_with_args() requires
> > > at least #pwm-cells arguments in the node.
> > >
> > > So, with a DT configuration like:
> > > pwm0: pwm at 0 {
> > > #pwm-cells = <3>;
> > > };
> > > backlight {
> > > pwms = <&pwm0 0 100000>;
> > > };
> >
> > We misunderstood each other. My goal was to allow the driver to also
> > work with old devicetrees which specify #pwm-cells = <2>, not to allow
> > inconsistent devicetrees like the snippet above.
>
> In which case, the patch I've posted seems to do that job too... I'm
> just about to test out the three-cell version.
Okay, this works, but there's a problem with pwm-leds.
When the duty cycle is set to zero (when you set the brightness to zero)
pwm-leds decides to disable the PWM after configuring it. This causes
the PWM output to be driven low, causing the LED to go to maximum
brightness.
So, using the inversion at PWM level doesn't work.
To make this work correctly, we really need pwm-leds to do the inversion
rather than setting the inversion bit in hardware.
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* [PATCH v2] dma: Add Xilinx AXI Video Direct Memory Access Engine driver support
From: Srikanth Thokala @ 2014-01-23 17:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAAsK9AFGM+852N-F98p32JSHEpg5ZKv-0wyzFGx9675GBp7gQg@mail.gmail.com>
Hi Levente,
On Thu, Jan 23, 2014 at 3:00 AM, Levente Kurusa <levex@linux.com> wrote:
> Hello,
>
> 2014/1/22 Srikanth Thokala <sthokal@xilinx.com>:
>> This is the driver for the AXI Video Direct Memory Access (AXI
>> VDMA) core, which is a soft Xilinx IP core that provides high-
>> bandwidth direct memory access between memory and AXI4-Stream
>> type video target peripherals. The core provides efficient two
>> dimensional DMA operations with independent asynchronous read
>> and write channel operation.
>>
>> This module works on Zynq (ARM Based SoC) and Microblaze platforms.
>>
>> Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
>> ---
>
> Another two remarks, after you fixed them ( or not :-) )
> you can have my:
>
> Reviewed-by: Levente Kurusa <levex@linux.com>
>
> Oh, and next time please if you post a patch that fixes something I pointed out,
> CC me as I had a hard time finding this patch, thanks. :-)
Sure. Thanks
>
>> NOTE:
>> 1. Created a separate directory 'dma/xilinx' as Xilinx has two more
>> DMA IPs and we are also planning to upstream these drivers soon.
>> 2. Rebased on v3.13.0-rc8
>>
>> Changes in v2:
>> - Removed DMA Test client module from the patchset as suggested
>> by Andy Shevchenko
>> - Removed device-id DT property, as suggested by Arnd Bergmann
>> - Properly documented DT bindings as suggested by Arnd Bergmann
>> - Returning with error, if registration of DMA to node fails
>> - Fixed typo errors
>> - Used BIT() macro at applicable places
>> - Added missing header file to the patchset
>> - Changed copyright year to include 2014
>> ---
>> .../devicetree/bindings/dma/xilinx/xilinx_vdma.txt | 75 +
>> drivers/dma/Kconfig | 14 +
>> drivers/dma/Makefile | 1 +
>> drivers/dma/xilinx/Makefile | 1 +
>> drivers/dma/xilinx/xilinx_vdma.c | 1486 ++++++++++++++++++++
>> include/linux/amba/xilinx_dma.h | 50 +
>> 6 files changed, 1627 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
>> create mode 100644 drivers/dma/xilinx/Makefile
>> create mode 100644 drivers/dma/xilinx/xilinx_vdma.c
>> create mode 100644 include/linux/amba/xilinx_dma.h
>>
>> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
>> new file mode 100644
>> index 0000000..ab8be1a
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
>> @@ -0,0 +1,75 @@
>> +Xilinx AXI VDMA engine, it does transfers between memory and video devices.
>> +It can be configured to have one channel or two channels. If configured
>> +as two channels, one is to transmit to the video device and another is
>> +to receive from the video device.
>> +
>> +Required properties:
>> +- compatible: Should be "xlnx,axi-vdma-1.00.a"
>> +- #dma-cells: Should be <1>, see "dmas" property below
>> +- reg: Should contain VDMA registers location and length.
>> +- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
>> +- dma-channel child node: Should have atleast one channel and can have upto
>> + two channels per device. This node specifies the properties of each
>> + DMA channel (see child node properties below).
>> +
>> +Optional properties:
>> +- xlnx,include-sg: Tells whether configured for Scatter-mode in
>> + the hardware.
>> [...]
>> +
>> +/**
>> + * xilinx_vdma_is_running - Check if VDMA channel is running
>> + * @chan: Driver specific VDMA channel
>> + *
>> + * Return: '1' if running, '0' if not.
>> + */
>> +static int xilinx_vdma_is_running(struct xilinx_vdma_chan *chan)
>> +{
>> + return !(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
>> + XILINX_VDMA_DMASR_HALTED) &&
>> + (vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
>> + XILINX_VDMA_DMACR_RUNSTOP);
>> +}
>> +
[...]
>> + /* Retrieve the channel properties from the device tree */
>> + has_dre = of_property_read_bool(node, "xlnx,include-dre");
>> +
>> + chan->genlock = of_property_read_bool(node, "xlnx,genlock-mode");
>> +
>> + err = of_property_read_u32(node, "xlnx,datawidth", &value);
>> + if (!err) {
>> + u32 width = value >> 3; /* Convert bits to bytes */
>> +
>> + /* If data width is greater than 8 bytes, DRE is not in hw */
>> + if (width > 8)
>> + has_dre = false;
>> +
>> + if (!has_dre)
>> + xdev->common.copy_align = fls(width - 1);
>> + } else {
>> + dev_err(xdev->dev, "missing xlnx,datawidth property\n");
>> + return err;
>> + }
>
> Can you please convert this to:
> if (err) {
> dev_err(...);
> return err;
> }
>
> That way we can avoid the else clause.
Ok. I will fix it in v3.
>> +
>> + if (of_device_is_compatible(node, "xlnx,axi-vdma-mm2s-channel")) {
>> + chan->direction = DMA_MEM_TO_DEV;
>> + chan->id = 0;
>> +
>> + chan->ctrl_offset = XILINX_VDMA_MM2S_CTRL_OFFSET;
>> + chan->desc_offset = XILINX_VDMA_MM2S_DESC_OFFSET;
>> +
>> + if (xdev->flush_on_fsync == XILINX_VDMA_FLUSH_BOTH ||
>> + xdev->flush_on_fsync == XILINX_VDMA_FLUSH_MM2S)
>> + chan->flush_on_fsync = true;
>> + } else if (of_device_is_compatible(node,
>> + "xlnx,axi-vdma-s2mm-channel")) {
>> + chan->direction = DMA_DEV_TO_MEM;
>> + chan->id = 1;
>> +
>> + chan->ctrl_offset = XILINX_VDMA_S2MM_CTRL_OFFSET;
>> + chan->desc_offset = XILINX_VDMA_S2MM_DESC_OFFSET;
>> +
>> + if (xdev->flush_on_fsync == XILINX_VDMA_FLUSH_BOTH ||
>> + xdev->flush_on_fsync == XILINX_VDMA_FLUSH_S2MM)
>> + chan->flush_on_fsync = true;
>> + } else {
>> + dev_err(xdev->dev, "Invalid channel compatible node\n");
>> + return -EINVAL;
>> + }
>> +
>> + /* Request the interrupt */
>> + chan->irq = irq_of_parse_and_map(node, 0);
>> + err = devm_request_irq(xdev->dev, chan->irq, xilinx_vdma_irq_handler,
>> + IRQF_SHARED, "xilinx-vdma-controller", chan);
>> + if (err) {
>> + dev_err(xdev->dev, "unable to request IRQ\n");
>
> It might be worth to also tell the IRQ number that failed
> to register.
Ok.
>
>> + return err;
>> + }
>> +
>> + /* Initialize the DMA channel and add it to the DMA engine channels
>> + * list.
>> + */
>> + chan->common.device = &xdev->common;
>> +
>> + list_add_tail(&chan->common.device_node, &xdev->common.channels);
[...]
>> + err = of_property_read_u32(node, "xlnx,num-fstores", &num_frames);
>> + if (err < 0) {
>> + dev_err(xdev->dev, "missing xlnx,num-fstores property\n");
>> + return err;
>> + }
>> +
>> + of_property_read_u32(node, "xlnx,flush-fsync", &xdev->flush_on_fsync);
>
> Error check?
Sure, with a warning message as it is optional DT property. I will
fix it in v3.
Srikanth
[...]
>> --
>
> --
> Regards,
> Levente Kurusa
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply
* [PATCH 0/2] Enable clock controllers on MSM
From: Kevin Hilman @ 2014-01-23 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1389921904-3777-1-git-send-email-sboyd@codeaurora.org>
Stephen Boyd <sboyd@codeaurora.org> writes:
> These patches add the clock controller nodes, enable the clock drivers
> on MSM based platforms, and hook it up enough to get the serial console
> working. This is based on the merge of Mike's clk-next branch with
> linux-next-20140116. The changes need the clk-next branch because that's
> where the DTS include files landed.
I forgot to repond to this earlier, but I tested this on top of -next
and it gets the dragonboard booting w/mainline. Yay!
> Perhaps this can be applied after 3.14-rc1 is out?
Yeah, sounds good.
Kevin
> Stephen Boyd (2):
> ARM: dts: msm: Add clock controller nodes and hook into uart
> ARM: msm_defconfig: Enable MSM clock drivers
>
> arch/arm/boot/dts/qcom-msm8660-surf.dts | 11 +++++++++++
> arch/arm/boot/dts/qcom-msm8960-cdp.dts | 18 ++++++++++++++++++
> arch/arm/boot/dts/qcom-msm8974.dtsi | 24 ++++++++++++++++++++++++
> arch/arm/configs/msm_defconfig | 4 ++++
> 4 files changed, 57 insertions(+)
^ permalink raw reply
* [GIT PULL] bcm dt updates for 3.14
From: Kevin Hilman @ 2014-01-23 17:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAEPRUYrYNR=63oS91Bq-viYJwXfjtY4+cchY0hMUpaJQAw+NNA@mail.gmail.com>
Christian Daudt <bcm@fixthebug.org> writes:
> The following changes since commit 413541dd66d51f791a0b169d9b9014e4f56be13c:
>
> Linux 3.13-rc5 (2013-12-22 13:08:32 -0800)
>
> are available in the git repository at:
>
> git://github.com/broadcom/bcm11351.git tags/bcm-for-3.14-dt
>
> for you to fetch changes up to 30d831156b3a7f249c08cbe457a0d728160db39b:
>
> clk: bcm281xx: define kona clock binding (2013-12-31 09:08:38 -0800)
>
> ----------------------------------------------------------------
> Add i2c, usb and clock DT configuration to bcm mobile.
>
> ----------------------------------------------------------------
Pulled into late/dt.
Kevin
^ permalink raw reply
* [GIT PULL] bcm driver updates for 3.14
From: Kevin Hilman @ 2014-01-23 17:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAEPRUYpgHhrVCoRAzF_WbQZGTpwSahQq8G40+9=pf36-n9V_hg@mail.gmail.com>
Christian Daudt <bcm@fixthebug.org> writes:
> The following changes since commit 319e2e3f63c348a9b66db4667efa73178e18b17d:
>
> Linux 3.13-rc4 (2013-12-15 12:31:33 -0800)
>
> are available in the git repository at:
>
> git://github.com/broadcom/bcm11351.git tags/bcm-for-3.14-drivers
>
> for you to fetch changes up to e257c5f6e1cad35d15c06d713b2d1a26f883bbcb:
>
> clk: bcm281xx: define U32_MAX conditionally for now (2013-12-31
> 09:54:45 -0800)
>
> ----------------------------------------------------------------
> Clk driver for bcm mobile SoCs
>
> ----------------------------------------------------------------
Pulled into late/soc.
Kevin
^ permalink raw reply
* [PATCH 1/2] PWM: let of_xlate handlers check args count
From: Russell King - ARM Linux @ 2014-01-23 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140123110444.GI16215@pengutronix.de>
On Thu, Jan 23, 2014 at 12:04:44PM +0100, Sascha Hauer wrote:
> On Thu, Jan 23, 2014 at 11:56:32AM +0100, Lothar Wa?mann wrote:
> > Hi,
> >
> > Sascha Hauer wrote:
> > > of_pwm_n_cells for the of_xlate handler is stored in struct pwm_chip,
> > > but it is only ever used by the of_xlate handler itsel. Remove
> > > of_pwm_n_cells from struct pwm_chip and let the handler do the argument
> > > count checking to simplify the code.
> > >
> > This still does not make the PWM_POLARITY flag in the pwms node
> > optional as was the goal because of_parse_phandle_with_args() requires
> > at least #pwm-cells arguments in the node.
> >
> > So, with a DT configuration like:
> > pwm0: pwm at 0 {
> > #pwm-cells = <3>;
> > };
> > backlight {
> > pwms = <&pwm0 0 100000>;
> > };
>
> We misunderstood each other. My goal was to allow the driver to also
> work with old devicetrees which specify #pwm-cells = <2>, not to allow
> inconsistent devicetrees like the snippet above.
In which case, the patch I've posted seems to do that job too... I'm
just about to test out the three-cell version.
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
* [PATCHv2 2/2] pwm: imx: support polarity inversion
From: Russell King - ARM Linux @ 2014-01-23 16:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20140123115203.GV15937@n2100.arm.linux.org.uk>
On Thu, Jan 23, 2014 at 11:52:03AM +0000, Russell King - ARM Linux wrote:
> On Thu, Jan 23, 2014 at 08:37:14AM +0100, Lothar Wa?mann wrote:
> > This wouldn't buy much without a material change to of_pwm_get().
> > The function of_parse_phandle_with_args() called by of_pwm_get()
> > requires the number of args in the pwms property be greater or equal to
> > the #pwm-cells property in the pwm node. Thus, the interesting case of
> > having #pwm-cells = <3> without changing the existing users is
> > prohibited by of_parse_phandle_with_args().
>
> I really don't think that's a problem we need to be concerned with at
> the moment. What we need is for the kernel to be able to parse files
> with #pwm-cells = <2> with the pwms property containing two arguments,
> and when they're updated to #pwm-cells = <3> with the pwms property
> containing three arguments.
>
> Yes, that means all the board dt files need to be updated at the same
> time to include the additional argument, but I don't see that as a big
> problem.
>
> What we do need to do is to adjust the PWM parsing code such that it's
> possible to use either specification without causing any side effects.
>
> I would test this, but as u-boot is rather fscked at the moment and the
> networking has broken on my cubox-i as a result... and it seems that the
> u-boot developers have pissed off cubox-i u-boot hackers soo much that
> they've dropped u-boot in favour of barebox...
Okay, finally confirmed that this works with #pwm-cells = 2.
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
^ permalink raw reply
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