* [BUG] hdlcd gets confused about base address
From: Daniel Vetter @ 2016-11-22 7:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161121145528.GI1041@n2100.armlinux.org.uk>
On Mon, Nov 21, 2016 at 02:55:28PM +0000, Russell King - ARM Linux wrote:
> On Mon, Nov 21, 2016 at 02:30:53PM +0000, Russell King - ARM Linux wrote:
> > On Mon, Nov 21, 2016 at 01:24:19PM +0000, Russell King - ARM Linux wrote:
> > > On Mon, Nov 21, 2016 at 12:56:53PM +0000, Liviu Dudau wrote:
> > > > That is mostly due to the check in hdlcd_crtc_disable() which I should
> > > > remove, I've added it because I was getting a ->disable() hook call
> > > > before any ->enable() was called at startup time. I need to revisit
> > > > this as I remember Daniel was commenting that this was not needed.
> > >
> > > Removing that test results in:
> > >
> > > [drm:drm_atomic_helper_commit_cleanup_done] *ERROR* [CRTC:24:crtc-0] flip_done timed out
> > >
> > > and the kernel hanging, seemingly in an IRQs-off region.
> >
> > Annoyingly, enabling DRM debug prevents the kernel hanging...
>
> I've been trying to trace through what's happening with this flip_done
> stuff, but I'm finding it _extremely_ difficult to follow the atomic
> code.
>
> (Sorry, I'm going to go over my usual 72 column limit for this due to
> the damn long DRM function names.)
>
> I can see that drm_atomic_helper_commit() calls drm_atomic_helper_setup_commit()
> which sets up commit->flip_done for each CRTC, and sets up an event for
> each.
>
> drm_atomic_helper_commit() continues on to eventually call drm_atomic_helper_swap_state()
> which then swaps the state for the CRTCs, but then ends up dropping
> the event reference:
>
> state->crtcs[i].commit->event = NULL;
>
> What I can't see is why this isn't a leaked pointer - I don't see
> anything inbetween taking charge of that structure. The _commit_
> hasn't been swapped from what I can see, it's just state->crtcs[i].state
> that have been swapped.
The event is also stored in crtc_state->event, which after swap_states
land in drm_crtc->state->event, which is the place drivers are supposed to
pick it up from for delivery.
> So I can't see who's responsible for generating this event, or how the
> backend DRM drivers get to know about this event, and that they should
> complete the flip.
>
> What I also don't get is why DRM is wanting to wait for a flip event
> when we're disabling the CRTC. None of this makes sense to me, like
> much of the atomic modeset code...
The DRM event has two uses:
- high-precision timestamp for when the new frame starts displaying.
- confirmation that the old buffers are no longer being used by the hw.
This is used on Android's drm_hwcomposer in the new hwc2 mode.
Note that the crtc_state->event has 3 uses in total, all hidden behind the
abstraction:
- flip_done, for the atomic helpers
- drm event, for current userspace (also needed to emulate legacy flips)
- and out-fences, needed by android.
The trouble with ->event delivery was that many drivers didn't bother to
implement this at all, since driver submitters never even tested
pageflippping. And for those maintainers that did test pageflipping, they
only ever tested the legacy page_flip paths, which e.g. doesn't ever ask
for an event when disabling the CRTC (since you can't do that). But atomic
allows all this, and review wasn't enough to fight the influx of bad
drivers. Hence I opted to make the nonblocking support in the atomic
helpers enforce this part of the abi contract, even for blocking modesets.
If you're stuck on a flip_done, then your driver doesn't send out events
when disabling the CRTC.
All the waits have a 10s timeout, and none of them are in atomic contexts,
so no idea why this takes down your box. I suspect it's something
unrelated.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply
* [PATCH v3 3/3] spi: spi-fsl-dspi: Fix incorrect freeing of DMA allocated buffers
From: Sanchayan Maity @ 2016-11-22 7:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1479796821.git.maitysanchayan@gmail.com>
Buffers allocated with a call to dma_alloc_coherent should be
freed with dma_free_coherent instead of the currently used
devm_kfree.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
---
drivers/spi/spi-fsl-dspi.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 8af3151..7ada112 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -420,9 +420,11 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr)
return 0;
err_slave_config:
- devm_kfree(dev, dma->rx_dma_buf);
+ dma_free_coherent(dev, DSPI_DMA_BUFSIZE,
+ dma->rx_dma_buf, dma->rx_dma_phys);
err_rx_dma_buf:
- devm_kfree(dev, dma->tx_dma_buf);
+ dma_free_coherent(dev, DSPI_DMA_BUFSIZE,
+ dma->tx_dma_buf, dma->tx_dma_phys);
err_tx_dma_buf:
dma_release_channel(dma->chan_tx);
err_tx_channel:
--
2.10.2
^ permalink raw reply related
* [PATCH v3 2/3] spi: spi-fsl-dspi: Fix continuous selection format
From: Sanchayan Maity @ 2016-11-22 7:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1479796821.git.maitysanchayan@gmail.com>
Current DMA implementation was not handling the continuous selection
format viz. SPI chip select would be deasserted even between sequential
serial transfers.
Use existing dspi_data_to_pushr function to restructure the transmit
code path and set or reset the CONT bit on same lines as code path
in EOQ mode does. This correctly implements continuous selection format
while also correcting and cleaning up the transmit code path.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
---
drivers/spi/spi-fsl-dspi.c | 20 ++++++--------------
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 911aadb..8af3151 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -196,6 +196,8 @@ struct fsl_dspi {
struct fsl_dspi_dma *dma;
};
+static u32 dspi_data_to_pushr(struct fsl_dspi *dspi, int tx_word);
+
static inline int is_double_byte_mode(struct fsl_dspi *dspi)
{
unsigned int val;
@@ -242,24 +244,15 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi)
int time_left;
int tx_word;
int i;
- u16 val;
tx_word = is_double_byte_mode(dspi);
- for (i = 0; i < dma->curr_xfer_len - 1; i++) {
- val = tx_word ? *(u16 *) dspi->tx : *(u8 *) dspi->tx;
- dspi->dma->tx_dma_buf[i] =
- SPI_PUSHR_TXDATA(val) | SPI_PUSHR_PCS(dspi->cs) |
- SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT;
- dspi->tx += tx_word + 1;
+ for (i = 0; i < dma->curr_xfer_len; i++) {
+ dspi->dma->tx_dma_buf[i] = dspi_data_to_pushr(dspi, tx_word);
+ if ((dspi->cs_change) && (!dspi->len))
+ dspi->dma->tx_dma_buf[i] &= ~SPI_PUSHR_CONT;
}
- val = tx_word ? *(u16 *) dspi->tx : *(u8 *) dspi->tx;
- dspi->dma->tx_dma_buf[i] = SPI_PUSHR_TXDATA(val) |
- SPI_PUSHR_PCS(dspi->cs) |
- SPI_PUSHR_CTAS(0);
- dspi->tx += tx_word + 1;
-
dma->tx_desc = dmaengine_prep_slave_single(dma->chan_tx,
dma->tx_dma_phys,
dma->curr_xfer_len *
@@ -351,7 +344,6 @@ static int dspi_dma_xfer(struct fsl_dspi *dspi)
curr_remaining_bytes -= dma->curr_xfer_len * word;
if (curr_remaining_bytes < 0)
curr_remaining_bytes = 0;
- dspi->len = curr_remaining_bytes;
}
}
--
2.10.2
^ permalink raw reply related
* [PATCH v3 1/3] spi: spi-fsl-dspi: Fix incorrect DMA setup
From: Sanchayan Maity @ 2016-11-22 7:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1479796821.git.maitysanchayan@gmail.com>
Currently dmaengine_prep_slave_single was being called with length
set to the complete DMA buffer size. This resulted in unwanted bytes
being transferred to the SPI register leading to clock and MOSI lines
having unwanted data even after chip select got deasserted and the
required bytes having been transferred.
While at it also clean up the use of curr_xfer_len which is central
to the DMA setup, from bytes to DMA transfers for every use.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
---
drivers/spi/spi-fsl-dspi.c | 35 ++++++++++++++++++-----------------
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index b1ee1f5..911aadb 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -151,6 +151,7 @@ static const struct fsl_dspi_devtype_data ls2085a_data = {
};
struct fsl_dspi_dma {
+ /* Length of transfer in words of DSPI_FIFO_SIZE */
u32 curr_xfer_len;
u32 *tx_dma_buf;
@@ -217,15 +218,13 @@ static void dspi_rx_dma_callback(void *arg)
struct fsl_dspi *dspi = arg;
struct fsl_dspi_dma *dma = dspi->dma;
int rx_word;
- int i, len;
+ int i;
u16 d;
rx_word = is_double_byte_mode(dspi);
- len = rx_word ? (dma->curr_xfer_len / 2) : dma->curr_xfer_len;
-
if (!(dspi->dataflags & TRAN_STATE_RX_VOID)) {
- for (i = 0; i < len; i++) {
+ for (i = 0; i < dma->curr_xfer_len; i++) {
d = dspi->dma->rx_dma_buf[i];
rx_word ? (*(u16 *)dspi->rx = d) :
(*(u8 *)dspi->rx = d);
@@ -242,14 +241,12 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi)
struct device *dev = &dspi->pdev->dev;
int time_left;
int tx_word;
- int i, len;
+ int i;
u16 val;
tx_word = is_double_byte_mode(dspi);
- len = tx_word ? (dma->curr_xfer_len / 2) : dma->curr_xfer_len;
-
- for (i = 0; i < len - 1; i++) {
+ for (i = 0; i < dma->curr_xfer_len - 1; i++) {
val = tx_word ? *(u16 *) dspi->tx : *(u8 *) dspi->tx;
dspi->dma->tx_dma_buf[i] =
SPI_PUSHR_TXDATA(val) | SPI_PUSHR_PCS(dspi->cs) |
@@ -265,7 +262,9 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi)
dma->tx_desc = dmaengine_prep_slave_single(dma->chan_tx,
dma->tx_dma_phys,
- DSPI_DMA_BUFSIZE, DMA_MEM_TO_DEV,
+ dma->curr_xfer_len *
+ DMA_SLAVE_BUSWIDTH_4_BYTES,
+ DMA_MEM_TO_DEV,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
if (!dma->tx_desc) {
dev_err(dev, "Not able to get desc for DMA xfer\n");
@@ -281,7 +280,9 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi)
dma->rx_desc = dmaengine_prep_slave_single(dma->chan_rx,
dma->rx_dma_phys,
- DSPI_DMA_BUFSIZE, DMA_DEV_TO_MEM,
+ dma->curr_xfer_len *
+ DMA_SLAVE_BUSWIDTH_4_BYTES,
+ DMA_DEV_TO_MEM,
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
if (!dma->rx_desc) {
dev_err(dev, "Not able to get desc for DMA xfer\n");
@@ -328,17 +329,17 @@ static int dspi_dma_xfer(struct fsl_dspi *dspi)
struct device *dev = &dspi->pdev->dev;
int curr_remaining_bytes;
int bytes_per_buffer;
- int tx_word;
+ int word = 1;
int ret = 0;
- tx_word = is_double_byte_mode(dspi);
+ if (is_double_byte_mode(dspi))
+ word = 2;
curr_remaining_bytes = dspi->len;
+ bytes_per_buffer = DSPI_DMA_BUFSIZE / DSPI_FIFO_SIZE;
while (curr_remaining_bytes) {
/* Check if current transfer fits the DMA buffer */
- dma->curr_xfer_len = curr_remaining_bytes;
- bytes_per_buffer = DSPI_DMA_BUFSIZE /
- (DSPI_FIFO_SIZE / (tx_word ? 2 : 1));
- if (curr_remaining_bytes > bytes_per_buffer)
+ dma->curr_xfer_len = curr_remaining_bytes / word;
+ if (dma->curr_xfer_len > bytes_per_buffer)
dma->curr_xfer_len = bytes_per_buffer;
ret = dspi_next_xfer_dma_submit(dspi);
@@ -347,7 +348,7 @@ static int dspi_dma_xfer(struct fsl_dspi *dspi)
goto exit;
} else {
- curr_remaining_bytes -= dma->curr_xfer_len;
+ curr_remaining_bytes -= dma->curr_xfer_len * word;
if (curr_remaining_bytes < 0)
curr_remaining_bytes = 0;
dspi->len = curr_remaining_bytes;
--
2.10.2
^ permalink raw reply related
* [PATCH v3 0/3] Fixes for Vybrid SPI DMA implementation
From: Sanchayan Maity @ 2016-11-22 7:01 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
This v3 set of patches have fixes for Vybrid SPI DMA
implementation and is rebased on top of latest topic/fsl-dspi.
http://git.kernel.org/cgit/linux/kernel/git/broonie/spi.git/log/?h=topic/fsl-dspi
The patches have been tested on a Toradex Colibri Vybrid VF61 module
and now incoporate feedback from Stefan on version 2 of patchset.
Changes since v2:
1. Drop the patch "Fix SPI transfer issue when using multiple SPI_IOC_MESSAGE"
since it's now applied and rebase the whole patchset
2. Second patch in this series "Fix continuous selection format" now
fixes the issue using an existing function and handling it similar to
existing EOQ mode and also cleaning up nicely the transmit code path.
3. Third patch now just fixes the incorrect freeing of DMA allocated buffers
and drops the minor clean up patch from earlier series completely due to
the clean up from 2 above.
Changes since v1:
1. Place the continuous selection format patch second in order and remove
code duplication
2. Improve the use of curr_xfer_len and instead of converting from bytes
to DMA transfers in every use, do it at a single place. Accordingly change
it's use at other places
3. Code cleanup patch has less to clean with change above
v2:
https://www.spinics.net/lists/arm-kernel/msg543941.html
v1:
http://www.mail-archive.com/linux-kernel at vger.kernel.org/msg1274632.html
Thanks & Regards,
Sanchayan.
Sanchayan Maity (3):
spi: spi-fsl-dspi: Fix incorrect DMA setup
spi: spi-fsl-dspi: Fix continuous selection format
spi: spi-fsl-dspi: Fix incorrect freeing of DMA allocated buffers
drivers/spi/spi-fsl-dspi.c | 59 +++++++++++++++++++++-------------------------
1 file changed, 27 insertions(+), 32 deletions(-)
--
2.10.2
^ permalink raw reply
* [PATCH v2 1/5] ARM: memory: da8xx-ddrctl: new driver
From: Sekhar Nori @ 2016-11-22 6:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5833A2DA.40701@gmail.com>
Hi Frank,
On Tuesday 22 November 2016 07:13 AM, Frank Rowand wrote:
> On 11/21/16 08:33, Sekhar Nori wrote:
>> On Monday 31 October 2016 08:15 PM, Bartosz Golaszewski wrote:
>>> +static int da8xx_ddrctl_probe(struct platform_device *pdev)
>>> +{
>>> + const struct da8xx_ddrctl_config_knob *knob;
>>> + const struct da8xx_ddrctl_setting *setting;
>>> + struct device_node *node;
>>> + struct resource *res;
>>> + void __iomem *ddrctl;
>>> + struct device *dev;
>>> + u32 reg;
>>> +
>>> + dev = &pdev->dev;
>>> + node = dev->of_node;
>>> +
>>> + setting = da8xx_ddrctl_get_board_settings();
>>> + if (!setting) {
>>> + dev_err(dev, "no settings for board '%s'\n",
>>> + of_flat_dt_get_machine_name());
>>> + return -EINVAL;
>>> + }
>>
>> This causes a section mismatch because of_flat_dt_get_machine_name()
>> has an __init annotation. I did not notice that before, sorry.
>>
>> It can be fixed with a patch like below:
>>
>> ---8<---
>> diff --git a/drivers/memory/da8xx-ddrctl.c b/drivers/memory/da8xx-ddrctl.c
>> index a20e7bbbcbe0..9ca5aab3ac54 100644
>> --- a/drivers/memory/da8xx-ddrctl.c
>> +++ b/drivers/memory/da8xx-ddrctl.c
>> @@ -102,6 +102,18 @@ static const struct da8xx_ddrctl_setting *da8xx_ddrctl_get_board_settings(void)
>> return NULL;
>> }
>>
>> +static const char* da8xx_ddrctl_get_machine_name(void)
>> +{
>> + const char *str;
>> + int ret;
>> +
>> + ret = of_property_read_string(of_root, "model", &str);
>> + if (ret)
>> + ret = of_property_read_string(of_root, "compatible", &str);
>> +
>> + return str;
>> +}
>> +
>> static int da8xx_ddrctl_probe(struct platform_device *pdev)
>> {
>> const struct da8xx_ddrctl_config_knob *knob;
>> @@ -118,7 +130,7 @@ static int da8xx_ddrctl_probe(struct platform_device *pdev)
>> setting = da8xx_ddrctl_get_board_settings();
>> if (!setting) {
>> dev_err(dev, "no settings for board '%s'\n",
>> - of_flat_dt_get_machine_name());
>
> da8xx_ddrctl_get_board_settings() tries to match based on the "compatible"
> property in the root node. The "model" property in the root node has
> nothing to do with the failure to match. So creating and then using
> da8xx_ddrctl_get_machine_name() to potentially report model is not useful.
>
> It should be sufficient to simply report that no compatible matched.
I agree with you on this. Even if model name is printed, you will have
to go back and check the compatible anyway. But I think it will be
useful to print the compatible instead of just reporting that nothing
matched.
Bartosz, if you agree too, could you send a fix patch just printing the
compatible?
Thanks,
Sekhar
^ permalink raw reply
* [PATCH v2 4/4] spi: spi-fsl-dspi: Minor code cleanup and error path fixes
From: maitysanchayan at gmail.com @ 2016-11-22 6:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <43b518a92352986f09b0893646ff8016@agner.ch>
On 16-11-21 15:22:09, Stefan Agner wrote:
> On 2016-11-20 21:54, Sanchayan Maity wrote:
> > Code cleanup for improving code readability and error path fixes
> > and cleanup removing use of devm_kfree.
>
> Two things in one, not very nice. Especially the dma_free_coherent is
> really a bug and the other is a cleanup. Can you make a separate patch
> for the bug?
>
> As for the cleanup, I don't like the one line conditions too, but I
> don't think it is worth a patch. At least the TX path should be solved
> with my suggestion in patch 2.
Agreed.
- Sanchayan.
>
> --
> Stefan
>
> >
> > Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
> > ---
> > drivers/spi/spi-fsl-dspi.c | 22 ++++++++++++++++------
> > 1 file changed, 16 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
> > index 08882f7..2987a16 100644
> > --- a/drivers/spi/spi-fsl-dspi.c
> > +++ b/drivers/spi/spi-fsl-dspi.c
> > @@ -226,8 +226,10 @@ static void dspi_rx_dma_callback(void *arg)
> > if (!(dspi->dataflags & TRAN_STATE_RX_VOID)) {
> > for (i = 0; i < dma->curr_xfer_len; i++) {
> > d = dspi->dma->rx_dma_buf[i];
> > - rx_word ? (*(u16 *)dspi->rx = d) :
> > - (*(u8 *)dspi->rx = d);
> > + if (rx_word)
> > + *(u16 *)dspi->rx = d;
> > + else
> > + *(u8 *)dspi->rx = d;
> > dspi->rx += rx_word + 1;
> > }
> > }
> > @@ -247,14 +249,20 @@ static int dspi_next_xfer_dma_submit(struct
> > fsl_dspi *dspi)
> > tx_word = is_double_byte_mode(dspi);
> >
> > for (i = 0; i < dma->curr_xfer_len - 1; i++) {
> > - val = tx_word ? *(u16 *) dspi->tx : *(u8 *) dspi->tx;
> > + if (tx_word)
> > + val = *(u16 *) dspi->tx;
> > + else
> > + val = *(u8 *) dspi->tx;
> > dspi->dma->tx_dma_buf[i] =
> > SPI_PUSHR_TXDATA(val) | SPI_PUSHR_PCS(dspi->cs) |
> > SPI_PUSHR_CTAS(0) | SPI_PUSHR_CONT;
> > dspi->tx += tx_word + 1;
> > }
> >
> > - val = tx_word ? *(u16 *) dspi->tx : *(u8 *) dspi->tx;
> > + if (tx_word)
> > + val = *(u16 *) dspi->tx;
> > + else
> > + val = *(u8 *) dspi->tx;
> > dspi->dma->tx_dma_buf[i] = SPI_PUSHR_TXDATA(val) |
> > SPI_PUSHR_PCS(dspi->cs) |
> > SPI_PUSHR_CTAS(0);
> > @@ -430,9 +438,11 @@ static int dspi_request_dma(struct fsl_dspi
> > *dspi, phys_addr_t phy_addr)
> > return 0;
> >
> > err_slave_config:
> > - devm_kfree(dev, dma->rx_dma_buf);
> > + dma_free_coherent(dev, DSPI_DMA_BUFSIZE,
> > + dma->rx_dma_buf, dma->rx_dma_phys);
> > err_rx_dma_buf:
> > - devm_kfree(dev, dma->tx_dma_buf);
> > + dma_free_coherent(dev, DSPI_DMA_BUFSIZE,
> > + dma->tx_dma_buf, dma->tx_dma_phys);
> > err_tx_dma_buf:
> > dma_release_channel(dma->chan_tx);
> > err_tx_channel:
^ permalink raw reply
* [PATCH v2 2/4] spi: spi-fsl-dspi: Fix continuous selection format
From: maitysanchayan at gmail.com @ 2016-11-22 6:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <59ac10adfe92916770aa30146e958887@agner.ch>
On 16-11-21 15:15:41, Stefan Agner wrote:
> On 2016-11-20 21:54, Sanchayan Maity wrote:
> > Current DMA implementation was not handling the continuous selection
> > format viz. SPI chip select would be deasserted even between sequential
> > serial transfers. Use the cs_change variable and correctly set or
> > reset the CONT bit accordingly for case where peripherals require
> > the chip select to be asserted between sequential transfers.
> >
> > Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
> > ---
> > drivers/spi/spi-fsl-dspi.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
> > index b1ee1f5..41422cd 100644
> > --- a/drivers/spi/spi-fsl-dspi.c
> > +++ b/drivers/spi/spi-fsl-dspi.c
> > @@ -261,6 +261,8 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi)
> > dspi->dma->tx_dma_buf[i] = SPI_PUSHR_TXDATA(val) |
> > SPI_PUSHR_PCS(dspi->cs) |
> > SPI_PUSHR_CTAS(0);
> > + if (!dspi->cs_change)
> > + dspi->dma->tx_dma_buf[i] |= SPI_PUSHR_CONT;
> > dspi->tx += tx_word + 1;
> >
> > dma->tx_desc = dmaengine_prep_slave_single(dma->chan_tx,
>
> Other transfer mode use:
>
> if ((dspi->cs_change) && (!dspi->len))
>
> dspi_pushr &= ~SPI_PUSHR_CONT;
>
> which indicates that they only clear SPI_PUSHR_CONT at the very end of a
> transfer... The DMA code currently deselects after every DMA transfer if
> dspi->cs_change is set.
>
> Maybe we should use the helper dspi_data_to_pushr to fill the DMA buffer
> and _clear_ SPI_PUSHR_CONT if necessary like the other transfer modes
> do... Then we can use the for loop to fill the complete buffer and get
> rid of some code dupplication.
>
> I see that dspi_data_to_pushr does move len too, which we did not in the
> DMA case. dspi->len gets incremented only on successful DMA transfer in
> dspi_dma_xfer. However, I wonder if that is not even a bug: We increment
> dspi->tx always, but len only on success. This makes len go off sync
> with regards to the tx pointer which does not help anybody. So lets get
> rid of the update code in dspi_dma_xfer
>
Thanks for the feedback. Using dspi_data_to_pushr really cleans up that
tx path very nicely. Why didn't I see it. Will send a follow up patch
soon after testing again.
- Sanchayan.
^ permalink raw reply
* [GIT PULL 6/6] Broadcom defconfig-arm64 changes for 4.10
From: Florian Fainelli @ 2016-11-22 5:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122054824.16974-1-f.fainelli@gmail.com>
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
http://github.com/Broadcom/stblinux.git tags/arm-soc/for-4.10/defconfig-arm64
for you to fetch changes up to 9efacfc80902c6ddf538a2f396e0112c1f6d1e23:
Merge tag 'bcm2835-defconfig-64-next-2016-11-18' into defconfig-arm64/next (2016-11-21 21:22:55 -0800)
----------------------------------------------------------------
This pull request contains Broadcom ARM64-based SoCs defconfig changes for 4.10,
please pull the following changes:
- Eric updates the ARMv8 defconfig to contain everything that is needed to run
a 64-bit kernel on the Raspberry Pi 3
- Scott enables the standard AT25 EEPROM driver as module for the ARM64 defconfig
- Martin enables the Raspberry Pi Thermal driver in the ARM64 defconfig
----------------------------------------------------------------
Eric Anholt (1):
arm64: Add BCM2835 (Raspberry Pi 3) support to the defconfig
Florian Fainelli (2):
Merge tag 'bcm2835-defconfig-64-next-2016-09-22' into defconfig-arm64/next
Merge tag 'bcm2835-defconfig-64-next-2016-11-18' into defconfig-arm64/next
Martin Sperl (1):
ARM64: bcm2835: add thermal driver to default config
Scott Branden (1):
arm64: defconfig: enable EEPROM_AT25 config option
arch/arm64/configs/defconfig | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
^ permalink raw reply
* [GIT PULL 5/6] Broadcom defconfig changes for 4.10
From: Florian Fainelli @ 2016-11-22 5:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122054824.16974-1-f.fainelli@gmail.com>
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
http://github.com/Broadcom/stblinux.git tags/arm-soc/for-4.10/defconfig
for you to fetch changes up to 33c037c51be5df857ae563f7fc551dc6e746d9de:
Merge tag 'bcm2835-defconfig-next-2016-11-18' into defconfig/next (2016-11-21 21:20:15 -0800)
----------------------------------------------------------------
This pull request contains Broadcom ARM-based defconfig changes for 4.10, please
pull the following:
- Florian updates the multi_v7_defconfig with the relevant basic drivers needed
for the Broadcom BCM5301x (Northstar) SoCs to reboot, have PCIe, and Ethernet
- Martin enables the Raspberry Pi thermal driver in bcm2835_defconfig
----------------------------------------------------------------
Florian Fainelli (2):
ARM: multi_v7_defconfig: Enable BCM47xx/BCM5301x drivers
Merge tag 'bcm2835-defconfig-next-2016-11-18' into defconfig/next
Martin Sperl (1):
ARM: bcm2835: add thermal driver to default config
arch/arm/configs/bcm2835_defconfig | 2 ++
arch/arm/configs/multi_v7_defconfig | 13 +++++++++++++
2 files changed, 15 insertions(+)
^ permalink raw reply
* [GIT PULL 4/6] Broadcom maintainers-arm64 changes for 4.10
From: Florian Fainelli @ 2016-11-22 5:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122054824.16974-1-f.fainelli@gmail.com>
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
http://github.com/Broadcom/stblinux.git tags/arm-soc/for-4.10/maintainers-arm64
for you to fetch changes up to 3483b163d2ac14c6e35d201b9db7dde70841a199:
MAINTAINERS: Update Broadcom Vulcan maintainer email (2016-11-05 17:25:55 -0700)
----------------------------------------------------------------
This pull request contains MAINTAINERS file updates for Broadcom ARM64 entries,
please pull:
- Jayachandran updates his email address for the Broadcom Vulcan entry
----------------------------------------------------------------
Jayachandran C (1):
MAINTAINERS: Update Broadcom Vulcan maintainer email
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
^ permalink raw reply
* [GIT PULL 3/6] Broadcom devicetree-arm64 changes for 4.10
From: Florian Fainelli @ 2016-11-22 5:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122054824.16974-1-f.fainelli@gmail.com>
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
http://github.com/Broadcom/stblinux.git tags/arm-soc/for-4.10/devicetree-arm64
for you to fetch changes up to e687607116bc45afcbbcd0097129573f9729ff21:
Merge tag 'bcm2835-dt-64-next-2016-11-18' into devicetree-arm64/next (2016-11-21 21:09:19 -0800)
----------------------------------------------------------------
This pull request contains Broadcom ARM64 based SoC Device Tree changes for
4.10, please pull the following:
- Robin updates the Northstart 2 DTS to use the generic IOMMU binding
- Scott renames the Broadcom Northstar 2 binding document to use a standard name
including the brcm vendor prefix
- Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the
Northstar 2 SVK reference board DTS file with it enabled.
- Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the
Northstar 2 SoC
- Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the
Northstar 2 SoC
- Ray adds required properties NAND controller properties to make NAND work on
the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included
here to resolve DTS file merges
- Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS
- Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3)
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also uses the proper DTSI file to define the USB host mode
for the USB Device Tree nodes
----------------------------------------------------------------
Andrea Merello (1):
ARM64: dts: bcm2837-rpi-3-b: remove incorrect pwr LED
Andreas F?rber (1):
ARM64: dts: bcm2835: Fix bcm2837 compatible string
Eric Anholt (2):
ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
Merge branch 'bcm2835-dt-next' into bcm2835-dt-64-next
Florian Fainelli (1):
Merge tag 'bcm2835-dt-64-next-2016-11-18' into devicetree-arm64/next
Gerd Hoffmann (6):
pinctrl: bcm2835: add pull defines to dt bindings
ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
ARM: dts: bcm283x: drop alt3 from &gpio
Jon Mason (2):
arm64: dts: NS2: enable sdio1
arm64: dts: NS2: Add PCI PHYs
Kamal Dasu (1):
ARM64: dts: Add QSPI Device Tree node for NS2
Linus Walleij (1):
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
Martin Sperl (3):
dt: bindings: add thermal device driver for bcm2835
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
ARM64: bcm2835: dts: add thermal node to device-tree of bcm2837
Ray Jui (1):
arm64: dts: Updated NAND DT properties for NS2 SVK
Rob Rice (1):
arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver.
Robin Murphy (1):
arm64: dts: Update Broadcom NS2 to generic IOMMU binding
Scott Branden (1):
arm64: dts: rename ns2.txt to brcm,ns2.txt
Stefan Wahren (3):
ARM64: dts: bcm283x: Use dtsi for USB host mode
DT: binding: bcm2835-mbox: fix address typo in example
ARM: dts: bcm283x: fix typo in mailbox address
.../bindings/arm/bcm/{ns2.txt => brcm,ns2.txt} | 0
.../bindings/mailbox/brcm,bcm2835-mbox.txt | 2 +-
.../bindings/thermal/brcm,bcm2835-thermal.txt | 17 ++
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 67 ++++++-
arch/arm/boot/dts/bcm2835-rpi-a.dts | 69 ++++++-
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 68 ++++++-
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 68 ++++++-
arch/arm/boot/dts/bcm2835-rpi-b.dts | 69 ++++++-
arch/arm/boot/dts/bcm2835-rpi-zero.dts | 2 +-
arch/arm/boot/dts/bcm2835-rpi.dtsi | 15 +-
arch/arm/boot/dts/bcm2835.dtsi | 6 +
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 2 +-
arch/arm/boot/dts/bcm2836.dtsi | 6 +
arch/arm/boot/dts/bcm283x.dtsi | 212 ++++++++++++++++++++-
arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 8 +-
arch/arm64/boot/dts/broadcom/bcm2837.dtsi | 8 +-
.../boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi | 1 +
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 40 ++++
arch/arm64/boot/dts/broadcom/ns2.dtsi | 62 +++++-
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 -
include/dt-bindings/pinctrl/bcm2835.h | 5 +
21 files changed, 703 insertions(+), 30 deletions(-)
rename Documentation/devicetree/bindings/arm/bcm/{ns2.txt => brcm,ns2.txt} (100%)
create mode 100644 Documentation/devicetree/bindings/thermal/brcm,bcm2835-thermal.txt
create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi
^ permalink raw reply
* [GIT PULL 2/6] Broadcom devicetree changes for 4.10
From: Florian Fainelli @ 2016-11-22 5:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122054824.16974-1-f.fainelli@gmail.com>
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
http://github.com/Broadcom/stblinux.git tags/arm-soc/for-4.10/devicetree
for you to fetch changes up to 509f8342993be7ce2938edacec05b6e8d780c83e:
Merge tag 'bcm2835-dt-next-2016-11-18' into devicetree/next (2016-11-21 21:03:18 -0800)
----------------------------------------------------------------
This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.10,
please pull the following:
- Rafal adds support for the Netgear R8500 routers, adds basic support
for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
A7). He also enables the UART on the Netgear R8000 and restructures the
include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
support for the TP-LINK Archer C9 V1 router.
- Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
the bcm958625k reference board to have it enabled
- Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
a BCM47094)
- Scott fixes the pinctrl names in the Cygnus DTS files
- Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
the node for the OTP controller found on Cygnus SoCs
- Dhananjay enables the GPIO B controller on Norstarh Plus SoCs
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
adds names for the Raspberry Zero GPIO lines
----------------------------------------------------------------
Dan Haab (2):
ARM: BCM5301X: Add DT for Luxul XAP-1510
ARM: BCM5301X: Add DT for Luxul XWR-3100
Eric Anholt (1):
ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.
Florian Fainelli (1):
Merge tag 'bcm2835-dt-next-2016-11-18' into devicetree/next
Gerd Hoffmann (6):
pinctrl: bcm2835: add pull defines to dt bindings
ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
ARM: dts: bcm283x: drop alt3 from &gpio
Jonathan Richardson (3):
ARM: dts: Enable Broadcom iProc mailbox controller
ARM: dts: Enable interrupt support for cygnus crmu gpio driver
ARM: dts: Add node for Broadcom OTP controller driver
Kamal Dasu (1):
ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes
Linus Walleij (1):
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
Martin Sperl (2):
dt: bindings: add thermal device driver for bcm2835
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
Rafa? Mi?ecki (7):
ARM: BCM5301X: Add DT for Netgear R8500
ARM: BCM5301X: Add basic dts for BCM53573 based Tenda AC9
ARM: BCM5301X: Add separated DTS include file for BCM47094
ARM: BCM5301X: Enable UART on Netgear R8000
ARM: BCM5301X: Specify USB 3.0 PHY in DT
ARM: BCM53573: Specify PMU and its ILP clock in the DT
ARM: BCM5301X: Add DT for TP-LINK Archer C9 V1
Scott Branden (1):
ARM: dts: cygnus: fix naming of pinctrl node
Stefan Wahren (4):
DT: binding: bcm2835-mbox: fix address typo in example
ARM: dts: bcm283x: fix typo in mailbox address
ARM: bcm2835: Fix names for the Raspberry Pi GPIO lines
ARM: bcm2835: Add names for the RPi Zero GPIO lines
Yendapally Reddy Dhananjaya Reddy (1):
ARM: dts: enable GPIO-b for Broadcom NSP
.../bindings/mailbox/brcm,bcm2835-mbox.txt | 2 +-
.../bindings/thermal/brcm,bcm2835-thermal.txt | 17 ++
arch/arm/boot/dts/Makefile | 6 +
arch/arm/boot/dts/bcm-cygnus.dtsi | 21 +-
arch/arm/boot/dts/bcm-nsp.dtsi | 41 +++-
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 67 ++++++-
arch/arm/boot/dts/bcm2835-rpi-a.dts | 69 ++++++-
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 68 ++++++-
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 68 ++++++-
arch/arm/boot/dts/bcm2835-rpi-b.dts | 69 ++++++-
arch/arm/boot/dts/bcm2835-rpi-zero.dts | 67 ++++++-
arch/arm/boot/dts/bcm2835-rpi.dtsi | 15 +-
arch/arm/boot/dts/bcm2835.dtsi | 6 +
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 2 +-
arch/arm/boot/dts/bcm2836.dtsi | 6 +
arch/arm/boot/dts/bcm283x.dtsi | 212 ++++++++++++++++++++-
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 64 +++++++
arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 2 +-
arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 2 +-
arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 2 +-
arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 6 +-
arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts | 114 +++++++++++
arch/arm/boot/dts/bcm4709.dtsi | 11 ++
arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 3 +-
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 111 +++++++++++
arch/arm/boot/dts/bcm47094-netgear-r8500.dts | 103 ++++++++++
arch/arm/boot/dts/bcm47094.dtsi | 17 ++
arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 74 +++++++
arch/arm/boot/dts/bcm5301x-nand-cs0-bch4.dtsi | 13 ++
arch/arm/boot/dts/bcm5301x.dtsi | 7 +
arch/arm/boot/dts/bcm53573.dtsi | 159 ++++++++++++++++
arch/arm/boot/dts/bcm958625k.dts | 34 ++++
drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 -
include/dt-bindings/pinctrl/bcm2835.h | 5 +
34 files changed, 1440 insertions(+), 29 deletions(-)
create mode 100644 Documentation/devicetree/bindings/thermal/brcm,bcm2835-thermal.txt
create mode 100644 arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
create mode 100644 arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
create mode 100644 arch/arm/boot/dts/bcm4709.dtsi
create mode 100644 arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
create mode 100644 arch/arm/boot/dts/bcm47094-netgear-r8500.dts
create mode 100644 arch/arm/boot/dts/bcm47094.dtsi
create mode 100644 arch/arm/boot/dts/bcm47189-tenda-ac9.dts
create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0-bch4.dtsi
create mode 100644 arch/arm/boot/dts/bcm53573.dtsi
^ permalink raw reply
* [GIT PULL 1/6] Broadcom soc changes for 4.10
From: Florian Fainelli @ 2016-11-22 5:48 UTC (permalink / raw)
To: linux-arm-kernel
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
http://github.com/Broadcom/stblinux.git tags/arm-soc/for-4.10/soc
for you to fetch changes up to 09f3510fb70a46c8921f2cf4a90dbcae460a6820:
ARM: BCM5301X: Add back handler ignoring external imprecise aborts (2016-11-16 12:39:05 -0800)
----------------------------------------------------------------
This pull request contains Broadcom ARM-based SoC changes for 4.10, please pull
the following:
- Rafal adds back the abort handler hook on BCM5301x which is required to silence
errors forwared from the PCIe controller that cannot be silenced at the PCIe RC level
----------------------------------------------------------------
Rafa? Mi?ecki (1):
ARM: BCM5301X: Add back handler ignoring external imprecise aborts
arch/arm/mach-bcm/bcm_5301x.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
^ permalink raw reply
* [RFC PATCH net v2 2/3] dt: bindings: add ethernet phy eee-disable-advert option documentation
From: Florian Fainelli @ 2016-11-22 5:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161121164733.GG1922@lunn.ch>
Le 21/11/2016 ? 08:47, Andrew Lunn a ?crit :
>> What I did not realize when doing this patch for the realtek driver is
>> that there is already 6 valid modes defined in the kernel
>>
>> #define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX /*
>> 100TX EEE cap */
>> #define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T /*
>> 1000T EEE cap */
>> #define MDIO_EEE_10GT 0x0008 /* 10GT EEE cap */
>> #define MDIO_EEE_1000KX 0x0010 /* 1000KX EEE cap
>> */
>> #define MDIO_EEE_10GKX4 0x0020 /* 10G KX4 EEE cap
>> */
>> #define MDIO_EEE_10GKR 0x0040 /* 10G KR EEE cap
>> */
>>
>> I took care of only 2 in the case of realtek.c since it only support
>> MDIO_EEE_100TX and MDIO_EEE_1000T.
>>
>> Defining a property for each is certainly doable but it does not look
>> very nice either. If it extends in the future, it will get even more
>> messier, especially if you want to disable everything.
>
> Yes, agreed.
One risk with the definition a group of advertisement capabilities
(under the form of a bitmask for instance) to enable/disable is that we
end up with Device Tree contain some kind of configuration policy as
opposed to just flagging particular hardware features as broken.
Fortunately, there does not seem to be a ton of PHYs out there which
require EEE to be disabled to function properly so having individual
properties vs. bitmasks/groups is kind of speculative here.
Another approach to solving this problem could be to register a PHY
fixup which disables EEE at the PHY level, and which is only called for
specific boards affected by this problem (of_machine_is_compatible()).
This code can leave in arch/*/* when that is possible, or it can just be
somewhere where it is relevant, e.g; in the PHY driver for instance
(similarly to how PCI fixups are done).
--
Florian
^ permalink raw reply
* [GIT PULL 4/4] bcm2835-defconfig-64-next-2016-11-18
From: Florian Fainelli @ 2016-11-22 5:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118185835.14452-4-eric@anholt.net>
Le 18/11/2016 ? 10:58, Eric Anholt a ?crit :
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> https://github.com/anholt/linux tags/bcm2835-defconfig-64-next-2016-11-18
>
> for you to fetch changes up to ac178e4280e65f4d0d14b13a7bfec3a43ff90e66:
>
> ARM64: bcm2835: add thermal driver to default config (2016-11-11 09:00:00 -0800)
>
> ----------------------------------------------------------------
> This pull enables the BCM2837 (Pi 3) thermal driver in the defconfig.
>
> ----------------------------------------------------------------
Merged, thanks!
--
Florian
^ permalink raw reply
* [GIT PULL 3/4] bcm2835-defconfig-next-2016-11-18
From: Florian Fainelli @ 2016-11-22 5:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118185835.14452-3-eric@anholt.net>
Le 18/11/2016 ? 10:58, Eric Anholt a ?crit :
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> https://github.com/anholt/linux tags/bcm2835-defconfig-next-2016-11-18
>
> for you to fetch changes up to bab0cb90550467c71f4e1b73da406a2280c4f418:
>
> ARM: bcm2835: add thermal driver to default config (2016-11-11 09:00:37 -0800)
>
> ----------------------------------------------------------------
> This pull request enables the BCM2835 (Raspberry Pi) thermal driver in
> the Pi1 defconfig.
Merged, thanks!
--
Florian
^ permalink raw reply
* [GIT PULL 2/4] bcm2835-dt-64-next-2016-11-18
From: Florian Fainelli @ 2016-11-22 5:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118185835.14452-2-eric@anholt.net>
Le 18/11/2016 ? 10:58, Eric Anholt a ?crit :
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> https://github.com/anholt/linux tags/bcm2835-dt-64-next-2016-11-18
>
> for you to fetch changes up to a44e87b47148c6ee6b78509f47e6a15c0fae890a:
>
> ARM64: dts: bcm2837-rpi-3-b: remove incorrect pwr LED (2016-11-16 13:49:38 -0800)
>
> ----------------------------------------------------------------
> This pull request brings thermal support to the BCM2837 DT, and a few
> other fixes.
>
> In order to get the thermal node that we're adjusting the compatible
> string on, we have to merge in the bcm2835-dt-next branch.
Merged, thanks!
--
Florian
^ permalink raw reply
* [GIT PULL 1/4] bcm2835-dt-next-2016-11-18
From: Florian Fainelli @ 2016-11-22 5:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118185835.14452-1-eric@anholt.net>
Le 18/11/2016 ? 10:58, Eric Anholt a ?crit :
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> https://github.com/anholt/linux tags/bcm2835-dt-next-2016-11-18
>
> for you to fetch changes up to 3a1689ea752436917c5ce4487527ed6c444630ee:
>
> ARM: bcm2835: Add names for the RPi Zero GPIO lines (2016-11-16 13:54:36 -0800)
>
> ----------------------------------------------------------------
> This pull request brings in DT changes for BCM2835: pinctrl setup
> cleanups, GPIO line naming, and the node for the new thermal driver.
Merged, thanks Eric!
--
Florian
^ permalink raw reply
* [RFC PATCH net v2 1/3] net: phy: add an option to disable EEE advertisement
From: Anand Moon @ 2016-11-22 5:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479742524-30222-2-git-send-email-jbrunet@baylibre.com>
Hi Jerome,
On 21 November 2016 at 21:05, Jerome Brunet <jbrunet@baylibre.com> wrote:
> This patch adds an option to disable EEE advertisement in the generic PHY
> by providing a mask of prohibited modes corresponding to the value found in
> the MDIO_AN_EEE_ADV register.
>
> On some platforms, PHY Low power idle seems to be causing issues, even
> breaking the link some cases. The patch provides a convenient way for these
> platforms to disable EEE advertisement and work around the issue.
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
> drivers/net/phy/phy.c | 3 ++
> drivers/net/phy/phy_device.c | 80 +++++++++++++++++++++++++++++++++++++++-----
> include/linux/phy.h | 3 ++
> 3 files changed, 77 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
> index f424b867f73e..a44ee14bd953 100644
> --- a/drivers/net/phy/phy.c
> +++ b/drivers/net/phy/phy.c
> @@ -1348,6 +1348,9 @@ int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
> {
> int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
>
> + /* Mask prohibited EEE modes */
> + val &= ~phydev->eee_advert_disabled;
> +
> phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val);
>
> return 0;
> diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
> index 1a4bf8acad78..74c628e046cb 100644
> --- a/drivers/net/phy/phy_device.c
> +++ b/drivers/net/phy/phy_device.c
> @@ -1116,6 +1116,43 @@ static int genphy_config_advert(struct phy_device *phydev)
> }
>
> /**
> + * genphy_config_eee_advert - disable unwanted eee mode advertisement
> + * @phydev: target phy_device struct
> + *
> + * Description: Writes MDIO_AN_EEE_ADV after disabling unsupported energy
> + * efficent ethernet modes. Returns 0 if the PHY's advertisement hasn't
> + * changed, and 1 if it has changed.
> + */
> +static int genphy_config_eee_advert(struct phy_device *phydev)
> +{
> + u32 disabled = phydev->eee_advert_disabled;
> + u32 old_adv, adv;
> +
> + /* Nothing to disable */
> + if (!disabled)
> + return 0;
> +
> + /* If the following call fails, we assume that EEE is not
> + * supported by the phy. If we read 0, EEE is not advertised
> + * In both case, we don't need to continue
> + */
> + adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN);
> + if (adv <= 0)
> + return 0;
> +
> + old_adv = adv;
> + adv &= ~disabled;
> +
> + /* Advertising remains unchanged with the ban */
> + if (old_adv == adv)
> + return 0;
> +
> + phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, adv);
> +
> + return 1;
> +}
> +
> +/**
> * genphy_setup_forced - configures/forces speed/duplex from @phydev
> * @phydev: target phy_device struct
> *
> @@ -1173,15 +1210,20 @@ EXPORT_SYMBOL(genphy_restart_aneg);
> */
> int genphy_config_aneg(struct phy_device *phydev)
> {
> - int result;
> + int err, changed;
> +
> + changed = genphy_config_eee_advert(phydev);
>
> if (AUTONEG_ENABLE != phydev->autoneg)
> return genphy_setup_forced(phydev);
>
> - result = genphy_config_advert(phydev);
> - if (result < 0) /* error */
> - return result;
> - if (result == 0) {
> + err = genphy_config_advert(phydev);
> + if (err < 0) /* error */
> + return err;
> +
> + changed |= err;
> +
> + if (changed == 0) {
> /* Advertisement hasn't changed, but maybe aneg was never on to
> * begin with? Or maybe phy was isolated?
> */
> @@ -1191,16 +1233,16 @@ int genphy_config_aneg(struct phy_device *phydev)
> return ctl;
>
> if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
> - result = 1; /* do restart aneg */
> + changed = 1; /* do restart aneg */
> }
>
> /* Only restart aneg if we are advertising something different
> * than we were before.
> */
> - if (result > 0)
> - result = genphy_restart_aneg(phydev);
> + if (changed > 0)
> + return genphy_restart_aneg(phydev);
>
> - return result;
> + return 0;
> }
> EXPORT_SYMBOL(genphy_config_aneg);
>
> @@ -1558,6 +1600,21 @@ static void of_set_phy_supported(struct phy_device *phydev)
> __set_phy_supported(phydev, max_speed);
> }
>
> +static void of_set_phy_eee_disable(struct phy_device *phydev)
> +{
> + struct device_node *node = phydev->mdio.dev.of_node;
> + u32 disabled;
> +
> + if (!IS_ENABLED(CONFIG_OF_MDIO))
> + return;
> +
> + if (!node)
> + return;
> +
> + if (!of_property_read_u32(node, "eee-advert-disable", &disabled))
> + phydev->eee_advert_disabled = disabled;
> +}
> +
> /**
> * phy_probe - probe and init a PHY device
> * @dev: device to probe and init
> @@ -1595,6 +1652,11 @@ static int phy_probe(struct device *dev)
> of_set_phy_supported(phydev);
> phydev->advertising = phydev->supported;
>
> + /* Get the EEE modes we want to prohibit. We will ask
> + * the PHY stop advertising these mode later on
> + */
> + of_set_phy_eee_disable(phydev);
> +
> /* Set the state to READY by default */
> phydev->state = PHY_READY;
>
> diff --git a/include/linux/phy.h b/include/linux/phy.h
> index e25f1830fbcf..7f2ea0af16d1 100644
> --- a/include/linux/phy.h
> +++ b/include/linux/phy.h
> @@ -401,6 +401,9 @@ struct phy_device {
> u32 advertising;
> u32 lp_advertising;
>
> + /* Energy efficient ethernet modes which should be prohibited */
> + u32 eee_advert_disabled;
> +
> int autoneg;
>
> int link_timeout;
> --
> 2.7.4
>
iperf3 tcp test summary at my end
Test Complete. Summary Results:
[ ID] Interval Transfer Bandwidth Retr
[ 4] 0.00-100.00 sec 10.9 GBytes 936 Mbits/sec 0 sender
[ 4] 0.00-100.00 sec 10.9 GBytes 936 Mbits/sec receiver
CPU Utilization: local/sender 5.7% (0.2%u/5.5%s), remote/receiver
11.9% (0.9%u/11.0%s)
iperf3 udp test summary at my end.
Test Complete. Summary Results:
[ ID] Interval Transfer Bandwidth Jitter
Lost/Total Datagrams
[ 4] 0.00-100.00 sec 12.5 MBytes 1.05 Mbits/sec 0.025 ms 0/1599 (0%)
[ 4] Sent 1599 datagrams
CPU Utilization: local/sender 0.1% (0.0%u/0.1%s), remote/receiver 0.0%
(0.0%u/0.0%s)
Best Regards
-Anand Moon
>
> _______________________________________________
> linux-amlogic mailing list
> linux-amlogic at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply
* [PATCH] i2c: designware: add reset interface
From: Zhangfei Gao @ 2016-11-22 4:41 UTC (permalink / raw)
To: linux-arm-kernel
Some platforms like hi3660 need do reset first to allow accessing registers
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
drivers/i2c/busses/i2c-designware-core.h | 1 +
drivers/i2c/busses/i2c-designware-platdrv.c | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 0d44d2a..94b14fa 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -80,6 +80,7 @@ struct dw_i2c_dev {
void __iomem *base;
struct completion cmd_complete;
struct clk *clk;
+ struct reset_control *rst;
u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev);
struct dw_pci_controller *controller;
int cmd_err;
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 0b42a12..fd80e58 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -38,6 +38,7 @@
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/io.h>
+#include <linux/reset.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/platform_data/i2c-designware.h>
@@ -176,6 +177,10 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
dev->irq = irq;
platform_set_drvdata(pdev, dev);
+ dev->rst = devm_reset_control_get(&pdev->dev, NULL);
+ if (!IS_ERR(dev->rst))
+ reset_control_reset(dev->rst);
+
/* fast mode by default because of legacy reasons */
dev->clk_freq = 400000;
--
2.7.4
^ permalink raw reply related
* [PATCH 2/2] arm64: Pass RAM boundary and enable-dcache flag to purgatory
From: Pratyush Anand @ 2016-11-22 4:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1479788404.git.panand@redhat.com>
When "enable-dcache" is passed to the kexec() command line, kexec-tools
passes this information to purgatory, which in turn enables cache during
sha-256 verification.
RAM boundary which includes all the sections is needed for creating
identity page mapping and to enable d-cache for those areas. Therefore
these informations are passed to purgatory as well.
Signed-off-by: Pratyush Anand <panand@redhat.com>
---
kexec/arch/arm64/include/arch/options.h | 6 +++++-
kexec/arch/arm64/include/types.h | 16 ++++++++++++++++
kexec/arch/arm64/kexec-arm64.c | 25 ++++++++++++++++++++++++-
purgatory/arch/arm64/purgatory-arm64.c | 11 +++++++++++
4 files changed, 56 insertions(+), 2 deletions(-)
create mode 100644 kexec/arch/arm64/include/types.h
diff --git a/kexec/arch/arm64/include/arch/options.h b/kexec/arch/arm64/include/arch/options.h
index a17d933e396b..3e76ff04d6c1 100644
--- a/kexec/arch/arm64/include/arch/options.h
+++ b/kexec/arch/arm64/include/arch/options.h
@@ -5,13 +5,15 @@
#define OPT_DTB ((OPT_MAX)+1)
#define OPT_INITRD ((OPT_MAX)+2)
#define OPT_REUSE_CMDLINE ((OPT_MAX)+3)
-#define OPT_ARCH_MAX ((OPT_MAX)+4)
+#define OPT_ENABLE_DCACHE ((OPT_MAX)+4)
+#define OPT_ARCH_MAX ((OPT_MAX)+5)
#define KEXEC_ARCH_OPTIONS \
KEXEC_OPTIONS \
{ "append", 1, NULL, OPT_APPEND }, \
{ "command-line", 1, NULL, OPT_APPEND }, \
{ "dtb", 1, NULL, OPT_DTB }, \
+ { "enable-dcache", 0, NULL, OPT_ENABLE_DCACHE }, \
{ "initrd", 1, NULL, OPT_INITRD }, \
{ "ramdisk", 1, NULL, OPT_INITRD }, \
{ "reuse-cmdline", 0, NULL, OPT_REUSE_CMDLINE }, \
@@ -24,6 +26,7 @@ static const char arm64_opts_usage[] __attribute__ ((unused)) =
" --append=STRING Set the kernel command line to STRING.\n"
" --command-line=STRING Set the kernel command line to STRING.\n"
" --dtb=FILE Use FILE as the device tree blob.\n"
+" --enable-dcache Enable D-Cache in Purgatory for faster SHA verification.\n"
" --initrd=FILE Use FILE as the kernel initial ramdisk.\n"
" --ramdisk=FILE Use FILE as the kernel initial ramdisk.\n"
" --reuse-cmdline Use kernel command line from running system.\n";
@@ -32,6 +35,7 @@ struct arm64_opts {
const char *command_line;
const char *dtb;
const char *initrd;
+ uint8_t enable_dcache;
};
extern struct arm64_opts arm64_opts;
diff --git a/kexec/arch/arm64/include/types.h b/kexec/arch/arm64/include/types.h
new file mode 100644
index 000000000000..08f833a6d585
--- /dev/null
+++ b/kexec/arch/arm64/include/types.h
@@ -0,0 +1,16 @@
+#ifndef _TYPES_H_
+#define _TYPES_H_
+
+#define min(x,y) ({ \
+ typeof(x) _x = (x); \
+ typeof(y) _y = (y); \
+ (void) (&_x == &_y); \
+ _x < _y ? _x : _y; })
+
+#define max(x,y) ({ \
+ typeof(x) _x = (x); \
+ typeof(y) _y = (y); \
+ (void) (&_x == &_y); \
+ _x > _y ? _x : _y; })
+
+#endif /* _TYPES_H_ */
diff --git a/kexec/arch/arm64/kexec-arm64.c b/kexec/arch/arm64/kexec-arm64.c
index 288548f49304..b54d1b5304f6 100644
--- a/kexec/arch/arm64/kexec-arm64.c
+++ b/kexec/arch/arm64/kexec-arm64.c
@@ -23,6 +23,7 @@
#include "fs2dt.h"
#include "kexec-syscall.h"
#include "arch/options.h"
+#include "types.h"
/* Global varables the core kexec routines expect. */
@@ -130,6 +131,9 @@ int arch_process_options(int argc, char **argv)
case OPT_PANIC:
die("load-panic (-p) not supported");
break;
+ case OPT_ENABLE_DCACHE:
+ arm64_opts.enable_dcache = 1;
+ break;
default:
break; /* Ignore core and unknown options. */
}
@@ -323,10 +327,13 @@ unsigned long arm64_locate_kernel_segment(struct kexec_info *info)
int arm64_load_other_segments(struct kexec_info *info,
unsigned long image_base)
{
- int result;
+ int result, i;
unsigned long dtb_base;
unsigned long hole_min;
unsigned long hole_max;
+ unsigned long arm64_ram_start = -1;
+ unsigned long arm64_ram_end = 0;
+ uint8_t purgatory_enable_dcache;
char *initrd_buf = NULL;
struct dtb dtb;
char command_line[COMMAND_LINE_SIZE] = "";
@@ -337,6 +344,8 @@ int arm64_load_other_segments(struct kexec_info *info,
command_line[sizeof(command_line) - 1] = 0;
}
+ purgatory_enable_dcache = arm64_opts.enable_dcache;
+
if (arm64_opts.dtb) {
dtb.name = "dtb_user";
dtb.buf = slurp_file(arm64_opts.dtb, &dtb.size);
@@ -419,8 +428,22 @@ int arm64_load_other_segments(struct kexec_info *info,
elf_rel_set_symbol(&info->rhdr, "arm64_kernel_entry", &image_base,
sizeof(image_base));
+ elf_rel_set_symbol(&info->rhdr, "arm64_enable_dcache",
+ &purgatory_enable_dcache, sizeof(purgatory_enable_dcache));
+
elf_rel_set_symbol(&info->rhdr, "arm64_dtb_addr", &dtb_base,
sizeof(dtb_base));
+ for (i = 0; i < info->nr_segments; i++) {
+ arm64_ram_start = min(arm64_ram_start,
+ (unsigned long)info->segment[i].mem);
+ arm64_ram_end = max(arm64_ram_end,
+ ((unsigned long)info->segment[i].mem +
+ info->segment[i].memsz));
+ }
+ elf_rel_set_symbol(&info->rhdr, "arm64_ram_start",
+ &arm64_ram_start, sizeof(arm64_ram_start));
+ elf_rel_set_symbol(&info->rhdr, "arm64_ram_end",
+ &arm64_ram_end, sizeof(arm64_ram_end));
return 0;
}
diff --git a/purgatory/arch/arm64/purgatory-arm64.c b/purgatory/arch/arm64/purgatory-arm64.c
index fe50fcf8ebc3..6d61dcbce9ac 100644
--- a/purgatory/arch/arm64/purgatory-arm64.c
+++ b/purgatory/arch/arm64/purgatory-arm64.c
@@ -4,6 +4,13 @@
#include <stdint.h>
#include <purgatory.h>
+#include "cache.h"
+
+/* Symbols set by kexec. */
+
+uint8_t arm64_enable_dcache __attribute__ ((section ("data")));
+uint64_t arm64_ram_start __attribute__ ((section ("data")));
+uint64_t arm64_ram_end __attribute__ ((section ("data")));
void putchar(int ch)
{
@@ -12,8 +19,12 @@ void putchar(int ch)
void post_verification_setup_arch(void)
{
+ if (arm64_enable_dcache)
+ disable_dcache(arm64_ram_start, arm64_ram_end);
}
void setup_arch(void)
{
+ if (arm64_enable_dcache)
+ enable_dcache(arm64_ram_start, arm64_ram_end, 0);
}
--
2.7.4
^ permalink raw reply related
* [PATCH 1/2] arm64: Add enable/disable d-cache support for purgatory
From: Pratyush Anand @ 2016-11-22 4:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1479788404.git.panand@redhat.com>
This patch adds support to enable/disable d-cache, which can be used for
faster purgatory sha256 verification.
We are supporting only 4K and 64K page sizes. This code will not work if a
hardware is not supporting at least one of these page sizes. Therefore,
D-cache is disabled by default and enabled only when "enable-dcache" is
passed to the kexec().
Since this is an identity mapped system, so VA_BITS will be same as max PA
bits supported. If VA_BITS <= 42 for 64K and <= 39 for 4K then only one
level of page table will be there with block descriptor entries.
Otherwise, For 4K mapping, TTBR points to level 0 lookups, which will have
only table entries pointing to a level 1 lookup. Level 1 will have only
block entries which will map 1GB block. For 64K mapping, TTBR points to
level 1 lookups, which will have only table entries pointing to a level 2
lookup. Level 2 will have only block entries which will map 512MB block. If
UART base address and RAM addresses are not at least 1GB and 512MB apart
for 4K and 64K respectively, then mapping result could be unpredictable. In
that case we need to support one more level of granularity, but until
someone needs that keep it like this only.
We can not allocate dynamic memory in purgatory. Therefore we keep page
table allocation size fixed as (3 * MAX_PAGE_SIZE). (page_table) points to
first level (having only table entries) and (page_table + MAX_PAGE_SIZE)
points to table at next level (having block entries). If index for RAM
area and UART area in first table is not same, then we will need another
next level table which will be located at (page_table + 2 * MAX_PAGE_SIZE).
Signed-off-by: Pratyush Anand <panand@redhat.com>
---
purgatory/arch/arm64/Makefile | 2 +
purgatory/arch/arm64/cache-asm.S | 186 ++++++++++++++++++++++
purgatory/arch/arm64/cache.c | 330 +++++++++++++++++++++++++++++++++++++++
purgatory/arch/arm64/cache.h | 79 ++++++++++
4 files changed, 597 insertions(+)
create mode 100644 purgatory/arch/arm64/cache-asm.S
create mode 100644 purgatory/arch/arm64/cache.c
create mode 100644 purgatory/arch/arm64/cache.h
diff --git a/purgatory/arch/arm64/Makefile b/purgatory/arch/arm64/Makefile
index 636abeab17b2..0f80f8165d90 100644
--- a/purgatory/arch/arm64/Makefile
+++ b/purgatory/arch/arm64/Makefile
@@ -11,6 +11,8 @@ arm64_PURGATORY_EXTRA_CFLAGS = \
arm64_PURGATORY_SRCS += \
purgatory/arch/arm64/entry.S \
+ purgatory/arch/arm64/cache-asm.S \
+ purgatory/arch/arm64/cache.c \
purgatory/arch/arm64/purgatory-arm64.c
dist += \
diff --git a/purgatory/arch/arm64/cache-asm.S b/purgatory/arch/arm64/cache-asm.S
new file mode 100644
index 000000000000..bef97ef48888
--- /dev/null
+++ b/purgatory/arch/arm64/cache-asm.S
@@ -0,0 +1,186 @@
+/*
+ * Some of the routines have been copied from Linux Kernel, therefore
+ * copying the license as well.
+ *
+ * Copyright (C) 2001 Deep Blue Solutions Ltd.
+ * Copyright (C) 2012 ARM Ltd.
+ * Copyright (C) 2015 Pratyush Anand <panand@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "cache.h"
+
+/*
+ * dcache_line_size - get the minimum D-cache line size from the CTR register.
+ */
+ .macro dcache_line_size, reg, tmp
+ mrs \tmp, ctr_el0 // read CTR
+ ubfm \tmp, \tmp, #16, #19 // cache line size encoding
+ mov \reg, #4 // bytes per word
+ lsl \reg, \reg, \tmp // actual cache line size
+ .endm
+
+/*
+ * inval_cache_range(start, end)
+ * - x0 - start - start address of region
+ * - x1 - end - end address of region
+ */
+.globl inval_cache_range
+inval_cache_range:
+ dcache_line_size x2, x3
+ sub x3, x2, #1
+ tst x1, x3 // end cache line aligned?
+ bic x1, x1, x3
+ b.eq 1f
+ dc civac, x1 // clean & invalidate D / U line
+1: tst x0, x3 // start cache line aligned?
+ bic x0, x0, x3
+ b.eq 2f
+ dc civac, x0 // clean & invalidate D / U line
+ b 3f
+2: dc ivac, x0 // invalidate D / U line
+3: add x0, x0, x2
+ cmp x0, x1
+ b.lo 2b
+ dsb sy
+ ret
+/*
+ * flush_dcache_range(start, end)
+ * - x0 - start - start address of region
+ * - x1 - end - end address of region
+ *
+ */
+.globl flush_dcache_range
+flush_dcache_range:
+ dcache_line_size x2, x3
+ sub x3, x2, #1
+ bic x0, x0, x3
+1: dc civac, x0 // clean & invalidate D line / unified line
+ add x0, x0, x2
+ cmp x0, x1
+ b.lo 1b
+ dsb sy
+ ret
+
+/*
+ * invalidate_tlbs_el1()
+ */
+.globl invalidate_tlbs_el1
+invalidate_tlbs_el1:
+ dsb nshst
+ tlbi vmalle1
+ dsb nsh
+ isb
+ ret
+
+/*
+ * invalidate_tlbs_el2()
+ */
+.globl invalidate_tlbs_el2
+invalidate_tlbs_el2:
+ dsb nshst
+ tlbi alle2
+ dsb nsh
+ isb
+ ret
+
+/*
+ * get_mm_feature_reg0_val - Get information about supported MM
+ * features
+ */
+.globl get_mm_feature_reg0_val
+get_mm_feature_reg0_val:
+ mrs x0, ID_AA64MMFR0_EL1
+ ret
+
+/*
+ * get_current_el - Get information about current exception level
+ */
+.globl get_current_el
+get_current_el:
+ mrs x0, CurrentEL
+ lsr x0, x0, #2
+ ret
+
+/*
+ * invalidate_icache - Invalidate I-cache
+ */
+.globl invalidate_icache
+invalidate_icache:
+ ic iallu
+ dsb nsh
+ isb
+ ret
+
+/*
+ * set_mair_tcr_ttbr_sctlr_el1(page_table, tcr_flags) - sets MAIR, TCR , TTBR and SCTLR registers
+ * x0 - page_table - Page Table Base
+ * x1 - tcr_flags - TCR Flags to be set
+ */
+.globl set_mair_tcr_ttbr_sctlr_el1
+set_mair_tcr_ttbr_sctlr_el1:
+ ldr x2, =MEMORY_ATTRIBUTES
+ msr mair_el1, x2
+ msr tcr_el1, x1
+ msr ttbr0_el1, x0
+ isb
+ mrs x0, sctlr_el1
+ ldr x3, =SCTLR_ELx_FLAGS
+ orr x0, x0, x3
+ msr sctlr_el1, x0
+ isb
+ ret
+
+/*
+ * set_mair_tcr_ttbr_sctlr_el2(page_table, tcr_flags) - sets MAIR, TCR , TTBR and SCTLR registers
+ * x0 - page_table - Page Table Base
+ * x1 - tcr_flags - TCR Flags to be set
+ */
+.globl set_mair_tcr_ttbr_sctlr_el2
+set_mair_tcr_ttbr_sctlr_el2:
+ ldr x2, =MEMORY_ATTRIBUTES
+ msr mair_el2, x2
+ msr tcr_el2, x1
+ msr ttbr0_el2, x0
+ isb
+ mrs x0, sctlr_el2
+ ldr x3, =SCTLR_ELx_FLAGS
+ orr x0, x0, x3
+ msr sctlr_el2, x0
+ isb
+ ret
+
+/*
+ * reset_sctlr_el1 - disables cache and mmu
+ */
+.globl reset_sctlr_el1
+reset_sctlr_el1:
+ mrs x0, sctlr_el1
+ bic x0, x0, #SCTLR_ELx_C
+ bic x0, x0, #SCTLR_ELx_M
+ msr sctlr_el1, x0
+ isb
+ ret
+
+/*
+ * reset_sctlr_el2 - disables cache and mmu
+ */
+.globl reset_sctlr_el2
+reset_sctlr_el2:
+ mrs x0, sctlr_el2
+ bic x0, x0, #SCTLR_ELx_C
+ bic x0, x0, #SCTLR_ELx_M
+ msr sctlr_el2, x0
+ isb
+ ret
diff --git a/purgatory/arch/arm64/cache.c b/purgatory/arch/arm64/cache.c
new file mode 100644
index 000000000000..3c7e058ccf11
--- /dev/null
+++ b/purgatory/arch/arm64/cache.c
@@ -0,0 +1,330 @@
+/*
+ * Copyright (C) 2015 Pratyush Anand <panand@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* We are supporting only 4K and 64K page sizes. This code will not work if
+ * a hardware is not supporting at least one of these page sizes.
+ * Therefore, D-cache is disabled by default and enabled only when
+ * "enable-dcache" is passed to the kexec().
+ * Since this is an identity mapped system, so VA_BITS will be same as max
+ * PA bits supported. If VA_BITS <= 42 for 64K and <= 39 for 4K then only
+ * one level of page table will be there with block descriptor entries.
+ * Otherwise, For 4K mapping, TTBR points to level 0 lookups, which will
+ * have only table entries pointing to a level 1 lookup. Level 1 will have
+ * only block entries which will map 1GB block.For 64K mapping, TTBR points
+ * to level 1 lookups, which will have only table entries pointing to a
+ * level 2 lookup. Level 2 will have only block entries which will map
+ * 512MB block. If UART base address and RAM addresses are not at least 1GB
+ * and 512MB apart for 4K and 64K respectively, then mapping result could
+ * be unpredictable. In that case we need to support one more level of
+ * granularity, but until someone needs that keep it like this only.
+ * We can not allocate dynamic memory in purgatory. Therefore we keep page
+ * table allocation size fixed as (3 * MAX_PAGE_SIZE). (page_table) points
+ * to first level (having only table entries) and (page_table +
+ * MAX_PAGE_SIZE) points to table at next level (having block entries). If
+ * index for RAM area and UART area in first table is not same, then we
+ * will need another next level table which will be located@(page_table
+ * + 2 * MAX_PAGE_SIZE).
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include <purgatory.h>
+#include "cache.h"
+
+static uint64_t page_shift;
+static uint64_t pgtable_level;
+static uint64_t va_bits;
+
+static uint64_t page_table[PAGE_TABLE_SIZE / sizeof(uint64_t)] __attribute__ ((aligned (MAX_PAGE_SIZE))) = { };
+static uint64_t page_table_used;
+
+#define PAGE_SIZE (1 << page_shift)
+/*
+ * is_4k_page_supported - return true if 4k page is supported else
+ * false
+ */
+static int is_4k_page_supported(void)
+{
+ return ((get_mm_feature_reg0_val() & ID_AA64MMFR0_TGRAN4_MASK) ==
+ ID_AA64MMFR0_TGRAN4_SUPPORTED);
+}
+
+/*
+ * is_64k_page_supported - return true if 64k page is supported else
+ * false
+ */
+static int is_64k_page_supported(void)
+{
+ return ((get_mm_feature_reg0_val() & ID_AA64MMFR0_TGRAN64_MASK) ==
+ ID_AA64MMFR0_TGRAN64_SUPPORTED);
+}
+
+/*
+ * get_ips_bits - return supported IPS bits
+ */
+static uint64_t get_ips_bits(void)
+{
+ return ((get_mm_feature_reg0_val() & ID_AA64MMFR0_PARANGE_MASK) >>
+ ID_AA64MMFR0_PARANGE_SHIFT);
+}
+
+/*
+ * get_va_bits - return supported VA bits (For identity mapping VA = PA)
+ */
+static uint64_t get_va_bits(void)
+{
+ uint64_t ips = get_ips_bits();
+
+ switch(ips) {
+ case ID_AA64MMFR0_PARANGE_48:
+ return 48;
+ case ID_AA64MMFR0_PARANGE_44:
+ return 44;
+ case ID_AA64MMFR0_PARANGE_42:
+ return 42;
+ case ID_AA64MMFR0_PARANGE_40:
+ return 40;
+ case ID_AA64MMFR0_PARANGE_36:
+ return 36;
+ default:
+ return 32;
+ }
+}
+
+/*
+ * get_section_shift - get block shift for supported page size
+ */
+static uint64_t get_section_shift(void)
+{
+ if (page_shift == 16)
+ return 29;
+ else if(page_shift == 12)
+ return 30;
+ else
+ return 0;
+}
+
+/*
+ * get_section_mask - get section mask for supported page size
+ */
+static uint64_t get_section_mask(void)
+{
+ if (page_shift == 16)
+ return 0x1FFF;
+ else if(page_shift == 12)
+ return 0x1FF;
+ else
+ return 0;
+}
+
+/*
+ * get_pgdir_shift - get pgdir shift for supported page size
+ */
+static uint64_t get_pgdir_shift(void)
+{
+ if (page_shift == 16)
+ return 42;
+ else if(page_shift == 12)
+ return 39;
+ else
+ return 0;
+}
+
+/*
+ * init_page_table - Initializes page table locations
+ */
+
+static void init_page_table(void)
+{
+ /*
+ * Invalidate the page tables to avoid potential dirty cache lines
+ * being evicted.
+ */
+
+ inval_cache_range((uint64_t)page_table,
+ (uint64_t)page_table + PAGE_TABLE_SIZE);
+ memset(page_table, 0, PAGE_TABLE_SIZE);
+}
+/*
+ * create_identity_mapping(start, end, flags)
+ * start - start address
+ * end - end address
+ * flags - MMU Flags for Normal or Device type memory
+ */
+static void create_identity_mapping(uint64_t start, uint64_t end,
+ uint64_t flags)
+{
+ uint32_t sec_shift, pgdir_shift, sec_mask;
+ uint64_t desc, s1, e1, s2, e2;
+ uint64_t *table2;
+
+ s1 = start;
+ e1 = end - 1;
+
+ sec_shift = get_section_shift();
+ if (pgtable_level == 1) {
+ s1 >>= sec_shift;
+ e1 >>= sec_shift;
+ do {
+ desc = s1 << sec_shift;
+ desc |= flags;
+ page_table[s1] = desc;
+ s1++;
+ } while (s1 <= e1);
+ } else {
+ pgdir_shift = get_pgdir_shift();
+ sec_mask = get_section_mask();
+ s1 >>= pgdir_shift;
+ e1 >>= pgdir_shift;
+ do {
+ /*
+ * If there is no table entry then write a new
+ * entry else, use old entry
+ */
+ if (!page_table[s1]) {
+ table2 = &page_table[(++page_table_used *
+ MAX_PAGE_SIZE) /
+ sizeof(uint64_t)];
+ desc = (uint64_t)table2 | PMD_TYPE_TABLE;
+ page_table[s1] = desc;
+ } else {
+ table2 = (uint64_t *)(page_table[s1] &
+ ~PMD_TYPE_MASK);
+ }
+ s1++;
+ s2 = start >> sec_shift;
+ s2 &= sec_mask;
+ e2 = (end - 1) >> sec_shift;
+ e2 &= sec_mask;
+ do {
+ desc = s2 << sec_shift;
+ desc |= flags;
+ table2[s2] = desc;
+ s2++;
+ } while (s2 <= e2);
+ } while (s1 <= e1);
+ }
+}
+
+/*
+ * enable_mmu_dcache: Enable mmu and D-cache in sctlr_el1
+ */
+static void enable_mmu_dcache(void)
+{
+ uint64_t tcr_flags = TCR_FLAGS | TCR_T0SZ(va_bits);
+
+ switch(page_shift) {
+ case 16:
+ tcr_flags |= TCR_TG0_64K;
+ break;
+ case 12:
+ tcr_flags |= TCR_TG0_4K;
+ break;
+ default:
+ printf("page shift not supported\n");
+ return;
+ }
+ /*
+ * Since the page tables have been populated with non-cacheable
+ * accesses (MMU disabled), invalidate the page tables to remove
+ * any speculatively loaded cache lines.
+ */
+ inval_cache_range((uint64_t)page_table,
+ (uint64_t)page_table + PAGE_TABLE_SIZE);
+
+ switch(get_current_el()) {
+ case 2:
+ invalidate_tlbs_el2();
+ tcr_flags |= (get_ips_bits() << TCR_PS_EL2_SHIFT);
+ set_mair_tcr_ttbr_sctlr_el2((uint64_t)page_table, tcr_flags);
+ break;
+ case 1:
+ invalidate_tlbs_el1();
+ tcr_flags |= (get_ips_bits() << TCR_IPS_EL1_SHIFT);
+ set_mair_tcr_ttbr_sctlr_el1((uint64_t)page_table, tcr_flags);
+ break;
+ default:
+ return;
+ }
+ invalidate_icache();
+}
+
+/*
+ * enable_dcache: Enable D-cache and set appropriate attributes
+ * ram_start - Start address of RAM
+ * ram_end - End address of RAM
+ * uart_base - Base address of uart
+ */
+int enable_dcache(uint64_t ram_start, uint64_t ram_end, uint64_t uart_base)
+{
+ va_bits = get_va_bits();
+
+ page_table_used = 0;
+ if (is_64k_page_supported()) {
+ page_shift = 16;
+ if (va_bits <= 42)
+ pgtable_level = 1;
+ else
+ pgtable_level = 2;
+ } else if (is_4k_page_supported()) {
+ page_shift = 12;
+ if (va_bits <= 39)
+ pgtable_level = 1;
+ else
+ pgtable_level = 2;
+ } else {
+ printf("Valid Page Granule not supported by hardware\n");
+ return -1;
+ }
+ init_page_table();
+ create_identity_mapping(ram_start, ram_end, MM_MMUFLAGS_NORMAL);
+ printf("Normal identity mapping created from %lx to %lx\n",
+ ram_start, ram_end);
+ if (uart_base) {
+ create_identity_mapping((uint64_t)uart_base,
+ (uint64_t)uart_base + PAGE_SIZE,
+ MM_MMUFLAGS_DEVICE);
+ printf("Device identity mapping created from %lx to %lx\n",
+ (uint64_t)uart_base,
+ (uint64_t)uart_base + PAGE_SIZE);
+ }
+ enable_mmu_dcache();
+ printf("Cache Enabled\n");
+
+ return 0;
+}
+
+/*
+ * disable_dcache: Disable D-cache and flush RAM locations
+ * ram_start - Start address of RAM
+ * ram_end - End address of RAM
+ */
+void disable_dcache(uint64_t ram_start, uint64_t ram_end)
+{
+ switch(get_current_el()) {
+ case 2:
+ reset_sctlr_el2();
+ break;
+ case 1:
+ reset_sctlr_el1();
+ break;
+ default:
+ return;
+ }
+ invalidate_icache();
+ flush_dcache_range(ram_start, ram_end);
+ printf("Cache Disabled\n");
+}
diff --git a/purgatory/arch/arm64/cache.h b/purgatory/arch/arm64/cache.h
new file mode 100644
index 000000000000..c988020566e3
--- /dev/null
+++ b/purgatory/arch/arm64/cache.h
@@ -0,0 +1,79 @@
+#ifndef __CACHE_H__
+#define __CACHE_H__
+
+#define MT_DEVICE_NGNRNE 0
+#define MT_DEVICE_NGNRE 1
+#define MT_DEVICE_GRE 2
+#define MT_NORMAL_NC 3
+#define MT_NORMAL 4
+
+#ifndef __ASSEMBLER__
+
+#define MAX_PAGE_SIZE 0x10000
+#define PAGE_TABLE_SIZE (3 * MAX_PAGE_SIZE)
+#define ID_AA64MMFR0_TGRAN64_SHIFT 24
+#define ID_AA64MMFR0_TGRAN4_SHIFT 28
+#define ID_AA64MMFR0_TGRAN64_MASK (0xFUL << ID_AA64MMFR0_TGRAN64_SHIFT)
+#define ID_AA64MMFR0_TGRAN4_MASK (0xFUL << ID_AA64MMFR0_TGRAN4_SHIFT)
+#define ID_AA64MMFR0_TGRAN64_SUPPORTED 0x0
+#define ID_AA64MMFR0_TGRAN4_SUPPORTED 0x0
+#define ID_AA64MMFR0_PARANGE_SHIFT 0
+#define ID_AA64MMFR0_PARANGE_MASK (0xFUL << ID_AA64MMFR0_PARANGE_SHIFT)
+#define ID_AA64MMFR0_PARANGE_48 0x5
+#define ID_AA64MMFR0_PARANGE_44 0x4
+#define ID_AA64MMFR0_PARANGE_42 0x3
+#define ID_AA64MMFR0_PARANGE_40 0x2
+#define ID_AA64MMFR0_PARANGE_36 0x1
+#define ID_AA64MMFR0_PARANGE_32 0x0
+
+#define TCR_TG0_64K (1UL << 14)
+#define TCR_TG0_4K (0UL << 14)
+#define TCR_SHARED_NONE (0UL << 12)
+#define TCR_ORGN_WBWA (1UL << 10)
+#define TCR_IRGN_WBWA (1UL << 8)
+#define TCR_IPS_EL1_SHIFT 32
+#define TCR_PS_EL2_SHIFT 16
+#define TCR_T0SZ(x) ((unsigned long)(64 - (x)) << 0)
+#define TCR_FLAGS (TCR_SHARED_NONE | TCR_ORGN_WBWA | TCR_IRGN_WBWA)
+
+#define PMD_TYPE_SECT (1UL << 0)
+#define PMD_TYPE_TABLE (3UL << 0)
+#define PMD_TYPE_MASK 0x3
+#define PMD_SECT_AF (1UL << 10)
+#define PMD_ATTRINDX(t) ((unsigned long)(t) << 2)
+#define PMD_FLAGS_NORMAL (PMD_TYPE_SECT | PMD_SECT_AF)
+#define PMD_SECT_PXN (1UL << 53)
+#define PMD_SECT_UXN (1UL << 54)
+#define PMD_FLAGS_DEVICE (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_PXN | PMD_SECT_UXN)
+#define MM_MMUFLAGS_NORMAL PMD_ATTRINDX(MT_NORMAL) | PMD_FLAGS_NORMAL
+#define MM_MMUFLAGS_DEVICE PMD_ATTRINDX(MT_DEVICE_NGNRE) | PMD_FLAGS_DEVICE
+
+void disable_dcache(uint64_t ram_start, uint64_t ram_end);
+int enable_dcache(uint64_t ram_start, uint64_t ram_end, uint64_t uart_base);
+uint64_t get_mm_feature_reg0_val(void);
+void inval_cache_range(uint64_t start, uint64_t end);
+void flush_dcache_range(uint64_t start, uint64_t end);
+uint64_t get_current_el(void);
+void set_mair_tcr_ttbr_sctlr_el1(uint64_t page_table, uint64_t tcr_flags);
+void set_mair_tcr_ttbr_sctlr_el2(uint64_t page_table, uint64_t tcr_flags);
+void invalidate_tlbs_el1(void);
+void invalidate_tlbs_el2(void);
+void invalidate_icache(void);
+void reset_sctlr_el1(void);
+void reset_sctlr_el2(void);
+#else
+#define MEMORY_ATTRIBUTES ((0x00 << (MT_DEVICE_NGNRNE*8)) | \
+ (0x04 << (MT_DEVICE_NGNRE*8)) | \
+ (0x0C << (MT_DEVICE_GRE*8)) | \
+ (0x44 << (MT_NORMAL_NC*8)) | \
+ (0xFF << (MT_NORMAL*8)))
+
+/* Common SCTLR_ELx flags. */
+#define SCTLR_ELx_I (1 << 12)
+#define SCTLR_ELx_C (1 << 2)
+#define SCTLR_ELx_M (1 << 0)
+
+#define SCTLR_ELx_FLAGS (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_I)
+
+#endif
+#endif
--
2.7.4
^ permalink raw reply related
* [PATCH 0/2] kexec-tools: arm64: Add dcache enabling facility
From: Pratyush Anand @ 2016-11-22 4:32 UTC (permalink / raw)
To: linux-arm-kernel
It takes more that 2 minutes to verify SHA in purgatory when vmlinuz image
is around 13MB and initramfs is around 30MB. It takes more than 20 second
even when we have -O2 optimization enabled. However, if dcache is enabled
during purgatory execution then, it takes just a second in SHA verification.
Therefore, these patches adds support for dcache enabling facility during
purgatory execution. There is no change in kexec behaviour by default.
Dcache will be enabled only when --enable-dcache is passed to kexec.
Pratyush Anand (2):
arm64: Add enable/disable d-cache support for purgatory
arm64: Pass RAM boundary and enable-dcache flag to purgatory
kexec/arch/arm64/include/arch/options.h | 6 +-
kexec/arch/arm64/include/types.h | 16 ++
kexec/arch/arm64/kexec-arm64.c | 25 ++-
purgatory/arch/arm64/Makefile | 2 +
purgatory/arch/arm64/cache-asm.S | 186 ++++++++++++++++++
purgatory/arch/arm64/cache.c | 330 ++++++++++++++++++++++++++++++++
purgatory/arch/arm64/cache.h | 79 ++++++++
purgatory/arch/arm64/purgatory-arm64.c | 11 ++
8 files changed, 653 insertions(+), 2 deletions(-)
create mode 100644 kexec/arch/arm64/include/types.h
create mode 100644 purgatory/arch/arm64/cache-asm.S
create mode 100644 purgatory/arch/arm64/cache.c
create mode 100644 purgatory/arch/arm64/cache.h
--
2.7.4
^ permalink raw reply
* [PATCH v2] ARM: dts: AM571x-IDK Initial Support
From: Lokesh Vutla @ 2016-11-22 4:17 UTC (permalink / raw)
To: linux-arm-kernel
From: Schuyler Patton <spatton@ti.com>
The AM571x-IDK board is a board based on TI's AM5718 SOC
which has a single core 1.5GHz A15 processor. This board is a
development platform for the Industrial market with:
- 1GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI,
- PRU-ICSS
- uSD
- 16GB eMMC
- CAN
- RS-485
- PCIe
- USB3.0
- Video Input Port
- Industrial IO port and expansion connector
The link to the data sheet and TRM can be found here:
http://www.ti.com/product/AM5718
Initial support is only for basic peripherals.
Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
Cahnges since v1:
- Dropped "ti,dra722", and "ti,dra72" from compatibles
- Fixes few node names as suggested by Rob.
Logs: http://pastebin.ubuntu.com/23515001/
.../devicetree/bindings/arm/omap/omap.txt | 3 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/am571x-idk.dts | 81 ++++++++++++++++++++++
3 files changed, 85 insertions(+)
create mode 100644 arch/arm/boot/dts/am571x-idk.dts
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index f53e2ee..6cf680e 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -175,6 +175,9 @@ Boards:
- AM5728 IDK
compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"
+- AM5718 IDK
+ compatible = "ti,am5718-idk", "ti,am5718", "ti,dra7"
+
- DRA742 EVM: Software Development Board for DRA742
compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index befcd26..c298078 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -588,6 +588,7 @@ dtb-$(CONFIG_SOC_DRA7XX) += \
am57xx-cl-som-am57x.dtb \
am57xx-sbc-am57x.dtb \
am572x-idk.dtb \
+ am571x-idk.dtb \
dra7-evm.dtb \
dra72-evm.dtb \
dra72-evm-revc.dtb
diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts
new file mode 100644
index 0000000..d6e43e5
--- /dev/null
+++ b/arch/arm/boot/dts/am571x-idk.dts
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "dra72x.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "am57xx-idk-common.dtsi"
+
+/ {
+ model = "TI AM5718 IDK";
+ compatible = "ti,am5718-idk", "ti,am5718", "ti,dra7";
+
+ memory at 80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x0 0x40000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ cpu0-led {
+ label = "status0:red:cpu0";
+ gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ linux,default-trigger = "cpu0";
+ };
+
+ usr0-led {
+ label = "status0:green:usr";
+ gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ heartbeat-led {
+ label = "status0:blue:heartbeat";
+ gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ linux,default-trigger = "heartbeat";
+ };
+
+ usr1-led {
+ label = "status1:red:usr";
+ gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ usr2-led {
+ label = "status1:green:usr";
+ gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ mmc0-led {
+ label = "status1:blue:mmc0";
+ gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ linux,default-trigger = "mmc0";
+ };
+ };
+
+ extcon_usb2: extcon_usb2 {
+ compatible = "linux,extcon-usb-gpio";
+ id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&mmc1 {
+ status = "okay";
+ vmmc-supply = <&ldo1_reg>;
+ bus-width = <4>;
+ cd-gpios = <&gpio6 27 0>; /* gpio 219 */
+};
+
+&omap_dwc3_2 {
+ extcon = <&extcon_usb2>;
+};
--
2.10.1
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