* [PATCH 0/2] ARM: davinvi: da850 add ohci DT nodes
From: Axel Haslam @ 2016-11-22 9:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3543ab96-1a7e-395f-26a6-c748cf0423f1@ti.com>
On Tue, Nov 22, 2016 at 10:33 AM, Sekhar Nori <nsekhar@ti.com> wrote:
> On Monday 21 November 2016 10:29 PM, Axel Haslam wrote:
>> This adds the DT node for the ohci controller and
>> enables it for the omapl138-lckd platform.
>>
>> DEPENDENCIES:
>>
>> 1. [PATCH v6 0/5] USB: ohci-da8xx: Add device tree support
>> https://lkml.org/lkml/2016/11/21/558
>
> Looks like atleast this series is not merged (checking today's linux-next).
>
>>
>> 2. [PATCH v3 0/2] regulator: handling of error conditions for usb drivers
>> https://lkml.org/lkml/2016/11/4/465
>
> Can you let me know once the dependencies are merged so I can pick these.
Right, the driver changes are not yet picked up, ill ping once those get in.
Regards
Axel.
>
> Thanks,
> Sekhar
^ permalink raw reply
* [RFC PATCH 04/11] PCI: tegra: limit to MMU build only
From: Vladimir Murzin @ 2016-11-22 9:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <11637152.Dd0IBkEQ8q@wuerfel>
On 22/11/16 09:31, Arnd Bergmann wrote:
> On Tuesday, November 22, 2016 9:26:01 AM CET Vladimir Murzin wrote:
>> This driver uses functionality which available for MMU build only,
>> thus add dependency on MMU.
>>
>> Cc: Thierry Reding <thierry.reding@gmail.com>
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>>
>
> Can you be more specific about what requires the MMU here?
>
> Is it the I/O space remapping or something else?
Yes it comes from I/O space remapping.
The fill error log:
CC drivers/pci/host/pci-tegra.o
In file included from ./arch/arm/include/asm/page.h:22:0,
from ./arch/arm/include/asm/thread_info.h:17,
from ./include/linux/thread_info.h:58,
from ./include/asm-generic/current.h:4,
from ./arch/arm/include/generated/asm/current.h:1,
from ./include/linux/mutex.h:13,
from ./include/linux/notifier.h:13,
from ./include/linux/clk.h:17,
from drivers/pci/host/pci-tegra.c:29:
drivers/pci/host/pci-tegra.c: In function 'tegra_pcie_bus_alloc':
drivers/pci/host/pci-tegra.c:388:27: error: 'L_PTE_PRESENT' undeclared (first use in this function)
pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:388:27: note: each undeclared identifier is reported only once for each function it appears in
pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:388:43: error: 'L_PTE_YOUNG' undeclared (first use in this function)
pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:388:57: error: 'L_PTE_DIRTY' undeclared (first use in this function)
pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:389:6: error: 'L_PTE_XN' undeclared (first use in this function)
L_PTE_XN | L_PTE_MT_DEV_SHARED | L_PTE_SHARED);
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:389:17: error: 'L_PTE_MT_DEV_SHARED' undeclared (first use in this function)
L_PTE_XN | L_PTE_MT_DEV_SHARED | L_PTE_SHARED);
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:389:39: error: 'L_PTE_SHARED' undeclared (first use in this function)
L_PTE_XN | L_PTE_MT_DEV_SHARED | L_PTE_SHARED);
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c: At top level:
drivers/pci/host/pci-tegra.c:501:10: error: 'pci_generic_config_read32' undeclared here (not in a function)
.read = pci_generic_config_read32,
^
drivers/pci/host/pci-tegra.c:502:11: error: 'pci_generic_config_write32' undeclared here (not in a function)
.write = pci_generic_config_write32,
^
drivers/pci/host/pci-tegra.c: In function 'tegra_pcie_relax_enable':
drivers/pci/host/pci-tegra.c:609:2: error: implicit declaration of function 'pcie_capability_set_word' [-Werror=implicit-function-declaration]
pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN);
^
drivers/pci/host/pci-tegra.c: In function 'tegra_pcie_setup':
drivers/pci/host/pci-tegra.c:626:8: error: implicit declaration of function 'pci_remap_iospace' [-Werror=implicit-function-declaration]
err = pci_remap_iospace(&pcie->pio, pcie->io.start);
^
drivers/pci/host/pci-tegra.c:628:3: error: implicit declaration of function 'pci_add_resource_offset' [-Werror=implicit-function-declaration]
pci_add_resource_offset(&sys->resources, &pcie->pio,
^
drivers/pci/host/pci-tegra.c:634:2: error: implicit declaration of function 'pci_add_resource' [-Werror=implicit-function-declaration]
pci_add_resource(&sys->resources, &pcie->busn);
^
drivers/pci/host/pci-tegra.c:636:8: error: implicit declaration of function 'devm_request_pci_bus_resources' [-Werror=implicit-function-declaration]
err = devm_request_pci_bus_resources(dev, &sys->resources);
^
cc1: some warnings being treated as errors
make[1]: *** [drivers/pci/host/pci-tegra.o] Error 1
make: *** [drivers/pci/host/pci-tegra.o] Error 2
Cheers
Vladimir
>
> Arnd
>
>
^ permalink raw reply
* [PATCH 1/6] reset: hisilicon: add reset core
From: Arnd Bergmann @ 2016-11-22 9:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <0084ef53-c0e6-51e8-afa5-07264dfce529@linaro.org>
On Tuesday, November 22, 2016 5:22:42 PM CET zhangfei wrote:
> Hi, Arnd
>
> On 2016?11?22? 16:45, Arnd Bergmann wrote:
> > On Tuesday, November 22, 2016 3:49:16 PM CET Zhangfei Gao wrote:
> >> @@ -1,8 +1,8 @@
> >> obj-y += core.o
> >> -obj-y += hisilicon/
> >> obj-$(CONFIG_ARCH_STI) += sti/
> >> obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
> >> obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
> >> +obj-$(CONFIG_ARCH_HISI) += hisilicon/
> >> obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
> >> obj-$(CONFIG_RESET_MESON) += reset-meson.o
> >> obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
> > Please leave the obj-y line, otherwise the COMPILE_TEST variant won't work.
>
> COMPILE_TEST is added in drivers/reset/hisilicon/Kconfig
> like
> config COMMON_RESET_HI3660
> tristate "Hi3660 Reset Driver"
> depends on ARCH_HISI || COMPILE_TEST
>
> The reason not using "obj-y" here is that reset.c will be compiled unconditionally.
>
> drivers/reset/hisilicon/Makefile
> obj-y += reset.o
Yes, that line has to change as well then, to only build it when one
of the hardware specific drivers is enabled.
Arnd
^ permalink raw reply
* [PATCH 1/2] ARM64: dts: Add support for Meson GXM
From: Neil Armstrong @ 2016-11-22 9:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <m2oa181jtd.fsf@baylibre.com>
On 11/22/2016 12:42 AM, Kevin Hilman wrote:
> Neil,
>
> Neil Armstrong <narmstrong@baylibre.com> writes:
>
>> Following the Amlogic Linux kernel, it seem the only differences
>> between the GXL and GXM SoCs are the CPU Clusters.
>>
>> This commit renames the gxl-s905d-p23x DTSI in a common file for
>> S905D p20x and S912 q20x boards.
>
> s/p20x/p23x/ ??
>
>> Then adds a meson-gxm dtsi and reproduce the P23x to Q20x boards
>> dts files since the S905D and S912 SoCs shares the same pinout
>> and the P23x and Q20x boards are identical.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>
> I had to drop this as it breaks the network on (at least) gxbb-p200, but...
>
> [...]
>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
>> index 03e3d76..17bb77c 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
>> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
>> @@ -56,3 +56,22 @@
>> pinctrl-0 = <&i2c_b_pins>;
>> pinctrl-names = "default";
>> };
>> +
>> +ðmac {
>> + status = "okay";
>> + pinctrl-0 = <ð_rgmii_pins>;
>> + pinctrl-names = "default";
>> +
>> + phy-handle = <ð_phy0>;
>> +
>> + mdio {
>> + compatible = "snps,dwmac-mdio";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + eth_phy0: ethernet-phy at 0 {
>> + reg = <0>;
>> + realtek,disable-eee-1000t;
>> + };
>> + };
>> +};
>
> ... backing out this change makes it work again.
>
> This change also looks suspicious as it's using the proposed disable-eee
> properties, which I don't think have been merged yet.
>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
>> index 39bb037..5608c51 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
>> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
>> @@ -50,3 +50,10 @@
>> compatible = "amlogic,p201", "amlogic,meson-gxbb";
>> model = "Amlogic Meson GXBB P201 Development Board";
>> };
>> +
>> +ðmac {
>> + status = "okay";
>> + pinctrl-0 = <ð_rmii_pins>;
>> + pinctrl-names = "default";
>> + phy-mode = "rmii";
>> +};
>
> This also doesn't look releveant to the GXL/GXM changes being introduced
> in this patch.
>
> Could you separate out any GXBB-related changes into a separate patch
> (if they are in fact needed) and re-spin this?
>
> Thanks,
>
> Kevin
>
Sorry leftover for another work...
Will cleanup for v2.
Neil
^ permalink raw reply
* [PATCH] drm: tilcdc: fix a DT property parsing
From: Bartosz Golaszewski @ 2016-11-22 9:41 UTC (permalink / raw)
To: linux-arm-kernel
The DT binding for tildc is not consistent with the driver code - the
option in the binding is called 'max-width' while the code expects
'ti,max-width'.
Make the driver code consistent with the binding.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index a7c91f7..4d3adf8e 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -302,7 +302,7 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev)
DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
- if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
+ if (of_property_read_u32(node, "max-width", &priv->max_width))
priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
--
2.9.3
^ permalink raw reply related
* [PATCH 3/6] reset: hisilicon: add reset-hi3660
From: Arnd Bergmann @ 2016-11-22 9:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d6e602c0-70e9-0309-86b5-bfd006d86028@linaro.org>
On Tuesday, November 22, 2016 5:34:05 PM CET zhangfei wrote:
> On 2016?11?22? 16:50, Arnd Bergmann wrote:
> > On Tuesday, November 22, 2016 3:49:18 PM CET Zhangfei Gao wrote:
> >> +static const struct hisi_reset_channel_data hi3660_iomcu_rst[] = {
> >> + [HI3660_RST_I2C0] = HISI_RST_SEP(0x20, 3),
> >> + [HI3660_RST_I2C1] = HISI_RST_SEP(0x20, 4),
> >> + [HI3660_RST_I2C2] = HISI_RST_SEP(0x20, 5),
> >> + [HI3660_RST_I2C6] = HISI_RST_SEP(0x20, 27),
> >> +};
> >> +
> >> +static struct hisi_reset_controller_data hi3660_iomcu_controller = {
> >> + .nr_channels = ARRAY_SIZE(hi3660_iomcu_rst),
> >> + .channels = hi3660_iomcu_rst,
> >> +};
> >> +
> >> +static const struct hisi_reset_channel_data hi3660_crgctrl_rst[] = {
> >> + [HI3660_RST_I2C3] = HISI_RST_SEP(0x78, 7),
> >> + [HI3660_RST_I2C4] = HISI_RST_SEP(0x78, 27),
> >> + [HI3660_RST_I2C7] = HISI_RST_SEP(0x60, 14),
> >> + [HI3660_RST_SD] = HISI_RST_SEP(0x90, 18),
> >> + [HI3660_RST_SDIO] = HISI_RST_SEP(0x90, 20),
> >> + [HI3660_RST_UFS] = HISI_RST_SEP(0x84, 12),
> >> + [HI3660_RST_UFS_ASSERT] = HISI_RST_SEP(0x84, 7),
> >> + [HI3660_RST_PCIE_SYS] = HISI_RST_SEP(0x84, 26),
> >> + [HI3660_RST_PCIE_PHY] = HISI_RST_SEP(0x84, 27),
> >> + [HI3660_RST_PCIE_BUS] = HISI_RST_SEP(0x84, 31),
> >> + [HI3660_RST_USB3OTG_PHY] = HISI_RST_SEP(0x90, 3),
> >> + [HI3660_RST_USB3OTG] = HISI_RST_SEP(0x90, 5),
> >> + [HI3660_RST_USB3OTG_32K] = HISI_RST_SEP(0x90, 6),
> >> + [HI3660_RST_USB3OTG_AHB] = HISI_RST_SEP(0x90, 7),
> >> + [HI3660_RST_USB3OTG_MUX] = HISI_RST_SEP(0x90, 8),
> >> +};
> > I think you can avoid the trap of the ABI incompatibility if
> > you just define those as in the binding as tuples, using #reset-cells=2.
> >
> > In particular for the first set, it seems really silly to redefine
> > the numbers when there is just a simple integer number.
>
> Could you clarify more, still not understand.
> The number is index of the arrays, and the index will be used in dts.
> The arrays lists the registers offset and bit shift.
> For example:
>
> [HI3660_RST_I2C0] = HISI_RST_SEP(0x20, 3), means register offset : 0x20, and bit shift = 3.
>
> And Documentation/devicetree/bindings/reset/reset.txt
> Required properties:
> #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
> with a single reset output and 1 for nodes with multiple
> reset outputs.
You can easily enumerate the registers that contain reset bits here,
so just use one cell for the register and another one for the index.
Arnd
^ permalink raw reply
* [PATCH] ARM: dts: da850: specify max width for display node
From: Bartosz Golaszewski @ 2016-11-22 9:42 UTC (permalink / raw)
To: linux-arm-kernel
It has been determined that the highest resolution supported correctly
by LCDC rev1 is 800x600 on da850 due to memory bandwidth constraints.
Set the max_width property in da850.dtsi to 800.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/boot/dts/da850.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 36066fa..0876238 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -441,6 +441,7 @@
compatible = "ti,da850-tilcdc";
reg = <0x213000 0x1000>;
interrupts = <52>;
+ max-width = <800>;
status = "disabled";
};
};
--
2.9.3
^ permalink raw reply related
* [PATCH 1/4] clocksource/drivers/arm_arch_timer: Don't assume clock runs in suspend
From: Daniel Lezcano @ 2016-11-22 9:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122094300.GA2017@mai>
From: Brian Norris <briannorris@chromium.org>
The ARM specifies that the system counter "must be implemented in an
always-on power domain," and so we try to use the counter as a source of
timekeeping across suspend/resume. Unfortunately, some SoCs (e.g.,
Rockchip's RK3399) do not keep the counter ticking properly when
switched from their high-power clock to the lower-power clock used in
system suspend. Support this quirk by adding a new device tree property.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
Documentation/devicetree/bindings/arm/arch_timer.txt | 5 +++++
drivers/clocksource/arm_arch_timer.c | 9 ++++++++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
index ef5fbe9..ad440a2 100644
--- a/Documentation/devicetree/bindings/arm/arch_timer.txt
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -38,6 +38,11 @@ to deliver its interrupts via SPIs.
architecturally-defined reset values. Only supported for 32-bit
systems which follow the ARMv7 architected reset values.
+- arm,no-tick-in-suspend : The main counter does not tick when the system is in
+ low-power system suspend on some SoCs. This behavior does not match the
+ Architecture Reference Manual's specification that the system counter "must
+ be implemented in an always-on power domain."
+
Example:
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 73c487d..a2503db 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -81,6 +81,7 @@ static struct clock_event_device __percpu *arch_timer_evt;
static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI;
static bool arch_timer_c3stop;
static bool arch_timer_mem_use_virtual;
+static bool arch_counter_suspend_stop;
static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM);
@@ -576,7 +577,7 @@ static struct clocksource clocksource_counter = {
.rating = 400,
.read = arch_counter_read,
.mask = CLOCKSOURCE_MASK(56),
- .flags = CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_SUSPEND_NONSTOP,
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
static struct cyclecounter cyclecounter = {
@@ -616,6 +617,8 @@ static void __init arch_counter_register(unsigned type)
arch_timer_read_counter = arch_counter_get_cntvct_mem;
}
+ if (!arch_counter_suspend_stop)
+ clocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;
start_count = arch_timer_read_counter();
clocksource_register_hz(&clocksource_counter, arch_timer_rate);
cyclecounter.mult = clocksource_counter.mult;
@@ -907,6 +910,10 @@ static int __init arch_timer_of_init(struct device_node *np)
of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
arch_timer_uses_ppi = PHYS_SECURE_PPI;
+ /* On some systems, the counter stops ticking when in suspend. */
+ arch_counter_suspend_stop = of_property_read_bool(np,
+ "arm,no-tick-in-suspend");
+
return arch_timer_init();
}
CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
--
2.7.4
^ permalink raw reply related
* [PATCH 2/4] arm64: dts: rockchip: Arch counter doesn't tick in system suspend
From: Daniel Lezcano @ 2016-11-22 9:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479807866-6957-1-git-send-email-daniel.lezcano@linaro.org>
From: Brian Norris <briannorris@chromium.org>
The "arm,no-tick-in-suspend" property was introduced to note
implementations where the system counter does not quite follow the ARM
specification that it "must be implemented in an always-on power
domain".
Particularly, RK3399's counter stops ticking when we switch from the
24MHz clock to the 32KHz clock in low-power suspend, so let's mark it as
such.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index b65c193..d85b651 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -174,6 +174,7 @@
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
+ arm,no-tick-in-suspend;
};
xin24m: xin24m {
--
2.7.4
^ permalink raw reply related
* [PATCH 3/4] clocksource/drivers/arm_arch_timer: Map frame with of_io_request_and_map()
From: Daniel Lezcano @ 2016-11-22 9:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479807866-6957-1-git-send-email-daniel.lezcano@linaro.org>
From: Stephen Boyd <sboyd@codeaurora.org>
Let's use the of_io_request_and_map() API so that the frame
region is protected and shows up in /proc/iomem.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
---
drivers/clocksource/arm_arch_timer.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index a2503db..02fef68 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -971,8 +971,9 @@ static int __init arch_timer_mem_init(struct device_node *np)
}
ret= -ENXIO;
- base = arch_counter_base = of_iomap(best_frame, 0);
- if (!base) {
+ base = arch_counter_base = of_io_request_and_map(best_frame, 0,
+ "arch_mem_timer");
+ if (IS_ERR(base)) {
pr_err("arch_timer: Can't map frame's registers\n");
goto out;
}
--
2.7.4
^ permalink raw reply related
* [PATCH 4/4] clocksource/drivers/bcm2835_timer: Unmap region obtained by of_iomap
From: Daniel Lezcano @ 2016-11-22 9:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479807866-6957-1-git-send-email-daniel.lezcano@linaro.org>
From: Arvind Yadav <arvind.yadav.cs@gmail.com>
Free memory mapping, if bcm2835_timer_init is not successful.
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/bcm2835_timer.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c
index e71acf2..f2f29d2 100644
--- a/drivers/clocksource/bcm2835_timer.c
+++ b/drivers/clocksource/bcm2835_timer.c
@@ -96,7 +96,7 @@ static int __init bcm2835_timer_init(struct device_node *node)
ret = of_property_read_u32(node, "clock-frequency", &freq);
if (ret) {
pr_err("Can't read clock-frequency");
- return ret;
+ goto err_iounmap;
}
system_clock = base + REG_COUNTER_LO;
@@ -108,13 +108,15 @@ static int __init bcm2835_timer_init(struct device_node *node)
irq = irq_of_parse_and_map(node, DEFAULT_TIMER);
if (irq <= 0) {
pr_err("Can't parse IRQ");
- return -EINVAL;
+ ret = -EINVAL;
+ goto err_iounmap;
}
timer = kzalloc(sizeof(*timer), GFP_KERNEL);
if (!timer) {
pr_err("Can't allocate timer struct\n");
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto err_iounmap;
}
timer->control = base + REG_CONTROL;
@@ -133,7 +135,7 @@ static int __init bcm2835_timer_init(struct device_node *node)
ret = setup_irq(irq, &timer->act);
if (ret) {
pr_err("Can't set up timer IRQ\n");
- return ret;
+ goto err_iounmap;
}
clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);
@@ -141,6 +143,10 @@ static int __init bcm2835_timer_init(struct device_node *node)
pr_info("bcm2835: system timer (irq = %d)\n", irq);
return 0;
+
+err_iounmap:
+ iounmap(base);
+ return ret;
}
CLOCKSOURCE_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
bcm2835_timer_init);
--
2.7.4
^ permalink raw reply related
* [PATCH 5/6] reset: hisilicon: Use new driver reset-hi6222
From: zhangfei @ 2016-11-22 9:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3837594.jmpXXfpk9Q@wuerfel>
On 2016?11?22? 16:49, Arnd Bergmann wrote:
> On Tuesday, November 22, 2016 3:49:20 PM CET Zhangfei Gao wrote:
>> -#define PERIPH_RSTDIS0_MMC0 0x000
>> -#define PERIPH_RSTDIS0_MMC1 0x001
>> -#define PERIPH_RSTDIS0_MMC2 0x002
>> -#define PERIPH_RSTDIS0_NANDC 0x003
>> -#define PERIPH_RSTDIS0_USBOTG_BUS 0x004
>> -#define PERIPH_RSTDIS0_POR_PICOPHY 0x005
>> -#define PERIPH_RSTDIS0_USBOTG 0x006
>> -#define PERIPH_RSTDIS0_USBOTG_32K 0x007
>> -#define PERIPH_RSTDIS1_HIFI 0x100
>> -#define PERIPH_RSTDIS1_DIGACODEC 0x105
>> +/* reset in sysctrl */
>> +#define PERIPH_RSTDIS0_MMC0 0
>> +#define PERIPH_RSTDIS0_MMC1 1
>> +#define PERIPH_RSTDIS0_MMC2 2
>> +#define PERIPH_RSTDIS0_NANDC 3
>> +#define PERIPH_RSTDIS0_USBOTG_BUS 4
>> +#define PERIPH_RSTDIS0_POR_PICOPHY 5
>> +#define PERIPH_RSTDIS0_USBOTG 6
>> +#define PERIPH_RSTDIS0_USBOTG_32K 7
>> +#define PERIPH_RSTDIS1_HIFI 8
> You can't redefined the binding here, this is part of the ABI.
> You can however add new numbers as long as the old ones keep
> working.
The methods are different.
The original define is offset | bit_shift, and driver has to parse
offset and bit shift.
The new define is just index of array, which is defined in the reset-xxx.c
Thanks
^ permalink raw reply
* [RFC PATCH 01/11] ARM: NOMMU: define stubs for fixup
From: Russell King - ARM Linux @ 2016-11-22 9:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-2-git-send-email-vladimir.murzin@arm.com>
On Tue, Nov 22, 2016 at 09:25:58AM +0000, Vladimir Murzin wrote:
> When build for NOMMU following errors show ups:
>
> arch/arm/kernel/patch.c: In function 'patch_map':
> arch/arm/kernel/patch.c:39:2: error: implicit declaration of function 'set_fixmap' [-Werror=implicit-function-declaration]
> set_fixmap(fixmap, page_to_phys(page));
> ^
> arch/arm/kernel/patch.c:41:2: error: implicit declaration of function '__fix_to_virt' [-Werror=implicit-function-declaration]
> return (void *) (__fix_to_virt(fixmap) + (uintaddr & ~PAGE_MASK));
> ^
> arch/arm/kernel/patch.c: In function 'patch_unmap':
> arch/arm/kernel/patch.c:47:2: error: implicit declaration of function 'clear_fixmap' [-Werror=implicit-function-declaration]
> clear_fixmap(fixmap);
> ^
> cc1: some warnings being treated as errors
>
> Fixup does not make much sense in NOMMU configurations, so provide
> stub definitions.
>
> Cc: Russell King <linux@armlinux.org.uk>
I think there should be a Fixes: line for the commit which introduced
this?
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> ---
> arch/arm/include/asm/fixmap.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/include/asm/fixmap.h b/arch/arm/include/asm/fixmap.h
> index 5c17d2d..0bfc2e3 100644
> --- a/arch/arm/include/asm/fixmap.h
> +++ b/arch/arm/include/asm/fixmap.h
> @@ -59,6 +59,12 @@ enum fixed_addresses {
>
> #else
>
> +#define set_fixmap(idx, phys)
> +#define clear_fixmap(idx)
> +
> +#define __fix_to_virt(x) (x)
> +#define __virt_to_fix(x) (x)
> +
> static inline void early_fixmap_init(void) { }
>
> #endif
> --
> 1.7.9.5
>
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
^ permalink raw reply
* [RFC PATCH 03/11] ARM: omap: do not select HIGHMEM explicitly
From: Russell King - ARM Linux @ 2016-11-22 9:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-4-git-send-email-vladimir.murzin@arm.com>
On Tue, Nov 22, 2016 at 09:26:00AM +0000, Vladimir Murzin wrote:
> Explicit selection of HIGHMEM breaks NOMMU builds. It seems that
> HIGHMEM is user selectable option, so probably it would be better to
> let user to make a decision on this options or, at least, move it to
> defconfig.
That's kind of the point of ARCH_OMAP2PLUS_TYPICAL - it's a user
option to let the user select a range of options for typical OMAP2+
configurations, so that the user doesn't have to dig around looking
for multiple options, some of which are hard requirements for OMAP
to be functional. OMAP is a particularly difficult case because the
hardware tends to be very complex.
However, HIGHMEM should never be a requirement to boot, so this looks
sane.
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
^ permalink raw reply
* [PATCH 1/3] ARM: davinci: hawk: fix mmc card detect gpio
From: Sekhar Nori @ 2016-11-22 9:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161121161541.27048-2-ahaslam@baylibre.com>
On Monday 21 November 2016 09:45 PM, Axel Haslam wrote:
> The card detect gpio on the hawk board is gpio4_0 and not gpio3_12
>
> Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
The LCDK and HawkBoard are different boards. The HawkBoard schematic
from eLinux.org page is broken, but looking for it on the net, I found
one and the MMC/SD CD pin in that schematic is indeed connected to GPIO3_12.
So I believe the original code is correct.
Thanks,
Sekhar
^ permalink raw reply
* [RFC PATCH 04/11] PCI: tegra: limit to MMU build only
From: Arnd Bergmann @ 2016-11-22 9:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <58341297.9090303@arm.com>
On Tuesday, November 22, 2016 9:40:39 AM CET Vladimir Murzin wrote:
> On 22/11/16 09:31, Arnd Bergmann wrote:
> > On Tuesday, November 22, 2016 9:26:01 AM CET Vladimir Murzin wrote:
> >> This driver uses functionality which available for MMU build only,
> >> thus add dependency on MMU.
> >>
> >> Cc: Thierry Reding <thierry.reding@gmail.com>
> >> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> >>
> >
> > Can you be more specific about what requires the MMU here?
> >
> > Is it the I/O space remapping or something else?
>
> Yes it comes from I/O space remapping.
>
> The fill error log:
>
> CC drivers/pci/host/pci-tegra.o
> In file included from ./arch/arm/include/asm/page.h:22:0,
> from ./arch/arm/include/asm/thread_info.h:17,
> from ./include/linux/thread_info.h:58,
> from ./include/asm-generic/current.h:4,
> from ./arch/arm/include/generated/asm/current.h:1,
> from ./include/linux/mutex.h:13,
> from ./include/linux/notifier.h:13,
> from ./include/linux/clk.h:17,
> from drivers/pci/host/pci-tegra.c:29:
> drivers/pci/host/pci-tegra.c: In function 'tegra_pcie_bus_alloc':
> drivers/pci/host/pci-tegra.c:388:27: error: 'L_PTE_PRESENT' undeclared (first use in this function)
> pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
That is not the I/O space, that is the config space.
Not sure what a better alternative would be, but the manual selection
of page flags makes the driver non-portable and dependent on architecture
specifics that it really shouldn't have to worry about.
In common PCI code, we use pgprot_device(PAGE_KERNEL)) at some point,
and that sounds like the right thing to do, but ARM doesn't provide
an override for it and the fallback is pgprot_noncached(), which is
probably wrong here.
Unless someone has a good idea for how to change the driver, just
mention this in the changelog.
Arnd
^ permalink raw reply
* [RFC PATCH 01/11] ARM: NOMMU: define stubs for fixup
From: Vladimir Murzin @ 2016-11-22 9:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122094851.GT1041@n2100.armlinux.org.uk>
On 22/11/16 09:48, Russell King - ARM Linux wrote:
> On Tue, Nov 22, 2016 at 09:25:58AM +0000, Vladimir Murzin wrote:
>> When build for NOMMU following errors show ups:
>>
>> arch/arm/kernel/patch.c: In function 'patch_map':
>> arch/arm/kernel/patch.c:39:2: error: implicit declaration of function 'set_fixmap' [-Werror=implicit-function-declaration]
>> set_fixmap(fixmap, page_to_phys(page));
>> ^
>> arch/arm/kernel/patch.c:41:2: error: implicit declaration of function '__fix_to_virt' [-Werror=implicit-function-declaration]
>> return (void *) (__fix_to_virt(fixmap) + (uintaddr & ~PAGE_MASK));
>> ^
>> arch/arm/kernel/patch.c: In function 'patch_unmap':
>> arch/arm/kernel/patch.c:47:2: error: implicit declaration of function 'clear_fixmap' [-Werror=implicit-function-declaration]
>> clear_fixmap(fixmap);
>> ^
>> cc1: some warnings being treated as errors
>>
>> Fixup does not make much sense in NOMMU configurations, so provide
>> stub definitions.
>>
>> Cc: Russell King <linux@armlinux.org.uk>
>
> I think there should be a Fixes: line for the commit which introduced
> this?
It was discovered only after PATCH 11/11 was applied. Without that patch this
error is unreachable, so no regression.
If you do think it is a good to have Fixes: I can add
Fixes: ab0615e2d6fb (" arm: use fixmap for text patching when text is RO")
Cheers
Vladimir
>
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>> ---
>> arch/arm/include/asm/fixmap.h | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm/include/asm/fixmap.h b/arch/arm/include/asm/fixmap.h
>> index 5c17d2d..0bfc2e3 100644
>> --- a/arch/arm/include/asm/fixmap.h
>> +++ b/arch/arm/include/asm/fixmap.h
>> @@ -59,6 +59,12 @@ enum fixed_addresses {
>>
>> #else
>>
>> +#define set_fixmap(idx, phys)
>> +#define clear_fixmap(idx)
>> +
>> +#define __fix_to_virt(x) (x)
>> +#define __virt_to_fix(x) (x)
>> +
>> static inline void early_fixmap_init(void) { }
>>
>> #endif
>> --
>> 1.7.9.5
>>
>
^ permalink raw reply
* [PATCH 5/6] reset: hisilicon: Use new driver reset-hi6222
From: Arnd Bergmann @ 2016-11-22 9:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <0dcef3c7-7406-0728-5a18-c277bb8915ad@linaro.org>
On Tuesday, November 22, 2016 5:46:22 PM CET zhangfei wrote:
> On 2016?11?22? 16:49, Arnd Bergmann wrote:
> > On Tuesday, November 22, 2016 3:49:20 PM CET Zhangfei Gao wrote:
> >> -#define PERIPH_RSTDIS0_MMC0 0x000
> >> -#define PERIPH_RSTDIS0_MMC1 0x001
> >> -#define PERIPH_RSTDIS0_MMC2 0x002
> >> -#define PERIPH_RSTDIS0_NANDC 0x003
> >> -#define PERIPH_RSTDIS0_USBOTG_BUS 0x004
> >> -#define PERIPH_RSTDIS0_POR_PICOPHY 0x005
> >> -#define PERIPH_RSTDIS0_USBOTG 0x006
> >> -#define PERIPH_RSTDIS0_USBOTG_32K 0x007
> >> -#define PERIPH_RSTDIS1_HIFI 0x100
> >> -#define PERIPH_RSTDIS1_DIGACODEC 0x105
> >> +/* reset in sysctrl */
> >> +#define PERIPH_RSTDIS0_MMC0 0
> >> +#define PERIPH_RSTDIS0_MMC1 1
> >> +#define PERIPH_RSTDIS0_MMC2 2
> >> +#define PERIPH_RSTDIS0_NANDC 3
> >> +#define PERIPH_RSTDIS0_USBOTG_BUS 4
> >> +#define PERIPH_RSTDIS0_POR_PICOPHY 5
> >> +#define PERIPH_RSTDIS0_USBOTG 6
> >> +#define PERIPH_RSTDIS0_USBOTG_32K 7
> >> +#define PERIPH_RSTDIS1_HIFI 8
> > You can't redefined the binding here, this is part of the ABI.
> > You can however add new numbers as long as the old ones keep
> > working.
> The methods are different.
> The original define is offset | bit_shift, and driver has to parse
> offset and bit shift.
> The new define is just index of array, which is defined in the reset-xxx.c
I understand that, what I mean is you have to find a way to let the new
driver still support the old binding, you can't change it.
Arnd
^ permalink raw reply
* [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.10
From: Geert Uytterhoeven @ 2016-11-22 9:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOesGMj47EZ1Zjc41VV2D-cM5XUsK28PDF-jSHKUkkind32ZRA@mail.gmail.com>
Hi Olof,
On Mon, Nov 21, 2016 at 5:35 PM, Olof Johansson <olof@lixom.net> wrote:
> On Mon, Nov 21, 2016 at 8:27 AM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
>> On Mon, Nov 21, 2016 at 5:19 PM, Olof Johansson <olof@lixom.net> wrote:
>>> On Mon, Nov 21, 2016 at 1:31 AM, Geert Uytterhoeven
>>> <geert@linux-m68k.org> wrote:
>>>> On Sat, Nov 19, 2016 at 2:28 AM, Olof Johansson <olof@lixom.net> wrote:
>>>>> On Thu, Nov 17, 2016 at 02:34:25PM +0100, Simon Horman wrote:
>>>>>> Please consider these second round of Renesas ARM based SoC updates for v4.10.
>>>>
>>>>>> * Basic support for r8a7745 SoC
>>>>>>
>>>>>> ----------------------------------------------------------------
>>>>>> Sergei Shtylyov (2):
>>>>>> ARM: shmobile: r8a7745: basic SoC support
>>>>>> ARM: shmobile: document SK-RZG1E board
>>>>>
>>>>> Is there a reason you're adding a config option per SoC?
>>>>>
>>>>> I think you'd be better off not adding these config options, and just adding
>>>>> support for the SoCs through compatibles (and adding the drivers to defconfigs,
>>>>> etc).
>>>>
>>>> Yes there is a reason: kernel size.
>>>> The main offenders are the pinctrl tables, which add ca. 20-50 KiB per
>>>> supported SoC.
>>>
>>> So don't turn on that pinctrl driver unless you have that SoC?
>>
>> The enablement of the pinctrl driver (and the clock driver, FWIW) is controlled
>> by the SoC Kconfig symbol. If you want support for the SoC, you want the
>> pinctrl driver, too.
>
> Oh, that's trivial to fix! Do as almost all other SoCs do, and don't
> use silent options.
What does that gain us? The ability to enable support for an SoC, without
enabling the accompanying pinctrl driver, leading to a non-booting system?
As soon as you have any pinctrl properties in the DT, you need the pinctrl
driver. Unless you disable CONFIG_PINCTRL (it's selected, and not
user-controlled), and rely on fragile reset state/boot loader.
Pinctrl (and clock and irqchip) on-SoC drivers are special: if you fail to
include them, the system won't boot.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH 2/3] ARM: davinci: hawk: remove mmc ro pin
From: Sekhar Nori @ 2016-11-22 9:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161121161541.27048-3-ahaslam@baylibre.com>
On Monday 21 November 2016 09:45 PM, Axel Haslam wrote:
> The hawk board does not have a write protect pin to read the card
> write protect status.
>
> So remove un-needed platform data declaration for this gpio.
>
> Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
The schematic I found has the SD_WP pin connected to GPIO3_13.
Thanks,
Sekhar
^ permalink raw reply
* [RFC PATCH 04/11] PCI: tegra: limit to MMU build only
From: Vladimir Murzin @ 2016-11-22 9:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <28079479.jInxCWkYlm@wuerfel>
On 22/11/16 09:54, Arnd Bergmann wrote:
> On Tuesday, November 22, 2016 9:40:39 AM CET Vladimir Murzin wrote:
>> On 22/11/16 09:31, Arnd Bergmann wrote:
>>> On Tuesday, November 22, 2016 9:26:01 AM CET Vladimir Murzin wrote:
>>>> This driver uses functionality which available for MMU build only,
>>>> thus add dependency on MMU.
>>>>
>>>> Cc: Thierry Reding <thierry.reding@gmail.com>
>>>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>>>>
>>>
>>> Can you be more specific about what requires the MMU here?
>>>
>>> Is it the I/O space remapping or something else?
>>
>> Yes it comes from I/O space remapping.
>>
>> The fill error log:
>>
>> CC drivers/pci/host/pci-tegra.o
>> In file included from ./arch/arm/include/asm/page.h:22:0,
>> from ./arch/arm/include/asm/thread_info.h:17,
>> from ./include/linux/thread_info.h:58,
>> from ./include/asm-generic/current.h:4,
>> from ./arch/arm/include/generated/asm/current.h:1,
>> from ./include/linux/mutex.h:13,
>> from ./include/linux/notifier.h:13,
>> from ./include/linux/clk.h:17,
>> from drivers/pci/host/pci-tegra.c:29:
>> drivers/pci/host/pci-tegra.c: In function 'tegra_pcie_bus_alloc':
>> drivers/pci/host/pci-tegra.c:388:27: error: 'L_PTE_PRESENT' undeclared (first use in this function)
>> pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
>
>
> That is not the I/O space, that is the config space.
Sorry for that, I'm not in PCI :(
>
> Not sure what a better alternative would be, but the manual selection
> of page flags makes the driver non-portable and dependent on architecture
> specifics that it really shouldn't have to worry about.
>
> In common PCI code, we use pgprot_device(PAGE_KERNEL)) at some point,
> and that sounds like the right thing to do, but ARM doesn't provide
> an override for it and the fallback is pgprot_noncached(), which is
> probably wrong here.
>
> Unless someone has a good idea for how to change the driver, just
> mention this in the changelog.
Thanks for explanation! I'll wait for Thierry's thoughts on this.
Cheers
Vladimir
>
> Arnd
>
^ permalink raw reply
* [PATCH v2 0/2] ARM64: dts: Add support for Meson GXM
From: Neil Armstrong @ 2016-11-22 10:00 UTC (permalink / raw)
To: linux-arm-kernel
The new Amlogic GXM SoC (S912) is part of the Meson GX family and is nearly
identical to GXM but with a second Quad-A53 core cluster.
The GXM dtsi includes the GXL dtsi and the p20x dtsi is refactored in a
common p20x/q20x to support the GXM Q200 and Q201 board that uses the exact
same board layout since the S905D and S912 are pinout compatible.
The last patch adds support for the Nexbox A1 Set-Top-Box based on the S912.
Changes since v1 at [1] :
- Remove bad p200/p201 changes
- Fix cpu-map
Changes since RFC :
- Refactor the p20x/q20x dtsi into a single common file
- Add support for Nexbox A1
[1] http://lkml.kernel.org/r/20161121162905.14285-1-narmstrong at baylibre.com
Neil Armstrong (2):
ARM64: dts: Add support for Meson GXM
ARM64: dts: meson-gxm: Add support for the Nexbox A1
Documentation/devicetree/bindings/arm/amlogic.txt | 7 +
arch/arm64/boot/dts/amlogic/Makefile | 3 +
...gxl-s905d-p23x.dtsi => meson-gx-p23x-q20x.dtsi} | 4 +-
.../boot/dts/amlogic/meson-gxl-s905d-p230.dts | 3 +-
.../boot/dts/amlogic/meson-gxl-s905d-p231.dts | 3 +-
.../arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 169 +++++++++++++++++++++
.../arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts | 77 ++++++++++
.../arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts | 58 +++++++
arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 114 ++++++++++++++
9 files changed, 435 insertions(+), 3 deletions(-)
rename arch/arm64/boot/dts/amlogic/{meson-gxl-s905d-p23x.dtsi => meson-gx-p23x-q20x.dtsi} (97%)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
--
2.7.0
^ permalink raw reply
* [PATCH v2 1/2] ARM64: dts: Add support for Meson GXM
From: Neil Armstrong @ 2016-11-22 10:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122100046.25899-1-narmstrong@baylibre.com>
Following the Amlogic Linux kernel, it seem the only differences
between the GXL and GXM SoCs are the CPU Clusters.
This commit renames the gxl-s905d-p23x DTSI in a common file for
S905D p23x and S912 q20x boards.
Then adds a meson-gxm dtsi and reproduce the P23x to Q20x boards
dts files since the S905D and S912 SoCs shares the same pinout
and the P23x and Q20x boards are identical.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
Documentation/devicetree/bindings/arm/amlogic.txt | 6 ++
arch/arm64/boot/dts/amlogic/Makefile | 2 +
...gxl-s905d-p23x.dtsi => meson-gx-p23x-q20x.dtsi} | 4 +-
.../boot/dts/amlogic/meson-gxl-s905d-p230.dts | 3 +-
.../boot/dts/amlogic/meson-gxl-s905d-p231.dts | 3 +-
.../arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts | 77 ++++++++++++++
.../arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts | 58 +++++++++++
arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 114 +++++++++++++++++++++
8 files changed, 264 insertions(+), 3 deletions(-)
rename arch/arm64/boot/dts/amlogic/{meson-gxl-s905d-p23x.dtsi => meson-gx-p23x-q20x.dtsi} (97%)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt
index fffc179..1144214 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.txt
+++ b/Documentation/devicetree/bindings/arm/amlogic.txt
@@ -25,6 +25,10 @@ Boards with the Amlogic Meson GXL S905D SoC shall have the following properties:
Required root node property:
compatible: "amlogic,s905d", "amlogic,meson-gxl";
+Boards with the Amlogic Meson GXM S912 SoC shall have the following properties:
+ Required root node property:
+ compatible: "amlogic,s912", "amlogic,meson-gxm";
+
Board compatible values:
- "geniatech,atv1200" (Meson6)
- "minix,neo-x8" (Meson8)
@@ -39,3 +43,5 @@ Board compatible values:
- "amlogic,p212" (Meson gxl s905x)
- "amlogic,p230" (Meson gxl s905d)
- "amlogic,p231" (Meson gxl s905d)
+ - "amlogic,q200" (Meson gxm s912)
+ - "amlogic,q201" (Meson gxm s912)
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 5a64050..7752a16 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -8,6 +8,8 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-q200.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-q201.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
similarity index 97%
rename from arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi
rename to arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
index 622ffbe..7a078be 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
@@ -41,7 +41,9 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
-#include "meson-gxl-s905d.dtsi"
+/* Common DTSI for same Amlogic Q200/Q201 and P230/P231 boards using either
+ * the pin-compatible S912 (GXM) or S905D (GXL) SoCs.
+ */
/ {
aliases {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
index 4d082a7..f66939c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
@@ -43,7 +43,8 @@
/dts-v1/;
-#include "meson-gxl-s905d-p23x.dtsi"
+#include "meson-gxl-s905d.dtsi"
+#include "meson-gx-p23x-q20x.dtsi"
/ {
compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
index 1cc8d49..95992cf 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
@@ -43,7 +43,8 @@
/dts-v1/;
-#include "meson-gxl-s905d-p23x.dtsi"
+#include "meson-gxl-s905d.dtsi"
+#include "meson-gx-p23x-q20x.dtsi"
/ {
compatible = "amlogic,p231", "amlogic,s905d", "amlogic,meson-gxl";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts
new file mode 100644
index 0000000..5dbc660
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q200.dts
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2016 Endless Computers, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "meson-gxm.dtsi"
+#include "meson-gx-p23x-q20x.dtsi"
+
+/ {
+ compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm";
+ model = "Amlogic Meson GXM (S912) Q200 Development Board";
+};
+
+/* Q200 has exclusive choice between internal or external PHY */
+ðmac {
+ pinctrl-0 = <ð_pins>;
+ pinctrl-names = "default";
+
+ /* Select external PHY by default */
+ phy-handle = <&external_phy>;
+
+ /* External PHY reset is shared with internal PHY Led signals */
+ snps,reset-gpio = <&gpio GPIOZ_14 0>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+
+ /* External PHY is in RGMII */
+ phy-mode = "rgmii";
+};
+
+&external_mdio {
+ external_phy: ethernet-phy at 0 {
+ compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ max-speed = <1000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts
new file mode 100644
index 0000000..95e11d7
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-s912-q201.dts
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2016 Endless Computers, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "meson-gxm.dtsi"
+#include "meson-gx-p23x-q20x.dtsi"
+
+/ {
+ compatible = "amlogic,q201", "amlogic,s912", "amlogic,meson-gxm";
+ model = "Amlogic Meson GXM (S912) Q201 Development Board";
+};
+
+/* Q201 has only internal PHY port */
+ðmac {
+ phy-mode = "rmii";
+ phy-handle = <&internal_phy>;
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
new file mode 100644
index 0000000..c1974bb
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2016 Endless Computers, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "meson-gxl.dtsi"
+
+/ {
+ compatible = "amlogic,meson-gxm";
+
+ cpus {
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ core2 {
+ cpu = <&cpu2>;
+ };
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <&cpu4>;
+ };
+ core1 {
+ cpu = <&cpu5>;
+ };
+ core2 {
+ cpu = <&cpu6>;
+ };
+ core3 {
+ cpu = <&cpu7>;
+ };
+ };
+ };
+
+ cpu4: cpu at 100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ next-level-cache = <&l2>;
+ };
+
+ cpu5: cpu at 101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0 0x101>;
+ enable-method = "psci";
+ next-level-cache = <&l2>;
+ };
+
+ cpu6: cpu at 102 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0 0x102>;
+ enable-method = "psci";
+ next-level-cache = <&l2>;
+ };
+
+ cpu7: cpu at 103 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0 0x103>;
+ enable-method = "psci";
+ next-level-cache = <&l2>;
+ };
+ };
+};
--
2.7.0
^ permalink raw reply related
* [PATCH v2 2/2] ARM64: dts: meson-gxm: Add support for the Nexbox A1
From: Neil Armstrong @ 2016-11-22 10:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122100046.25899-1-narmstrong@baylibre.com>
Add support for the Nexbox A1 board based on the Amlogic S912 SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
Documentation/devicetree/bindings/arm/amlogic.txt | 1 +
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 169 +++++++++++++++++++++
3 files changed, 171 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt
index 1144214..6ef7c52 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.txt
+++ b/Documentation/devicetree/bindings/arm/amlogic.txt
@@ -45,3 +45,4 @@ Board compatible values:
- "amlogic,p231" (Meson gxl s905d)
- "amlogic,q200" (Meson gxm s912)
- "amlogic,q201" (Meson gxm s912)
+ - "nexbox,a1" (Meson gxm s912)
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 7752a16..2fbb8e3 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-q200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-q201.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
new file mode 100644
index 0000000..d320727
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2016 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * Copyright (c) 2016 Endless Computers, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "meson-gxm.dtsi"
+
+/ {
+ compatible = "nexbox,a1", "amlogic,s912", "amlogic,meson-gxm";
+ model = "NEXBOX A1";
+
+ aliases {
+ serial0 = &uart_AO;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ vddio_boot: regulator-vddio_boot {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_BOOT";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vddao_3v3: regulator-vddao_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDAO_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+};
+
+/* This UART is brought out to the DB9 connector */
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+
+ vmmc-supply = <&vddao_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>;
+ pinctrl-names = "default";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vddio_boot>;
+};
+
+ðmac {
+ status = "okay";
+
+ pinctrl-0 = <ð_pins>;
+ pinctrl-names = "default";
+
+ /* Select external PHY by default */
+ phy-handle = <&external_phy>;
+
+ snps,reset-gpio = <&gpio GPIOZ_14 0>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+
+ /* External PHY is in RGMII */
+ phy-mode = "rgmii";
+};
+
+&external_mdio {
+ external_phy: ethernet-phy at 0 {
+ compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ max-speed = <1000>;
+ };
+};
--
2.7.0
^ permalink raw reply related
* [PATCH 3/6] reset: hisilicon: add reset-hi3660
From: zhangfei @ 2016-11-22 10:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3166877.sQekoU5ezv@wuerfel>
On 2016?11?22? 17:42, Arnd Bergmann wrote:
> On Tuesday, November 22, 2016 5:34:05 PM CET zhangfei wrote:
>> On 2016?11?22? 16:50, Arnd Bergmann wrote:
>>> On Tuesday, November 22, 2016 3:49:18 PM CET Zhangfei Gao wrote:
>>>> +static const struct hisi_reset_channel_data hi3660_iomcu_rst[] = {
>>>> + [HI3660_RST_I2C0] = HISI_RST_SEP(0x20, 3),
>>>> + [HI3660_RST_I2C1] = HISI_RST_SEP(0x20, 4),
>>>> + [HI3660_RST_I2C2] = HISI_RST_SEP(0x20, 5),
>>>> + [HI3660_RST_I2C6] = HISI_RST_SEP(0x20, 27),
>>>> +};
>>>> +
>>>> +static struct hisi_reset_controller_data hi3660_iomcu_controller = {
>>>> + .nr_channels = ARRAY_SIZE(hi3660_iomcu_rst),
>>>> + .channels = hi3660_iomcu_rst,
>>>> +};
>>>> +
>>>> +static const struct hisi_reset_channel_data hi3660_crgctrl_rst[] = {
>>>> + [HI3660_RST_I2C3] = HISI_RST_SEP(0x78, 7),
>>>> + [HI3660_RST_I2C4] = HISI_RST_SEP(0x78, 27),
>>>> + [HI3660_RST_I2C7] = HISI_RST_SEP(0x60, 14),
>>>> + [HI3660_RST_SD] = HISI_RST_SEP(0x90, 18),
>>>> + [HI3660_RST_SDIO] = HISI_RST_SEP(0x90, 20),
>>>> + [HI3660_RST_UFS] = HISI_RST_SEP(0x84, 12),
>>>> + [HI3660_RST_UFS_ASSERT] = HISI_RST_SEP(0x84, 7),
>>>> + [HI3660_RST_PCIE_SYS] = HISI_RST_SEP(0x84, 26),
>>>> + [HI3660_RST_PCIE_PHY] = HISI_RST_SEP(0x84, 27),
>>>> + [HI3660_RST_PCIE_BUS] = HISI_RST_SEP(0x84, 31),
>>>> + [HI3660_RST_USB3OTG_PHY] = HISI_RST_SEP(0x90, 3),
>>>> + [HI3660_RST_USB3OTG] = HISI_RST_SEP(0x90, 5),
>>>> + [HI3660_RST_USB3OTG_32K] = HISI_RST_SEP(0x90, 6),
>>>> + [HI3660_RST_USB3OTG_AHB] = HISI_RST_SEP(0x90, 7),
>>>> + [HI3660_RST_USB3OTG_MUX] = HISI_RST_SEP(0x90, 8),
>>>> +};
>>> I think you can avoid the trap of the ABI incompatibility if
>>> you just define those as in the binding as tuples, using #reset-cells=2.
>>>
>>> In particular for the first set, it seems really silly to redefine
>>> the numbers when there is just a simple integer number.
>> Could you clarify more, still not understand.
>> The number is index of the arrays, and the index will be used in dts.
>> The arrays lists the registers offset and bit shift.
>> For example:
>>
>> [HI3660_RST_I2C0] = HISI_RST_SEP(0x20, 3), means register offset : 0x20, and bit shift = 3.
>>
>> And Documentation/devicetree/bindings/reset/reset.txt
>> Required properties:
>> #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
>> with a single reset output and 1 for nodes with multiple
>> reset outputs.
> You can easily enumerate the registers that contain reset bits here,
> so just use one cell for the register and another one for the index.
/* reset separated register offset is 0x4 */
#define HISI_RST_SEP(off, bit) \
{ .enable = REG_FIELD(off, bit, bit), \
.disable = REG_FIELD(off + 0x4, bit, bit), \
.status = REG_FIELD(off + 0x8, bit, bit), }
We not only provide the off and bit shift, but fulfill the members in
the meantime.
Thanks
^ permalink raw reply
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